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author | Catalin Marinas <catalin.marinas@arm.com> | 2010-05-07 13:03:05 -0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-05-08 05:44:30 -0400 |
commit | b8349b569aae661dea9d59d7d2ee587ccea3336c (patch) | |
tree | 297ce3147521e0658321d61114a045bef4eca1d0 /arch/microblaze/include/asm/sigcontext.h | |
parent | f4d6477f7f073b99220386d62f5bf54bec3482cc (diff) |
ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP
The standard I-cache Invalidate All (ICIALLU) and Branch Predication
Invalidate All (BPIALL) operations are not automatically broadcast to
the other CPUs in an ARMv7 MP system. The patch adds the Inner Shareable
variants, ICIALLUIS and BPIALLIS, if ARMv7 and SMP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/microblaze/include/asm/sigcontext.h')
0 files changed, 0 insertions, 0 deletions