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authorMichal Simek <monstr@monstr.eu>2009-05-26 10:30:18 -0400
committerMichal Simek <monstr@monstr.eu>2009-05-26 10:45:18 -0400
commit5233806dfe6f88fb1a01db3729eeda78f65bcbd1 (patch)
treee96b2391809812b521f141b6a2ed6f3d7407db34 /arch/microblaze/include/asm/registers.h
parent1f84e1ea0e87ad659cd6f6a6285d50c73a8d1a24 (diff)
microblaze_mmu_v2: Update process creation for MMU
Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze/include/asm/registers.h')
-rw-r--r--arch/microblaze/include/asm/registers.h21
1 files changed, 19 insertions, 2 deletions
diff --git a/arch/microblaze/include/asm/registers.h b/arch/microblaze/include/asm/registers.h
index 834142d9356f..68c3afb73877 100644
--- a/arch/microblaze/include/asm/registers.h
+++ b/arch/microblaze/include/asm/registers.h
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copyright (C) 2008 Michal Simek 2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2008 PetaLogix 3 * Copyright (C) 2008-2009 PetaLogix
4 * Copyright (C) 2006 Atmark Techno, Inc. 4 * Copyright (C) 2006 Atmark Techno, Inc.
5 * 5 *
6 * This file is subject to the terms and conditions of the GNU General Public 6 * This file is subject to the terms and conditions of the GNU General Public
@@ -30,4 +30,21 @@
30#define FSR_UF (1<<1) /* Underflow */ 30#define FSR_UF (1<<1) /* Underflow */
31#define FSR_DO (1<<0) /* Denormalized operand error */ 31#define FSR_DO (1<<0) /* Denormalized operand error */
32 32
33# ifdef CONFIG_MMU
34/* Machine State Register (MSR) Fields */
35# define MSR_UM (1<<11) /* User Mode */
36# define MSR_UMS (1<<12) /* User Mode Save */
37# define MSR_VM (1<<13) /* Virtual Mode */
38# define MSR_VMS (1<<14) /* Virtual Mode Save */
39
40# define MSR_KERNEL (MSR_EE | MSR_VM)
41/* # define MSR_USER (MSR_KERNEL | MSR_UM | MSR_IE) */
42# define MSR_KERNEL_VMS (MSR_EE | MSR_VMS)
43/* # define MSR_USER_VMS (MSR_KERNEL_VMS | MSR_UMS | MSR_IE) */
44
45/* Exception State Register (ESR) Fields */
46# define ESR_DIZ (1<<11) /* Zone Protection */
47# define ESR_S (1<<10) /* Store instruction */
48
49# endif /* CONFIG_MMU */
33#endif /* _ASM_MICROBLAZE_REGISTERS_H */ 50#endif /* _ASM_MICROBLAZE_REGISTERS_H */