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authorGreg Ungerer <gerg@uclinux.org>2011-03-21 23:39:27 -0400
committerGreg Ungerer <gerg@uclinux.org>2011-03-25 00:05:13 -0400
commit66d857b08b8c3ed5c72c361f863cce77d2a978d7 (patch)
tree47222d86f4d78dc0da31baf64188bd2e4b38ac1e /arch/m68knommu
parentd39dd11c3e6a7af5c20bfac40594db36cf270f42 (diff)
m68k: merge m68k and m68knommu arch directories
There is a lot of common code that could be shared between the m68k and m68knommu arch branches. It makes sense to merge the two branches into a single directory structure so that we can more easily share that common code. This is a brute force merge, based on a script from Stephen King <sfking@fdwdc.com>, which was originally written by Arnd Bergmann <arnd@arndb.de>. > The script was inspired by the script Sam Ravnborg used to merge the > includes from m68knommu. For those files common to both arches but > differing in content, the m68k version of the file is renamed to > <file>_mm.<ext> and the m68knommu version of the file is moved into the > corresponding m68k directory and renamed <file>_no.<ext> and a small > wrapper file <file>.<ext> is used to select between the two version. Files > that are common to both but don't differ are removed from the m68knommu > tree and files and directories that are unique to the m68knommu tree are > moved to the m68k tree. Finally, the arch/m68knommu tree is removed. > > To select between the the versions of the files, the wrapper uses > > #ifdef CONFIG_MMU > #include <file>_mm.<ext> > #else > #include <file>_no.<ext> > #endif On top of this file merge I have done a simplistic merge of m68k and m68knommu Kconfig, which primarily attempts to keep existing options and menus in place. Other than a handful of options being moved it produces identical .config outputs on m68k and m68knommu targets I tested it on. With this in place there is now quite a bit of scope for merge cleanups in future patches. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68knommu')
-rw-r--r--arch/m68knommu/Kconfig844
-rw-r--r--arch/m68knommu/Kconfig.debug35
-rw-r--r--arch/m68knommu/Makefile126
-rw-r--r--arch/m68knommu/configs/m5208evb_defconfig74
-rw-r--r--arch/m68knommu/configs/m5249evb_defconfig67
-rw-r--r--arch/m68knommu/configs/m5272c3_defconfig65
-rw-r--r--arch/m68knommu/configs/m5275evb_defconfig72
-rw-r--r--arch/m68knommu/configs/m5307c3_defconfig75
-rw-r--r--arch/m68knommu/configs/m5407c3_defconfig69
-rw-r--r--arch/m68knommu/defconfig74
-rw-r--r--arch/m68knommu/kernel/.gitignore1
-rw-r--r--arch/m68knommu/kernel/Makefile10
-rw-r--r--arch/m68knommu/kernel/asm-offsets.c76
-rw-r--r--arch/m68knommu/kernel/dma.c74
-rw-r--r--arch/m68knommu/kernel/entry.S134
-rw-r--r--arch/m68knommu/kernel/init_task.c36
-rw-r--r--arch/m68knommu/kernel/irq.c58
-rw-r--r--arch/m68knommu/kernel/m68k_ksyms.c78
-rw-r--r--arch/m68knommu/kernel/module.c126
-rw-r--r--arch/m68knommu/kernel/process.c404
-rw-r--r--arch/m68knommu/kernel/ptrace.c255
-rw-r--r--arch/m68knommu/kernel/setup.c317
-rw-r--r--arch/m68knommu/kernel/signal.c765
-rw-r--r--arch/m68knommu/kernel/sys_m68k.c94
-rw-r--r--arch/m68knommu/kernel/syscalltable.S365
-rw-r--r--arch/m68knommu/kernel/time.c87
-rw-r--r--arch/m68knommu/kernel/traps.c365
-rw-r--r--arch/m68knommu/kernel/vmlinux.lds.S188
-rw-r--r--arch/m68knommu/lib/Makefile7
-rw-r--r--arch/m68knommu/lib/ashldi3.c62
-rw-r--r--arch/m68knommu/lib/ashrdi3.c63
-rw-r--r--arch/m68knommu/lib/checksum.c153
-rw-r--r--arch/m68knommu/lib/delay.c21
-rw-r--r--arch/m68knommu/lib/divsi3.S125
-rw-r--r--arch/m68knommu/lib/lshrdi3.c62
-rw-r--r--arch/m68knommu/lib/memcpy.c62
-rw-r--r--arch/m68knommu/lib/memmove.c105
-rw-r--r--arch/m68knommu/lib/memset.c47
-rw-r--r--arch/m68knommu/lib/modsi3.S113
-rw-r--r--arch/m68knommu/lib/muldi3.c86
-rw-r--r--arch/m68knommu/lib/mulsi3.S110
-rw-r--r--arch/m68knommu/lib/udivsi3.S162
-rw-r--r--arch/m68knommu/lib/umodsi3.S113
-rw-r--r--arch/m68knommu/mm/Makefile5
-rw-r--r--arch/m68knommu/mm/init.c193
-rw-r--r--arch/m68knommu/mm/kmap.c45
-rw-r--r--arch/m68knommu/platform/5206/Makefile18
-rw-r--r--arch/m68knommu/platform/5206/config.c121
-rw-r--r--arch/m68knommu/platform/5206/gpio.c49
-rw-r--r--arch/m68knommu/platform/5206e/Makefile18
-rw-r--r--arch/m68knommu/platform/5206e/config.c127
-rw-r--r--arch/m68knommu/platform/5206e/gpio.c49
-rw-r--r--arch/m68knommu/platform/520x/Makefile17
-rw-r--r--arch/m68knommu/platform/520x/config.c311
-rw-r--r--arch/m68knommu/platform/520x/gpio.c211
-rw-r--r--arch/m68knommu/platform/523x/Makefile17
-rw-r--r--arch/m68knommu/platform/523x/config.c293
-rw-r--r--arch/m68knommu/platform/523x/gpio.c284
-rw-r--r--arch/m68knommu/platform/5249/Makefile18
-rw-r--r--arch/m68knommu/platform/5249/config.c330
-rw-r--r--arch/m68knommu/platform/5249/gpio.c65
-rw-r--r--arch/m68knommu/platform/5249/intc2.c61
-rw-r--r--arch/m68knommu/platform/5272/Makefile18
-rw-r--r--arch/m68knommu/platform/5272/config.c176
-rw-r--r--arch/m68knommu/platform/5272/gpio.c81
-rw-r--r--arch/m68knommu/platform/5272/intc.c187
-rw-r--r--arch/m68knommu/platform/527x/Makefile18
-rw-r--r--arch/m68knommu/platform/527x/config.c384
-rw-r--r--arch/m68knommu/platform/527x/gpio.c609
-rw-r--r--arch/m68knommu/platform/528x/Makefile18
-rw-r--r--arch/m68knommu/platform/528x/config.c320
-rw-r--r--arch/m68knommu/platform/528x/gpio.c438
-rw-r--r--arch/m68knommu/platform/5307/Makefile20
-rw-r--r--arch/m68knommu/platform/5307/config.c147
-rw-r--r--arch/m68knommu/platform/5307/gpio.c49
-rw-r--r--arch/m68knommu/platform/5307/nettel.c153
-rw-r--r--arch/m68knommu/platform/532x/Makefile18
-rw-r--r--arch/m68knommu/platform/532x/config.c648
-rw-r--r--arch/m68knommu/platform/532x/gpio.c337
-rw-r--r--arch/m68knommu/platform/5407/Makefile18
-rw-r--r--arch/m68knommu/platform/5407/config.c122
-rw-r--r--arch/m68knommu/platform/5407/gpio.c49
-rw-r--r--arch/m68knommu/platform/54xx/Makefile19
-rw-r--r--arch/m68knommu/platform/54xx/config.c115
-rw-r--r--arch/m68knommu/platform/54xx/firebee.c86
-rw-r--r--arch/m68knommu/platform/68328/Makefile22
-rw-r--r--arch/m68knommu/platform/68328/bootlogo.h270
-rw-r--r--arch/m68knommu/platform/68328/bootlogo.pl10
-rw-r--r--arch/m68knommu/platform/68328/config.c52
-rw-r--r--arch/m68knommu/platform/68328/entry.S263
-rw-r--r--arch/m68knommu/platform/68328/head-de2.S128
-rw-r--r--arch/m68knommu/platform/68328/head-pilot.S222
-rw-r--r--arch/m68knommu/platform/68328/head-ram.S141
-rw-r--r--arch/m68knommu/platform/68328/head-rom.S110
-rw-r--r--arch/m68knommu/platform/68328/ints.c186
-rw-r--r--arch/m68knommu/platform/68328/romvec.S35
-rw-r--r--arch/m68knommu/platform/68328/timers.c134
-rw-r--r--arch/m68knommu/platform/68360/Makefile10
-rw-r--r--arch/m68knommu/platform/68360/commproc.c308
-rw-r--r--arch/m68knommu/platform/68360/config.c186
-rw-r--r--arch/m68knommu/platform/68360/entry.S184
-rw-r--r--arch/m68knommu/platform/68360/head-ram.S403
-rw-r--r--arch/m68knommu/platform/68360/head-rom.S414
-rw-r--r--arch/m68knommu/platform/68360/ints.c139
-rw-r--r--arch/m68knommu/platform/68EZ328/Makefile11
-rw-r--r--arch/m68knommu/platform/68EZ328/bootlogo.h3204
-rw-r--r--arch/m68knommu/platform/68EZ328/config.c76
-rw-r--r--arch/m68knommu/platform/68VZ328/Makefile16
-rw-r--r--arch/m68knommu/platform/68VZ328/config.c188
-rw-r--r--arch/m68knommu/platform/Makefile3
-rw-r--r--arch/m68knommu/platform/coldfire/Makefile32
-rw-r--r--arch/m68knommu/platform/coldfire/cache.c48
-rw-r--r--arch/m68knommu/platform/coldfire/clk.c45
-rw-r--r--arch/m68knommu/platform/coldfire/dma.c39
-rw-r--r--arch/m68knommu/platform/coldfire/dma_timer.c84
-rw-r--r--arch/m68knommu/platform/coldfire/entry.S203
-rw-r--r--arch/m68knommu/platform/coldfire/gpio.c127
-rw-r--r--arch/m68knommu/platform/coldfire/head.S250
-rw-r--r--arch/m68knommu/platform/coldfire/intc-2.c214
-rw-r--r--arch/m68knommu/platform/coldfire/intc-simr.c191
-rw-r--r--arch/m68knommu/platform/coldfire/intc.c151
-rw-r--r--arch/m68knommu/platform/coldfire/pinmux.c28
-rw-r--r--arch/m68knommu/platform/coldfire/pit.c169
-rw-r--r--arch/m68knommu/platform/coldfire/sltimers.c145
-rw-r--r--arch/m68knommu/platform/coldfire/timers.c174
-rw-r--r--arch/m68knommu/platform/coldfire/vectors.c80
126 files changed, 0 insertions, 21182 deletions
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
deleted file mode 100644
index b5424cf948e6..000000000000
--- a/arch/m68knommu/Kconfig
+++ /dev/null
@@ -1,844 +0,0 @@
1config M68K
2 bool
3 default y
4 select HAVE_IDE
5 select HAVE_GENERIC_HARDIRQS
6 select GENERIC_HARDIRQS_NO_DEPRECATED
7
8config MMU
9 bool
10 default n
11
12config NO_DMA
13 bool
14 depends on !COLDFIRE
15 default y
16
17config FPU
18 bool
19 default n
20
21config ZONE_DMA
22 bool
23 default y
24
25config RWSEM_GENERIC_SPINLOCK
26 bool
27 default y
28
29config RWSEM_XCHGADD_ALGORITHM
30 bool
31 default n
32
33config ARCH_HAS_ILOG2_U32
34 bool
35 default n
36
37config ARCH_HAS_ILOG2_U64
38 bool
39 default n
40
41config GENERIC_FIND_NEXT_BIT
42 bool
43 default y
44
45config GENERIC_GPIO
46 bool
47 default n
48
49config GENERIC_HWEIGHT
50 bool
51 default y
52
53config GENERIC_CALIBRATE_DELAY
54 bool
55 default y
56
57config GENERIC_CMOS_UPDATE
58 bool
59 default y
60
61config TIME_LOW_RES
62 bool
63 default y
64
65config GENERIC_CLOCKEVENTS
66 bool
67 default n
68
69config NO_IOPORT
70 def_bool y
71
72config COLDFIRE_SW_A7
73 bool
74 default n
75
76config HAVE_CACHE_SPLIT
77 bool
78
79config HAVE_CACHE_CB
80 bool
81
82config HAVE_MBAR
83 bool
84
85config HAVE_IPSBAR
86 bool
87
88source "init/Kconfig"
89
90source "kernel/Kconfig.freezer"
91
92menu "Processor type and features"
93
94choice
95 prompt "CPU"
96 default M68EZ328
97
98config M68328
99 bool "MC68328"
100 help
101 Motorola 68328 processor support.
102
103config M68EZ328
104 bool "MC68EZ328"
105 help
106 Motorola 68EX328 processor support.
107
108config M68VZ328
109 bool "MC68VZ328"
110 help
111 Motorola 68VZ328 processor support.
112
113config M68360
114 bool "MC68360"
115 help
116 Motorola 68360 processor support.
117
118config M5206
119 bool "MCF5206"
120 select COLDFIRE_SW_A7
121 select HAVE_MBAR
122 help
123 Motorola ColdFire 5206 processor support.
124
125config M5206e
126 bool "MCF5206e"
127 select COLDFIRE_SW_A7
128 select HAVE_MBAR
129 help
130 Motorola ColdFire 5206e processor support.
131
132config M520x
133 bool "MCF520x"
134 select GENERIC_CLOCKEVENTS
135 select HAVE_CACHE_SPLIT
136 help
137 Freescale Coldfire 5207/5208 processor support.
138
139config M523x
140 bool "MCF523x"
141 select GENERIC_CLOCKEVENTS
142 select HAVE_CACHE_SPLIT
143 select HAVE_IPSBAR
144 help
145 Freescale Coldfire 5230/1/2/4/5 processor support
146
147config M5249
148 bool "MCF5249"
149 select COLDFIRE_SW_A7
150 select HAVE_MBAR
151 help
152 Motorola ColdFire 5249 processor support.
153
154config M5271
155 bool "MCF5271"
156 select HAVE_CACHE_SPLIT
157 select HAVE_IPSBAR
158 help
159 Freescale (Motorola) ColdFire 5270/5271 processor support.
160
161config M5272
162 bool "MCF5272"
163 select COLDFIRE_SW_A7
164 select HAVE_MBAR
165 help
166 Motorola ColdFire 5272 processor support.
167
168config M5275
169 bool "MCF5275"
170 select HAVE_CACHE_SPLIT
171 select HAVE_IPSBAR
172 help
173 Freescale (Motorola) ColdFire 5274/5275 processor support.
174
175config M528x
176 bool "MCF528x"
177 select GENERIC_CLOCKEVENTS
178 select HAVE_CACHE_SPLIT
179 select HAVE_IPSBAR
180 help
181 Motorola ColdFire 5280/5282 processor support.
182
183config M5307
184 bool "MCF5307"
185 select COLDFIRE_SW_A7
186 select HAVE_CACHE_CB
187 select HAVE_MBAR
188 help
189 Motorola ColdFire 5307 processor support.
190
191config M532x
192 bool "MCF532x"
193 select HAVE_CACHE_CB
194 help
195 Freescale (Motorola) ColdFire 532x processor support.
196
197config M5407
198 bool "MCF5407"
199 select COLDFIRE_SW_A7
200 select HAVE_CACHE_CB
201 select HAVE_MBAR
202 help
203 Motorola ColdFire 5407 processor support.
204
205config M547x
206 bool "MCF547x"
207 select HAVE_CACHE_CB
208 select HAVE_MBAR
209 help
210 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
211
212config M548x
213 bool "MCF548x"
214 select HAVE_CACHE_CB
215 select HAVE_MBAR
216 help
217 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
218
219endchoice
220
221config M527x
222 bool
223 depends on (M5271 || M5275)
224 select GENERIC_CLOCKEVENTS
225 default y
226
227config M54xx
228 bool
229 depends on (M548x || M547x)
230 default y
231
232config COLDFIRE
233 bool
234 depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx)
235 select GENERIC_GPIO
236 select ARCH_REQUIRE_GPIOLIB
237 default y
238
239config CLOCK_SET
240 bool "Enable setting the CPU clock frequency"
241 default n
242 help
243 On some CPU's you do not need to know what the core CPU clock
244 frequency is. On these you can disable clock setting. On some
245 traditional 68K parts, and on all ColdFire parts you need to set
246 the appropriate CPU clock frequency. On these devices many of the
247 onboard peripherals derive their timing from the master CPU clock
248 frequency.
249
250config CLOCK_FREQ
251 int "Set the core clock frequency"
252 default "66666666"
253 depends on CLOCK_SET
254 help
255 Define the CPU clock frequency in use. This is the core clock
256 frequency, it may or may not be the same as the external clock
257 crystal fitted to your board. Some processors have an internal
258 PLL and can have their frequency programmed at run time, others
259 use internal dividers. In general the kernel won't setup a PLL
260 if it is fitted (there are some exceptions). This value will be
261 specific to the exact CPU that you are using.
262
263config OLDMASK
264 bool "Old mask 5307 (1H55J) silicon"
265 depends on M5307
266 help
267 Build support for the older revision ColdFire 5307 silicon.
268 Specifically this is the 1H55J mask revision.
269
270if HAVE_CACHE_SPLIT
271choice
272 prompt "Split Cache Configuration"
273 default CACHE_I
274
275config CACHE_I
276 bool "Instruction"
277 help
278 Use all of the ColdFire CPU cache memory as an instruction cache.
279
280config CACHE_D
281 bool "Data"
282 help
283 Use all of the ColdFire CPU cache memory as a data cache.
284
285config CACHE_BOTH
286 bool "Both"
287 help
288 Split the ColdFire CPU cache, and use half as an instruction cache
289 and half as a data cache.
290endchoice
291endif
292
293if HAVE_CACHE_CB
294choice
295 prompt "Data cache mode"
296 default CACHE_WRITETHRU
297
298config CACHE_WRITETHRU
299 bool "Write-through"
300 help
301 The ColdFire CPU cache is set into Write-through mode.
302
303config CACHE_COPYBACK
304 bool "Copy-back"
305 help
306 The ColdFire CPU cache is set into Copy-back mode.
307endchoice
308endif
309
310comment "Platform"
311
312config PILOT3
313 bool "Pilot 1000/5000, PalmPilot Personal/Pro, or PalmIII support"
314 depends on M68328
315 help
316 Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII.
317
318config XCOPILOT_BUGS
319 bool "(X)Copilot support"
320 depends on PILOT3
321 help
322 Support the bugs of Xcopilot.
323
324config UC5272
325 bool 'Arcturus Networks uC5272 dimm board support'
326 depends on M5272
327 help
328 Support for the Arcturus Networks uC5272 dimm board.
329
330config UC5282
331 bool "Arcturus Networks uC5282 board support"
332 depends on M528x
333 help
334 Support for the Arcturus Networks uC5282 dimm board.
335
336config UCSIMM
337 bool "uCsimm module support"
338 depends on M68EZ328
339 help
340 Support for the Arcturus Networks uCsimm module.
341
342config UCDIMM
343 bool "uDsimm module support"
344 depends on M68VZ328
345 help
346 Support for the Arcturus Networks uDsimm module.
347
348config DRAGEN2
349 bool "DragenEngine II board support"
350 depends on M68VZ328
351 help
352 Support for the DragenEngine II board.
353
354config DIRECT_IO_ACCESS
355 bool "Allow user to access IO directly"
356 depends on (UCSIMM || UCDIMM || DRAGEN2)
357 help
358 Disable the CPU internal registers protection in user mode,
359 to allow a user application to read/write them.
360
361config INIT_LCD
362 bool "Initialize LCD"
363 depends on (UCSIMM || UCDIMM || DRAGEN2)
364 help
365 Initialize the LCD controller of the 68x328 processor.
366
367config MEMORY_RESERVE
368 int "Memory reservation (MiB)"
369 depends on (UCSIMM || UCDIMM)
370 help
371 Reserve certain memory regions on 68x328 based boards.
372
373config UCQUICC
374 bool "Lineo uCquicc board support"
375 depends on M68360
376 help
377 Support for the Lineo uCquicc board.
378
379config ARN5206
380 bool "Arnewsh 5206 board support"
381 depends on M5206
382 help
383 Support for the Arnewsh 5206 board.
384
385config M5206eC3
386 bool "Motorola M5206eC3 board support"
387 depends on M5206e
388 help
389 Support for the Motorola M5206eC3 board.
390
391config ELITE
392 bool "Motorola M5206eLITE board support"
393 depends on M5206e
394 help
395 Support for the Motorola M5206eLITE board.
396
397config M5208EVB
398 bool "Freescale M5208EVB board support"
399 depends on M520x
400 help
401 Support for the Freescale Coldfire M5208EVB.
402
403config M5235EVB
404 bool "Freescale M5235EVB support"
405 depends on M523x
406 help
407 Support for the Freescale M5235EVB board.
408
409config M5249C3
410 bool "Motorola M5249C3 board support"
411 depends on M5249
412 help
413 Support for the Motorola M5249C3 board.
414
415config M5271EVB
416 bool "Freescale (Motorola) M5271EVB board support"
417 depends on M5271
418 help
419 Support for the Freescale (Motorola) M5271EVB board.
420
421config M5275EVB
422 bool "Freescale (Motorola) M5275EVB board support"
423 depends on M5275
424 help
425 Support for the Freescale (Motorola) M5275EVB board.
426
427config M5272C3
428 bool "Motorola M5272C3 board support"
429 depends on M5272
430 help
431 Support for the Motorola M5272C3 board.
432
433config COBRA5272
434 bool "senTec COBRA5272 board support"
435 depends on M5272
436 help
437 Support for the senTec COBRA5272 board.
438
439config AVNET5282
440 bool "Avnet 5282 board support"
441 depends on M528x
442 help
443 Support for the Avnet 5282 board.
444
445config M5282EVB
446 bool "Motorola M5282EVB board support"
447 depends on M528x
448 help
449 Support for the Motorola M5282EVB board.
450
451config COBRA5282
452 bool "senTec COBRA5282 board support"
453 depends on M528x
454 help
455 Support for the senTec COBRA5282 board.
456
457config SOM5282EM
458 bool "EMAC.Inc SOM5282EM board support"
459 depends on M528x
460 help
461 Support for the EMAC.Inc SOM5282EM module.
462
463config WILDFIRE
464 bool "Intec Automation Inc. WildFire board support"
465 depends on M528x
466 help
467 Support for the Intec Automation Inc. WildFire.
468
469config WILDFIREMOD
470 bool "Intec Automation Inc. WildFire module support"
471 depends on M528x
472 help
473 Support for the Intec Automation Inc. WildFire module.
474
475config ARN5307
476 bool "Arnewsh 5307 board support"
477 depends on M5307
478 help
479 Support for the Arnewsh 5307 board.
480
481config M5307C3
482 bool "Motorola M5307C3 board support"
483 depends on M5307
484 help
485 Support for the Motorola M5307C3 board.
486
487config SECUREEDGEMP3
488 bool "SnapGear SecureEdge/MP3 platform support"
489 depends on M5307
490 help
491 Support for the SnapGear SecureEdge/MP3 platform.
492
493config M5329EVB
494 bool "Freescale (Motorola) M5329EVB board support"
495 depends on M532x
496 help
497 Support for the Freescale (Motorola) M5329EVB board.
498
499config COBRA5329
500 bool "senTec COBRA5329 board support"
501 depends on M532x
502 help
503 Support for the senTec COBRA5329 board.
504
505config M5407C3
506 bool "Motorola M5407C3 board support"
507 depends on M5407
508 help
509 Support for the Motorola M5407C3 board.
510
511config FIREBEE
512 bool "FireBee board support"
513 depends on M547x
514 help
515 Support for the FireBee ColdFire 5475 based board.
516
517config CLEOPATRA
518 bool "Feith CLEOPATRA board support"
519 depends on (M5307 || M5407)
520 help
521 Support for the Feith Cleopatra boards.
522
523config CANCam
524 bool "Feith CANCam board support"
525 depends on M5272
526 help
527 Support for the Feith CANCam board.
528
529config SCALES
530 bool "Feith SCALES board support"
531 depends on M5272
532 help
533 Support for the Feith SCALES board.
534
535config NETtel
536 bool "SecureEdge/NETtel board support"
537 depends on (M5206e || M5272 || M5307)
538 help
539 Support for the SnapGear NETtel/SecureEdge/SnapGear boards.
540
541config SNAPGEAR
542 bool "SnapGear router board support"
543 depends on NETtel
544 help
545 Special additional support for SnapGear router boards.
546
547config CPU16B
548 bool "Sneha Technologies S.L. Sarasvati board support"
549 depends on M5272
550 help
551 Support for the SNEHA CPU16B board.
552
553config MOD5272
554 bool "Netburner MOD-5272 board support"
555 depends on M5272
556 help
557 Support for the Netburner MOD-5272 board.
558
559config SAVANTrosie1
560 bool "Savant Rosie1 board support"
561 depends on M523x
562 help
563 Support for the Savant Rosie1 board.
564
565config ROMFS_FROM_ROM
566 bool "ROMFS image not RAM resident"
567 depends on (NETtel || SNAPGEAR)
568 help
569 The ROMfs filesystem will stay resident in the FLASH/ROM, not be
570 moved into RAM.
571
572config PILOT
573 bool
574 default y
575 depends on (PILOT3 || PILOT5)
576
577config ARNEWSH
578 bool
579 default y
580 depends on (ARN5206 || ARN5307)
581
582config FREESCALE
583 bool
584 default y
585 depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5329EVB || M5407C3)
586
587config HW_FEITH
588 bool
589 default y
590 depends on (CLEOPATRA || CANCam || SCALES)
591
592config senTec
593 bool
594 default y
595 depends on (COBRA5272 || COBRA5282)
596
597config EMAC_INC
598 bool
599 default y
600 depends on (SOM5282EM)
601
602config SNEHA
603 bool
604 default y
605 depends on CPU16B
606
607config SAVANT
608 bool
609 default y
610 depends on SAVANTrosie1
611
612config AVNET
613 bool
614 default y
615 depends on (AVNET5282)
616
617config UBOOT
618 bool "Support for U-Boot command line parameters"
619 help
620 If you say Y here kernel will try to collect command
621 line parameters from the initial u-boot stack.
622 default n
623
624config 4KSTACKS
625 bool "Use 4Kb for kernel stacks instead of 8Kb"
626 default y
627 help
628 If you say Y here the kernel will use a 4Kb stacksize for the
629 kernel stack attached to each process/thread. This facilitates
630 running more threads on a system and also reduces the pressure
631 on the VM subsystem for higher order allocations.
632
633config HZ
634 int
635 default 1000 if CLEOPATRA
636 default 100
637
638comment "RAM configuration"
639
640config RAMBASE
641 hex "Address of the base of RAM"
642 default "0"
643 help
644 Define the address that RAM starts at. On many platforms this is
645 0, the base of the address space. And this is the default. Some
646 platforms choose to setup their RAM at other addresses within the
647 processor address space.
648
649config RAMSIZE
650 hex "Size of RAM (in bytes), or 0 for automatic"
651 default "0x400000"
652 help
653 Define the size of the system RAM. If you select 0 then the
654 kernel will try to probe the RAM size at runtime. This is not
655 supported on all CPU types.
656
657config VECTORBASE
658 hex "Address of the base of system vectors"
659 default "0"
660 help
661 Define the address of the system vectors. Commonly this is
662 put at the start of RAM, but it doesn't have to be. On ColdFire
663 platforms this address is programmed into the VBR register, thus
664 actually setting the address to use.
665
666config MBAR
667 hex "Address of the MBAR (internal peripherals)"
668 default "0x10000000"
669 depends on HAVE_MBAR
670 help
671 Define the address of the internal system peripherals. This value
672 is set in the processors MBAR register. This is generally setup by
673 the boot loader, and will not be written by the kernel. By far most
674 ColdFire boards use the default 0x10000000 value, so if unsure then
675 use this.
676
677config IPSBAR
678 hex "Address of the IPSBAR (internal peripherals)"
679 default "0x40000000"
680 depends on HAVE_IPSBAR
681 help
682 Define the address of the internal system peripherals. This value
683 is set in the processors IPSBAR register. This is generally setup by
684 the boot loader, and will not be written by the kernel. By far most
685 ColdFire boards use the default 0x40000000 value, so if unsure then
686 use this.
687
688config KERNELBASE
689 hex "Address of the base of kernel code"
690 default "0x400"
691 help
692 Typically on m68k systems the kernel will not start at the base
693 of RAM, but usually some small offset from it. Define the start
694 address of the kernel here. The most common setup will have the
695 processor vectors at the base of RAM and then the start of the
696 kernel. On some platforms some RAM is reserved for boot loaders
697 and the kernel starts after that. The 0x400 default was based on
698 a system with the RAM based at address 0, and leaving enough room
699 for the theoretical maximum number of 256 vectors.
700
701choice
702 prompt "RAM bus width"
703 default RAMAUTOBIT
704
705config RAMAUTOBIT
706 bool "AUTO"
707 help
708 Select the physical RAM data bus size. Not needed on most platforms,
709 so you can generally choose AUTO.
710
711config RAM8BIT
712 bool "8bit"
713 help
714 Configure RAM bus to be 8 bits wide.
715
716config RAM16BIT
717 bool "16bit"
718 help
719 Configure RAM bus to be 16 bits wide.
720
721config RAM32BIT
722 bool "32bit"
723 help
724 Configure RAM bus to be 32 bits wide.
725
726endchoice
727
728comment "ROM configuration"
729
730config ROM
731 bool "Specify ROM linker regions"
732 default n
733 help
734 Define a ROM region for the linker script. This creates a kernel
735 that can be stored in flash, with possibly the text, and data
736 regions being copied out to RAM at startup.
737
738config ROMBASE
739 hex "Address of the base of ROM device"
740 default "0"
741 depends on ROM
742 help
743 Define the address that the ROM region starts at. Some platforms
744 use this to set their chip select region accordingly for the boot
745 device.
746
747config ROMVEC
748 hex "Address of the base of the ROM vectors"
749 default "0"
750 depends on ROM
751 help
752 This is almost always the same as the base of the ROM. Since on all
753 68000 type variants the vectors are at the base of the boot device
754 on system startup.
755
756config ROMVECSIZE
757 hex "Size of ROM vector region (in bytes)"
758 default "0x400"
759 depends on ROM
760 help
761 Define the size of the vector region in ROM. For most 68000
762 variants this would be 0x400 bytes in size. Set to 0 if you do
763 not want a vector region at the start of the ROM.
764
765config ROMSTART
766 hex "Address of the base of system image in ROM"
767 default "0x400"
768 depends on ROM
769 help
770 Define the start address of the system image in ROM. Commonly this
771 is strait after the ROM vectors.
772
773config ROMSIZE
774 hex "Size of the ROM device"
775 default "0x100000"
776 depends on ROM
777 help
778 Size of the ROM device. On some platforms this is used to setup
779 the chip select that controls the boot ROM device.
780
781choice
782 prompt "Kernel executes from"
783 ---help---
784 Choose the memory type that the kernel will be running in.
785
786config RAMKERNEL
787 bool "RAM"
788 help
789 The kernel will be resident in RAM when running.
790
791config ROMKERNEL
792 bool "ROM"
793 help
794 The kernel will be resident in FLASH/ROM when running. This is
795 often referred to as Execute-in-Place (XIP), since the kernel
796 code executes from the position it is stored in the FLASH/ROM.
797
798endchoice
799
800if COLDFIRE
801source "kernel/Kconfig.preempt"
802endif
803
804source "kernel/time/Kconfig"
805
806source "mm/Kconfig"
807
808endmenu
809
810config ISA_DMA_API
811 bool
812 depends on !M5272
813 default y
814
815source "drivers/pcmcia/Kconfig"
816
817menu "Executable file formats"
818
819source "fs/Kconfig.binfmt"
820
821endmenu
822
823menu "Power management options"
824
825config PM
826 bool "Power Management support"
827 help
828 Support processor power management modes
829
830endmenu
831
832source "net/Kconfig"
833
834source "drivers/Kconfig"
835
836source "fs/Kconfig"
837
838source "arch/m68knommu/Kconfig.debug"
839
840source "security/Kconfig"
841
842source "crypto/Kconfig"
843
844source "lib/Kconfig"
diff --git a/arch/m68knommu/Kconfig.debug b/arch/m68knommu/Kconfig.debug
deleted file mode 100644
index ed6d9a83bfdb..000000000000
--- a/arch/m68knommu/Kconfig.debug
+++ /dev/null
@@ -1,35 +0,0 @@
1menu "Kernel hacking"
2
3source "lib/Kconfig.debug"
4
5config FULLDEBUG
6 bool "Full Symbolic/Source Debugging support"
7 help
8 Enable debugging symbols on kernel build.
9
10config HIGHPROFILE
11 bool "Use fast second timer for profiling"
12 depends on COLDFIRE
13 help
14 Use a fast secondary clock to produce profiling information.
15
16config BOOTPARAM
17 bool 'Compiled-in Kernel Boot Parameter'
18
19config BOOTPARAM_STRING
20 string 'Kernel Boot Parameter'
21 default 'console=ttyS0,19200'
22 depends on BOOTPARAM
23
24config NO_KERNEL_MSG
25 bool "Suppress Kernel BUG Messages"
26 help
27 Do not output any debug BUG messages within the kernel.
28
29config BDM_DISABLE
30 bool "Disable BDM signals"
31 depends on (EXPERIMENTAL && COLDFIRE)
32 help
33 Disable the ColdFire CPU's BDM signals.
34
35endmenu
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile
deleted file mode 100644
index 589613fed31d..000000000000
--- a/arch/m68knommu/Makefile
+++ /dev/null
@@ -1,126 +0,0 @@
1#
2# arch/m68knommu/Makefile
3#
4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7#
8# (C) Copyright 2002, Greg Ungerer <gerg@snapgear.com>
9#
10
11KBUILD_DEFCONFIG := m5208evb_defconfig
12
13platform-$(CONFIG_M68328) := 68328
14platform-$(CONFIG_M68EZ328) := 68EZ328
15platform-$(CONFIG_M68VZ328) := 68VZ328
16platform-$(CONFIG_M68360) := 68360
17platform-$(CONFIG_M5206) := 5206
18platform-$(CONFIG_M5206e) := 5206e
19platform-$(CONFIG_M520x) := 520x
20platform-$(CONFIG_M523x) := 523x
21platform-$(CONFIG_M5249) := 5249
22platform-$(CONFIG_M527x) := 527x
23platform-$(CONFIG_M5272) := 5272
24platform-$(CONFIG_M528x) := 528x
25platform-$(CONFIG_M5307) := 5307
26platform-$(CONFIG_M532x) := 532x
27platform-$(CONFIG_M5407) := 5407
28platform-$(CONFIG_M54xx) := 54xx
29PLATFORM := $(platform-y)
30
31board-$(CONFIG_PILOT) := pilot
32board-$(CONFIG_UC5272) := UC5272
33board-$(CONFIG_UC5282) := UC5282
34board-$(CONFIG_UCSIMM) := ucsimm
35board-$(CONFIG_UCDIMM) := ucdimm
36board-$(CONFIG_UCQUICC) := uCquicc
37board-$(CONFIG_DRAGEN2) := de2
38board-$(CONFIG_ARNEWSH) := ARNEWSH
39board-$(CONFIG_FREESCALE) := FREESCALE
40board-$(CONFIG_M5235EVB) := M5235EVB
41board-$(CONFIG_M5271EVB) := M5271EVB
42board-$(CONFIG_M5275EVB) := M5275EVB
43board-$(CONFIG_M5282EVB) := M5282EVB
44board-$(CONFIG_ELITE) := eLITE
45board-$(CONFIG_NETtel) := NETtel
46board-$(CONFIG_SECUREEDGEMP3) := MP3
47board-$(CONFIG_CLEOPATRA) := CLEOPATRA
48board-$(CONFIG_senTec) := senTec
49board-$(CONFIG_SNEHA) := SNEHA
50board-$(CONFIG_M5208EVB) := M5208EVB
51board-$(CONFIG_MOD5272) := MOD5272
52board-$(CONFIG_AVNET) := AVNET
53board-$(CONFIG_SAVANT) := SAVANT
54BOARD := $(board-y)
55
56model-$(CONFIG_RAMKERNEL) := ram
57model-$(CONFIG_ROMKERNEL) := rom
58MODEL := $(model-y)
59
60#
61# Some code support is grouped together for a common cpu-subclass (for
62# example all ColdFire cpu's are very similar). Determine the sub-class
63# for the selected cpu. ONLY need to define this for the non-base member
64# of the family.
65#
66cpuclass-$(CONFIG_M5206) := coldfire
67cpuclass-$(CONFIG_M5206e) := coldfire
68cpuclass-$(CONFIG_M520x) := coldfire
69cpuclass-$(CONFIG_M523x) := coldfire
70cpuclass-$(CONFIG_M5249) := coldfire
71cpuclass-$(CONFIG_M527x) := coldfire
72cpuclass-$(CONFIG_M5272) := coldfire
73cpuclass-$(CONFIG_M528x) := coldfire
74cpuclass-$(CONFIG_M5307) := coldfire
75cpuclass-$(CONFIG_M532x) := coldfire
76cpuclass-$(CONFIG_M5407) := coldfire
77cpuclass-$(CONFIG_M54xx) := coldfire
78cpuclass-$(CONFIG_M68328) := 68328
79cpuclass-$(CONFIG_M68EZ328) := 68328
80cpuclass-$(CONFIG_M68VZ328) := 68328
81cpuclass-$(CONFIG_M68360) := 68360
82CPUCLASS := $(cpuclass-y)
83
84ifneq ($(CPUCLASS),$(PLATFORM))
85CLASSDIR := arch/m68knommu/platform/$(cpuclass-y)/
86endif
87
88export PLATFORM BOARD MODEL CPUCLASS
89
90#
91# Some CFLAG additions based on specific CPU type.
92#
93cflags-$(CONFIG_M5206) := $(call cc-option,-mcpu=5206,-m5200)
94cflags-$(CONFIG_M5206e) := $(call cc-option,-mcpu=5206e,-m5200)
95cflags-$(CONFIG_M520x) := $(call cc-option,-mcpu=5208,-m5200)
96cflags-$(CONFIG_M523x) := $(call cc-option,-mcpu=523x,-m5307)
97cflags-$(CONFIG_M5249) := $(call cc-option,-mcpu=5249,-m5200)
98cflags-$(CONFIG_M5271) := $(call cc-option,-mcpu=5271,-m5307)
99cflags-$(CONFIG_M5272) := $(call cc-option,-mcpu=5272,-m5307)
100cflags-$(CONFIG_M5275) := $(call cc-option,-mcpu=5275,-m5307)
101cflags-$(CONFIG_M528x) := $(call cc-option,-mcpu=528x,-m5307)
102cflags-$(CONFIG_M5307) := $(call cc-option,-mcpu=5307,-m5200)
103cflags-$(CONFIG_M532x) := $(call cc-option,-mcpu=532x,-m5307)
104cflags-$(CONFIG_M5407) := $(call cc-option,-mcpu=5407,-m5200)
105cflags-$(CONFIG_M54xx) := $(call cc-option,-mcpu=5475,-m5200)
106cflags-$(CONFIG_M68328) := -m68000
107cflags-$(CONFIG_M68EZ328) := -m68000
108cflags-$(CONFIG_M68VZ328) := -m68000
109cflags-$(CONFIG_M68360) := -m68332
110
111KBUILD_AFLAGS += $(cflags-y)
112
113KBUILD_CFLAGS += $(cflags-y)
114KBUILD_CFLAGS += -D__linux__
115KBUILD_CFLAGS += -DUTS_SYSNAME=\"uClinux\"
116
117head-y := arch/m68knommu/platform/$(cpuclass-y)/head.o
118
119core-y += arch/m68knommu/kernel/ \
120 arch/m68knommu/mm/ \
121 $(CLASSDIR) \
122 arch/m68knommu/platform/$(PLATFORM)/
123libs-y += arch/m68knommu/lib/
124
125archclean:
126
diff --git a/arch/m68knommu/configs/m5208evb_defconfig b/arch/m68knommu/configs/m5208evb_defconfig
deleted file mode 100644
index 2f5655c577af..000000000000
--- a/arch/m68knommu/configs/m5208evb_defconfig
+++ /dev/null
@@ -1,74 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
4CONFIG_EXPERT=y
5# CONFIG_KALLSYMS is not set
6# CONFIG_HOTPLUG is not set
7# CONFIG_FUTEX is not set
8# CONFIG_EPOLL is not set
9# CONFIG_SIGNALFD is not set
10# CONFIG_TIMERFD is not set
11# CONFIG_EVENTFD is not set
12# CONFIG_AIO is not set
13# CONFIG_VM_EVENT_COUNTERS is not set
14# CONFIG_COMPAT_BRK is not set
15# CONFIG_BLK_DEV_BSG is not set
16# CONFIG_IOSCHED_DEADLINE is not set
17# CONFIG_IOSCHED_CFQ is not set
18CONFIG_M520x=y
19CONFIG_CLOCK_SET=y
20CONFIG_CLOCK_FREQ=166666666
21CONFIG_CLOCK_DIV=2
22CONFIG_M5208EVB=y
23# CONFIG_4KSTACKS is not set
24CONFIG_RAMBASE=0x40000000
25CONFIG_RAMSIZE=0x2000000
26CONFIG_VECTORBASE=0x40000000
27CONFIG_KERNELBASE=0x40020000
28CONFIG_RAM16BIT=y
29CONFIG_BINFMT_FLAT=y
30CONFIG_NET=y
31CONFIG_PACKET=y
32CONFIG_UNIX=y
33CONFIG_INET=y
34# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
35# CONFIG_INET_XFRM_MODE_TUNNEL is not set
36# CONFIG_INET_XFRM_MODE_BEET is not set
37# CONFIG_INET_LRO is not set
38# CONFIG_INET_DIAG is not set
39# CONFIG_IPV6 is not set
40CONFIG_MTD=y
41CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CHAR=y
43CONFIG_MTD_BLOCK=y
44CONFIG_MTD_RAM=y
45CONFIG_MTD_UCLINUX=y
46CONFIG_BLK_DEV_RAM=y
47# CONFIG_MISC_DEVICES is not set
48CONFIG_NETDEVICES=y
49CONFIG_NET_ETHERNET=y
50CONFIG_FEC=y
51# CONFIG_NETDEV_1000 is not set
52# CONFIG_NETDEV_10000 is not set
53# CONFIG_INPUT is not set
54# CONFIG_SERIO is not set
55# CONFIG_VT is not set
56CONFIG_SERIAL_MCF=y
57CONFIG_SERIAL_MCF_BAUDRATE=115200
58CONFIG_SERIAL_MCF_CONSOLE=y
59# CONFIG_UNIX98_PTYS is not set
60# CONFIG_HW_RANDOM is not set
61# CONFIG_HWMON is not set
62# CONFIG_USB_SUPPORT is not set
63CONFIG_EXT2_FS=y
64# CONFIG_FILE_LOCKING is not set
65# CONFIG_DNOTIFY is not set
66# CONFIG_SYSFS is not set
67CONFIG_ROMFS_FS=y
68CONFIG_ROMFS_BACKED_BY_MTD=y
69# CONFIG_NETWORK_FILESYSTEMS is not set
70# CONFIG_RCU_CPU_STALL_DETECTOR is not set
71CONFIG_SYSCTL_SYSCALL_CHECK=y
72CONFIG_FULLDEBUG=y
73CONFIG_BOOTPARAM=y
74CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
diff --git a/arch/m68knommu/configs/m5249evb_defconfig b/arch/m68knommu/configs/m5249evb_defconfig
deleted file mode 100644
index 16df72bfbd45..000000000000
--- a/arch/m68knommu/configs/m5249evb_defconfig
+++ /dev/null
@@ -1,67 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
4CONFIG_EXPERT=y
5# CONFIG_KALLSYMS is not set
6# CONFIG_HOTPLUG is not set
7# CONFIG_FUTEX is not set
8# CONFIG_EPOLL is not set
9# CONFIG_SIGNALFD is not set
10# CONFIG_TIMERFD is not set
11# CONFIG_EVENTFD is not set
12# CONFIG_AIO is not set
13# CONFIG_VM_EVENT_COUNTERS is not set
14# CONFIG_SLUB_DEBUG is not set
15# CONFIG_BLK_DEV_BSG is not set
16# CONFIG_IOSCHED_DEADLINE is not set
17# CONFIG_IOSCHED_CFQ is not set
18CONFIG_M5249=y
19CONFIG_CLOCK_SET=y
20CONFIG_CLOCK_FREQ=140000000
21CONFIG_CLOCK_DIV=2
22CONFIG_M5249C3=y
23CONFIG_RAMBASE=0x00000000
24CONFIG_RAMSIZE=0x00800000
25CONFIG_VECTORBASE=0x00000000
26CONFIG_KERNELBASE=0x00020000
27CONFIG_BINFMT_FLAT=y
28CONFIG_NET=y
29CONFIG_PACKET=y
30CONFIG_UNIX=y
31CONFIG_INET=y
32# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
33# CONFIG_INET_XFRM_MODE_TUNNEL is not set
34# CONFIG_INET_XFRM_MODE_BEET is not set
35# CONFIG_INET_LRO is not set
36# CONFIG_INET_DIAG is not set
37# CONFIG_IPV6 is not set
38CONFIG_MTD=y
39CONFIG_MTD_PARTITIONS=y
40CONFIG_MTD_CHAR=y
41CONFIG_MTD_BLOCK=y
42CONFIG_MTD_RAM=y
43CONFIG_MTD_UCLINUX=y
44CONFIG_BLK_DEV_RAM=y
45# CONFIG_MISC_DEVICES is not set
46CONFIG_NETDEVICES=y
47CONFIG_NET_ETHERNET=y
48# CONFIG_NETDEV_1000 is not set
49# CONFIG_NETDEV_10000 is not set
50CONFIG_PPP=y
51# CONFIG_INPUT is not set
52# CONFIG_SERIO is not set
53# CONFIG_VT is not set
54CONFIG_SERIAL_MCF=y
55CONFIG_SERIAL_MCF_CONSOLE=y
56# CONFIG_UNIX98_PTYS is not set
57# CONFIG_HWMON is not set
58# CONFIG_USB_SUPPORT is not set
59CONFIG_EXT2_FS=y
60# CONFIG_FILE_LOCKING is not set
61CONFIG_ROMFS_FS=y
62CONFIG_ROMFS_BACKED_BY_MTD=y
63# CONFIG_NETWORK_FILESYSTEMS is not set
64# CONFIG_RCU_CPU_STALL_DETECTOR is not set
65CONFIG_BOOTPARAM=y
66CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
67# CONFIG_CRC32 is not set
diff --git a/arch/m68knommu/configs/m5272c3_defconfig b/arch/m68knommu/configs/m5272c3_defconfig
deleted file mode 100644
index 4e6ea50c7f33..000000000000
--- a/arch/m68knommu/configs/m5272c3_defconfig
+++ /dev/null
@@ -1,65 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
4CONFIG_EXPERT=y
5# CONFIG_KALLSYMS is not set
6# CONFIG_HOTPLUG is not set
7# CONFIG_FUTEX is not set
8# CONFIG_EPOLL is not set
9# CONFIG_SIGNALFD is not set
10# CONFIG_TIMERFD is not set
11# CONFIG_EVENTFD is not set
12# CONFIG_AIO is not set
13# CONFIG_VM_EVENT_COUNTERS is not set
14# CONFIG_SLUB_DEBUG is not set
15# CONFIG_BLK_DEV_BSG is not set
16# CONFIG_IOSCHED_DEADLINE is not set
17# CONFIG_IOSCHED_CFQ is not set
18CONFIG_M5272=y
19CONFIG_CLOCK_SET=y
20CONFIG_M5272C3=y
21CONFIG_RAMBASE=0x00000000
22CONFIG_RAMSIZE=0x00800000
23CONFIG_VECTORBASE=0x00000000
24CONFIG_KERNELBASE=0x00020000
25CONFIG_BINFMT_FLAT=y
26CONFIG_NET=y
27CONFIG_PACKET=y
28CONFIG_UNIX=y
29CONFIG_INET=y
30# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
31# CONFIG_INET_XFRM_MODE_TUNNEL is not set
32# CONFIG_INET_XFRM_MODE_BEET is not set
33# CONFIG_INET_LRO is not set
34# CONFIG_INET_DIAG is not set
35# CONFIG_IPV6 is not set
36CONFIG_MTD=y
37CONFIG_MTD_PARTITIONS=y
38CONFIG_MTD_CHAR=y
39CONFIG_MTD_BLOCK=y
40CONFIG_MTD_RAM=y
41CONFIG_MTD_UCLINUX=y
42CONFIG_BLK_DEV_RAM=y
43# CONFIG_MISC_DEVICES is not set
44CONFIG_NETDEVICES=y
45CONFIG_NET_ETHERNET=y
46CONFIG_FEC=y
47# CONFIG_NETDEV_1000 is not set
48# CONFIG_NETDEV_10000 is not set
49# CONFIG_INPUT is not set
50# CONFIG_SERIO is not set
51# CONFIG_VT is not set
52CONFIG_SERIAL_MCF=y
53CONFIG_SERIAL_MCF_CONSOLE=y
54# CONFIG_UNIX98_PTYS is not set
55# CONFIG_HWMON is not set
56# CONFIG_USB_SUPPORT is not set
57CONFIG_EXT2_FS=y
58# CONFIG_FILE_LOCKING is not set
59# CONFIG_DNOTIFY is not set
60CONFIG_ROMFS_FS=y
61CONFIG_ROMFS_BACKED_BY_MTD=y
62# CONFIG_NETWORK_FILESYSTEMS is not set
63# CONFIG_RCU_CPU_STALL_DETECTOR is not set
64CONFIG_BOOTPARAM=y
65CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
diff --git a/arch/m68knommu/configs/m5275evb_defconfig b/arch/m68knommu/configs/m5275evb_defconfig
deleted file mode 100644
index f3dd74115a34..000000000000
--- a/arch/m68knommu/configs/m5275evb_defconfig
+++ /dev/null
@@ -1,72 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
4CONFIG_EXPERT=y
5# CONFIG_KALLSYMS is not set
6# CONFIG_HOTPLUG is not set
7# CONFIG_FUTEX is not set
8# CONFIG_EPOLL is not set
9# CONFIG_SIGNALFD is not set
10# CONFIG_TIMERFD is not set
11# CONFIG_EVENTFD is not set
12# CONFIG_AIO is not set
13# CONFIG_VM_EVENT_COUNTERS is not set
14# CONFIG_SLUB_DEBUG is not set
15# CONFIG_BLK_DEV_BSG is not set
16# CONFIG_IOSCHED_DEADLINE is not set
17# CONFIG_IOSCHED_CFQ is not set
18CONFIG_M5275=y
19CONFIG_CLOCK_SET=y
20CONFIG_CLOCK_FREQ=150000000
21CONFIG_CLOCK_DIV=2
22CONFIG_M5275EVB=y
23# CONFIG_4KSTACKS is not set
24CONFIG_RAMBASE=0x00000000
25CONFIG_RAMSIZE=0x00000000
26CONFIG_VECTORBASE=0x00000000
27CONFIG_KERNELBASE=0x00020000
28CONFIG_BINFMT_FLAT=y
29CONFIG_NET=y
30CONFIG_PACKET=y
31CONFIG_UNIX=y
32CONFIG_INET=y
33# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
34# CONFIG_INET_XFRM_MODE_TUNNEL is not set
35# CONFIG_INET_XFRM_MODE_BEET is not set
36# CONFIG_INET_LRO is not set
37# CONFIG_INET_DIAG is not set
38# CONFIG_IPV6 is not set
39CONFIG_MTD=y
40CONFIG_MTD_PARTITIONS=y
41CONFIG_MTD_CHAR=y
42CONFIG_MTD_BLOCK=y
43CONFIG_MTD_RAM=y
44CONFIG_MTD_UCLINUX=y
45CONFIG_BLK_DEV_RAM=y
46# CONFIG_MISC_DEVICES is not set
47CONFIG_NETDEVICES=y
48CONFIG_NET_ETHERNET=y
49CONFIG_FEC=y
50CONFIG_FEC2=y
51# CONFIG_NETDEV_1000 is not set
52# CONFIG_NETDEV_10000 is not set
53CONFIG_PPP=y
54# CONFIG_INPUT is not set
55# CONFIG_SERIO is not set
56# CONFIG_VT is not set
57CONFIG_SERIAL_MCF=y
58CONFIG_SERIAL_MCF_CONSOLE=y
59# CONFIG_UNIX98_PTYS is not set
60# CONFIG_HWMON is not set
61# CONFIG_USB_SUPPORT is not set
62CONFIG_EXT2_FS=y
63# CONFIG_FILE_LOCKING is not set
64# CONFIG_DNOTIFY is not set
65CONFIG_ROMFS_FS=y
66CONFIG_ROMFS_BACKED_BY_MTD=y
67# CONFIG_NETWORK_FILESYSTEMS is not set
68# CONFIG_RCU_CPU_STALL_DETECTOR is not set
69CONFIG_SYSCTL_SYSCALL_CHECK=y
70CONFIG_BOOTPARAM=y
71CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
72# CONFIG_CRC32 is not set
diff --git a/arch/m68knommu/configs/m5307c3_defconfig b/arch/m68knommu/configs/m5307c3_defconfig
deleted file mode 100644
index bce0a20c3737..000000000000
--- a/arch/m68knommu/configs/m5307c3_defconfig
+++ /dev/null
@@ -1,75 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
4CONFIG_EXPERT=y
5# CONFIG_KALLSYMS is not set
6# CONFIG_HOTPLUG is not set
7# CONFIG_FUTEX is not set
8# CONFIG_EPOLL is not set
9# CONFIG_SIGNALFD is not set
10# CONFIG_TIMERFD is not set
11# CONFIG_EVENTFD is not set
12# CONFIG_AIO is not set
13# CONFIG_VM_EVENT_COUNTERS is not set
14# CONFIG_SLUB_DEBUG is not set
15# CONFIG_BLK_DEV_BSG is not set
16# CONFIG_IOSCHED_DEADLINE is not set
17# CONFIG_IOSCHED_CFQ is not set
18CONFIG_M5307=y
19CONFIG_CLOCK_SET=y
20CONFIG_CLOCK_FREQ=90000000
21CONFIG_CLOCK_DIV=2
22CONFIG_M5307C3=y
23CONFIG_RAMBASE=0x00000000
24CONFIG_RAMSIZE=0x00800000
25CONFIG_VECTORBASE=0x00000000
26CONFIG_KERNELBASE=0x00020000
27CONFIG_BINFMT_FLAT=y
28CONFIG_NET=y
29CONFIG_PACKET=y
30CONFIG_UNIX=y
31CONFIG_INET=y
32# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
33# CONFIG_INET_XFRM_MODE_TUNNEL is not set
34# CONFIG_INET_XFRM_MODE_BEET is not set
35# CONFIG_INET_LRO is not set
36# CONFIG_INET_DIAG is not set
37# CONFIG_IPV6 is not set
38CONFIG_MTD=y
39CONFIG_MTD_PARTITIONS=y
40CONFIG_MTD_CHAR=y
41CONFIG_MTD_BLOCK=y
42CONFIG_MTD_RAM=y
43CONFIG_MTD_UCLINUX=y
44CONFIG_BLK_DEV_RAM=y
45# CONFIG_MISC_DEVICES is not set
46CONFIG_NETDEVICES=y
47CONFIG_NET_ETHERNET=y
48# CONFIG_NETDEV_1000 is not set
49# CONFIG_NETDEV_10000 is not set
50CONFIG_PPP=y
51CONFIG_SLIP=y
52CONFIG_SLIP_COMPRESSED=y
53# CONFIG_INPUT_MOUSEDEV is not set
54# CONFIG_INPUT_KEYBOARD is not set
55# CONFIG_INPUT_MOUSE is not set
56# CONFIG_SERIO is not set
57# CONFIG_VT is not set
58CONFIG_SERIAL_MCF=y
59CONFIG_SERIAL_MCF_CONSOLE=y
60# CONFIG_LEGACY_PTYS is not set
61# CONFIG_HW_RANDOM is not set
62# CONFIG_HWMON is not set
63# CONFIG_HID_SUPPORT is not set
64# CONFIG_USB_SUPPORT is not set
65CONFIG_EXT2_FS=y
66# CONFIG_DNOTIFY is not set
67CONFIG_ROMFS_FS=y
68CONFIG_ROMFS_BACKED_BY_MTD=y
69# CONFIG_NETWORK_FILESYSTEMS is not set
70# CONFIG_RCU_CPU_STALL_DETECTOR is not set
71CONFIG_SYSCTL_SYSCALL_CHECK=y
72CONFIG_FULLDEBUG=y
73CONFIG_BOOTPARAM=y
74CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
75# CONFIG_CRC32 is not set
diff --git a/arch/m68knommu/configs/m5407c3_defconfig b/arch/m68knommu/configs/m5407c3_defconfig
deleted file mode 100644
index 618cc32691f2..000000000000
--- a/arch/m68knommu/configs/m5407c3_defconfig
+++ /dev/null
@@ -1,69 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
4CONFIG_EXPERT=y
5# CONFIG_KALLSYMS is not set
6# CONFIG_HOTPLUG is not set
7# CONFIG_FUTEX is not set
8# CONFIG_EPOLL is not set
9# CONFIG_SIGNALFD is not set
10# CONFIG_TIMERFD is not set
11# CONFIG_EVENTFD is not set
12# CONFIG_AIO is not set
13# CONFIG_VM_EVENT_COUNTERS is not set
14CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y
16# CONFIG_BLK_DEV_BSG is not set
17# CONFIG_IOSCHED_DEADLINE is not set
18# CONFIG_IOSCHED_CFQ is not set
19CONFIG_M5407=y
20CONFIG_CLOCK_SET=y
21CONFIG_CLOCK_FREQ=50000000
22CONFIG_M5407C3=y
23CONFIG_RAMBASE=0x00000000
24CONFIG_RAMSIZE=0x00000000
25CONFIG_VECTORBASE=0x00000000
26CONFIG_KERNELBASE=0x00020000
27CONFIG_BINFMT_FLAT=y
28CONFIG_NET=y
29CONFIG_PACKET=y
30CONFIG_UNIX=y
31CONFIG_INET=y
32# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
33# CONFIG_INET_XFRM_MODE_TUNNEL is not set
34# CONFIG_INET_XFRM_MODE_BEET is not set
35# CONFIG_INET_LRO is not set
36# CONFIG_INET_DIAG is not set
37# CONFIG_IPV6 is not set
38CONFIG_MTD=y
39CONFIG_MTD_PARTITIONS=y
40CONFIG_MTD_CHAR=y
41CONFIG_MTD_BLOCK=y
42CONFIG_MTD_RAM=y
43CONFIG_MTD_UCLINUX=y
44CONFIG_BLK_DEV_RAM=y
45# CONFIG_MISC_DEVICES is not set
46CONFIG_NETDEVICES=y
47CONFIG_NET_ETHERNET=y
48# CONFIG_NETDEV_1000 is not set
49# CONFIG_NETDEV_10000 is not set
50CONFIG_PPP=y
51# CONFIG_INPUT is not set
52# CONFIG_VT is not set
53CONFIG_SERIAL_MCF=y
54CONFIG_SERIAL_MCF_CONSOLE=y
55# CONFIG_UNIX98_PTYS is not set
56# CONFIG_HW_RANDOM is not set
57# CONFIG_HWMON is not set
58# CONFIG_USB_SUPPORT is not set
59CONFIG_EXT2_FS=y
60# CONFIG_FILE_LOCKING is not set
61# CONFIG_DNOTIFY is not set
62CONFIG_ROMFS_FS=y
63CONFIG_ROMFS_BACKED_BY_MTD=y
64# CONFIG_NETWORK_FILESYSTEMS is not set
65# CONFIG_RCU_CPU_STALL_DETECTOR is not set
66CONFIG_SYSCTL_SYSCALL_CHECK=y
67CONFIG_BOOTPARAM=y
68CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
69# CONFIG_CRC32 is not set
diff --git a/arch/m68knommu/defconfig b/arch/m68knommu/defconfig
deleted file mode 100644
index 2f5655c577af..000000000000
--- a/arch/m68knommu/defconfig
+++ /dev/null
@@ -1,74 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_LOG_BUF_SHIFT=14
3# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
4CONFIG_EXPERT=y
5# CONFIG_KALLSYMS is not set
6# CONFIG_HOTPLUG is not set
7# CONFIG_FUTEX is not set
8# CONFIG_EPOLL is not set
9# CONFIG_SIGNALFD is not set
10# CONFIG_TIMERFD is not set
11# CONFIG_EVENTFD is not set
12# CONFIG_AIO is not set
13# CONFIG_VM_EVENT_COUNTERS is not set
14# CONFIG_COMPAT_BRK is not set
15# CONFIG_BLK_DEV_BSG is not set
16# CONFIG_IOSCHED_DEADLINE is not set
17# CONFIG_IOSCHED_CFQ is not set
18CONFIG_M520x=y
19CONFIG_CLOCK_SET=y
20CONFIG_CLOCK_FREQ=166666666
21CONFIG_CLOCK_DIV=2
22CONFIG_M5208EVB=y
23# CONFIG_4KSTACKS is not set
24CONFIG_RAMBASE=0x40000000
25CONFIG_RAMSIZE=0x2000000
26CONFIG_VECTORBASE=0x40000000
27CONFIG_KERNELBASE=0x40020000
28CONFIG_RAM16BIT=y
29CONFIG_BINFMT_FLAT=y
30CONFIG_NET=y
31CONFIG_PACKET=y
32CONFIG_UNIX=y
33CONFIG_INET=y
34# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
35# CONFIG_INET_XFRM_MODE_TUNNEL is not set
36# CONFIG_INET_XFRM_MODE_BEET is not set
37# CONFIG_INET_LRO is not set
38# CONFIG_INET_DIAG is not set
39# CONFIG_IPV6 is not set
40CONFIG_MTD=y
41CONFIG_MTD_PARTITIONS=y
42CONFIG_MTD_CHAR=y
43CONFIG_MTD_BLOCK=y
44CONFIG_MTD_RAM=y
45CONFIG_MTD_UCLINUX=y
46CONFIG_BLK_DEV_RAM=y
47# CONFIG_MISC_DEVICES is not set
48CONFIG_NETDEVICES=y
49CONFIG_NET_ETHERNET=y
50CONFIG_FEC=y
51# CONFIG_NETDEV_1000 is not set
52# CONFIG_NETDEV_10000 is not set
53# CONFIG_INPUT is not set
54# CONFIG_SERIO is not set
55# CONFIG_VT is not set
56CONFIG_SERIAL_MCF=y
57CONFIG_SERIAL_MCF_BAUDRATE=115200
58CONFIG_SERIAL_MCF_CONSOLE=y
59# CONFIG_UNIX98_PTYS is not set
60# CONFIG_HW_RANDOM is not set
61# CONFIG_HWMON is not set
62# CONFIG_USB_SUPPORT is not set
63CONFIG_EXT2_FS=y
64# CONFIG_FILE_LOCKING is not set
65# CONFIG_DNOTIFY is not set
66# CONFIG_SYSFS is not set
67CONFIG_ROMFS_FS=y
68CONFIG_ROMFS_BACKED_BY_MTD=y
69# CONFIG_NETWORK_FILESYSTEMS is not set
70# CONFIG_RCU_CPU_STALL_DETECTOR is not set
71CONFIG_SYSCTL_SYSCALL_CHECK=y
72CONFIG_FULLDEBUG=y
73CONFIG_BOOTPARAM=y
74CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
diff --git a/arch/m68knommu/kernel/.gitignore b/arch/m68knommu/kernel/.gitignore
deleted file mode 100644
index c5f676c3c224..000000000000
--- a/arch/m68knommu/kernel/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
1vmlinux.lds
diff --git a/arch/m68knommu/kernel/Makefile b/arch/m68knommu/kernel/Makefile
deleted file mode 100644
index 37c3fc074c0a..000000000000
--- a/arch/m68knommu/kernel/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
1#
2# Makefile for arch/m68knommu/kernel.
3#
4
5extra-y := vmlinux.lds
6
7obj-y += dma.o entry.o init_task.o irq.o m68k_ksyms.o process.o ptrace.o \
8 setup.o signal.o syscalltable.o sys_m68k.o time.o traps.o
9
10obj-$(CONFIG_MODULES) += module.o
diff --git a/arch/m68knommu/kernel/asm-offsets.c b/arch/m68knommu/kernel/asm-offsets.c
deleted file mode 100644
index ffe02f41ad46..000000000000
--- a/arch/m68knommu/kernel/asm-offsets.c
+++ /dev/null
@@ -1,76 +0,0 @@
1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 */
10
11#include <linux/stddef.h>
12#include <linux/sched.h>
13#include <linux/kernel_stat.h>
14#include <linux/ptrace.h>
15#include <linux/hardirq.h>
16#include <linux/kbuild.h>
17#include <asm/bootinfo.h>
18#include <asm/irq.h>
19#include <asm/thread_info.h>
20
21int main(void)
22{
23 /* offsets into the task struct */
24 DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
25 DEFINE(TASK_MM, offsetof(struct task_struct, mm));
26
27 /* offsets into the irq_cpustat_t struct */
28 DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
29
30 /* offsets into the thread struct */
31 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
32 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
33 DEFINE(THREAD_SR, offsetof(struct thread_struct, sr));
34 DEFINE(THREAD_FS, offsetof(struct thread_struct, fs));
35 DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp));
36 DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
37 DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp));
38 DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl));
39 DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate));
40
41 /* offsets into the pt_regs */
42 DEFINE(PT_OFF_D0, offsetof(struct pt_regs, d0));
43 DEFINE(PT_OFF_ORIG_D0, offsetof(struct pt_regs, orig_d0));
44 DEFINE(PT_OFF_D1, offsetof(struct pt_regs, d1));
45 DEFINE(PT_OFF_D2, offsetof(struct pt_regs, d2));
46 DEFINE(PT_OFF_D3, offsetof(struct pt_regs, d3));
47 DEFINE(PT_OFF_D4, offsetof(struct pt_regs, d4));
48 DEFINE(PT_OFF_D5, offsetof(struct pt_regs, d5));
49 DEFINE(PT_OFF_A0, offsetof(struct pt_regs, a0));
50 DEFINE(PT_OFF_A1, offsetof(struct pt_regs, a1));
51 DEFINE(PT_OFF_A2, offsetof(struct pt_regs, a2));
52 DEFINE(PT_OFF_PC, offsetof(struct pt_regs, pc));
53 DEFINE(PT_OFF_SR, offsetof(struct pt_regs, sr));
54
55#ifdef CONFIG_COLDFIRE
56 /* bitfields are a bit difficult */
57 DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, sr) - 2);
58#else
59 /* bitfields are a bit difficult */
60 DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, pc) + 4);
61#endif
62
63 /* signal defines */
64 DEFINE(SIGSEGV, SIGSEGV);
65 DEFINE(SEGV_MAPERR, SEGV_MAPERR);
66 DEFINE(SIGTRAP, SIGTRAP);
67 DEFINE(TRAP_TRACE, TRAP_TRACE);
68
69 DEFINE(PT_PTRACED, PT_PTRACED);
70
71 /* Offsets in thread_info structure */
72 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
73 DEFINE(TI_PREEMPTCOUNT, offsetof(struct thread_info, preempt_count));
74
75 return 0;
76}
diff --git a/arch/m68knommu/kernel/dma.c b/arch/m68knommu/kernel/dma.c
deleted file mode 100644
index fc61541aeb71..000000000000
--- a/arch/m68knommu/kernel/dma.c
+++ /dev/null
@@ -1,74 +0,0 @@
1/*
2 * Dynamic DMA mapping support.
3 *
4 * We never have any address translations to worry about, so this
5 * is just alloc/free.
6 */
7
8#include <linux/types.h>
9#include <linux/gfp.h>
10#include <linux/mm.h>
11#include <linux/device.h>
12#include <linux/dma-mapping.h>
13#include <asm/cacheflush.h>
14
15void *dma_alloc_coherent(struct device *dev, size_t size,
16 dma_addr_t *dma_handle, gfp_t gfp)
17{
18 void *ret;
19 /* ignore region specifiers */
20 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
21
22 if (dev == NULL || (*dev->dma_mask < 0xffffffff))
23 gfp |= GFP_DMA;
24 ret = (void *)__get_free_pages(gfp, get_order(size));
25
26 if (ret != NULL) {
27 memset(ret, 0, size);
28 *dma_handle = virt_to_phys(ret);
29 }
30 return ret;
31}
32
33void dma_free_coherent(struct device *dev, size_t size,
34 void *vaddr, dma_addr_t dma_handle)
35{
36 free_pages((unsigned long)vaddr, get_order(size));
37}
38
39void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
40 size_t size, enum dma_data_direction dir)
41{
42 switch (dir) {
43 case DMA_TO_DEVICE:
44 flush_dcache_range(handle, size);
45 break;
46 case DMA_FROM_DEVICE:
47 /* Should be clear already */
48 break;
49 default:
50 if (printk_ratelimit())
51 printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
52 break;
53 }
54}
55
56EXPORT_SYMBOL(dma_sync_single_for_device);
57dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
58 enum dma_data_direction dir)
59{
60 dma_addr_t handle = virt_to_phys(addr);
61 flush_dcache_range(handle, size);
62 return handle;
63}
64EXPORT_SYMBOL(dma_map_single);
65
66dma_addr_t dma_map_page(struct device *dev, struct page *page,
67 unsigned long offset, size_t size,
68 enum dma_data_direction dir)
69{
70 dma_addr_t handle = page_to_phys(page) + offset;
71 dma_sync_single_for_device(dev, handle, size, dir);
72 return handle;
73}
74EXPORT_SYMBOL(dma_map_page);
diff --git a/arch/m68knommu/kernel/entry.S b/arch/m68knommu/kernel/entry.S
deleted file mode 100644
index 2783f25e38bd..000000000000
--- a/arch/m68knommu/kernel/entry.S
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 * linux/arch/m68knommu/kernel/entry.S
3 *
4 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
5 * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>,
6 * Kenneth Albanowski <kjahds@kjahds.com>,
7 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
8 *
9 * Based on:
10 *
11 * linux/arch/m68k/kernel/entry.S
12 *
13 * Copyright (C) 1991, 1992 Linus Torvalds
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file README.legal in the main directory of this archive
17 * for more details.
18 *
19 * Linux/m68k support by Hamish Macdonald
20 *
21 * 68060 fixes by Jesper Skov
22 * ColdFire support by Greg Ungerer (gerg@snapgear.com)
23 * 5307 fixes by David W. Miller
24 * linux 2.4 support David McCullough <davidm@snapgear.com>
25 */
26
27#include <linux/sys.h>
28#include <linux/linkage.h>
29#include <asm/errno.h>
30#include <asm/setup.h>
31#include <asm/segment.h>
32#include <asm/asm-offsets.h>
33#include <asm/entry.h>
34#include <asm/unistd.h>
35
36.text
37
38.globl buserr
39.globl trap
40.globl ret_from_exception
41.globl ret_from_signal
42.globl sys_fork
43.globl sys_clone
44.globl sys_vfork
45
46ENTRY(buserr)
47 SAVE_ALL
48 moveq #-1,%d0
49 movel %d0,%sp@(PT_OFF_ORIG_D0)
50 movel %sp,%sp@- /* stack frame pointer argument */
51 jsr buserr_c
52 addql #4,%sp
53 jra ret_from_exception
54
55ENTRY(trap)
56 SAVE_ALL
57 moveq #-1,%d0
58 movel %d0,%sp@(PT_OFF_ORIG_D0)
59 movel %sp,%sp@- /* stack frame pointer argument */
60 jsr trap_c
61 addql #4,%sp
62 jra ret_from_exception
63
64#ifdef TRAP_DBG_INTERRUPT
65
66.globl dbginterrupt
67ENTRY(dbginterrupt)
68 SAVE_ALL
69 moveq #-1,%d0
70 movel %d0,%sp@(PT_OFF_ORIG_D0)
71 movel %sp,%sp@- /* stack frame pointer argument */
72 jsr dbginterrupt_c
73 addql #4,%sp
74 jra ret_from_exception
75#endif
76
77ENTRY(reschedule)
78 /* save top of frame */
79 pea %sp@
80 jbsr set_esp0
81 addql #4,%sp
82 pea ret_from_exception
83 jmp schedule
84
85ENTRY(ret_from_fork)
86 movel %d1,%sp@-
87 jsr schedule_tail
88 addql #4,%sp
89 jra ret_from_exception
90
91ENTRY(sys_fork)
92 SAVE_SWITCH_STACK
93 pea %sp@(SWITCH_STACK_SIZE)
94 jbsr m68k_fork
95 addql #4,%sp
96 RESTORE_SWITCH_STACK
97 rts
98
99ENTRY(sys_vfork)
100 SAVE_SWITCH_STACK
101 pea %sp@(SWITCH_STACK_SIZE)
102 jbsr m68k_vfork
103 addql #4,%sp
104 RESTORE_SWITCH_STACK
105 rts
106
107ENTRY(sys_clone)
108 SAVE_SWITCH_STACK
109 pea %sp@(SWITCH_STACK_SIZE)
110 jbsr m68k_clone
111 addql #4,%sp
112 RESTORE_SWITCH_STACK
113 rts
114
115ENTRY(sys_sigreturn)
116 SAVE_SWITCH_STACK
117 jbsr do_sigreturn
118 RESTORE_SWITCH_STACK
119 rts
120
121ENTRY(sys_rt_sigreturn)
122 SAVE_SWITCH_STACK
123 jbsr do_rt_sigreturn
124 RESTORE_SWITCH_STACK
125 rts
126
127ENTRY(ret_from_user_signal)
128 moveq #__NR_sigreturn,%d0
129 trap #0
130
131ENTRY(ret_from_user_rt_signal)
132 movel #__NR_rt_sigreturn,%d0
133 trap #0
134
diff --git a/arch/m68knommu/kernel/init_task.c b/arch/m68knommu/kernel/init_task.c
deleted file mode 100644
index cbf9dc3cc51d..000000000000
--- a/arch/m68knommu/kernel/init_task.c
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * linux/arch/m68knommu/kernel/init_task.c
3 */
4#include <linux/mm.h>
5#include <linux/module.h>
6#include <linux/sched.h>
7#include <linux/init.h>
8#include <linux/init_task.h>
9#include <linux/fs.h>
10#include <linux/mqueue.h>
11
12#include <asm/uaccess.h>
13#include <asm/pgtable.h>
14
15static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
16static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
17/*
18 * Initial task structure.
19 *
20 * All other task structs will be allocated on slabs in fork.c
21 */
22__asm__(".align 4");
23struct task_struct init_task = INIT_TASK(init_task);
24
25EXPORT_SYMBOL(init_task);
26
27/*
28 * Initial thread structure.
29 *
30 * We need to make sure that this is 8192-byte aligned due to the
31 * way process stacks are handled. This is done by having a special
32 * "init_task" linker map entry..
33 */
34union thread_union init_thread_union __init_task_data =
35 { INIT_THREAD_INFO(init_task) };
36
diff --git a/arch/m68knommu/kernel/irq.c b/arch/m68knommu/kernel/irq.c
deleted file mode 100644
index c7dd48f37bee..000000000000
--- a/arch/m68knommu/kernel/irq.c
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * irq.c
3 *
4 * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/kernel_stat.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <linux/seq_file.h>
18#include <asm/system.h>
19#include <asm/traps.h>
20
21asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
22{
23 struct pt_regs *oldregs = set_irq_regs(regs);
24
25 irq_enter();
26 generic_handle_irq(irq);
27 irq_exit();
28
29 set_irq_regs(oldregs);
30}
31
32int show_interrupts(struct seq_file *p, void *v)
33{
34 struct irqaction *ap;
35 int irq = *((loff_t *) v);
36
37 if (irq == 0)
38 seq_puts(p, " CPU0\n");
39
40 if (irq < NR_IRQS) {
41 struct irq_desc *desc = irq_to_desc(irq);
42
43 ap = desc->action;
44 if (ap) {
45 seq_printf(p, "%3d: ", irq);
46 seq_printf(p, "%10u ", kstat_irqs(irq));
47 seq_printf(p, "%14s ", get_irq_desc_chip(desc)->name);
48
49 seq_printf(p, "%s", ap->name);
50 for (ap = ap->next; ap; ap = ap->next)
51 seq_printf(p, ", %s", ap->name);
52 seq_putc(p, '\n');
53 }
54 }
55
56 return 0;
57}
58
diff --git a/arch/m68knommu/kernel/m68k_ksyms.c b/arch/m68knommu/kernel/m68k_ksyms.c
deleted file mode 100644
index 39fe0a7aec32..000000000000
--- a/arch/m68knommu/kernel/m68k_ksyms.c
+++ /dev/null
@@ -1,78 +0,0 @@
1#include <linux/module.h>
2#include <linux/linkage.h>
3#include <linux/sched.h>
4#include <linux/string.h>
5#include <linux/mm.h>
6#include <linux/user.h>
7#include <linux/elfcore.h>
8#include <linux/in6.h>
9#include <linux/interrupt.h>
10
11#include <asm/setup.h>
12#include <asm/machdep.h>
13#include <asm/pgalloc.h>
14#include <asm/irq.h>
15#include <asm/io.h>
16#include <asm/checksum.h>
17#include <asm/current.h>
18
19extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
20
21/* platform dependent support */
22
23EXPORT_SYMBOL(__ioremap);
24EXPORT_SYMBOL(iounmap);
25EXPORT_SYMBOL(dump_fpu);
26
27EXPORT_SYMBOL(ip_fast_csum);
28
29EXPORT_SYMBOL(kernel_thread);
30
31/* Networking helper routines. */
32EXPORT_SYMBOL(csum_partial_copy_nocheck);
33
34/* The following are special because they're not called
35 explicitly (the C compiler generates them). Fortunately,
36 their interface isn't gonna change any time soon now, so
37 it's OK to leave it out of version control. */
38EXPORT_SYMBOL(memcpy);
39EXPORT_SYMBOL(memset);
40
41/*
42 * libgcc functions - functions that are used internally by the
43 * compiler... (prototypes are not correct though, but that
44 * doesn't really matter since they're not versioned).
45 */
46extern void __ashldi3(void);
47extern void __ashrdi3(void);
48extern void __divsi3(void);
49extern void __lshrdi3(void);
50extern void __modsi3(void);
51extern void __muldi3(void);
52extern void __mulsi3(void);
53extern void __udivsi3(void);
54extern void __umodsi3(void);
55
56 /* gcc lib functions */
57EXPORT_SYMBOL(__ashldi3);
58EXPORT_SYMBOL(__ashrdi3);
59EXPORT_SYMBOL(__divsi3);
60EXPORT_SYMBOL(__lshrdi3);
61EXPORT_SYMBOL(__modsi3);
62EXPORT_SYMBOL(__muldi3);
63EXPORT_SYMBOL(__mulsi3);
64EXPORT_SYMBOL(__udivsi3);
65EXPORT_SYMBOL(__umodsi3);
66
67#ifdef CONFIG_COLDFIRE
68extern unsigned int *dma_device_address;
69extern unsigned long dma_base_addr, _ramend;
70EXPORT_SYMBOL(dma_base_addr);
71EXPORT_SYMBOL(dma_device_address);
72EXPORT_SYMBOL(_ramend);
73
74extern asmlinkage void trap(void);
75extern void *_ramvec;
76EXPORT_SYMBOL(trap);
77EXPORT_SYMBOL(_ramvec);
78#endif /* CONFIG_COLDFIRE */
diff --git a/arch/m68knommu/kernel/module.c b/arch/m68knommu/kernel/module.c
deleted file mode 100644
index d11ffae7956a..000000000000
--- a/arch/m68knommu/kernel/module.c
+++ /dev/null
@@ -1,126 +0,0 @@
1#include <linux/moduleloader.h>
2#include <linux/elf.h>
3#include <linux/vmalloc.h>
4#include <linux/fs.h>
5#include <linux/string.h>
6#include <linux/kernel.h>
7
8#if 0
9#define DEBUGP printk
10#else
11#define DEBUGP(fmt...)
12#endif
13
14void *module_alloc(unsigned long size)
15{
16 if (size == 0)
17 return NULL;
18 return vmalloc(size);
19}
20
21
22/* Free memory returned from module_alloc */
23void module_free(struct module *mod, void *module_region)
24{
25 vfree(module_region);
26}
27
28/* We don't need anything special. */
29int module_frob_arch_sections(Elf_Ehdr *hdr,
30 Elf_Shdr *sechdrs,
31 char *secstrings,
32 struct module *mod)
33{
34 return 0;
35}
36
37int apply_relocate(Elf32_Shdr *sechdrs,
38 const char *strtab,
39 unsigned int symindex,
40 unsigned int relsec,
41 struct module *me)
42{
43 unsigned int i;
44 Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
45 Elf32_Sym *sym;
46 uint32_t *location;
47
48 DEBUGP("Applying relocate section %u to %u\n", relsec,
49 sechdrs[relsec].sh_info);
50 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
51 /* This is where to make the change */
52 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
53 + rel[i].r_offset;
54 /* This is the symbol it is referring to. Note that all
55 undefined symbols have been resolved. */
56 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
57 + ELF32_R_SYM(rel[i].r_info);
58
59 switch (ELF32_R_TYPE(rel[i].r_info)) {
60 case R_68K_32:
61 /* We add the value into the location given */
62 *location += sym->st_value;
63 break;
64 case R_68K_PC32:
65 /* Add the value, subtract its postition */
66 *location += sym->st_value - (uint32_t)location;
67 break;
68 default:
69 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
70 me->name, ELF32_R_TYPE(rel[i].r_info));
71 return -ENOEXEC;
72 }
73 }
74 return 0;
75}
76
77int apply_relocate_add(Elf32_Shdr *sechdrs,
78 const char *strtab,
79 unsigned int symindex,
80 unsigned int relsec,
81 struct module *me)
82{
83 unsigned int i;
84 Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
85 Elf32_Sym *sym;
86 uint32_t *location;
87
88 DEBUGP("Applying relocate_add section %u to %u\n", relsec,
89 sechdrs[relsec].sh_info);
90 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
91 /* This is where to make the change */
92 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
93 + rel[i].r_offset;
94 /* This is the symbol it is referring to. Note that all
95 undefined symbols have been resolved. */
96 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
97 + ELF32_R_SYM(rel[i].r_info);
98
99 switch (ELF32_R_TYPE(rel[i].r_info)) {
100 case R_68K_32:
101 /* We add the value into the location given */
102 *location = rel[i].r_addend + sym->st_value;
103 break;
104 case R_68K_PC32:
105 /* Add the value, subtract its postition */
106 *location = rel[i].r_addend + sym->st_value - (uint32_t)location;
107 break;
108 default:
109 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
110 me->name, ELF32_R_TYPE(rel[i].r_info));
111 return -ENOEXEC;
112 }
113 }
114 return 0;
115}
116
117int module_finalize(const Elf_Ehdr *hdr,
118 const Elf_Shdr *sechdrs,
119 struct module *me)
120{
121 return 0;
122}
123
124void module_arch_cleanup(struct module *mod)
125{
126}
diff --git a/arch/m68knommu/kernel/process.c b/arch/m68knommu/kernel/process.c
deleted file mode 100644
index e2a63af5d517..000000000000
--- a/arch/m68knommu/kernel/process.c
+++ /dev/null
@@ -1,404 +0,0 @@
1/*
2 * linux/arch/m68knommu/kernel/process.c
3 *
4 * Copyright (C) 1995 Hamish Macdonald
5 *
6 * 68060 fixes by Jesper Skov
7 *
8 * uClinux changes
9 * Copyright (C) 2000-2002, David McCullough <davidm@snapgear.com>
10 */
11
12/*
13 * This file handles the architecture-dependent parts of process handling..
14 */
15
16#include <linux/module.h>
17#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
22#include <linux/stddef.h>
23#include <linux/unistd.h>
24#include <linux/ptrace.h>
25#include <linux/user.h>
26#include <linux/interrupt.h>
27#include <linux/reboot.h>
28#include <linux/fs.h>
29#include <linux/slab.h>
30
31#include <asm/uaccess.h>
32#include <asm/system.h>
33#include <asm/traps.h>
34#include <asm/machdep.h>
35#include <asm/setup.h>
36#include <asm/pgtable.h>
37
38asmlinkage void ret_from_fork(void);
39
40/*
41 * The following aren't currently used.
42 */
43void (*pm_idle)(void);
44EXPORT_SYMBOL(pm_idle);
45
46void (*pm_power_off)(void);
47EXPORT_SYMBOL(pm_power_off);
48
49/*
50 * The idle loop on an m68knommu..
51 */
52static void default_idle(void)
53{
54 local_irq_disable();
55 while (!need_resched()) {
56 /* This stop will re-enable interrupts */
57 __asm__("stop #0x2000" : : : "cc");
58 local_irq_disable();
59 }
60 local_irq_enable();
61}
62
63void (*idle)(void) = default_idle;
64
65/*
66 * The idle thread. There's no useful work to be
67 * done, so just try to conserve power and have a
68 * low exit latency (ie sit in a loop waiting for
69 * somebody to say that they'd like to reschedule)
70 */
71void cpu_idle(void)
72{
73 /* endless idle loop with no priority at all */
74 while (1) {
75 idle();
76 preempt_enable_no_resched();
77 schedule();
78 preempt_disable();
79 }
80}
81
82void machine_restart(char * __unused)
83{
84 if (mach_reset)
85 mach_reset();
86 for (;;);
87}
88
89void machine_halt(void)
90{
91 if (mach_halt)
92 mach_halt();
93 for (;;);
94}
95
96void machine_power_off(void)
97{
98 if (mach_power_off)
99 mach_power_off();
100 for (;;);
101}
102
103void show_regs(struct pt_regs * regs)
104{
105 printk(KERN_NOTICE "\n");
106 printk(KERN_NOTICE "Format %02x Vector: %04x PC: %08lx Status: %04x %s\n",
107 regs->format, regs->vector, regs->pc, regs->sr, print_tainted());
108 printk(KERN_NOTICE "ORIG_D0: %08lx D0: %08lx A2: %08lx A1: %08lx\n",
109 regs->orig_d0, regs->d0, regs->a2, regs->a1);
110 printk(KERN_NOTICE "A0: %08lx D5: %08lx D4: %08lx\n",
111 regs->a0, regs->d5, regs->d4);
112 printk(KERN_NOTICE "D3: %08lx D2: %08lx D1: %08lx\n",
113 regs->d3, regs->d2, regs->d1);
114 if (!(regs->sr & PS_S))
115 printk(KERN_NOTICE "USP: %08lx\n", rdusp());
116}
117
118/*
119 * Create a kernel thread
120 */
121int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
122{
123 int retval;
124 long clone_arg = flags | CLONE_VM;
125 mm_segment_t fs;
126
127 fs = get_fs();
128 set_fs(KERNEL_DS);
129
130 __asm__ __volatile__ (
131 "movel %%sp, %%d2\n\t"
132 "movel %5, %%d1\n\t"
133 "movel %1, %%d0\n\t"
134 "trap #0\n\t"
135 "cmpl %%sp, %%d2\n\t"
136 "jeq 1f\n\t"
137 "movel %3, %%sp@-\n\t"
138 "jsr %4@\n\t"
139 "movel %2, %%d0\n\t"
140 "trap #0\n"
141 "1:\n\t"
142 "movel %%d0, %0\n"
143 : "=d" (retval)
144 : "i" (__NR_clone),
145 "i" (__NR_exit),
146 "a" (arg),
147 "a" (fn),
148 "a" (clone_arg)
149 : "cc", "%d0", "%d1", "%d2");
150
151 set_fs(fs);
152 return retval;
153}
154
155void flush_thread(void)
156{
157#ifdef CONFIG_FPU
158 unsigned long zero = 0;
159#endif
160 set_fs(USER_DS);
161 current->thread.fs = __USER_DS;
162#ifdef CONFIG_FPU
163 if (!FPU_IS_EMU)
164 asm volatile (".chip 68k/68881\n\t"
165 "frestore %0@\n\t"
166 ".chip 68k" : : "a" (&zero));
167#endif
168}
169
170/*
171 * "m68k_fork()".. By the time we get here, the
172 * non-volatile registers have also been saved on the
173 * stack. We do some ugly pointer stuff here.. (see
174 * also copy_thread)
175 */
176
177asmlinkage int m68k_fork(struct pt_regs *regs)
178{
179 /* fork almost works, enough to trick you into looking elsewhere :-( */
180 return(-EINVAL);
181}
182
183asmlinkage int m68k_vfork(struct pt_regs *regs)
184{
185 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL, NULL);
186}
187
188asmlinkage int m68k_clone(struct pt_regs *regs)
189{
190 unsigned long clone_flags;
191 unsigned long newsp;
192
193 /* syscall2 puts clone_flags in d1 and usp in d2 */
194 clone_flags = regs->d1;
195 newsp = regs->d2;
196 if (!newsp)
197 newsp = rdusp();
198 return do_fork(clone_flags, newsp, regs, 0, NULL, NULL);
199}
200
201int copy_thread(unsigned long clone_flags,
202 unsigned long usp, unsigned long topstk,
203 struct task_struct * p, struct pt_regs * regs)
204{
205 struct pt_regs * childregs;
206 struct switch_stack * childstack, *stack;
207 unsigned long *retp;
208
209 childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
210
211 *childregs = *regs;
212 childregs->d0 = 0;
213
214 retp = ((unsigned long *) regs);
215 stack = ((struct switch_stack *) retp) - 1;
216
217 childstack = ((struct switch_stack *) childregs) - 1;
218 *childstack = *stack;
219 childstack->retpc = (unsigned long)ret_from_fork;
220
221 p->thread.usp = usp;
222 p->thread.ksp = (unsigned long)childstack;
223
224 if (clone_flags & CLONE_SETTLS)
225 task_thread_info(p)->tp_value = regs->d5;
226
227 /*
228 * Must save the current SFC/DFC value, NOT the value when
229 * the parent was last descheduled - RGH 10-08-96
230 */
231 p->thread.fs = get_fs().seg;
232
233#ifdef CONFIG_FPU
234 if (!FPU_IS_EMU) {
235 /* Copy the current fpu state */
236 asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
237
238 if (p->thread.fpstate[0])
239 asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
240 "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
241 : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
242 : "memory");
243 /* Restore the state in case the fpu was busy */
244 asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
245 }
246#endif
247
248 return 0;
249}
250
251/* Fill in the fpu structure for a core dump. */
252
253int dump_fpu(struct pt_regs *regs, struct user_m68kfp_struct *fpu)
254{
255#ifdef CONFIG_FPU
256 char fpustate[216];
257
258 if (FPU_IS_EMU) {
259 int i;
260
261 memcpy(fpu->fpcntl, current->thread.fpcntl, 12);
262 memcpy(fpu->fpregs, current->thread.fp, 96);
263 /* Convert internal fpu reg representation
264 * into long double format
265 */
266 for (i = 0; i < 24; i += 3)
267 fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) |
268 ((fpu->fpregs[i] & 0x0000ffff) << 16);
269 return 1;
270 }
271
272 /* First dump the fpu context to avoid protocol violation. */
273 asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
274 if (!fpustate[0])
275 return 0;
276
277 asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
278 :: "m" (fpu->fpcntl[0])
279 : "memory");
280 asm volatile ("fmovemx %/fp0-%/fp7,%0"
281 :: "m" (fpu->fpregs[0])
282 : "memory");
283#endif
284 return 1;
285}
286
287/*
288 * Generic dumping code. Used for panic and debug.
289 */
290void dump(struct pt_regs *fp)
291{
292 unsigned long *sp;
293 unsigned char *tp;
294 int i;
295
296 printk(KERN_EMERG "\nCURRENT PROCESS:\n\n");
297 printk(KERN_EMERG "COMM=%s PID=%d\n", current->comm, current->pid);
298
299 if (current->mm) {
300 printk(KERN_EMERG "TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n",
301 (int) current->mm->start_code,
302 (int) current->mm->end_code,
303 (int) current->mm->start_data,
304 (int) current->mm->end_data,
305 (int) current->mm->end_data,
306 (int) current->mm->brk);
307 printk(KERN_EMERG "USER-STACK=%08x KERNEL-STACK=%08x\n\n",
308 (int) current->mm->start_stack,
309 (int)(((unsigned long) current) + THREAD_SIZE));
310 }
311
312 printk(KERN_EMERG "PC: %08lx\n", fp->pc);
313 printk(KERN_EMERG "SR: %08lx SP: %08lx\n", (long) fp->sr, (long) fp);
314 printk(KERN_EMERG "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
315 fp->d0, fp->d1, fp->d2, fp->d3);
316 printk(KERN_EMERG "d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
317 fp->d4, fp->d5, fp->a0, fp->a1);
318 printk(KERN_EMERG "\nUSP: %08x TRAPFRAME: %p\n",
319 (unsigned int) rdusp(), fp);
320
321 printk(KERN_EMERG "\nCODE:");
322 tp = ((unsigned char *) fp->pc) - 0x20;
323 for (sp = (unsigned long *) tp, i = 0; (i < 0x40); i += 4) {
324 if ((i % 0x10) == 0)
325 printk(KERN_EMERG "%p: ", tp + i);
326 printk("%08x ", (int) *sp++);
327 }
328 printk(KERN_EMERG "\n");
329
330 printk(KERN_EMERG "KERNEL STACK:");
331 tp = ((unsigned char *) fp) - 0x40;
332 for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) {
333 if ((i % 0x10) == 0)
334 printk(KERN_EMERG "%p: ", tp + i);
335 printk("%08x ", (int) *sp++);
336 }
337 printk(KERN_EMERG "\n");
338
339 printk(KERN_EMERG "USER STACK:");
340 tp = (unsigned char *) (rdusp() - 0x10);
341 for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) {
342 if ((i % 0x10) == 0)
343 printk(KERN_EMERG "%p: ", tp + i);
344 printk("%08x ", (int) *sp++);
345 }
346 printk(KERN_EMERG "\n");
347}
348
349/*
350 * sys_execve() executes a new program.
351 */
352asmlinkage int sys_execve(const char *name,
353 const char *const *argv,
354 const char *const *envp)
355{
356 int error;
357 char * filename;
358 struct pt_regs *regs = (struct pt_regs *) &name;
359
360 filename = getname(name);
361 error = PTR_ERR(filename);
362 if (IS_ERR(filename))
363 return error;
364 error = do_execve(filename, argv, envp, regs);
365 putname(filename);
366 return error;
367}
368
369unsigned long get_wchan(struct task_struct *p)
370{
371 unsigned long fp, pc;
372 unsigned long stack_page;
373 int count = 0;
374 if (!p || p == current || p->state == TASK_RUNNING)
375 return 0;
376
377 stack_page = (unsigned long)p;
378 fp = ((struct switch_stack *)p->thread.ksp)->a6;
379 do {
380 if (fp < stack_page+sizeof(struct thread_info) ||
381 fp >= THREAD_SIZE-8+stack_page)
382 return 0;
383 pc = ((unsigned long *)fp)[1];
384 if (!in_sched_functions(pc))
385 return pc;
386 fp = *(unsigned long *) fp;
387 } while (count++ < 16);
388 return 0;
389}
390
391/*
392 * Return saved PC of a blocked thread.
393 */
394unsigned long thread_saved_pc(struct task_struct *tsk)
395{
396 struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp;
397
398 /* Check whether the thread is blocked in resume() */
399 if (in_sched_functions(sw->retpc))
400 return ((unsigned long *)sw->a6)[1];
401 else
402 return sw->retpc;
403}
404
diff --git a/arch/m68knommu/kernel/ptrace.c b/arch/m68knommu/kernel/ptrace.c
deleted file mode 100644
index 6709fb707335..000000000000
--- a/arch/m68knommu/kernel/ptrace.c
+++ /dev/null
@@ -1,255 +0,0 @@
1/*
2 * linux/arch/m68knommu/kernel/ptrace.c
3 *
4 * Copyright (C) 1994 by Hamish Macdonald
5 * Taken from linux/kernel/ptrace.c and modified for M680x0.
6 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of
10 * this archive for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/smp.h>
17#include <linux/errno.h>
18#include <linux/ptrace.h>
19#include <linux/user.h>
20#include <linux/signal.h>
21#include <linux/tracehook.h>
22
23#include <asm/uaccess.h>
24#include <asm/page.h>
25#include <asm/pgtable.h>
26#include <asm/system.h>
27#include <asm/processor.h>
28
29/*
30 * does not yet catch signals sent when the child dies.
31 * in exit.c or in signal.c.
32 */
33
34/* determines which bits in the SR the user has access to. */
35/* 1 = access 0 = no access */
36#define SR_MASK 0x001f
37
38/* sets the trace bits. */
39#define TRACE_BITS 0x8000
40
41/* Find the stack offset for a register, relative to thread.esp0. */
42#define PT_REG(reg) ((long)&((struct pt_regs *)0)->reg)
43#define SW_REG(reg) ((long)&((struct switch_stack *)0)->reg \
44 - sizeof(struct switch_stack))
45/* Mapping from PT_xxx to the stack offset at which the register is
46 saved. Notice that usp has no stack-slot and needs to be treated
47 specially (see get_reg/put_reg below). */
48static int regoff[] = {
49 PT_REG(d1), PT_REG(d2), PT_REG(d3), PT_REG(d4),
50 PT_REG(d5), SW_REG(d6), SW_REG(d7), PT_REG(a0),
51 PT_REG(a1), PT_REG(a2), SW_REG(a3), SW_REG(a4),
52 SW_REG(a5), SW_REG(a6), PT_REG(d0), -1,
53 PT_REG(orig_d0), PT_REG(sr), PT_REG(pc),
54};
55
56/*
57 * Get contents of register REGNO in task TASK.
58 */
59static inline long get_reg(struct task_struct *task, int regno)
60{
61 unsigned long *addr;
62
63 if (regno == PT_USP)
64 addr = &task->thread.usp;
65 else if (regno < ARRAY_SIZE(regoff))
66 addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
67 else
68 return 0;
69 return *addr;
70}
71
72/*
73 * Write contents of register REGNO in task TASK.
74 */
75static inline int put_reg(struct task_struct *task, int regno,
76 unsigned long data)
77{
78 unsigned long *addr;
79
80 if (regno == PT_USP)
81 addr = &task->thread.usp;
82 else if (regno < ARRAY_SIZE(regoff))
83 addr = (unsigned long *) (task->thread.esp0 + regoff[regno]);
84 else
85 return -1;
86 *addr = data;
87 return 0;
88}
89
90void user_enable_single_step(struct task_struct *task)
91{
92 unsigned long srflags;
93 srflags = get_reg(task, PT_SR) | (TRACE_BITS << 16);
94 put_reg(task, PT_SR, srflags);
95}
96
97void user_disable_single_step(struct task_struct *task)
98{
99 unsigned long srflags;
100 srflags = get_reg(task, PT_SR) & ~(TRACE_BITS << 16);
101 put_reg(task, PT_SR, srflags);
102}
103
104/*
105 * Called by kernel/ptrace.c when detaching..
106 *
107 * Make sure the single step bit is not set.
108 */
109void ptrace_disable(struct task_struct *child)
110{
111 /* make sure the single step bit is not set. */
112 user_disable_single_step(child);
113}
114
115long arch_ptrace(struct task_struct *child, long request,
116 unsigned long addr, unsigned long data)
117{
118 int ret;
119 int regno = addr >> 2;
120 unsigned long __user *datap = (unsigned long __user *) data;
121
122 switch (request) {
123 /* read the word at location addr in the USER area. */
124 case PTRACE_PEEKUSR: {
125 unsigned long tmp;
126
127 ret = -EIO;
128 if ((addr & 3) || addr > sizeof(struct user) - 3)
129 break;
130
131 tmp = 0; /* Default return condition */
132 ret = -EIO;
133 if (regno < 19) {
134 tmp = get_reg(child, regno);
135 if (regno == PT_SR)
136 tmp >>= 16;
137 } else if (regno >= 21 && regno < 49) {
138 tmp = child->thread.fp[regno - 21];
139 } else if (regno == 49) {
140 tmp = child->mm->start_code;
141 } else if (regno == 50) {
142 tmp = child->mm->start_data;
143 } else if (regno == 51) {
144 tmp = child->mm->end_code;
145 } else
146 break;
147 ret = put_user(tmp, datap);
148 break;
149 }
150
151 case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
152 ret = -EIO;
153 if ((addr & 3) || addr > sizeof(struct user) - 3)
154 break;
155
156 if (regno == PT_SR) {
157 data &= SR_MASK;
158 data <<= 16;
159 data |= get_reg(child, PT_SR) & ~(SR_MASK << 16);
160 }
161 if (regno < 19) {
162 if (put_reg(child, regno, data))
163 break;
164 ret = 0;
165 break;
166 }
167 if (regno >= 21 && regno < 48)
168 {
169 child->thread.fp[regno - 21] = data;
170 ret = 0;
171 }
172 break;
173
174 case PTRACE_GETREGS: { /* Get all gp regs from the child. */
175 int i;
176 unsigned long tmp;
177 for (i = 0; i < 19; i++) {
178 tmp = get_reg(child, i);
179 if (i == PT_SR)
180 tmp >>= 16;
181 if (put_user(tmp, datap)) {
182 ret = -EFAULT;
183 break;
184 }
185 datap++;
186 }
187 ret = 0;
188 break;
189 }
190
191 case PTRACE_SETREGS: { /* Set all gp regs in the child. */
192 int i;
193 unsigned long tmp;
194 for (i = 0; i < 19; i++) {
195 if (get_user(tmp, datap)) {
196 ret = -EFAULT;
197 break;
198 }
199 if (i == PT_SR) {
200 tmp &= SR_MASK;
201 tmp <<= 16;
202 tmp |= get_reg(child, PT_SR) & ~(SR_MASK << 16);
203 }
204 put_reg(child, i, tmp);
205 datap++;
206 }
207 ret = 0;
208 break;
209 }
210
211#ifdef PTRACE_GETFPREGS
212 case PTRACE_GETFPREGS: { /* Get the child FPU state. */
213 ret = 0;
214 if (copy_to_user(datap, &child->thread.fp,
215 sizeof(struct user_m68kfp_struct)))
216 ret = -EFAULT;
217 break;
218 }
219#endif
220
221#ifdef PTRACE_SETFPREGS
222 case PTRACE_SETFPREGS: { /* Set the child FPU state. */
223 ret = 0;
224 if (copy_from_user(&child->thread.fp, datap,
225 sizeof(struct user_m68kfp_struct)))
226 ret = -EFAULT;
227 break;
228 }
229#endif
230
231 case PTRACE_GET_THREAD_AREA:
232 ret = put_user(task_thread_info(child)->tp_value, datap);
233 break;
234
235 default:
236 ret = ptrace_request(child, request, addr, data);
237 break;
238 }
239 return ret;
240}
241
242asmlinkage int syscall_trace_enter(void)
243{
244 int ret = 0;
245
246 if (test_thread_flag(TIF_SYSCALL_TRACE))
247 ret = tracehook_report_syscall_entry(task_pt_regs(current));
248 return ret;
249}
250
251asmlinkage void syscall_trace_leave(void)
252{
253 if (test_thread_flag(TIF_SYSCALL_TRACE))
254 tracehook_report_syscall_exit(task_pt_regs(current), 0);
255}
diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c
deleted file mode 100644
index 16b2de7f5101..000000000000
--- a/arch/m68knommu/kernel/setup.c
+++ /dev/null
@@ -1,317 +0,0 @@
1/*
2 * linux/arch/m68knommu/kernel/setup.c
3 *
4 * Copyright (C) 1999-2007 Greg Ungerer (gerg@snapgear.com)
5 * Copyright (C) 1998,1999 D. Jeff Dionne <jeff@uClinux.org>
6 * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com}
7 * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
8 * Copyright (C) 1995 Hamish Macdonald
9 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
10 * Copyright (C) 2001 Lineo, Inc. <www.lineo.com>
11 *
12 * 68VZ328 Fixes/support Evan Stawnyczy <e@lineo.ca>
13 */
14
15/*
16 * This file handles the architecture-dependent parts of system setup
17 */
18
19#include <linux/kernel.h>
20#include <linux/sched.h>
21#include <linux/delay.h>
22#include <linux/interrupt.h>
23#include <linux/fb.h>
24#include <linux/module.h>
25#include <linux/mm.h>
26#include <linux/console.h>
27#include <linux/errno.h>
28#include <linux/string.h>
29#include <linux/bootmem.h>
30#include <linux/seq_file.h>
31#include <linux/init.h>
32#include <linux/initrd.h>
33#include <linux/root_dev.h>
34
35#include <asm/setup.h>
36#include <asm/irq.h>
37#include <asm/machdep.h>
38#include <asm/pgtable.h>
39
40unsigned long memory_start;
41unsigned long memory_end;
42
43EXPORT_SYMBOL(memory_start);
44EXPORT_SYMBOL(memory_end);
45
46char __initdata command_line[COMMAND_LINE_SIZE];
47
48/* machine dependent timer functions */
49void (*mach_gettod)(int*, int*, int*, int*, int*, int*);
50int (*mach_set_clock_mmss)(unsigned long);
51
52/* machine dependent reboot functions */
53void (*mach_reset)(void);
54void (*mach_halt)(void);
55void (*mach_power_off)(void);
56
57#ifdef CONFIG_M68328
58#define CPU_NAME "MC68328"
59#endif
60#ifdef CONFIG_M68EZ328
61#define CPU_NAME "MC68EZ328"
62#endif
63#ifdef CONFIG_M68VZ328
64#define CPU_NAME "MC68VZ328"
65#endif
66#ifdef CONFIG_M68360
67#define CPU_NAME "MC68360"
68#endif
69#ifndef CPU_NAME
70#define CPU_NAME "UNKNOWN"
71#endif
72
73/*
74 * Different cores have different instruction execution timings.
75 * The old/traditional 68000 cores are basically all the same, at 16.
76 * The ColdFire cores vary a little, their values are defined in their
77 * headers. We default to the standard 68000 value here.
78 */
79#ifndef CPU_INSTR_PER_JIFFY
80#define CPU_INSTR_PER_JIFFY 16
81#endif
82
83extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
84extern int _ramstart, _ramend;
85
86#if defined(CONFIG_UBOOT)
87/*
88 * parse_uboot_commandline
89 *
90 * Copies u-boot commandline arguments and store them in the proper linux
91 * variables.
92 *
93 * Assumes:
94 * _init_sp global contains the address in the stack pointer when the
95 * kernel starts (see head.S::_start)
96 *
97 * U-Boot calling convention:
98 * (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
99 *
100 * _init_sp can be parsed as such
101 *
102 * _init_sp+00 = u-boot cmd after jsr into kernel (skip)
103 * _init_sp+04 = &kernel board_info (residual data)
104 * _init_sp+08 = &initrd_start
105 * _init_sp+12 = &initrd_end
106 * _init_sp+16 = &cmd_start
107 * _init_sp+20 = &cmd_end
108 *
109 * This also assumes that the memory locations pointed to are still
110 * unmodified. U-boot places them near the end of external SDRAM.
111 *
112 * Argument(s):
113 * commandp = the linux commandline arg container to fill.
114 * size = the sizeof commandp.
115 *
116 * Returns:
117 */
118void parse_uboot_commandline(char *commandp, int size)
119{
120 extern unsigned long _init_sp;
121 unsigned long *sp;
122 unsigned long uboot_kbd;
123 unsigned long uboot_initrd_start, uboot_initrd_end;
124 unsigned long uboot_cmd_start, uboot_cmd_end;
125
126
127 sp = (unsigned long *)_init_sp;
128 uboot_kbd = sp[1];
129 uboot_initrd_start = sp[2];
130 uboot_initrd_end = sp[3];
131 uboot_cmd_start = sp[4];
132 uboot_cmd_end = sp[5];
133
134 if (uboot_cmd_start && uboot_cmd_end)
135 strncpy(commandp, (const char *)uboot_cmd_start, size);
136#if defined(CONFIG_BLK_DEV_INITRD)
137 if (uboot_initrd_start && uboot_initrd_end &&
138 (uboot_initrd_end > uboot_initrd_start)) {
139 initrd_start = uboot_initrd_start;
140 initrd_end = uboot_initrd_end;
141 ROOT_DEV = Root_RAM0;
142 printk(KERN_INFO "initrd at 0x%lx:0x%lx\n",
143 initrd_start, initrd_end);
144 }
145#endif /* if defined(CONFIG_BLK_DEV_INITRD) */
146}
147#endif /* #if defined(CONFIG_UBOOT) */
148
149void __init setup_arch(char **cmdline_p)
150{
151 int bootmap_size;
152
153 memory_start = PAGE_ALIGN(_ramstart);
154 memory_end = _ramend;
155
156 init_mm.start_code = (unsigned long) &_stext;
157 init_mm.end_code = (unsigned long) &_etext;
158 init_mm.end_data = (unsigned long) &_edata;
159 init_mm.brk = (unsigned long) 0;
160
161 config_BSP(&command_line[0], sizeof(command_line));
162
163#if defined(CONFIG_BOOTPARAM)
164 strncpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line));
165 command_line[sizeof(command_line) - 1] = 0;
166#endif /* CONFIG_BOOTPARAM */
167
168#if defined(CONFIG_UBOOT)
169 /* CONFIG_UBOOT and CONFIG_BOOTPARAM defined, concatenate cmdline */
170 #if defined(CONFIG_BOOTPARAM)
171 /* Add the whitespace separator */
172 command_line[strlen(CONFIG_BOOTPARAM_STRING)] = ' ';
173 /* Parse uboot command line into the rest of the buffer */
174 parse_uboot_commandline(
175 &command_line[(strlen(CONFIG_BOOTPARAM_STRING)+1)],
176 (sizeof(command_line) -
177 (strlen(CONFIG_BOOTPARAM_STRING)+1)));
178 /* Only CONFIG_UBOOT defined, create cmdline */
179 #else
180 parse_uboot_commandline(&command_line[0], sizeof(command_line));
181 #endif /* CONFIG_BOOTPARAM */
182 command_line[sizeof(command_line) - 1] = 0;
183#endif /* CONFIG_UBOOT */
184
185 printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU_NAME "\n");
186
187#ifdef CONFIG_UCDIMM
188 printk(KERN_INFO "uCdimm by Lineo, Inc. <www.lineo.com>\n");
189#endif
190#ifdef CONFIG_M68VZ328
191 printk(KERN_INFO "M68VZ328 support by Evan Stawnyczy <e@lineo.ca>\n");
192#endif
193#ifdef CONFIG_COLDFIRE
194 printk(KERN_INFO "COLDFIRE port done by Greg Ungerer, gerg@snapgear.com\n");
195#ifdef CONFIG_M5307
196 printk(KERN_INFO "Modified for M5307 by Dave Miller, dmiller@intellistor.com\n");
197#endif
198#ifdef CONFIG_ELITE
199 printk(KERN_INFO "Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n");
200#endif
201#endif
202 printk(KERN_INFO "Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");
203
204#if defined( CONFIG_PILOT ) && defined( CONFIG_M68328 )
205 printk(KERN_INFO "TRG SuperPilot FLASH card support <info@trgnet.com>\n");
206#endif
207#if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 )
208 printk(KERN_INFO "PalmV support by Lineo Inc. <jeff@uclinux.com>\n");
209#endif
210#if defined (CONFIG_M68360)
211 printk(KERN_INFO "QUICC port done by SED Systems <hamilton@sedsystems.ca>,\n");
212 printk(KERN_INFO "based on 2.0.38 port by Lineo Inc. <mleslie@lineo.com>.\n");
213#endif
214#ifdef CONFIG_DRAGEN2
215 printk(KERN_INFO "DragonEngine II board support by Georges Menie\n");
216#endif
217#ifdef CONFIG_M5235EVB
218 printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
219#endif
220
221 pr_debug("KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
222 "BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext,
223 (int) &_sdata, (int) &_edata,
224 (int) &_sbss, (int) &_ebss);
225 pr_debug("MEMORY -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x\n ",
226 (int) &_ebss, (int) memory_start,
227 (int) memory_start, (int) memory_end);
228
229 /* Keep a copy of command line */
230 *cmdline_p = &command_line[0];
231 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
232 boot_command_line[COMMAND_LINE_SIZE-1] = 0;
233
234#if defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_DUMMY_CONSOLE)
235 conswitchp = &dummy_con;
236#endif
237
238 /*
239 * Give all the memory to the bootmap allocator, tell it to put the
240 * boot mem_map at the start of memory.
241 */
242 bootmap_size = init_bootmem_node(
243 NODE_DATA(0),
244 memory_start >> PAGE_SHIFT, /* map goes here */
245 PAGE_OFFSET >> PAGE_SHIFT, /* 0 on coldfire */
246 memory_end >> PAGE_SHIFT);
247 /*
248 * Free the usable memory, we have to make sure we do not free
249 * the bootmem bitmap so we then reserve it after freeing it :-)
250 */
251 free_bootmem(memory_start, memory_end - memory_start);
252 reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT);
253
254#if defined(CONFIG_UBOOT) && defined(CONFIG_BLK_DEV_INITRD)
255 if ((initrd_start > 0) && (initrd_start < initrd_end) &&
256 (initrd_end < memory_end))
257 reserve_bootmem(initrd_start, initrd_end - initrd_start,
258 BOOTMEM_DEFAULT);
259#endif /* if defined(CONFIG_BLK_DEV_INITRD) */
260
261 /*
262 * Get kmalloc into gear.
263 */
264 paging_init();
265}
266
267/*
268 * Get CPU information for use by the procfs.
269 */
270static int show_cpuinfo(struct seq_file *m, void *v)
271{
272 char *cpu, *mmu, *fpu;
273 u_long clockfreq;
274
275 cpu = CPU_NAME;
276 mmu = "none";
277 fpu = "none";
278 clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
279
280 seq_printf(m, "CPU:\t\t%s\n"
281 "MMU:\t\t%s\n"
282 "FPU:\t\t%s\n"
283 "Clocking:\t%lu.%1luMHz\n"
284 "BogoMips:\t%lu.%02lu\n"
285 "Calibration:\t%lu loops\n",
286 cpu, mmu, fpu,
287 clockfreq / 1000000,
288 (clockfreq / 100000) % 10,
289 (loops_per_jiffy * HZ) / 500000,
290 ((loops_per_jiffy * HZ) / 5000) % 100,
291 (loops_per_jiffy * HZ));
292
293 return 0;
294}
295
296static void *c_start(struct seq_file *m, loff_t *pos)
297{
298 return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL;
299}
300
301static void *c_next(struct seq_file *m, void *v, loff_t *pos)
302{
303 ++*pos;
304 return c_start(m, pos);
305}
306
307static void c_stop(struct seq_file *m, void *v)
308{
309}
310
311const struct seq_operations cpuinfo_op = {
312 .start = c_start,
313 .next = c_next,
314 .stop = c_stop,
315 .show = show_cpuinfo,
316};
317
diff --git a/arch/m68knommu/kernel/signal.c b/arch/m68knommu/kernel/signal.c
deleted file mode 100644
index 36a81bb6835a..000000000000
--- a/arch/m68knommu/kernel/signal.c
+++ /dev/null
@@ -1,765 +0,0 @@
1/*
2 * linux/arch/m68knommu/kernel/signal.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11/*
12 * Linux/m68k support by Hamish Macdonald
13 *
14 * 68060 fixes by Jesper Skov
15 *
16 * 1997-12-01 Modified for POSIX.1b signals by Andreas Schwab
17 *
18 * mathemu support by Roman Zippel
19 * (Note: fpstate in the signal context is completely ignored for the emulator
20 * and the internal floating point format is put on stack)
21 */
22
23/*
24 * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
25 * Atari :-) Current limitation: Only one sigstack can be active at one time.
26 * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
27 * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
28 * signal handlers!
29 */
30
31#include <linux/sched.h>
32#include <linux/mm.h>
33#include <linux/kernel.h>
34#include <linux/signal.h>
35#include <linux/syscalls.h>
36#include <linux/errno.h>
37#include <linux/wait.h>
38#include <linux/ptrace.h>
39#include <linux/unistd.h>
40#include <linux/stddef.h>
41#include <linux/highuid.h>
42#include <linux/tty.h>
43#include <linux/personality.h>
44#include <linux/binfmts.h>
45
46#include <asm/setup.h>
47#include <asm/uaccess.h>
48#include <asm/pgtable.h>
49#include <asm/traps.h>
50#include <asm/ucontext.h>
51
52#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
53
54void ret_from_user_signal(void);
55void ret_from_user_rt_signal(void);
56
57/*
58 * Atomically swap in the new signal mask, and wait for a signal.
59 */
60asmlinkage int
61sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
62{
63 mask &= _BLOCKABLE;
64 spin_lock_irq(&current->sighand->siglock);
65 current->saved_sigmask = current->blocked;
66 siginitset(&current->blocked, mask);
67 recalc_sigpending();
68 spin_unlock_irq(&current->sighand->siglock);
69
70 current->state = TASK_INTERRUPTIBLE;
71 schedule();
72 set_restore_sigmask();
73
74 return -ERESTARTNOHAND;
75}
76
77asmlinkage int
78sys_sigaction(int sig, const struct old_sigaction __user *act,
79 struct old_sigaction __user *oact)
80{
81 struct k_sigaction new_ka, old_ka;
82 int ret;
83
84 if (act) {
85 old_sigset_t mask;
86 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
87 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
88 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
89 __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
90 __get_user(mask, &act->sa_mask))
91 return -EFAULT;
92 siginitset(&new_ka.sa.sa_mask, mask);
93 }
94
95 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
96
97 if (!ret && oact) {
98 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
99 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
100 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
101 __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
102 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
103 return -EFAULT;
104 }
105
106 return ret;
107}
108
109asmlinkage int
110sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
111{
112 return do_sigaltstack(uss, uoss, rdusp());
113}
114
115
116/*
117 * Do a signal return; undo the signal stack.
118 *
119 * Keep the return code on the stack quadword aligned!
120 * That makes the cache flush below easier.
121 */
122
123struct sigframe
124{
125 char __user *pretcode;
126 int sig;
127 int code;
128 struct sigcontext __user *psc;
129 char retcode[8];
130 unsigned long extramask[_NSIG_WORDS-1];
131 struct sigcontext sc;
132};
133
134struct rt_sigframe
135{
136 char __user *pretcode;
137 int sig;
138 struct siginfo __user *pinfo;
139 void __user *puc;
140 char retcode[8];
141 struct siginfo info;
142 struct ucontext uc;
143};
144
145#ifdef CONFIG_FPU
146
147static unsigned char fpu_version = 0; /* version number of fpu, set by setup_frame */
148
149static inline int restore_fpu_state(struct sigcontext *sc)
150{
151 int err = 1;
152
153 if (FPU_IS_EMU) {
154 /* restore registers */
155 memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
156 memcpy(current->thread.fp, sc->sc_fpregs, 24);
157 return 0;
158 }
159
160 if (sc->sc_fpstate[0]) {
161 /* Verify the frame format. */
162 if (sc->sc_fpstate[0] != fpu_version)
163 goto out;
164
165 __asm__ volatile (".chip 68k/68881\n\t"
166 "fmovemx %0,%%fp0-%%fp1\n\t"
167 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
168 ".chip 68k"
169 : /* no outputs */
170 : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
171 }
172 __asm__ volatile (".chip 68k/68881\n\t"
173 "frestore %0\n\t"
174 ".chip 68k" : : "m" (*sc->sc_fpstate));
175 err = 0;
176
177out:
178 return err;
179}
180
181#define FPCONTEXT_SIZE 216
182#define uc_fpstate uc_filler[0]
183#define uc_formatvec uc_filler[FPCONTEXT_SIZE/4]
184#define uc_extra uc_filler[FPCONTEXT_SIZE/4+1]
185
186static inline int rt_restore_fpu_state(struct ucontext __user *uc)
187{
188 unsigned char fpstate[FPCONTEXT_SIZE];
189 int context_size = 0;
190 fpregset_t fpregs;
191 int err = 1;
192
193 if (FPU_IS_EMU) {
194 /* restore fpu control register */
195 if (__copy_from_user(current->thread.fpcntl,
196 uc->uc_mcontext.fpregs.f_fpcntl, 12))
197 goto out;
198 /* restore all other fpu register */
199 if (__copy_from_user(current->thread.fp,
200 uc->uc_mcontext.fpregs.f_fpregs, 96))
201 goto out;
202 return 0;
203 }
204
205 if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
206 goto out;
207 if (fpstate[0]) {
208 context_size = fpstate[1];
209
210 /* Verify the frame format. */
211 if (fpstate[0] != fpu_version)
212 goto out;
213 if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
214 sizeof(fpregs)))
215 goto out;
216 __asm__ volatile (".chip 68k/68881\n\t"
217 "fmovemx %0,%%fp0-%%fp7\n\t"
218 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
219 ".chip 68k"
220 : /* no outputs */
221 : "m" (*fpregs.f_fpregs),
222 "m" (*fpregs.f_fpcntl));
223 }
224 if (context_size &&
225 __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
226 context_size))
227 goto out;
228 __asm__ volatile (".chip 68k/68881\n\t"
229 "frestore %0\n\t"
230 ".chip 68k" : : "m" (*fpstate));
231 err = 0;
232
233out:
234 return err;
235}
236
237#endif
238
239static inline int
240restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp,
241 int *pd0)
242{
243 int formatvec;
244 struct sigcontext context;
245 int err = 0;
246
247 /* Always make any pending restarted system calls return -EINTR */
248 current_thread_info()->restart_block.fn = do_no_restart_syscall;
249
250 /* get previous context */
251 if (copy_from_user(&context, usc, sizeof(context)))
252 goto badframe;
253
254 /* restore passed registers */
255 regs->d1 = context.sc_d1;
256 regs->a0 = context.sc_a0;
257 regs->a1 = context.sc_a1;
258 ((struct switch_stack *)regs - 1)->a5 = context.sc_a5;
259 regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
260 regs->pc = context.sc_pc;
261 regs->orig_d0 = -1; /* disable syscall checks */
262 wrusp(context.sc_usp);
263 formatvec = context.sc_formatvec;
264 regs->format = formatvec >> 12;
265 regs->vector = formatvec & 0xfff;
266
267#ifdef CONFIG_FPU
268 err = restore_fpu_state(&context);
269#endif
270
271 *pd0 = context.sc_d0;
272 return err;
273
274badframe:
275 return 1;
276}
277
278static inline int
279rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
280 struct ucontext __user *uc, int *pd0)
281{
282 int temp;
283 greg_t __user *gregs = uc->uc_mcontext.gregs;
284 unsigned long usp;
285 int err;
286
287 /* Always make any pending restarted system calls return -EINTR */
288 current_thread_info()->restart_block.fn = do_no_restart_syscall;
289
290 err = __get_user(temp, &uc->uc_mcontext.version);
291 if (temp != MCONTEXT_VERSION)
292 goto badframe;
293 /* restore passed registers */
294 err |= __get_user(regs->d0, &gregs[0]);
295 err |= __get_user(regs->d1, &gregs[1]);
296 err |= __get_user(regs->d2, &gregs[2]);
297 err |= __get_user(regs->d3, &gregs[3]);
298 err |= __get_user(regs->d4, &gregs[4]);
299 err |= __get_user(regs->d5, &gregs[5]);
300 err |= __get_user(sw->d6, &gregs[6]);
301 err |= __get_user(sw->d7, &gregs[7]);
302 err |= __get_user(regs->a0, &gregs[8]);
303 err |= __get_user(regs->a1, &gregs[9]);
304 err |= __get_user(regs->a2, &gregs[10]);
305 err |= __get_user(sw->a3, &gregs[11]);
306 err |= __get_user(sw->a4, &gregs[12]);
307 err |= __get_user(sw->a5, &gregs[13]);
308 err |= __get_user(sw->a6, &gregs[14]);
309 err |= __get_user(usp, &gregs[15]);
310 wrusp(usp);
311 err |= __get_user(regs->pc, &gregs[16]);
312 err |= __get_user(temp, &gregs[17]);
313 regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
314 regs->orig_d0 = -1; /* disable syscall checks */
315 regs->format = temp >> 12;
316 regs->vector = temp & 0xfff;
317
318 if (do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
319 goto badframe;
320
321 *pd0 = regs->d0;
322 return err;
323
324badframe:
325 return 1;
326}
327
328asmlinkage int do_sigreturn(unsigned long __unused)
329{
330 struct switch_stack *sw = (struct switch_stack *) &__unused;
331 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
332 unsigned long usp = rdusp();
333 struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
334 sigset_t set;
335 int d0;
336
337 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
338 goto badframe;
339 if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
340 (_NSIG_WORDS > 1 &&
341 __copy_from_user(&set.sig[1], &frame->extramask,
342 sizeof(frame->extramask))))
343 goto badframe;
344
345 sigdelsetmask(&set, ~_BLOCKABLE);
346 spin_lock_irq(&current->sighand->siglock);
347 current->blocked = set;
348 recalc_sigpending();
349 spin_unlock_irq(&current->sighand->siglock);
350
351 if (restore_sigcontext(regs, &frame->sc, frame + 1, &d0))
352 goto badframe;
353 return d0;
354
355badframe:
356 force_sig(SIGSEGV, current);
357 return 0;
358}
359
360asmlinkage int do_rt_sigreturn(unsigned long __unused)
361{
362 struct switch_stack *sw = (struct switch_stack *) &__unused;
363 struct pt_regs *regs = (struct pt_regs *) (sw + 1);
364 unsigned long usp = rdusp();
365 struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
366 sigset_t set;
367 int d0;
368
369 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
370 goto badframe;
371 if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
372 goto badframe;
373
374 sigdelsetmask(&set, ~_BLOCKABLE);
375 spin_lock_irq(&current->sighand->siglock);
376 current->blocked = set;
377 recalc_sigpending();
378 spin_unlock_irq(&current->sighand->siglock);
379
380 if (rt_restore_ucontext(regs, sw, &frame->uc, &d0))
381 goto badframe;
382 return d0;
383
384badframe:
385 force_sig(SIGSEGV, current);
386 return 0;
387}
388
389#ifdef CONFIG_FPU
390/*
391 * Set up a signal frame.
392 */
393
394static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
395{
396 if (FPU_IS_EMU) {
397 /* save registers */
398 memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
399 memcpy(sc->sc_fpregs, current->thread.fp, 24);
400 return;
401 }
402
403 __asm__ volatile (".chip 68k/68881\n\t"
404 "fsave %0\n\t"
405 ".chip 68k"
406 : : "m" (*sc->sc_fpstate) : "memory");
407
408 if (sc->sc_fpstate[0]) {
409 fpu_version = sc->sc_fpstate[0];
410 __asm__ volatile (".chip 68k/68881\n\t"
411 "fmovemx %%fp0-%%fp1,%0\n\t"
412 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
413 ".chip 68k"
414 : "=m" (*sc->sc_fpregs),
415 "=m" (*sc->sc_fpcntl)
416 : /* no inputs */
417 : "memory");
418 }
419}
420
421static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
422{
423 unsigned char fpstate[FPCONTEXT_SIZE];
424 int context_size = 0;
425 int err = 0;
426
427 if (FPU_IS_EMU) {
428 /* save fpu control register */
429 err |= copy_to_user(uc->uc_mcontext.fpregs.f_pcntl,
430 current->thread.fpcntl, 12);
431 /* save all other fpu register */
432 err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
433 current->thread.fp, 96);
434 return err;
435 }
436
437 __asm__ volatile (".chip 68k/68881\n\t"
438 "fsave %0\n\t"
439 ".chip 68k"
440 : : "m" (*fpstate) : "memory");
441
442 err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
443 if (fpstate[0]) {
444 fpregset_t fpregs;
445 context_size = fpstate[1];
446 fpu_version = fpstate[0];
447 __asm__ volatile (".chip 68k/68881\n\t"
448 "fmovemx %%fp0-%%fp7,%0\n\t"
449 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
450 ".chip 68k"
451 : "=m" (*fpregs.f_fpregs),
452 "=m" (*fpregs.f_fpcntl)
453 : /* no inputs */
454 : "memory");
455 err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
456 sizeof(fpregs));
457 }
458 if (context_size)
459 err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
460 context_size);
461 return err;
462}
463
464#endif
465
466static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
467 unsigned long mask)
468{
469 sc->sc_mask = mask;
470 sc->sc_usp = rdusp();
471 sc->sc_d0 = regs->d0;
472 sc->sc_d1 = regs->d1;
473 sc->sc_a0 = regs->a0;
474 sc->sc_a1 = regs->a1;
475 sc->sc_a5 = ((struct switch_stack *)regs - 1)->a5;
476 sc->sc_sr = regs->sr;
477 sc->sc_pc = regs->pc;
478 sc->sc_formatvec = regs->format << 12 | regs->vector;
479#ifdef CONFIG_FPU
480 save_fpu_state(sc, regs);
481#endif
482}
483
484static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
485{
486 struct switch_stack *sw = (struct switch_stack *)regs - 1;
487 greg_t __user *gregs = uc->uc_mcontext.gregs;
488 int err = 0;
489
490 err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
491 err |= __put_user(regs->d0, &gregs[0]);
492 err |= __put_user(regs->d1, &gregs[1]);
493 err |= __put_user(regs->d2, &gregs[2]);
494 err |= __put_user(regs->d3, &gregs[3]);
495 err |= __put_user(regs->d4, &gregs[4]);
496 err |= __put_user(regs->d5, &gregs[5]);
497 err |= __put_user(sw->d6, &gregs[6]);
498 err |= __put_user(sw->d7, &gregs[7]);
499 err |= __put_user(regs->a0, &gregs[8]);
500 err |= __put_user(regs->a1, &gregs[9]);
501 err |= __put_user(regs->a2, &gregs[10]);
502 err |= __put_user(sw->a3, &gregs[11]);
503 err |= __put_user(sw->a4, &gregs[12]);
504 err |= __put_user(sw->a5, &gregs[13]);
505 err |= __put_user(sw->a6, &gregs[14]);
506 err |= __put_user(rdusp(), &gregs[15]);
507 err |= __put_user(regs->pc, &gregs[16]);
508 err |= __put_user(regs->sr, &gregs[17]);
509#ifdef CONFIG_FPU
510 err |= rt_save_fpu_state(uc, regs);
511#endif
512 return err;
513}
514
515static inline void __user *
516get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
517{
518 unsigned long usp;
519
520 /* Default to using normal stack. */
521 usp = rdusp();
522
523 /* This is the X/Open sanctioned signal stack switching. */
524 if (ka->sa.sa_flags & SA_ONSTACK) {
525 if (!sas_ss_flags(usp))
526 usp = current->sas_ss_sp + current->sas_ss_size;
527 }
528 return (void __user *)((usp - frame_size) & -8UL);
529}
530
531static int setup_frame (int sig, struct k_sigaction *ka,
532 sigset_t *set, struct pt_regs *regs)
533{
534 struct sigframe __user *frame;
535 struct sigcontext context;
536 int err = 0;
537
538 frame = get_sigframe(ka, regs, sizeof(*frame));
539
540 err |= __put_user((current_thread_info()->exec_domain
541 && current_thread_info()->exec_domain->signal_invmap
542 && sig < 32
543 ? current_thread_info()->exec_domain->signal_invmap[sig]
544 : sig),
545 &frame->sig);
546
547 err |= __put_user(regs->vector, &frame->code);
548 err |= __put_user(&frame->sc, &frame->psc);
549
550 if (_NSIG_WORDS > 1)
551 err |= copy_to_user(frame->extramask, &set->sig[1],
552 sizeof(frame->extramask));
553
554 setup_sigcontext(&context, regs, set->sig[0]);
555 err |= copy_to_user (&frame->sc, &context, sizeof(context));
556
557 /* Set up to return from userspace. */
558 err |= __put_user((void *) ret_from_user_signal, &frame->pretcode);
559
560 if (err)
561 goto give_sigsegv;
562
563 /* Set up registers for signal handler */
564 wrusp ((unsigned long) frame);
565 regs->pc = (unsigned long) ka->sa.sa_handler;
566 ((struct switch_stack *)regs - 1)->a5 = current->mm->start_data;
567 regs->format = 0x4; /*set format byte to make stack appear modulo 4
568 which it will be when doing the rte */
569
570adjust_stack:
571 /* Prepare to skip over the extra stuff in the exception frame. */
572 if (regs->stkadj) {
573 struct pt_regs *tregs =
574 (struct pt_regs *)((ulong)regs + regs->stkadj);
575#if defined(DEBUG)
576 printk(KERN_DEBUG "Performing stackadjust=%04x\n", regs->stkadj);
577#endif
578 /* This must be copied with decreasing addresses to
579 handle overlaps. */
580 tregs->vector = 0;
581 tregs->format = 0;
582 tregs->pc = regs->pc;
583 tregs->sr = regs->sr;
584 }
585 return err;
586
587give_sigsegv:
588 force_sigsegv(sig, current);
589 goto adjust_stack;
590}
591
592static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
593 sigset_t *set, struct pt_regs *regs)
594{
595 struct rt_sigframe __user *frame;
596 int err = 0;
597
598 frame = get_sigframe(ka, regs, sizeof(*frame));
599
600 err |= __put_user((current_thread_info()->exec_domain
601 && current_thread_info()->exec_domain->signal_invmap
602 && sig < 32
603 ? current_thread_info()->exec_domain->signal_invmap[sig]
604 : sig),
605 &frame->sig);
606 err |= __put_user(&frame->info, &frame->pinfo);
607 err |= __put_user(&frame->uc, &frame->puc);
608 err |= copy_siginfo_to_user(&frame->info, info);
609
610 /* Create the ucontext. */
611 err |= __put_user(0, &frame->uc.uc_flags);
612 err |= __put_user(NULL, &frame->uc.uc_link);
613 err |= __put_user((void __user *)current->sas_ss_sp,
614 &frame->uc.uc_stack.ss_sp);
615 err |= __put_user(sas_ss_flags(rdusp()),
616 &frame->uc.uc_stack.ss_flags);
617 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
618 err |= rt_setup_ucontext(&frame->uc, regs);
619 err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
620
621 /* Set up to return from userspace. */
622 err |= __put_user((void *) ret_from_user_rt_signal, &frame->pretcode);
623
624 if (err)
625 goto give_sigsegv;
626
627 /* Set up registers for signal handler */
628 wrusp ((unsigned long) frame);
629 regs->pc = (unsigned long) ka->sa.sa_handler;
630 ((struct switch_stack *)regs - 1)->a5 = current->mm->start_data;
631 regs->format = 0x4; /*set format byte to make stack appear modulo 4
632 which it will be when doing the rte */
633
634adjust_stack:
635 /* Prepare to skip over the extra stuff in the exception frame. */
636 if (regs->stkadj) {
637 struct pt_regs *tregs =
638 (struct pt_regs *)((ulong)regs + regs->stkadj);
639#if defined(DEBUG)
640 printk(KERN_DEBUG "Performing stackadjust=%04x\n", regs->stkadj);
641#endif
642 /* This must be copied with decreasing addresses to
643 handle overlaps. */
644 tregs->vector = 0;
645 tregs->format = 0;
646 tregs->pc = regs->pc;
647 tregs->sr = regs->sr;
648 }
649 return err;
650
651give_sigsegv:
652 force_sigsegv(sig, current);
653 goto adjust_stack;
654}
655
656static inline void
657handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
658{
659 switch (regs->d0) {
660 case -ERESTARTNOHAND:
661 if (!has_handler)
662 goto do_restart;
663 regs->d0 = -EINTR;
664 break;
665
666 case -ERESTART_RESTARTBLOCK:
667 if (!has_handler) {
668 regs->d0 = __NR_restart_syscall;
669 regs->pc -= 2;
670 break;
671 }
672 regs->d0 = -EINTR;
673 break;
674
675 case -ERESTARTSYS:
676 if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
677 regs->d0 = -EINTR;
678 break;
679 }
680 /* fallthrough */
681 case -ERESTARTNOINTR:
682 do_restart:
683 regs->d0 = regs->orig_d0;
684 regs->pc -= 2;
685 break;
686 }
687}
688
689/*
690 * OK, we're invoking a handler
691 */
692static void
693handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
694 sigset_t *oldset, struct pt_regs *regs)
695{
696 int err;
697 /* are we from a system call? */
698 if (regs->orig_d0 >= 0)
699 /* If so, check system call restarting.. */
700 handle_restart(regs, ka, 1);
701
702 /* set up the stack frame */
703 if (ka->sa.sa_flags & SA_SIGINFO)
704 err = setup_rt_frame(sig, ka, info, oldset, regs);
705 else
706 err = setup_frame(sig, ka, oldset, regs);
707
708 if (err)
709 return;
710
711 spin_lock_irq(&current->sighand->siglock);
712 sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
713 if (!(ka->sa.sa_flags & SA_NODEFER))
714 sigaddset(&current->blocked,sig);
715 recalc_sigpending();
716 spin_unlock_irq(&current->sighand->siglock);
717
718 clear_thread_flag(TIF_RESTORE_SIGMASK);
719}
720
721/*
722 * Note that 'init' is a special process: it doesn't get signals it doesn't
723 * want to handle. Thus you cannot kill init even with a SIGKILL even by
724 * mistake.
725 */
726asmlinkage void do_signal(struct pt_regs *regs)
727{
728 struct k_sigaction ka;
729 siginfo_t info;
730 int signr;
731 sigset_t *oldset;
732
733 /*
734 * We want the common case to go fast, which
735 * is why we may in certain cases get here from
736 * kernel mode. Just return without doing anything
737 * if so.
738 */
739 if (!user_mode(regs))
740 return;
741
742 if (test_thread_flag(TIF_RESTORE_SIGMASK))
743 oldset = &current->saved_sigmask;
744 else
745 oldset = &current->blocked;
746
747 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
748 if (signr > 0) {
749 /* Whee! Actually deliver the signal. */
750 handle_signal(signr, &ka, &info, oldset, regs);
751 return;
752 }
753
754 /* Did we come from a system call? */
755 if (regs->orig_d0 >= 0) {
756 /* Restart the system call - no handlers present */
757 handle_restart(regs, NULL, 0);
758 }
759
760 /* If there's no signal to deliver, we just restore the saved mask. */
761 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
762 clear_thread_flag(TIF_RESTORE_SIGMASK);
763 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
764 }
765}
diff --git a/arch/m68knommu/kernel/sys_m68k.c b/arch/m68knommu/kernel/sys_m68k.c
deleted file mode 100644
index 68488ae47f0a..000000000000
--- a/arch/m68knommu/kernel/sys_m68k.c
+++ /dev/null
@@ -1,94 +0,0 @@
1/*
2 * linux/arch/m68knommu/kernel/sys_m68k.c
3 *
4 * This file contains various random system calls that
5 * have a non-standard calling sequence on the Linux/m68k
6 * platform.
7 */
8
9#include <linux/errno.h>
10#include <linux/sched.h>
11#include <linux/mm.h>
12#include <linux/smp.h>
13#include <linux/sem.h>
14#include <linux/msg.h>
15#include <linux/shm.h>
16#include <linux/stat.h>
17#include <linux/syscalls.h>
18#include <linux/mman.h>
19#include <linux/file.h>
20#include <linux/ipc.h>
21#include <linux/fs.h>
22
23#include <asm/setup.h>
24#include <asm/uaccess.h>
25#include <asm/cachectl.h>
26#include <asm/traps.h>
27#include <asm/cacheflush.h>
28#include <asm/unistd.h>
29
30/* sys_cacheflush -- flush (part of) the processor cache. */
31asmlinkage int
32sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
33{
34 flush_cache_all();
35 return(0);
36}
37
38asmlinkage int sys_getpagesize(void)
39{
40 return PAGE_SIZE;
41}
42
43/*
44 * Do a system call from kernel instead of calling sys_execve so we
45 * end up with proper pt_regs.
46 */
47int kernel_execve(const char *filename,
48 const char *const argv[],
49 const char *const envp[])
50{
51 register long __res asm ("%d0") = __NR_execve;
52 register long __a asm ("%d1") = (long)(filename);
53 register long __b asm ("%d2") = (long)(argv);
54 register long __c asm ("%d3") = (long)(envp);
55 asm volatile ("trap #0" : "+d" (__res)
56 : "d" (__a), "d" (__b), "d" (__c));
57 return __res;
58}
59
60asmlinkage unsigned long sys_get_thread_area(void)
61{
62 return current_thread_info()->tp_value;
63}
64
65asmlinkage int sys_set_thread_area(unsigned long tp)
66{
67 current_thread_info()->tp_value = tp;
68 return 0;
69}
70
71/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
72 D1 (newval). */
73asmlinkage int
74sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
75 unsigned long __user * mem)
76{
77 struct mm_struct *mm = current->mm;
78 unsigned long mem_value;
79
80 down_read(&mm->mmap_sem);
81
82 mem_value = *mem;
83 if (mem_value == oldval)
84 *mem = newval;
85
86 up_read(&mm->mmap_sem);
87 return mem_value;
88}
89
90asmlinkage int sys_atomic_barrier(void)
91{
92 /* no code needed for uniprocs */
93 return 0;
94}
diff --git a/arch/m68knommu/kernel/syscalltable.S b/arch/m68knommu/kernel/syscalltable.S
deleted file mode 100644
index 79b1ed198c07..000000000000
--- a/arch/m68knommu/kernel/syscalltable.S
+++ /dev/null
@@ -1,365 +0,0 @@
1/*
2 * linux/arch/m68knommu/kernel/syscalltable.S
3 *
4 * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
5 *
6 * Based on older entry.S files, the following copyrights apply:
7 *
8 * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>,
9 * Kenneth Albanowski <kjahds@kjahds.com>,
10 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
11 * Copyright (C) 1991, 1992 Linus Torvalds
12 */
13
14#include <linux/sys.h>
15#include <linux/linkage.h>
16#include <asm/unistd.h>
17
18.text
19ALIGN
20ENTRY(sys_call_table)
21 .long sys_restart_syscall /* 0 - old "setup()" system call */
22 .long sys_exit
23 .long sys_fork
24 .long sys_read
25 .long sys_write
26 .long sys_open /* 5 */
27 .long sys_close
28 .long sys_waitpid
29 .long sys_creat
30 .long sys_link
31 .long sys_unlink /* 10 */
32 .long sys_execve
33 .long sys_chdir
34 .long sys_time
35 .long sys_mknod
36 .long sys_chmod /* 15 */
37 .long sys_chown16
38 .long sys_ni_syscall /* old break syscall holder */
39 .long sys_stat
40 .long sys_lseek
41 .long sys_getpid /* 20 */
42 .long sys_mount
43 .long sys_oldumount
44 .long sys_setuid16
45 .long sys_getuid16
46 .long sys_stime /* 25 */
47 .long sys_ptrace
48 .long sys_alarm
49 .long sys_fstat
50 .long sys_pause
51 .long sys_utime /* 30 */
52 .long sys_ni_syscall /* old stty syscall holder */
53 .long sys_ni_syscall /* old gtty syscall holder */
54 .long sys_access
55 .long sys_nice
56 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
57 .long sys_sync
58 .long sys_kill
59 .long sys_rename
60 .long sys_mkdir
61 .long sys_rmdir /* 40 */
62 .long sys_dup
63 .long sys_pipe
64 .long sys_times
65 .long sys_ni_syscall /* old prof syscall holder */
66 .long sys_brk /* 45 */
67 .long sys_setgid16
68 .long sys_getgid16
69 .long sys_signal
70 .long sys_geteuid16
71 .long sys_getegid16 /* 50 */
72 .long sys_acct
73 .long sys_umount /* recycled never used phys() */
74 .long sys_ni_syscall /* old lock syscall holder */
75 .long sys_ioctl
76 .long sys_fcntl /* 55 */
77 .long sys_ni_syscall /* old mpx syscall holder */
78 .long sys_setpgid
79 .long sys_ni_syscall /* old ulimit syscall holder */
80 .long sys_ni_syscall
81 .long sys_umask /* 60 */
82 .long sys_chroot
83 .long sys_ustat
84 .long sys_dup2
85 .long sys_getppid
86 .long sys_getpgrp /* 65 */
87 .long sys_setsid
88 .long sys_sigaction
89 .long sys_sgetmask
90 .long sys_ssetmask
91 .long sys_setreuid16 /* 70 */
92 .long sys_setregid16
93 .long sys_sigsuspend
94 .long sys_sigpending
95 .long sys_sethostname
96 .long sys_setrlimit /* 75 */
97 .long sys_old_getrlimit
98 .long sys_getrusage
99 .long sys_gettimeofday
100 .long sys_settimeofday
101 .long sys_getgroups16 /* 80 */
102 .long sys_setgroups16
103 .long sys_old_select
104 .long sys_symlink
105 .long sys_lstat
106 .long sys_readlink /* 85 */
107 .long sys_uselib
108 .long sys_ni_syscall /* sys_swapon */
109 .long sys_reboot
110 .long sys_old_readdir
111 .long sys_old_mmap /* 90 */
112 .long sys_munmap
113 .long sys_truncate
114 .long sys_ftruncate
115 .long sys_fchmod
116 .long sys_fchown16 /* 95 */
117 .long sys_getpriority
118 .long sys_setpriority
119 .long sys_ni_syscall /* old profil syscall holder */
120 .long sys_statfs
121 .long sys_fstatfs /* 100 */
122 .long sys_ni_syscall /* ioperm for i386 */
123 .long sys_socketcall
124 .long sys_syslog
125 .long sys_setitimer
126 .long sys_getitimer /* 105 */
127 .long sys_newstat
128 .long sys_newlstat
129 .long sys_newfstat
130 .long sys_ni_syscall
131 .long sys_ni_syscall /* iopl for i386 */ /* 110 */
132 .long sys_vhangup
133 .long sys_ni_syscall /* obsolete idle() syscall */
134 .long sys_ni_syscall /* vm86old for i386 */
135 .long sys_wait4
136 .long sys_ni_syscall /* 115 */ /* sys_swapoff */
137 .long sys_sysinfo
138 .long sys_ipc
139 .long sys_fsync
140 .long sys_sigreturn
141 .long sys_clone /* 120 */
142 .long sys_setdomainname
143 .long sys_newuname
144 .long sys_cacheflush /* modify_ldt for i386 */
145 .long sys_adjtimex
146 .long sys_ni_syscall /* 125 */ /* sys_mprotect */
147 .long sys_sigprocmask
148 .long sys_ni_syscall /* old "creat_module" */
149 .long sys_init_module
150 .long sys_delete_module
151 .long sys_ni_syscall /* 130: old "get_kernel_syms" */
152 .long sys_quotactl
153 .long sys_getpgid
154 .long sys_fchdir
155 .long sys_bdflush
156 .long sys_sysfs /* 135 */
157 .long sys_personality
158 .long sys_ni_syscall /* for afs_syscall */
159 .long sys_setfsuid16
160 .long sys_setfsgid16
161 .long sys_llseek /* 140 */
162 .long sys_getdents
163 .long sys_select
164 .long sys_flock
165 .long sys_ni_syscall /* sys_msync */
166 .long sys_readv /* 145 */
167 .long sys_writev
168 .long sys_getsid
169 .long sys_fdatasync
170 .long sys_sysctl
171 .long sys_ni_syscall /* 150 */ /* sys_mlock */
172 .long sys_ni_syscall /* sys_munlock */
173 .long sys_ni_syscall /* sys_mlockall */
174 .long sys_ni_syscall /* sys_munlockall */
175 .long sys_sched_setparam
176 .long sys_sched_getparam /* 155 */
177 .long sys_sched_setscheduler
178 .long sys_sched_getscheduler
179 .long sys_sched_yield
180 .long sys_sched_get_priority_max
181 .long sys_sched_get_priority_min /* 160 */
182 .long sys_sched_rr_get_interval
183 .long sys_nanosleep
184 .long sys_ni_syscall /* sys_mremap */
185 .long sys_setresuid16
186 .long sys_getresuid16 /* 165 */
187 .long sys_getpagesize /* sys_getpagesize */
188 .long sys_ni_syscall /* old "query_module" */
189 .long sys_poll
190 .long sys_ni_syscall /* sys_nfsservctl */
191 .long sys_setresgid16 /* 170 */
192 .long sys_getresgid16
193 .long sys_prctl
194 .long sys_rt_sigreturn
195 .long sys_rt_sigaction
196 .long sys_rt_sigprocmask /* 175 */
197 .long sys_rt_sigpending
198 .long sys_rt_sigtimedwait
199 .long sys_rt_sigqueueinfo
200 .long sys_rt_sigsuspend
201 .long sys_pread64 /* 180 */
202 .long sys_pwrite64
203 .long sys_lchown16
204 .long sys_getcwd
205 .long sys_capget
206 .long sys_capset /* 185 */
207 .long sys_sigaltstack
208 .long sys_sendfile
209 .long sys_ni_syscall /* streams1 */
210 .long sys_ni_syscall /* streams2 */
211 .long sys_vfork /* 190 */
212 .long sys_getrlimit
213 .long sys_mmap_pgoff
214 .long sys_truncate64
215 .long sys_ftruncate64
216 .long sys_stat64 /* 195 */
217 .long sys_lstat64
218 .long sys_fstat64
219 .long sys_chown
220 .long sys_getuid
221 .long sys_getgid /* 200 */
222 .long sys_geteuid
223 .long sys_getegid
224 .long sys_setreuid
225 .long sys_setregid
226 .long sys_getgroups /* 205 */
227 .long sys_setgroups
228 .long sys_fchown
229 .long sys_setresuid
230 .long sys_getresuid
231 .long sys_setresgid /* 210 */
232 .long sys_getresgid
233 .long sys_lchown
234 .long sys_setuid
235 .long sys_setgid
236 .long sys_setfsuid /* 215 */
237 .long sys_setfsgid
238 .long sys_pivot_root
239 .long sys_ni_syscall
240 .long sys_ni_syscall
241 .long sys_getdents64 /* 220 */
242 .long sys_gettid
243 .long sys_tkill
244 .long sys_setxattr
245 .long sys_lsetxattr
246 .long sys_fsetxattr /* 225 */
247 .long sys_getxattr
248 .long sys_lgetxattr
249 .long sys_fgetxattr
250 .long sys_listxattr
251 .long sys_llistxattr /* 230 */
252 .long sys_flistxattr
253 .long sys_removexattr
254 .long sys_lremovexattr
255 .long sys_fremovexattr
256 .long sys_futex /* 235 */
257 .long sys_sendfile64
258 .long sys_ni_syscall /* sys_mincore */
259 .long sys_ni_syscall /* sys_madvise */
260 .long sys_fcntl64
261 .long sys_readahead /* 240 */
262 .long sys_io_setup
263 .long sys_io_destroy
264 .long sys_io_getevents
265 .long sys_io_submit
266 .long sys_io_cancel /* 245 */
267 .long sys_fadvise64
268 .long sys_exit_group
269 .long sys_lookup_dcookie
270 .long sys_epoll_create
271 .long sys_epoll_ctl /* 250 */
272 .long sys_epoll_wait
273 .long sys_ni_syscall /* sys_remap_file_pages */
274 .long sys_set_tid_address
275 .long sys_timer_create
276 .long sys_timer_settime /* 255 */
277 .long sys_timer_gettime
278 .long sys_timer_getoverrun
279 .long sys_timer_delete
280 .long sys_clock_settime
281 .long sys_clock_gettime /* 260 */
282 .long sys_clock_getres
283 .long sys_clock_nanosleep
284 .long sys_statfs64
285 .long sys_fstatfs64
286 .long sys_tgkill /* 265 */
287 .long sys_utimes
288 .long sys_fadvise64_64
289 .long sys_mbind
290 .long sys_get_mempolicy
291 .long sys_set_mempolicy /* 270 */
292 .long sys_mq_open
293 .long sys_mq_unlink
294 .long sys_mq_timedsend
295 .long sys_mq_timedreceive
296 .long sys_mq_notify /* 275 */
297 .long sys_mq_getsetattr
298 .long sys_waitid
299 .long sys_ni_syscall /* for sys_vserver */
300 .long sys_add_key
301 .long sys_request_key /* 280 */
302 .long sys_keyctl
303 .long sys_ioprio_set
304 .long sys_ioprio_get
305 .long sys_inotify_init
306 .long sys_inotify_add_watch /* 285 */
307 .long sys_inotify_rm_watch
308 .long sys_migrate_pages
309 .long sys_openat
310 .long sys_mkdirat
311 .long sys_mknodat /* 290 */
312 .long sys_fchownat
313 .long sys_futimesat
314 .long sys_fstatat64
315 .long sys_unlinkat
316 .long sys_renameat /* 295 */
317 .long sys_linkat
318 .long sys_symlinkat
319 .long sys_readlinkat
320 .long sys_fchmodat
321 .long sys_faccessat /* 300 */
322 .long sys_ni_syscall /* Reserved for pselect6 */
323 .long sys_ni_syscall /* Reserved for ppoll */
324 .long sys_unshare
325 .long sys_set_robust_list
326 .long sys_get_robust_list /* 305 */
327 .long sys_splice
328 .long sys_sync_file_range
329 .long sys_tee
330 .long sys_vmsplice
331 .long sys_move_pages /* 310 */
332 .long sys_sched_setaffinity
333 .long sys_sched_getaffinity
334 .long sys_kexec_load
335 .long sys_getcpu
336 .long sys_epoll_pwait /* 315 */
337 .long sys_utimensat
338 .long sys_signalfd
339 .long sys_timerfd_create
340 .long sys_eventfd
341 .long sys_fallocate /* 320 */
342 .long sys_timerfd_settime
343 .long sys_timerfd_gettime
344 .long sys_signalfd4
345 .long sys_eventfd2
346 .long sys_epoll_create1 /* 325 */
347 .long sys_dup3
348 .long sys_pipe2
349 .long sys_inotify_init1
350 .long sys_preadv
351 .long sys_pwritev /* 330 */
352 .long sys_rt_tgsigqueueinfo
353 .long sys_perf_event_open
354 .long sys_get_thread_area
355 .long sys_set_thread_area
356 .long sys_atomic_cmpxchg_32 /* 335 */
357 .long sys_atomic_barrier
358 .long sys_fanotify_init
359 .long sys_fanotify_mark
360 .long sys_prlimit64
361
362 .rept NR_syscalls-(.-sys_call_table)/4
363 .long sys_ni_syscall
364 .endr
365
diff --git a/arch/m68knommu/kernel/time.c b/arch/m68knommu/kernel/time.c
deleted file mode 100644
index 6623909f70e6..000000000000
--- a/arch/m68knommu/kernel/time.c
+++ /dev/null
@@ -1,87 +0,0 @@
1/*
2 * linux/arch/m68knommu/kernel/time.c
3 *
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 *
6 * This file contains the m68k-specific time handling details.
7 * Most of the stuff is located in the machine specific files.
8 *
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
10 * "A Kernel Model for Precision Timekeeping" by Dave Mills
11 */
12
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/param.h>
18#include <linux/string.h>
19#include <linux/mm.h>
20#include <linux/profile.h>
21#include <linux/time.h>
22#include <linux/timex.h>
23
24#include <asm/machdep.h>
25#include <asm/irq_regs.h>
26
27#define TICK_SIZE (tick_nsec / 1000)
28
29static inline int set_rtc_mmss(unsigned long nowtime)
30{
31 if (mach_set_clock_mmss)
32 return mach_set_clock_mmss (nowtime);
33 return -1;
34}
35
36#ifndef CONFIG_GENERIC_CLOCKEVENTS
37/*
38 * timer_interrupt() needs to keep up the real-time clock,
39 * as well as call the "xtime_update()" routine every clocktick
40 */
41irqreturn_t arch_timer_interrupt(int irq, void *dummy)
42{
43
44 if (current->pid)
45 profile_tick(CPU_PROFILING);
46
47 xtime_update(1);
48
49 update_process_times(user_mode(get_irq_regs()));
50
51 return(IRQ_HANDLED);
52}
53#endif
54
55static unsigned long read_rtc_mmss(void)
56{
57 unsigned int year, mon, day, hour, min, sec;
58
59 if (mach_gettod) {
60 mach_gettod(&year, &mon, &day, &hour, &min, &sec);
61 if ((year += 1900) < 1970)
62 year += 100;
63 } else {
64 year = 1970;
65 mon = day = 1;
66 hour = min = sec = 0;
67 }
68
69
70 return mktime(year, mon, day, hour, min, sec);
71}
72
73void read_persistent_clock(struct timespec *ts)
74{
75 ts->tv_sec = read_rtc_mmss();
76 ts->tv_nsec = 0;
77}
78
79int update_persistent_clock(struct timespec now)
80{
81 return set_rtc_mmss(now.tv_sec);
82}
83
84void time_init(void)
85{
86 hw_timer_init();
87}
diff --git a/arch/m68knommu/kernel/traps.c b/arch/m68knommu/kernel/traps.c
deleted file mode 100644
index a768008dfd06..000000000000
--- a/arch/m68knommu/kernel/traps.c
+++ /dev/null
@@ -1,365 +0,0 @@
1/*
2 * linux/arch/m68knommu/kernel/traps.c
3 *
4 * Copyright (C) 1993, 1994 by Hamish Macdonald
5 *
6 * 68040 fixes by Michael Rausch
7 * 68040 fixes by Martin Apel
8 * 68060 fixes by Roman Hodek
9 * 68060 fixes by Jesper Skov
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file COPYING in the main directory of this archive
13 * for more details.
14 */
15
16/*
17 * Sets up all exception vectors
18 */
19#include <linux/sched.h>
20#include <linux/signal.h>
21#include <linux/kernel.h>
22#include <linux/mm.h>
23#include <linux/module.h>
24#include <linux/types.h>
25#include <linux/user.h>
26#include <linux/string.h>
27#include <linux/linkage.h>
28#include <linux/init.h>
29#include <linux/ptrace.h>
30#include <linux/kallsyms.h>
31
32#include <asm/setup.h>
33#include <asm/fpu.h>
34#include <asm/system.h>
35#include <asm/uaccess.h>
36#include <asm/traps.h>
37#include <asm/pgtable.h>
38#include <asm/machdep.h>
39#include <asm/siginfo.h>
40
41static char const * const vec_names[] = {
42 "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR",
43 "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc",
44 "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111",
45 "UNASSIGNED RESERVED 12", "COPROCESSOR PROTOCOL VIOLATION",
46 "FORMAT ERROR", "UNINITIALIZED INTERRUPT",
47 "UNASSIGNED RESERVED 16", "UNASSIGNED RESERVED 17",
48 "UNASSIGNED RESERVED 18", "UNASSIGNED RESERVED 19",
49 "UNASSIGNED RESERVED 20", "UNASSIGNED RESERVED 21",
50 "UNASSIGNED RESERVED 22", "UNASSIGNED RESERVED 23",
51 "SPURIOUS INTERRUPT", "LEVEL 1 INT", "LEVEL 2 INT", "LEVEL 3 INT",
52 "LEVEL 4 INT", "LEVEL 5 INT", "LEVEL 6 INT", "LEVEL 7 INT",
53 "SYSCALL", "TRAP #1", "TRAP #2", "TRAP #3",
54 "TRAP #4", "TRAP #5", "TRAP #6", "TRAP #7",
55 "TRAP #8", "TRAP #9", "TRAP #10", "TRAP #11",
56 "TRAP #12", "TRAP #13", "TRAP #14", "TRAP #15",
57 "FPCP BSUN", "FPCP INEXACT", "FPCP DIV BY 0", "FPCP UNDERFLOW",
58 "FPCP OPERAND ERROR", "FPCP OVERFLOW", "FPCP SNAN",
59 "FPCP UNSUPPORTED OPERATION",
60 "MMU CONFIGURATION ERROR"
61};
62
63void __init trap_init(void)
64{
65}
66
67void die_if_kernel(char *str, struct pt_regs *fp, int nr)
68{
69 if (!(fp->sr & PS_S))
70 return;
71
72 console_verbose();
73 printk(KERN_EMERG "%s: %08x\n",str,nr);
74 printk(KERN_EMERG "PC: [<%08lx>]\nSR: %04x SP: %p a2: %08lx\n",
75 fp->pc, fp->sr, fp, fp->a2);
76 printk(KERN_EMERG "d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
77 fp->d0, fp->d1, fp->d2, fp->d3);
78 printk(KERN_EMERG "d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
79 fp->d4, fp->d5, fp->a0, fp->a1);
80
81 printk(KERN_EMERG "Process %s (pid: %d, stackpage=%08lx)\n",
82 current->comm, current->pid, PAGE_SIZE+(unsigned long)current);
83 show_stack(NULL, (unsigned long *)(fp + 1));
84 add_taint(TAINT_DIE);
85 do_exit(SIGSEGV);
86}
87
88asmlinkage void buserr_c(struct frame *fp)
89{
90 /* Only set esp0 if coming from user mode */
91 if (user_mode(&fp->ptregs))
92 current->thread.esp0 = (unsigned long) fp;
93
94#if defined(DEBUG)
95 printk (KERN_DEBUG "*** Bus Error *** Format is %x\n", fp->ptregs.format);
96#endif
97
98 die_if_kernel("bad frame format",&fp->ptregs,0);
99#if defined(DEBUG)
100 printk(KERN_DEBUG "Unknown SIGSEGV - 4\n");
101#endif
102 force_sig(SIGSEGV, current);
103}
104
105static void print_this_address(unsigned long addr, int i)
106{
107#ifdef CONFIG_KALLSYMS
108 printk(KERN_EMERG " [%08lx] ", addr);
109 print_symbol(KERN_CONT "%s\n", addr);
110#else
111 if (i % 5)
112 printk(KERN_CONT " [%08lx] ", addr);
113 else
114 printk(KERN_EMERG " [%08lx] ", addr);
115 i++;
116#endif
117}
118
119int kstack_depth_to_print = 48;
120
121static void __show_stack(struct task_struct *task, unsigned long *stack)
122{
123 unsigned long *endstack, addr;
124#ifdef CONFIG_FRAME_POINTER
125 unsigned long *last_stack;
126#endif
127 int i;
128
129 if (!stack)
130 stack = (unsigned long *)task->thread.ksp;
131
132 addr = (unsigned long) stack;
133 endstack = (unsigned long *) PAGE_ALIGN(addr);
134
135 printk(KERN_EMERG "Stack from %08lx:", (unsigned long)stack);
136 for (i = 0; i < kstack_depth_to_print; i++) {
137 if (stack + 1 + i > endstack)
138 break;
139 if (i % 8 == 0)
140 printk(KERN_EMERG " ");
141 printk(KERN_CONT " %08lx", *(stack + i));
142 }
143 printk("\n");
144 i = 0;
145
146#ifdef CONFIG_FRAME_POINTER
147 printk(KERN_EMERG "Call Trace:\n");
148
149 last_stack = stack - 1;
150 while (stack <= endstack && stack > last_stack) {
151
152 addr = *(stack + 1);
153 print_this_address(addr, i);
154 i++;
155
156 last_stack = stack;
157 stack = (unsigned long *)*stack;
158 }
159 printk("\n");
160#else
161 printk(KERN_EMERG "Call Trace with CONFIG_FRAME_POINTER disabled:\n");
162 while (stack <= endstack) {
163 addr = *stack++;
164 /*
165 * If the address is either in the text segment of the kernel,
166 * or in a region which is occupied by a module then it *may*
167 * be the address of a calling routine; if so, print it so that
168 * someone tracing down the cause of the crash will be able to
169 * figure out the call path that was taken.
170 */
171 if (__kernel_text_address(addr)) {
172 print_this_address(addr, i);
173 i++;
174 }
175 }
176 printk(KERN_CONT "\n");
177#endif
178}
179
180void bad_super_trap(struct frame *fp)
181{
182 int vector = (fp->ptregs.vector >> 2) & 0xff;
183
184 console_verbose();
185 if (vector < ARRAY_SIZE(vec_names))
186 printk (KERN_WARNING "*** %s *** FORMAT=%X\n",
187 vec_names[vector],
188 fp->ptregs.format);
189 else
190 printk (KERN_WARNING "*** Exception %d *** FORMAT=%X\n",
191 vector,
192 fp->ptregs.format);
193 printk (KERN_WARNING "Current process id is %d\n", current->pid);
194 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
195}
196
197asmlinkage void trap_c(struct frame *fp)
198{
199 int sig;
200 int vector = (fp->ptregs.vector >> 2) & 0xff;
201 siginfo_t info;
202
203 if (fp->ptregs.sr & PS_S) {
204 if (vector == VEC_TRACE) {
205 /* traced a trapping instruction */
206 } else
207 bad_super_trap(fp);
208 return;
209 }
210
211 /* send the appropriate signal to the user program */
212 switch (vector) {
213 case VEC_ADDRERR:
214 info.si_code = BUS_ADRALN;
215 sig = SIGBUS;
216 break;
217 case VEC_ILLEGAL:
218 case VEC_LINE10:
219 case VEC_LINE11:
220 info.si_code = ILL_ILLOPC;
221 sig = SIGILL;
222 break;
223 case VEC_PRIV:
224 info.si_code = ILL_PRVOPC;
225 sig = SIGILL;
226 break;
227 case VEC_COPROC:
228 info.si_code = ILL_COPROC;
229 sig = SIGILL;
230 break;
231 case VEC_TRAP1: /* gdbserver breakpoint */
232 fp->ptregs.pc -= 2;
233 info.si_code = TRAP_TRACE;
234 sig = SIGTRAP;
235 break;
236 case VEC_TRAP2:
237 case VEC_TRAP3:
238 case VEC_TRAP4:
239 case VEC_TRAP5:
240 case VEC_TRAP6:
241 case VEC_TRAP7:
242 case VEC_TRAP8:
243 case VEC_TRAP9:
244 case VEC_TRAP10:
245 case VEC_TRAP11:
246 case VEC_TRAP12:
247 case VEC_TRAP13:
248 case VEC_TRAP14:
249 info.si_code = ILL_ILLTRP;
250 sig = SIGILL;
251 break;
252 case VEC_FPBRUC:
253 case VEC_FPOE:
254 case VEC_FPNAN:
255 info.si_code = FPE_FLTINV;
256 sig = SIGFPE;
257 break;
258 case VEC_FPIR:
259 info.si_code = FPE_FLTRES;
260 sig = SIGFPE;
261 break;
262 case VEC_FPDIVZ:
263 info.si_code = FPE_FLTDIV;
264 sig = SIGFPE;
265 break;
266 case VEC_FPUNDER:
267 info.si_code = FPE_FLTUND;
268 sig = SIGFPE;
269 break;
270 case VEC_FPOVER:
271 info.si_code = FPE_FLTOVF;
272 sig = SIGFPE;
273 break;
274 case VEC_ZERODIV:
275 info.si_code = FPE_INTDIV;
276 sig = SIGFPE;
277 break;
278 case VEC_CHK:
279 case VEC_TRAP:
280 info.si_code = FPE_INTOVF;
281 sig = SIGFPE;
282 break;
283 case VEC_TRACE: /* ptrace single step */
284 info.si_code = TRAP_TRACE;
285 sig = SIGTRAP;
286 break;
287 case VEC_TRAP15: /* breakpoint */
288 info.si_code = TRAP_BRKPT;
289 sig = SIGTRAP;
290 break;
291 default:
292 info.si_code = ILL_ILLOPC;
293 sig = SIGILL;
294 break;
295 }
296 info.si_signo = sig;
297 info.si_errno = 0;
298 switch (fp->ptregs.format) {
299 default:
300 info.si_addr = (void *) fp->ptregs.pc;
301 break;
302 case 2:
303 info.si_addr = (void *) fp->un.fmt2.iaddr;
304 break;
305 case 7:
306 info.si_addr = (void *) fp->un.fmt7.effaddr;
307 break;
308 case 9:
309 info.si_addr = (void *) fp->un.fmt9.iaddr;
310 break;
311 case 10:
312 info.si_addr = (void *) fp->un.fmta.daddr;
313 break;
314 case 11:
315 info.si_addr = (void *) fp->un.fmtb.daddr;
316 break;
317 }
318 force_sig_info (sig, &info, current);
319}
320
321asmlinkage void set_esp0(unsigned long ssp)
322{
323 current->thread.esp0 = ssp;
324}
325
326/*
327 * The architecture-independent backtrace generator
328 */
329void dump_stack(void)
330{
331 /*
332 * We need frame pointers for this little trick, which works as follows:
333 *
334 * +------------+ 0x00
335 * | Next SP | -> 0x0c
336 * +------------+ 0x04
337 * | Caller |
338 * +------------+ 0x08
339 * | Local vars | -> our stack var
340 * +------------+ 0x0c
341 * | Next SP | -> 0x18, that is what we pass to show_stack()
342 * +------------+ 0x10
343 * | Caller |
344 * +------------+ 0x14
345 * | Local vars |
346 * +------------+ 0x18
347 * | ... |
348 * +------------+
349 */
350
351 unsigned long *stack;
352
353 stack = (unsigned long *)&stack;
354 stack++;
355 __show_stack(current, stack);
356}
357EXPORT_SYMBOL(dump_stack);
358
359void show_stack(struct task_struct *task, unsigned long *stack)
360{
361 if (!stack && !task)
362 dump_stack();
363 else
364 __show_stack(task, stack);
365}
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
deleted file mode 100644
index 47e15ebfd893..000000000000
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ /dev/null
@@ -1,188 +0,0 @@
1/*
2 * vmlinux.lds.S -- master linker script for m68knommu arch
3 *
4 * (C) Copyright 2002-2006, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This linker script is equiped to build either ROM loaded or RAM
7 * run kernels.
8 */
9
10#include <asm-generic/vmlinux.lds.h>
11#include <asm/page.h>
12#include <asm/thread_info.h>
13
14#if defined(CONFIG_RAMKERNEL)
15#define RAM_START CONFIG_KERNELBASE
16#define RAM_LENGTH (CONFIG_RAMBASE + CONFIG_RAMSIZE - CONFIG_KERNELBASE)
17#define TEXT ram
18#define DATA ram
19#define INIT ram
20#define BSSS ram
21#endif
22#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL)
23#define RAM_START CONFIG_RAMBASE
24#define RAM_LENGTH CONFIG_RAMSIZE
25#define ROMVEC_START CONFIG_ROMVEC
26#define ROMVEC_LENGTH CONFIG_ROMVECSIZE
27#define ROM_START CONFIG_ROMSTART
28#define ROM_LENGTH CONFIG_ROMSIZE
29#define TEXT rom
30#define DATA ram
31#define INIT ram
32#define BSSS ram
33#endif
34
35#ifndef DATA_ADDR
36#define DATA_ADDR
37#endif
38
39
40OUTPUT_ARCH(m68k)
41ENTRY(_start)
42
43MEMORY {
44 ram : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
45#ifdef ROM_START
46 romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH
47 rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH
48#endif
49}
50
51jiffies = jiffies_64 + 4;
52
53SECTIONS {
54
55#ifdef ROMVEC_START
56 . = ROMVEC_START ;
57 .romvec : {
58 __rom_start = . ;
59 _romvec = .;
60 *(.data..initvect)
61 } > romvec
62#endif
63
64 .text : {
65 _text = .;
66 _stext = . ;
67 HEAD_TEXT
68 TEXT_TEXT
69 SCHED_TEXT
70 LOCK_TEXT
71 *(.text..lock)
72
73 . = ALIGN(16); /* Exception table */
74 __start___ex_table = .;
75 *(__ex_table)
76 __stop___ex_table = .;
77
78 *(.rodata) *(.rodata.*)
79 *(__vermagic) /* Kernel version magic */
80 *(__markers_strings)
81 *(.rodata1)
82 *(.rodata.str1.1)
83
84 /* Kernel symbol table: Normal symbols */
85 . = ALIGN(4);
86 __start___ksymtab = .;
87 *(__ksymtab)
88 __stop___ksymtab = .;
89
90 /* Kernel symbol table: GPL-only symbols */
91 __start___ksymtab_gpl = .;
92 *(__ksymtab_gpl)
93 __stop___ksymtab_gpl = .;
94
95 /* Kernel symbol table: Normal unused symbols */
96 __start___ksymtab_unused = .;
97 *(__ksymtab_unused)
98 __stop___ksymtab_unused = .;
99
100 /* Kernel symbol table: GPL-only unused symbols */
101 __start___ksymtab_unused_gpl = .;
102 *(__ksymtab_unused_gpl)
103 __stop___ksymtab_unused_gpl = .;
104
105 /* Kernel symbol table: GPL-future symbols */
106 __start___ksymtab_gpl_future = .;
107 *(__ksymtab_gpl_future)
108 __stop___ksymtab_gpl_future = .;
109
110 /* Kernel symbol table: Normal symbols */
111 __start___kcrctab = .;
112 *(__kcrctab)
113 __stop___kcrctab = .;
114
115 /* Kernel symbol table: GPL-only symbols */
116 __start___kcrctab_gpl = .;
117 *(__kcrctab_gpl)
118 __stop___kcrctab_gpl = .;
119
120 /* Kernel symbol table: Normal unused symbols */
121 __start___kcrctab_unused = .;
122 *(__kcrctab_unused)
123 __stop___kcrctab_unused = .;
124
125 /* Kernel symbol table: GPL-only unused symbols */
126 __start___kcrctab_unused_gpl = .;
127 *(__kcrctab_unused_gpl)
128 __stop___kcrctab_unused_gpl = .;
129
130 /* Kernel symbol table: GPL-future symbols */
131 __start___kcrctab_gpl_future = .;
132 *(__kcrctab_gpl_future)
133 __stop___kcrctab_gpl_future = .;
134
135 /* Kernel symbol table: strings */
136 *(__ksymtab_strings)
137
138 /* Built-in module parameters */
139 . = ALIGN(4) ;
140 __start___param = .;
141 *(__param)
142 __stop___param = .;
143
144 /* Built-in module versions */
145 . = ALIGN(4) ;
146 __start___modver = .;
147 *(__modver)
148 __stop___modver = .;
149
150 . = ALIGN(4) ;
151 _etext = . ;
152 } > TEXT
153
154 .data DATA_ADDR : {
155 . = ALIGN(4);
156 _sdata = . ;
157 DATA_DATA
158 CACHELINE_ALIGNED_DATA(32)
159 PAGE_ALIGNED_DATA(PAGE_SIZE)
160 *(.data..shared_aligned)
161 INIT_TASK_DATA(THREAD_SIZE)
162 _edata = . ;
163 } > DATA
164
165 .init.text : {
166 . = ALIGN(PAGE_SIZE);
167 __init_begin = .;
168 } > INIT
169 INIT_TEXT_SECTION(PAGE_SIZE) > INIT
170 INIT_DATA_SECTION(16) > INIT
171 .init.data : {
172 . = ALIGN(PAGE_SIZE);
173 __init_end = .;
174 } > INIT
175
176 .bss : {
177 . = ALIGN(4);
178 _sbss = . ;
179 *(.bss)
180 *(COMMON)
181 . = ALIGN(4) ;
182 _ebss = . ;
183 _end = . ;
184 } > BSSS
185
186 DISCARDS
187}
188
diff --git a/arch/m68knommu/lib/Makefile b/arch/m68knommu/lib/Makefile
deleted file mode 100644
index 32d852e586d7..000000000000
--- a/arch/m68knommu/lib/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for m68knommu specific library files..
3#
4
5lib-y := ashldi3.o ashrdi3.o lshrdi3.o \
6 muldi3.o mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o \
7 checksum.o memcpy.o memmove.o memset.o delay.o
diff --git a/arch/m68knommu/lib/ashldi3.c b/arch/m68knommu/lib/ashldi3.c
deleted file mode 100644
index 008403eb8ce2..000000000000
--- a/arch/m68knommu/lib/ashldi3.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/* ashrdi3.c extracted from gcc-2.95.2/libgcc2.c which is: */
2/* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
20
21#define BITS_PER_UNIT 8
22
23typedef int SItype __attribute__ ((mode (SI)));
24typedef unsigned int USItype __attribute__ ((mode (SI)));
25typedef int DItype __attribute__ ((mode (DI)));
26typedef int word_type __attribute__ ((mode (__word__)));
27
28struct DIstruct {SItype high, low;};
29
30typedef union
31{
32 struct DIstruct s;
33 DItype ll;
34} DIunion;
35
36DItype
37__ashldi3 (DItype u, word_type b)
38{
39 DIunion w;
40 word_type bm;
41 DIunion uu;
42
43 if (b == 0)
44 return u;
45
46 uu.ll = u;
47
48 bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
49 if (bm <= 0)
50 {
51 w.s.low = 0;
52 w.s.high = (USItype)uu.s.low << -bm;
53 }
54 else
55 {
56 USItype carries = (USItype)uu.s.low >> bm;
57 w.s.low = (USItype)uu.s.low << b;
58 w.s.high = ((USItype)uu.s.high << b) | carries;
59 }
60
61 return w.ll;
62}
diff --git a/arch/m68knommu/lib/ashrdi3.c b/arch/m68knommu/lib/ashrdi3.c
deleted file mode 100644
index 78efb65e315a..000000000000
--- a/arch/m68knommu/lib/ashrdi3.c
+++ /dev/null
@@ -1,63 +0,0 @@
1/* ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */
2/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
20
21#define BITS_PER_UNIT 8
22
23typedef int SItype __attribute__ ((mode (SI)));
24typedef unsigned int USItype __attribute__ ((mode (SI)));
25typedef int DItype __attribute__ ((mode (DI)));
26typedef int word_type __attribute__ ((mode (__word__)));
27
28struct DIstruct {SItype high, low;};
29
30typedef union
31{
32 struct DIstruct s;
33 DItype ll;
34} DIunion;
35
36DItype
37__ashrdi3 (DItype u, word_type b)
38{
39 DIunion w;
40 word_type bm;
41 DIunion uu;
42
43 if (b == 0)
44 return u;
45
46 uu.ll = u;
47
48 bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
49 if (bm <= 0)
50 {
51 /* w.s.high = 1..1 or 0..0 */
52 w.s.high = uu.s.high >> (sizeof (SItype) * BITS_PER_UNIT - 1);
53 w.s.low = uu.s.high >> -bm;
54 }
55 else
56 {
57 USItype carries = (USItype)uu.s.high << bm;
58 w.s.high = uu.s.high >> b;
59 w.s.low = ((USItype)uu.s.low >> b) | carries;
60 }
61
62 return w.ll;
63}
diff --git a/arch/m68knommu/lib/checksum.c b/arch/m68knommu/lib/checksum.c
deleted file mode 100644
index eccf25d3d73e..000000000000
--- a/arch/m68knommu/lib/checksum.c
+++ /dev/null
@@ -1,153 +0,0 @@
1/*
2 * INET An implementation of the TCP/IP protocol suite for the LINUX
3 * operating system. INET is implemented using the BSD Socket
4 * interface as the means of communication with the user level.
5 *
6 * IP/TCP/UDP checksumming routines
7 *
8 * Authors: Jorge Cwik, <jorge@laser.satlink.net>
9 * Arnt Gulbrandsen, <agulbra@nvg.unit.no>
10 * Tom May, <ftom@netcom.com>
11 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
12 * Lots of code moved from tcp.c and ip.c; see those files
13 * for more names.
14 *
15 * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek:
16 * Fixed some nasty bugs, causing some horrible crashes.
17 * A: At some points, the sum (%0) was used as
18 * length-counter instead of the length counter
19 * (%1). Thanks to Roman Hodek for pointing this out.
20 * B: GCC seems to mess up if one uses too many
21 * data-registers to hold input values and one tries to
22 * specify d0 and d1 as scratch registers. Letting gcc choose these
23 * registers itself solves the problem.
24 *
25 * This program is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU General Public License
27 * as published by the Free Software Foundation; either version
28 * 2 of the License, or (at your option) any later version.
29 */
30
31/* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access kills, so most
32 of the assembly has to go. */
33
34#include <linux/module.h>
35#include <net/checksum.h>
36
37static inline unsigned short from32to16(unsigned long x)
38{
39 /* add up 16-bit and 16-bit for 16+c bit */
40 x = (x & 0xffff) + (x >> 16);
41 /* add up carry.. */
42 x = (x & 0xffff) + (x >> 16);
43 return x;
44}
45
46static unsigned long do_csum(const unsigned char * buff, int len)
47{
48 int odd, count;
49 unsigned long result = 0;
50
51 if (len <= 0)
52 goto out;
53 odd = 1 & (unsigned long) buff;
54 if (odd) {
55 result = *buff;
56 len--;
57 buff++;
58 }
59 count = len >> 1; /* nr of 16-bit words.. */
60 if (count) {
61 if (2 & (unsigned long) buff) {
62 result += *(unsigned short *) buff;
63 count--;
64 len -= 2;
65 buff += 2;
66 }
67 count >>= 1; /* nr of 32-bit words.. */
68 if (count) {
69 unsigned long carry = 0;
70 do {
71 unsigned long w = *(unsigned long *) buff;
72 count--;
73 buff += 4;
74 result += carry;
75 result += w;
76 carry = (w > result);
77 } while (count);
78 result += carry;
79 result = (result & 0xffff) + (result >> 16);
80 }
81 if (len & 2) {
82 result += *(unsigned short *) buff;
83 buff += 2;
84 }
85 }
86 if (len & 1)
87 result += (*buff << 8);
88 result = from32to16(result);
89 if (odd)
90 result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
91out:
92 return result;
93}
94
95#ifdef CONFIG_COLDFIRE
96/*
97 * This is a version of ip_compute_csum() optimized for IP headers,
98 * which always checksum on 4 octet boundaries.
99 */
100__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
101{
102 return (__force __sum16)~do_csum(iph,ihl*4);
103}
104#endif
105
106/*
107 * computes the checksum of a memory block at buff, length len,
108 * and adds in "sum" (32-bit)
109 *
110 * returns a 32-bit number suitable for feeding into itself
111 * or csum_tcpudp_magic
112 *
113 * this function must be called with even lengths, except
114 * for the last fragment, which may be odd
115 *
116 * it's best to have buff aligned on a 32-bit boundary
117 */
118__wsum csum_partial(const void *buff, int len, __wsum sum)
119{
120 unsigned int result = do_csum(buff, len);
121
122 /* add in old sum, and carry.. */
123 result += (__force u32)sum;
124 if ((__force u32)sum > result)
125 result += 1;
126 return (__force __wsum)result;
127}
128
129EXPORT_SYMBOL(csum_partial);
130
131/*
132 * copy from fs while checksumming, otherwise like csum_partial
133 */
134
135__wsum
136csum_partial_copy_from_user(const void __user *src, void *dst,
137 int len, __wsum sum, int *csum_err)
138{
139 if (csum_err) *csum_err = 0;
140 memcpy(dst, (__force const void *)src, len);
141 return csum_partial(dst, len, sum);
142}
143
144/*
145 * copy from ds while checksumming, otherwise like csum_partial
146 */
147
148__wsum
149csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
150{
151 memcpy(dst, src, len);
152 return csum_partial(dst, len, sum);
153}
diff --git a/arch/m68knommu/lib/delay.c b/arch/m68knommu/lib/delay.c
deleted file mode 100644
index 5bd5472d38a0..000000000000
--- a/arch/m68knommu/lib/delay.c
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/m68knommu/lib/delay.c
3 *
4 * (C) Copyright 2004, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <asm/param.h>
13#include <asm/delay.h>
14
15EXPORT_SYMBOL(udelay);
16
17void udelay(unsigned long usecs)
18{
19 _udelay(usecs);
20}
21
diff --git a/arch/m68knommu/lib/divsi3.S b/arch/m68knommu/lib/divsi3.S
deleted file mode 100644
index ec307b61991e..000000000000
--- a/arch/m68knommu/lib/divsi3.S
+++ /dev/null
@@ -1,125 +0,0 @@
1/* libgcc1 routines for 68000 w/o floating-point hardware.
2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
8Free Software Foundation; either version 2, or (at your option) any
9later version.
10
11In addition to the permissions in the GNU General Public License, the
12Free Software Foundation gives you unlimited permission to link the
13compiled version of this file with other programs, and to distribute
14those programs without any restriction coming from the use of this
15file. (The General Public License restrictions do apply in other
16respects; for example, they cover modification of the file, and
17distribution when not linked into another program.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 59 Temple Place - Suite 330,
27Boston, MA 02111-1307, USA. */
28
29/* As a special exception, if you link this library with files
30 compiled with GCC to produce an executable, this does not cause
31 the resulting executable to be covered by the GNU General Public License.
32 This exception does not however invalidate any other reasons why
33 the executable file might be covered by the GNU General Public License. */
34
35/* Use this one for any 680x0; assumes no floating point hardware.
36 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
37 Some of this code comes from MINIX, via the folks at ericsson.
38 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
39*/
40
41/* These are predefined by new versions of GNU cpp. */
42
43#ifndef __USER_LABEL_PREFIX__
44#define __USER_LABEL_PREFIX__ _
45#endif
46
47#ifndef __REGISTER_PREFIX__
48#define __REGISTER_PREFIX__
49#endif
50
51#ifndef __IMMEDIATE_PREFIX__
52#define __IMMEDIATE_PREFIX__ #
53#endif
54
55/* ANSI concatenation macros. */
56
57#define CONCAT1(a, b) CONCAT2(a, b)
58#define CONCAT2(a, b) a ## b
59
60/* Use the right prefix for global labels. */
61
62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
63
64/* Use the right prefix for registers. */
65
66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
67
68/* Use the right prefix for immediate values. */
69
70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
71
72#define d0 REG (d0)
73#define d1 REG (d1)
74#define d2 REG (d2)
75#define d3 REG (d3)
76#define d4 REG (d4)
77#define d5 REG (d5)
78#define d6 REG (d6)
79#define d7 REG (d7)
80#define a0 REG (a0)
81#define a1 REG (a1)
82#define a2 REG (a2)
83#define a3 REG (a3)
84#define a4 REG (a4)
85#define a5 REG (a5)
86#define a6 REG (a6)
87#define fp REG (fp)
88#define sp REG (sp)
89
90 .text
91 .proc
92 .globl SYM (__divsi3)
93SYM (__divsi3):
94 movel d2, sp@-
95
96 moveq IMM (1), d2 /* sign of result stored in d2 (=1 or =-1) */
97 movel sp@(12), d1 /* d1 = divisor */
98 jpl L1
99 negl d1
100#if !(defined(__mcf5200__) || defined(__mcoldfire__))
101 negb d2 /* change sign because divisor <0 */
102#else
103 negl d2 /* change sign because divisor <0 */
104#endif
105L1: movel sp@(8), d0 /* d0 = dividend */
106 jpl L2
107 negl d0
108#if !(defined(__mcf5200__) || defined(__mcoldfire__))
109 negb d2
110#else
111 negl d2
112#endif
113
114L2: movel d1, sp@-
115 movel d0, sp@-
116 jbsr SYM (__udivsi3) /* divide abs(dividend) by abs(divisor) */
117 addql IMM (8), sp
118
119 tstb d2
120 jpl L3
121 negl d0
122
123L3: movel sp@+, d2
124 rts
125
diff --git a/arch/m68knommu/lib/lshrdi3.c b/arch/m68knommu/lib/lshrdi3.c
deleted file mode 100644
index 93b1cb6fdee8..000000000000
--- a/arch/m68knommu/lib/lshrdi3.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/* lshrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */
2/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
20
21#define BITS_PER_UNIT 8
22
23typedef int SItype __attribute__ ((mode (SI)));
24typedef unsigned int USItype __attribute__ ((mode (SI)));
25typedef int DItype __attribute__ ((mode (DI)));
26typedef int word_type __attribute__ ((mode (__word__)));
27
28struct DIstruct {SItype high, low;};
29
30typedef union
31{
32 struct DIstruct s;
33 DItype ll;
34} DIunion;
35
36DItype
37__lshrdi3 (DItype u, word_type b)
38{
39 DIunion w;
40 word_type bm;
41 DIunion uu;
42
43 if (b == 0)
44 return u;
45
46 uu.ll = u;
47
48 bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
49 if (bm <= 0)
50 {
51 w.s.high = 0;
52 w.s.low = (USItype)uu.s.high >> -bm;
53 }
54 else
55 {
56 USItype carries = (USItype)uu.s.high << bm;
57 w.s.high = (USItype)uu.s.high >> b;
58 w.s.low = ((USItype)uu.s.low >> b) | carries;
59 }
60
61 return w.ll;
62}
diff --git a/arch/m68knommu/lib/memcpy.c b/arch/m68knommu/lib/memcpy.c
deleted file mode 100644
index b50dbcad4746..000000000000
--- a/arch/m68knommu/lib/memcpy.c
+++ /dev/null
@@ -1,62 +0,0 @@
1
2#include <linux/types.h>
3
4void * memcpy(void * to, const void * from, size_t n)
5{
6#ifdef CONFIG_COLDFIRE
7 void *xto = to;
8 size_t temp;
9
10 if (!n)
11 return xto;
12 if ((long) to & 1)
13 {
14 char *cto = to;
15 const char *cfrom = from;
16 *cto++ = *cfrom++;
17 to = cto;
18 from = cfrom;
19 n--;
20 }
21 if (n > 2 && (long) to & 2)
22 {
23 short *sto = to;
24 const short *sfrom = from;
25 *sto++ = *sfrom++;
26 to = sto;
27 from = sfrom;
28 n -= 2;
29 }
30 temp = n >> 2;
31 if (temp)
32 {
33 long *lto = to;
34 const long *lfrom = from;
35 for (; temp; temp--)
36 *lto++ = *lfrom++;
37 to = lto;
38 from = lfrom;
39 }
40 if (n & 2)
41 {
42 short *sto = to;
43 const short *sfrom = from;
44 *sto++ = *sfrom++;
45 to = sto;
46 from = sfrom;
47 }
48 if (n & 1)
49 {
50 char *cto = to;
51 const char *cfrom = from;
52 *cto = *cfrom;
53 }
54 return xto;
55#else
56 const char *c_from = from;
57 char *c_to = to;
58 while (n-- > 0)
59 *c_to++ = *c_from++;
60 return((void *) to);
61#endif
62}
diff --git a/arch/m68knommu/lib/memmove.c b/arch/m68knommu/lib/memmove.c
deleted file mode 100644
index b3dcfe9dab7e..000000000000
--- a/arch/m68knommu/lib/memmove.c
+++ /dev/null
@@ -1,105 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file COPYING in the main directory of this archive
4 * for more details.
5 */
6
7#define __IN_STRING_C
8
9#include <linux/module.h>
10#include <linux/string.h>
11
12void *memmove(void *dest, const void *src, size_t n)
13{
14 void *xdest = dest;
15 size_t temp;
16
17 if (!n)
18 return xdest;
19
20 if (dest < src) {
21 if ((long)dest & 1) {
22 char *cdest = dest;
23 const char *csrc = src;
24 *cdest++ = *csrc++;
25 dest = cdest;
26 src = csrc;
27 n--;
28 }
29 if (n > 2 && (long)dest & 2) {
30 short *sdest = dest;
31 const short *ssrc = src;
32 *sdest++ = *ssrc++;
33 dest = sdest;
34 src = ssrc;
35 n -= 2;
36 }
37 temp = n >> 2;
38 if (temp) {
39 long *ldest = dest;
40 const long *lsrc = src;
41 temp--;
42 do
43 *ldest++ = *lsrc++;
44 while (temp--);
45 dest = ldest;
46 src = lsrc;
47 }
48 if (n & 2) {
49 short *sdest = dest;
50 const short *ssrc = src;
51 *sdest++ = *ssrc++;
52 dest = sdest;
53 src = ssrc;
54 }
55 if (n & 1) {
56 char *cdest = dest;
57 const char *csrc = src;
58 *cdest = *csrc;
59 }
60 } else {
61 dest = (char *)dest + n;
62 src = (const char *)src + n;
63 if ((long)dest & 1) {
64 char *cdest = dest;
65 const char *csrc = src;
66 *--cdest = *--csrc;
67 dest = cdest;
68 src = csrc;
69 n--;
70 }
71 if (n > 2 && (long)dest & 2) {
72 short *sdest = dest;
73 const short *ssrc = src;
74 *--sdest = *--ssrc;
75 dest = sdest;
76 src = ssrc;
77 n -= 2;
78 }
79 temp = n >> 2;
80 if (temp) {
81 long *ldest = dest;
82 const long *lsrc = src;
83 temp--;
84 do
85 *--ldest = *--lsrc;
86 while (temp--);
87 dest = ldest;
88 src = lsrc;
89 }
90 if (n & 2) {
91 short *sdest = dest;
92 const short *ssrc = src;
93 *--sdest = *--ssrc;
94 dest = sdest;
95 src = ssrc;
96 }
97 if (n & 1) {
98 char *cdest = dest;
99 const char *csrc = src;
100 *--cdest = *--csrc;
101 }
102 }
103 return xdest;
104}
105EXPORT_SYMBOL(memmove);
diff --git a/arch/m68knommu/lib/memset.c b/arch/m68knommu/lib/memset.c
deleted file mode 100644
index 1389bf455633..000000000000
--- a/arch/m68knommu/lib/memset.c
+++ /dev/null
@@ -1,47 +0,0 @@
1#include <linux/types.h>
2
3void * memset(void * s, int c, size_t count)
4{
5 void *xs = s;
6 size_t temp;
7
8 if (!count)
9 return xs;
10 c &= 0xff;
11 c |= c << 8;
12 c |= c << 16;
13 if ((long) s & 1)
14 {
15 char *cs = s;
16 *cs++ = c;
17 s = cs;
18 count--;
19 }
20 if (count > 2 && (long) s & 2)
21 {
22 short *ss = s;
23 *ss++ = c;
24 s = ss;
25 count -= 2;
26 }
27 temp = count >> 2;
28 if (temp)
29 {
30 long *ls = s;
31 for (; temp; temp--)
32 *ls++ = c;
33 s = ls;
34 }
35 if (count & 2)
36 {
37 short *ss = s;
38 *ss++ = c;
39 s = ss;
40 }
41 if (count & 1)
42 {
43 char *cs = s;
44 *cs = c;
45 }
46 return xs;
47}
diff --git a/arch/m68knommu/lib/modsi3.S b/arch/m68knommu/lib/modsi3.S
deleted file mode 100644
index ef3849435768..000000000000
--- a/arch/m68knommu/lib/modsi3.S
+++ /dev/null
@@ -1,113 +0,0 @@
1/* libgcc1 routines for 68000 w/o floating-point hardware.
2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
8Free Software Foundation; either version 2, or (at your option) any
9later version.
10
11In addition to the permissions in the GNU General Public License, the
12Free Software Foundation gives you unlimited permission to link the
13compiled version of this file with other programs, and to distribute
14those programs without any restriction coming from the use of this
15file. (The General Public License restrictions do apply in other
16respects; for example, they cover modification of the file, and
17distribution when not linked into another program.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 59 Temple Place - Suite 330,
27Boston, MA 02111-1307, USA. */
28
29/* As a special exception, if you link this library with files
30 compiled with GCC to produce an executable, this does not cause
31 the resulting executable to be covered by the GNU General Public License.
32 This exception does not however invalidate any other reasons why
33 the executable file might be covered by the GNU General Public License. */
34
35/* Use this one for any 680x0; assumes no floating point hardware.
36 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
37 Some of this code comes from MINIX, via the folks at ericsson.
38 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
39*/
40
41/* These are predefined by new versions of GNU cpp. */
42
43#ifndef __USER_LABEL_PREFIX__
44#define __USER_LABEL_PREFIX__ _
45#endif
46
47#ifndef __REGISTER_PREFIX__
48#define __REGISTER_PREFIX__
49#endif
50
51#ifndef __IMMEDIATE_PREFIX__
52#define __IMMEDIATE_PREFIX__ #
53#endif
54
55/* ANSI concatenation macros. */
56
57#define CONCAT1(a, b) CONCAT2(a, b)
58#define CONCAT2(a, b) a ## b
59
60/* Use the right prefix for global labels. */
61
62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
63
64/* Use the right prefix for registers. */
65
66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
67
68/* Use the right prefix for immediate values. */
69
70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
71
72#define d0 REG (d0)
73#define d1 REG (d1)
74#define d2 REG (d2)
75#define d3 REG (d3)
76#define d4 REG (d4)
77#define d5 REG (d5)
78#define d6 REG (d6)
79#define d7 REG (d7)
80#define a0 REG (a0)
81#define a1 REG (a1)
82#define a2 REG (a2)
83#define a3 REG (a3)
84#define a4 REG (a4)
85#define a5 REG (a5)
86#define a6 REG (a6)
87#define fp REG (fp)
88#define sp REG (sp)
89
90 .text
91 .proc
92 .globl SYM (__modsi3)
93SYM (__modsi3):
94 movel sp@(8), d1 /* d1 = divisor */
95 movel sp@(4), d0 /* d0 = dividend */
96 movel d1, sp@-
97 movel d0, sp@-
98 jbsr SYM (__divsi3)
99 addql IMM (8), sp
100 movel sp@(8), d1 /* d1 = divisor */
101#if !(defined(__mcf5200__) || defined(__mcoldfire__))
102 movel d1, sp@-
103 movel d0, sp@-
104 jbsr SYM (__mulsi3) /* d0 = (a/b)*b */
105 addql IMM (8), sp
106#else
107 mulsl d1,d0
108#endif
109 movel sp@(4), d1 /* d1 = dividend */
110 subl d0, d1 /* d1 = a - (a/b)*b */
111 movel d1, d0
112 rts
113
diff --git a/arch/m68knommu/lib/muldi3.c b/arch/m68knommu/lib/muldi3.c
deleted file mode 100644
index 34af72c30303..000000000000
--- a/arch/m68knommu/lib/muldi3.c
+++ /dev/null
@@ -1,86 +0,0 @@
1/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and
2 gcc-2.7.2.3/longlong.h which is: */
3/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#define BITS_PER_UNIT 8
23#define SI_TYPE_SIZE 32
24
25#define __BITS4 (SI_TYPE_SIZE / 4)
26#define __ll_B (1L << (SI_TYPE_SIZE / 2))
27#define __ll_lowpart(t) ((USItype) (t) % __ll_B)
28#define __ll_highpart(t) ((USItype) (t) / __ll_B)
29
30#define umul_ppmm(w1, w0, u, v) \
31 do { \
32 USItype __x0, __x1, __x2, __x3; \
33 USItype __ul, __vl, __uh, __vh; \
34 \
35 __ul = __ll_lowpart (u); \
36 __uh = __ll_highpart (u); \
37 __vl = __ll_lowpart (v); \
38 __vh = __ll_highpart (v); \
39 \
40 __x0 = (USItype) __ul * __vl; \
41 __x1 = (USItype) __ul * __vh; \
42 __x2 = (USItype) __uh * __vl; \
43 __x3 = (USItype) __uh * __vh; \
44 \
45 __x1 += __ll_highpart (__x0);/* this can't give carry */ \
46 __x1 += __x2; /* but this indeed can */ \
47 if (__x1 < __x2) /* did we get it? */ \
48 __x3 += __ll_B; /* yes, add it in the proper pos. */ \
49 \
50 (w1) = __x3 + __ll_highpart (__x1); \
51 (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \
52 } while (0)
53
54#define __umulsidi3(u, v) \
55 ({DIunion __w; \
56 umul_ppmm (__w.s.high, __w.s.low, u, v); \
57 __w.ll; })
58
59typedef int SItype __attribute__ ((mode (SI)));
60typedef unsigned int USItype __attribute__ ((mode (SI)));
61typedef int DItype __attribute__ ((mode (DI)));
62typedef int word_type __attribute__ ((mode (__word__)));
63
64struct DIstruct {SItype high, low;};
65
66typedef union
67{
68 struct DIstruct s;
69 DItype ll;
70} DIunion;
71
72DItype
73__muldi3 (DItype u, DItype v)
74{
75 DIunion w;
76 DIunion uu, vv;
77
78 uu.ll = u,
79 vv.ll = v;
80
81 w.ll = __umulsidi3 (uu.s.low, vv.s.low);
82 w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
83 + (USItype) uu.s.high * (USItype) vv.s.low);
84
85 return w.ll;
86}
diff --git a/arch/m68knommu/lib/mulsi3.S b/arch/m68knommu/lib/mulsi3.S
deleted file mode 100644
index ce29ea37b45f..000000000000
--- a/arch/m68knommu/lib/mulsi3.S
+++ /dev/null
@@ -1,110 +0,0 @@
1/* libgcc1 routines for 68000 w/o floating-point hardware.
2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
8Free Software Foundation; either version 2, or (at your option) any
9later version.
10
11In addition to the permissions in the GNU General Public License, the
12Free Software Foundation gives you unlimited permission to link the
13compiled version of this file with other programs, and to distribute
14those programs without any restriction coming from the use of this
15file. (The General Public License restrictions do apply in other
16respects; for example, they cover modification of the file, and
17distribution when not linked into another program.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 59 Temple Place - Suite 330,
27Boston, MA 02111-1307, USA. */
28
29/* As a special exception, if you link this library with files
30 compiled with GCC to produce an executable, this does not cause
31 the resulting executable to be covered by the GNU General Public License.
32 This exception does not however invalidate any other reasons why
33 the executable file might be covered by the GNU General Public License. */
34
35/* Use this one for any 680x0; assumes no floating point hardware.
36 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
37 Some of this code comes from MINIX, via the folks at ericsson.
38 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
39*/
40
41/* These are predefined by new versions of GNU cpp. */
42
43#ifndef __USER_LABEL_PREFIX__
44#define __USER_LABEL_PREFIX__ _
45#endif
46
47#ifndef __REGISTER_PREFIX__
48#define __REGISTER_PREFIX__
49#endif
50
51#ifndef __IMMEDIATE_PREFIX__
52#define __IMMEDIATE_PREFIX__ #
53#endif
54
55/* ANSI concatenation macros. */
56
57#define CONCAT1(a, b) CONCAT2(a, b)
58#define CONCAT2(a, b) a ## b
59
60/* Use the right prefix for global labels. */
61
62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
63
64/* Use the right prefix for registers. */
65
66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
67
68/* Use the right prefix for immediate values. */
69
70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
71
72#define d0 REG (d0)
73#define d1 REG (d1)
74#define d2 REG (d2)
75#define d3 REG (d3)
76#define d4 REG (d4)
77#define d5 REG (d5)
78#define d6 REG (d6)
79#define d7 REG (d7)
80#define a0 REG (a0)
81#define a1 REG (a1)
82#define a2 REG (a2)
83#define a3 REG (a3)
84#define a4 REG (a4)
85#define a5 REG (a5)
86#define a6 REG (a6)
87#define fp REG (fp)
88#define sp REG (sp)
89
90 .text
91 .proc
92 .globl SYM (__mulsi3)
93SYM (__mulsi3):
94 movew sp@(4), d0 /* x0 -> d0 */
95 muluw sp@(10), d0 /* x0*y1 */
96 movew sp@(6), d1 /* x1 -> d1 */
97 muluw sp@(8), d1 /* x1*y0 */
98#if !(defined(__mcf5200__) || defined(__mcoldfire__))
99 addw d1, d0
100#else
101 addl d1, d0
102#endif
103 swap d0
104 clrw d0
105 movew sp@(6), d1 /* x1 -> d1 */
106 muluw sp@(10), d1 /* x1*y1 */
107 addl d1, d0
108
109 rts
110
diff --git a/arch/m68knommu/lib/udivsi3.S b/arch/m68knommu/lib/udivsi3.S
deleted file mode 100644
index c424c4a1f0a3..000000000000
--- a/arch/m68knommu/lib/udivsi3.S
+++ /dev/null
@@ -1,162 +0,0 @@
1/* libgcc1 routines for 68000 w/o floating-point hardware.
2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
8Free Software Foundation; either version 2, or (at your option) any
9later version.
10
11In addition to the permissions in the GNU General Public License, the
12Free Software Foundation gives you unlimited permission to link the
13compiled version of this file with other programs, and to distribute
14those programs without any restriction coming from the use of this
15file. (The General Public License restrictions do apply in other
16respects; for example, they cover modification of the file, and
17distribution when not linked into another program.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 59 Temple Place - Suite 330,
27Boston, MA 02111-1307, USA. */
28
29/* As a special exception, if you link this library with files
30 compiled with GCC to produce an executable, this does not cause
31 the resulting executable to be covered by the GNU General Public License.
32 This exception does not however invalidate any other reasons why
33 the executable file might be covered by the GNU General Public License. */
34
35/* Use this one for any 680x0; assumes no floating point hardware.
36 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
37 Some of this code comes from MINIX, via the folks at ericsson.
38 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
39*/
40
41/* These are predefined by new versions of GNU cpp. */
42
43#ifndef __USER_LABEL_PREFIX__
44#define __USER_LABEL_PREFIX__ _
45#endif
46
47#ifndef __REGISTER_PREFIX__
48#define __REGISTER_PREFIX__
49#endif
50
51#ifndef __IMMEDIATE_PREFIX__
52#define __IMMEDIATE_PREFIX__ #
53#endif
54
55/* ANSI concatenation macros. */
56
57#define CONCAT1(a, b) CONCAT2(a, b)
58#define CONCAT2(a, b) a ## b
59
60/* Use the right prefix for global labels. */
61
62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
63
64/* Use the right prefix for registers. */
65
66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
67
68/* Use the right prefix for immediate values. */
69
70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
71
72#define d0 REG (d0)
73#define d1 REG (d1)
74#define d2 REG (d2)
75#define d3 REG (d3)
76#define d4 REG (d4)
77#define d5 REG (d5)
78#define d6 REG (d6)
79#define d7 REG (d7)
80#define a0 REG (a0)
81#define a1 REG (a1)
82#define a2 REG (a2)
83#define a3 REG (a3)
84#define a4 REG (a4)
85#define a5 REG (a5)
86#define a6 REG (a6)
87#define fp REG (fp)
88#define sp REG (sp)
89
90 .text
91 .proc
92 .globl SYM (__udivsi3)
93SYM (__udivsi3):
94#if !(defined(__mcf5200__) || defined(__mcoldfire__))
95 movel d2, sp@-
96 movel sp@(12), d1 /* d1 = divisor */
97 movel sp@(8), d0 /* d0 = dividend */
98
99 cmpl IMM (0x10000), d1 /* divisor >= 2 ^ 16 ? */
100 jcc L3 /* then try next algorithm */
101 movel d0, d2
102 clrw d2
103 swap d2
104 divu d1, d2 /* high quotient in lower word */
105 movew d2, d0 /* save high quotient */
106 swap d0
107 movew sp@(10), d2 /* get low dividend + high rest */
108 divu d1, d2 /* low quotient */
109 movew d2, d0
110 jra L6
111
112L3: movel d1, d2 /* use d2 as divisor backup */
113L4: lsrl IMM (1), d1 /* shift divisor */
114 lsrl IMM (1), d0 /* shift dividend */
115 cmpl IMM (0x10000), d1 /* still divisor >= 2 ^ 16 ? */
116 jcc L4
117 divu d1, d0 /* now we have 16 bit divisor */
118 andl IMM (0xffff), d0 /* mask out divisor, ignore remainder */
119
120/* Multiply the 16 bit tentative quotient with the 32 bit divisor. Because of
121 the operand ranges, this might give a 33 bit product. If this product is
122 greater than the dividend, the tentative quotient was too large. */
123 movel d2, d1
124 mulu d0, d1 /* low part, 32 bits */
125 swap d2
126 mulu d0, d2 /* high part, at most 17 bits */
127 swap d2 /* align high part with low part */
128 tstw d2 /* high part 17 bits? */
129 jne L5 /* if 17 bits, quotient was too large */
130 addl d2, d1 /* add parts */
131 jcs L5 /* if sum is 33 bits, quotient was too large */
132 cmpl sp@(8), d1 /* compare the sum with the dividend */
133 jls L6 /* if sum > dividend, quotient was too large */
134L5: subql IMM (1), d0 /* adjust quotient */
135
136L6: movel sp@+, d2
137 rts
138
139#else /* __mcf5200__ || __mcoldfire__ */
140
141/* Coldfire implementation of non-restoring division algorithm from
142 Hennessy & Patterson, Appendix A. */
143 link a6,IMM (-12)
144 moveml d2-d4,sp@
145 movel a6@(8),d0
146 movel a6@(12),d1
147 clrl d2 | clear p
148 moveq IMM (31),d4
149L1: addl d0,d0 | shift reg pair (p,a) one bit left
150 addxl d2,d2
151 movl d2,d3 | subtract b from p, store in tmp.
152 subl d1,d3
153 jcs L2 | if no carry,
154 bset IMM (0),d0 | set the low order bit of a to 1,
155 movl d3,d2 | and store tmp in p.
156L2: subql IMM (1),d4
157 jcc L1
158 moveml sp@,d2-d4 | restore data registers
159 unlk a6 | and return
160 rts
161#endif /* __mcf5200__ || __mcoldfire__ */
162
diff --git a/arch/m68knommu/lib/umodsi3.S b/arch/m68knommu/lib/umodsi3.S
deleted file mode 100644
index 5def5f626478..000000000000
--- a/arch/m68knommu/lib/umodsi3.S
+++ /dev/null
@@ -1,113 +0,0 @@
1/* libgcc1 routines for 68000 w/o floating-point hardware.
2 Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
8Free Software Foundation; either version 2, or (at your option) any
9later version.
10
11In addition to the permissions in the GNU General Public License, the
12Free Software Foundation gives you unlimited permission to link the
13compiled version of this file with other programs, and to distribute
14those programs without any restriction coming from the use of this
15file. (The General Public License restrictions do apply in other
16respects; for example, they cover modification of the file, and
17distribution when not linked into another program.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING. If not, write to
26the Free Software Foundation, 59 Temple Place - Suite 330,
27Boston, MA 02111-1307, USA. */
28
29/* As a special exception, if you link this library with files
30 compiled with GCC to produce an executable, this does not cause
31 the resulting executable to be covered by the GNU General Public License.
32 This exception does not however invalidate any other reasons why
33 the executable file might be covered by the GNU General Public License. */
34
35/* Use this one for any 680x0; assumes no floating point hardware.
36 The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
37 Some of this code comes from MINIX, via the folks at ericsson.
38 D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
39*/
40
41/* These are predefined by new versions of GNU cpp. */
42
43#ifndef __USER_LABEL_PREFIX__
44#define __USER_LABEL_PREFIX__ _
45#endif
46
47#ifndef __REGISTER_PREFIX__
48#define __REGISTER_PREFIX__
49#endif
50
51#ifndef __IMMEDIATE_PREFIX__
52#define __IMMEDIATE_PREFIX__ #
53#endif
54
55/* ANSI concatenation macros. */
56
57#define CONCAT1(a, b) CONCAT2(a, b)
58#define CONCAT2(a, b) a ## b
59
60/* Use the right prefix for global labels. */
61
62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
63
64/* Use the right prefix for registers. */
65
66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
67
68/* Use the right prefix for immediate values. */
69
70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
71
72#define d0 REG (d0)
73#define d1 REG (d1)
74#define d2 REG (d2)
75#define d3 REG (d3)
76#define d4 REG (d4)
77#define d5 REG (d5)
78#define d6 REG (d6)
79#define d7 REG (d7)
80#define a0 REG (a0)
81#define a1 REG (a1)
82#define a2 REG (a2)
83#define a3 REG (a3)
84#define a4 REG (a4)
85#define a5 REG (a5)
86#define a6 REG (a6)
87#define fp REG (fp)
88#define sp REG (sp)
89
90 .text
91 .proc
92 .globl SYM (__umodsi3)
93SYM (__umodsi3):
94 movel sp@(8), d1 /* d1 = divisor */
95 movel sp@(4), d0 /* d0 = dividend */
96 movel d1, sp@-
97 movel d0, sp@-
98 jbsr SYM (__udivsi3)
99 addql IMM (8), sp
100 movel sp@(8), d1 /* d1 = divisor */
101#if !(defined(__mcf5200__) || defined(__mcoldfire__))
102 movel d1, sp@-
103 movel d0, sp@-
104 jbsr SYM (__mulsi3) /* d0 = (a/b)*b */
105 addql IMM (8), sp
106#else
107 mulsl d1,d0
108#endif
109 movel sp@(4), d1 /* d1 = dividend */
110 subl d0, d1 /* d1 = a - (a/b)*b */
111 movel d1, d0
112 rts
113
diff --git a/arch/m68knommu/mm/Makefile b/arch/m68knommu/mm/Makefile
deleted file mode 100644
index b54ab6b4b523..000000000000
--- a/arch/m68knommu/mm/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the linux m68knommu specific parts of the memory manager.
3#
4
5obj-y += init.o kmap.o
diff --git a/arch/m68knommu/mm/init.c b/arch/m68knommu/mm/init.c
deleted file mode 100644
index 8a6653f56bd8..000000000000
--- a/arch/m68knommu/mm/init.c
+++ /dev/null
@@ -1,193 +0,0 @@
1/*
2 * linux/arch/m68knommu/mm/init.c
3 *
4 * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>,
5 * Kenneth Albanowski <kjahds@kjahds.com>,
6 * Copyright (C) 2000 Lineo, Inc. (www.lineo.com)
7 *
8 * Based on:
9 *
10 * linux/arch/m68k/mm/init.c
11 *
12 * Copyright (C) 1995 Hamish Macdonald
13 *
14 * JAN/1999 -- hacked to support ColdFire (gerg@snapgear.com)
15 * DEC/2000 -- linux 2.4 support <davidm@snapgear.com>
16 */
17
18#include <linux/signal.h>
19#include <linux/sched.h>
20#include <linux/kernel.h>
21#include <linux/errno.h>
22#include <linux/string.h>
23#include <linux/types.h>
24#include <linux/ptrace.h>
25#include <linux/mman.h>
26#include <linux/mm.h>
27#include <linux/swap.h>
28#include <linux/init.h>
29#include <linux/highmem.h>
30#include <linux/pagemap.h>
31#include <linux/bootmem.h>
32#include <linux/gfp.h>
33
34#include <asm/setup.h>
35#include <asm/segment.h>
36#include <asm/page.h>
37#include <asm/pgtable.h>
38#include <asm/system.h>
39#include <asm/machdep.h>
40
41#undef DEBUG
42
43extern void die_if_kernel(char *,struct pt_regs *,long);
44extern void free_initmem(void);
45
46/*
47 * BAD_PAGE is the page that is used for page faults when linux
48 * is out-of-memory. Older versions of linux just did a
49 * do_exit(), but using this instead means there is less risk
50 * for a process dying in kernel mode, possibly leaving a inode
51 * unused etc..
52 *
53 * BAD_PAGETABLE is the accompanying page-table: it is initialized
54 * to point to BAD_PAGE entries.
55 *
56 * ZERO_PAGE is a special page that is used for zero-initialized
57 * data and COW.
58 */
59static unsigned long empty_bad_page_table;
60
61static unsigned long empty_bad_page;
62
63unsigned long empty_zero_page;
64
65extern unsigned long memory_start;
66extern unsigned long memory_end;
67
68/*
69 * paging_init() continues the virtual memory environment setup which
70 * was begun by the code in arch/head.S.
71 * The parameters are pointers to where to stick the starting and ending
72 * addresses of available kernel virtual memory.
73 */
74void __init paging_init(void)
75{
76 /*
77 * Make sure start_mem is page aligned, otherwise bootmem and
78 * page_alloc get different views of the world.
79 */
80#ifdef DEBUG
81 unsigned long start_mem = PAGE_ALIGN(memory_start);
82#endif
83 unsigned long end_mem = memory_end & PAGE_MASK;
84
85#ifdef DEBUG
86 printk (KERN_DEBUG "start_mem is %#lx\nvirtual_end is %#lx\n",
87 start_mem, end_mem);
88#endif
89
90 /*
91 * Initialize the bad page table and bad page to point
92 * to a couple of allocated pages.
93 */
94 empty_bad_page_table = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
95 empty_bad_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
96 empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
97 memset((void *)empty_zero_page, 0, PAGE_SIZE);
98
99 /*
100 * Set up SFC/DFC registers (user data space).
101 */
102 set_fs (USER_DS);
103
104#ifdef DEBUG
105 printk (KERN_DEBUG "before free_area_init\n");
106
107 printk (KERN_DEBUG "free_area_init -> start_mem is %#lx\nvirtual_end is %#lx\n",
108 start_mem, end_mem);
109#endif
110
111 {
112 unsigned long zones_size[MAX_NR_ZONES] = {0, };
113
114 zones_size[ZONE_DMA] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT;
115 free_area_init(zones_size);
116 }
117}
118
119void __init mem_init(void)
120{
121 int codek = 0, datak = 0, initk = 0;
122 unsigned long tmp;
123 extern char _etext, _stext, _sdata, _ebss, __init_begin, __init_end;
124 extern unsigned int _ramend, _rambase;
125 unsigned long len = _ramend - _rambase;
126 unsigned long start_mem = memory_start; /* DAVIDM - these must start at end of kernel */
127 unsigned long end_mem = memory_end; /* DAVIDM - this must not include kernel stack at top */
128
129 pr_debug("Mem_init: start=%lx, end=%lx\n", start_mem, end_mem);
130
131 end_mem &= PAGE_MASK;
132 high_memory = (void *) end_mem;
133
134 start_mem = PAGE_ALIGN(start_mem);
135 max_mapnr = num_physpages = (((unsigned long) high_memory) - PAGE_OFFSET) >> PAGE_SHIFT;
136
137 /* this will put all memory onto the freelists */
138 totalram_pages = free_all_bootmem();
139
140 codek = (&_etext - &_stext) >> 10;
141 datak = (&_ebss - &_sdata) >> 10;
142 initk = (&__init_begin - &__init_end) >> 10;
143
144 tmp = nr_free_pages() << PAGE_SHIFT;
145 printk(KERN_INFO "Memory available: %luk/%luk RAM, (%dk kernel code, %dk data)\n",
146 tmp >> 10,
147 len >> 10,
148 codek,
149 datak
150 );
151}
152
153
154#ifdef CONFIG_BLK_DEV_INITRD
155void free_initrd_mem(unsigned long start, unsigned long end)
156{
157 int pages = 0;
158 for (; start < end; start += PAGE_SIZE) {
159 ClearPageReserved(virt_to_page(start));
160 init_page_count(virt_to_page(start));
161 free_page(start);
162 totalram_pages++;
163 pages++;
164 }
165 printk (KERN_NOTICE "Freeing initrd memory: %dk freed\n", pages * (PAGE_SIZE / 1024));
166}
167#endif
168
169void
170free_initmem()
171{
172#ifdef CONFIG_RAMKERNEL
173 unsigned long addr;
174 extern char __init_begin, __init_end;
175 /*
176 * The following code should be cool even if these sections
177 * are not page aligned.
178 */
179 addr = PAGE_ALIGN((unsigned long)(&__init_begin));
180 /* next to check that the page we free is not a partial page */
181 for (; addr + PAGE_SIZE < (unsigned long)(&__init_end); addr +=PAGE_SIZE) {
182 ClearPageReserved(virt_to_page(addr));
183 init_page_count(virt_to_page(addr));
184 free_page(addr);
185 totalram_pages++;
186 }
187 printk(KERN_NOTICE "Freeing unused kernel memory: %ldk freed (0x%x - 0x%x)\n",
188 (addr - PAGE_ALIGN((long) &__init_begin)) >> 10,
189 (int)(PAGE_ALIGN((unsigned long)(&__init_begin))),
190 (int)(addr - PAGE_SIZE));
191#endif
192}
193
diff --git a/arch/m68knommu/mm/kmap.c b/arch/m68knommu/mm/kmap.c
deleted file mode 100644
index ece8d5ad4e6c..000000000000
--- a/arch/m68knommu/mm/kmap.c
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * linux/arch/m68knommu/mm/kmap.c
3 *
4 * Copyright (C) 2000 Lineo, <davidm@snapgear.com>
5 * Copyright (C) 2000-2002 David McCullough <davidm@snapgear.com>
6 */
7
8#include <linux/mm.h>
9#include <linux/kernel.h>
10#include <linux/string.h>
11#include <linux/types.h>
12#include <linux/vmalloc.h>
13
14#include <asm/setup.h>
15#include <asm/segment.h>
16#include <asm/page.h>
17#include <asm/pgalloc.h>
18#include <asm/io.h>
19#include <asm/system.h>
20
21#undef DEBUG
22
23/*
24 * Map some physical address range into the kernel address space.
25 */
26void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
27{
28 return (void *)physaddr;
29}
30
31/*
32 * Unmap a ioremap()ed region again.
33 */
34void iounmap(void *addr)
35{
36}
37
38/*
39 * Set new cache mode for some kernel address space.
40 * The caller must push data for that range itself, if such data may already
41 * be in the cache.
42 */
43void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
44{
45}
diff --git a/arch/m68knommu/platform/5206/Makefile b/arch/m68knommu/platform/5206/Makefile
deleted file mode 100644
index b5db05625cfa..000000000000
--- a/arch/m68knommu/platform/5206/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
18
diff --git a/arch/m68knommu/platform/5206/config.c b/arch/m68knommu/platform/5206/config.c
deleted file mode 100644
index 9c335465e66d..000000000000
--- a/arch/m68knommu/platform/5206/config.c
+++ /dev/null
@@ -1,121 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5206/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000-2001, Lineo Inc. (www.lineo.com)
8 */
9
10/***************************************************************************/
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <asm/machdep.h>
17#include <asm/coldfire.h>
18#include <asm/mcfsim.h>
19#include <asm/mcfuart.h>
20
21/***************************************************************************/
22
23static struct mcf_platform_uart m5206_uart_platform[] = {
24 {
25 .mapbase = MCF_MBAR + MCFUART_BASE1,
26 .irq = 73,
27 },
28 {
29 .mapbase = MCF_MBAR + MCFUART_BASE2,
30 .irq = 74,
31 },
32 { },
33};
34
35static struct platform_device m5206_uart = {
36 .name = "mcfuart",
37 .id = 0,
38 .dev.platform_data = m5206_uart_platform,
39};
40
41static struct platform_device *m5206_devices[] __initdata = {
42 &m5206_uart,
43};
44
45/***************************************************************************/
46
47static void __init m5206_uart_init_line(int line, int irq)
48{
49 if (line == 0) {
50 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
51 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
52 mcf_mapirq2imr(irq, MCFINTC_UART0);
53 } else if (line == 1) {
54 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
55 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
56 mcf_mapirq2imr(irq, MCFINTC_UART1);
57 }
58}
59
60static void __init m5206_uarts_init(void)
61{
62 const int nrlines = ARRAY_SIZE(m5206_uart_platform);
63 int line;
64
65 for (line = 0; (line < nrlines); line++)
66 m5206_uart_init_line(line, m5206_uart_platform[line].irq);
67}
68
69/***************************************************************************/
70
71static void __init m5206_timers_init(void)
72{
73 /* Timer1 is always used as system timer */
74 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
75 MCF_MBAR + MCFSIM_TIMER1ICR);
76 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
77
78#ifdef CONFIG_HIGHPROFILE
79 /* Timer2 is to be used as a high speed profile timer */
80 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
81 MCF_MBAR + MCFSIM_TIMER2ICR);
82 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
83#endif
84}
85
86/***************************************************************************/
87
88void m5206_cpu_reset(void)
89{
90 local_irq_disable();
91 /* Set watchdog to soft reset, and enabled */
92 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
93 for (;;)
94 /* wait for watchdog to timeout */;
95}
96
97/***************************************************************************/
98
99void __init config_BSP(char *commandp, int size)
100{
101 mach_reset = m5206_cpu_reset;
102 m5206_timers_init();
103 m5206_uarts_init();
104
105 /* Only support the external interrupts on their primary level */
106 mcf_mapirq2imr(25, MCFINTC_EINT1);
107 mcf_mapirq2imr(28, MCFINTC_EINT4);
108 mcf_mapirq2imr(31, MCFINTC_EINT7);
109}
110
111/***************************************************************************/
112
113static int __init init_BSP(void)
114{
115 platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices));
116 return 0;
117}
118
119arch_initcall(init_BSP);
120
121/***************************************************************************/
diff --git a/arch/m68knommu/platform/5206/gpio.c b/arch/m68knommu/platform/5206/gpio.c
deleted file mode 100644
index b9ab4a120f28..000000000000
--- a/arch/m68knommu/platform/5206/gpio.c
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PP",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 8,
34 },
35 .pddr = (void __iomem *) MCFSIM_PADDR,
36 .podr = (void __iomem *) MCFSIM_PADAT,
37 .ppdr = (void __iomem *) MCFSIM_PADAT,
38 },
39};
40
41static int __init mcf_gpio_init(void)
42{
43 unsigned i = 0;
44 while (i < ARRAY_SIZE(mcf_gpio_chips))
45 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
46 return 0;
47}
48
49core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5206e/Makefile b/arch/m68knommu/platform/5206e/Makefile
deleted file mode 100644
index b5db05625cfa..000000000000
--- a/arch/m68knommu/platform/5206e/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
18
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c
deleted file mode 100644
index 942397984c66..000000000000
--- a/arch/m68knommu/platform/5206e/config.c
+++ /dev/null
@@ -1,127 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5206e/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/io.h>
15#include <asm/machdep.h>
16#include <asm/coldfire.h>
17#include <asm/mcfsim.h>
18#include <asm/mcfuart.h>
19#include <asm/mcfdma.h>
20
21/***************************************************************************/
22
23static struct mcf_platform_uart m5206e_uart_platform[] = {
24 {
25 .mapbase = MCF_MBAR + MCFUART_BASE1,
26 .irq = 73,
27 },
28 {
29 .mapbase = MCF_MBAR + MCFUART_BASE2,
30 .irq = 74,
31 },
32 { },
33};
34
35static struct platform_device m5206e_uart = {
36 .name = "mcfuart",
37 .id = 0,
38 .dev.platform_data = m5206e_uart_platform,
39};
40
41static struct platform_device *m5206e_devices[] __initdata = {
42 &m5206e_uart,
43};
44
45/***************************************************************************/
46
47static void __init m5206e_uart_init_line(int line, int irq)
48{
49 if (line == 0) {
50 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
51 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
52 mcf_mapirq2imr(irq, MCFINTC_UART0);
53 } else if (line == 1) {
54 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
55 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
56 mcf_mapirq2imr(irq, MCFINTC_UART1);
57 }
58}
59
60static void __init m5206e_uarts_init(void)
61{
62 const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
63 int line;
64
65 for (line = 0; (line < nrlines); line++)
66 m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
67}
68
69/***************************************************************************/
70
71static void __init m5206e_timers_init(void)
72{
73 /* Timer1 is always used as system timer */
74 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
75 MCF_MBAR + MCFSIM_TIMER1ICR);
76 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
77
78#ifdef CONFIG_HIGHPROFILE
79 /* Timer2 is to be used as a high speed profile timer */
80 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
81 MCF_MBAR + MCFSIM_TIMER2ICR);
82 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
83#endif
84}
85
86/***************************************************************************/
87
88void m5206e_cpu_reset(void)
89{
90 local_irq_disable();
91 /* Set watchdog to soft reset, and enabled */
92 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
93 for (;;)
94 /* wait for watchdog to timeout */;
95}
96
97/***************************************************************************/
98
99void __init config_BSP(char *commandp, int size)
100{
101#if defined(CONFIG_NETtel)
102 /* Copy command line from FLASH to local buffer... */
103 memcpy(commandp, (char *) 0xf0004000, size);
104 commandp[size-1] = 0;
105#endif /* CONFIG_NETtel */
106
107 mach_reset = m5206e_cpu_reset;
108 m5206e_timers_init();
109 m5206e_uarts_init();
110
111 /* Only support the external interrupts on their primary level */
112 mcf_mapirq2imr(25, MCFINTC_EINT1);
113 mcf_mapirq2imr(28, MCFINTC_EINT4);
114 mcf_mapirq2imr(31, MCFINTC_EINT7);
115}
116
117/***************************************************************************/
118
119static int __init init_BSP(void)
120{
121 platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
122 return 0;
123}
124
125arch_initcall(init_BSP);
126
127/***************************************************************************/
diff --git a/arch/m68knommu/platform/5206e/gpio.c b/arch/m68knommu/platform/5206e/gpio.c
deleted file mode 100644
index b9ab4a120f28..000000000000
--- a/arch/m68knommu/platform/5206e/gpio.c
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PP",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 8,
34 },
35 .pddr = (void __iomem *) MCFSIM_PADDR,
36 .podr = (void __iomem *) MCFSIM_PADAT,
37 .ppdr = (void __iomem *) MCFSIM_PADAT,
38 },
39};
40
41static int __init mcf_gpio_init(void)
42{
43 unsigned i = 0;
44 while (i < ARRAY_SIZE(mcf_gpio_chips))
45 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
46 return 0;
47}
48
49core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/520x/Makefile b/arch/m68knommu/platform/520x/Makefile
deleted file mode 100644
index ad3f4e5a57ce..000000000000
--- a/arch/m68knommu/platform/520x/Makefile
+++ /dev/null
@@ -1,17 +0,0 @@
1#
2# Makefile for the M5208 specific file.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c
deleted file mode 100644
index 621238f1a219..000000000000
--- a/arch/m68knommu/platform/520x/config.c
+++ /dev/null
@@ -1,311 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/520x/config.c
5 *
6 * Copyright (C) 2005, Freescale (www.freescale.com)
7 * Copyright (C) 2005, Intec Automation (mike@steroidmicros.com)
8 * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
9 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
10 */
11
12/***************************************************************************/
13
14#include <linux/kernel.h>
15#include <linux/param.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/spi/spi.h>
19#include <linux/gpio.h>
20#include <asm/machdep.h>
21#include <asm/coldfire.h>
22#include <asm/mcfsim.h>
23#include <asm/mcfuart.h>
24#include <asm/mcfqspi.h>
25
26/***************************************************************************/
27
28static struct mcf_platform_uart m520x_uart_platform[] = {
29 {
30 .mapbase = MCFUART_BASE1,
31 .irq = MCFINT_VECBASE + MCFINT_UART0,
32 },
33 {
34 .mapbase = MCFUART_BASE2,
35 .irq = MCFINT_VECBASE + MCFINT_UART1,
36 },
37 {
38 .mapbase = MCFUART_BASE3,
39 .irq = MCFINT_VECBASE + MCFINT_UART2,
40 },
41 { },
42};
43
44static struct platform_device m520x_uart = {
45 .name = "mcfuart",
46 .id = 0,
47 .dev.platform_data = m520x_uart_platform,
48};
49
50static struct resource m520x_fec_resources[] = {
51 {
52 .start = MCFFEC_BASE,
53 .end = MCFFEC_BASE + MCFFEC_SIZE - 1,
54 .flags = IORESOURCE_MEM,
55 },
56 {
57 .start = 64 + 36,
58 .end = 64 + 36,
59 .flags = IORESOURCE_IRQ,
60 },
61 {
62 .start = 64 + 40,
63 .end = 64 + 40,
64 .flags = IORESOURCE_IRQ,
65 },
66 {
67 .start = 64 + 42,
68 .end = 64 + 42,
69 .flags = IORESOURCE_IRQ,
70 },
71};
72
73static struct platform_device m520x_fec = {
74 .name = "fec",
75 .id = 0,
76 .num_resources = ARRAY_SIZE(m520x_fec_resources),
77 .resource = m520x_fec_resources,
78};
79
80#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
81static struct resource m520x_qspi_resources[] = {
82 {
83 .start = MCFQSPI_IOBASE,
84 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
85 .flags = IORESOURCE_MEM,
86 },
87 {
88 .start = MCFINT_VECBASE + MCFINT_QSPI,
89 .end = MCFINT_VECBASE + MCFINT_QSPI,
90 .flags = IORESOURCE_IRQ,
91 },
92};
93
94#define MCFQSPI_CS0 62
95#define MCFQSPI_CS1 63
96#define MCFQSPI_CS2 44
97
98static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control)
99{
100 int status;
101
102 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
103 if (status) {
104 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
105 goto fail0;
106 }
107 status = gpio_direction_output(MCFQSPI_CS0, 1);
108 if (status) {
109 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
110 goto fail1;
111 }
112
113 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
114 if (status) {
115 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
116 goto fail1;
117 }
118 status = gpio_direction_output(MCFQSPI_CS1, 1);
119 if (status) {
120 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
121 goto fail2;
122 }
123
124 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
125 if (status) {
126 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
127 goto fail2;
128 }
129 status = gpio_direction_output(MCFQSPI_CS2, 1);
130 if (status) {
131 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
132 goto fail3;
133 }
134
135 return 0;
136
137fail3:
138 gpio_free(MCFQSPI_CS2);
139fail2:
140 gpio_free(MCFQSPI_CS1);
141fail1:
142 gpio_free(MCFQSPI_CS0);
143fail0:
144 return status;
145}
146
147static void m520x_cs_teardown(struct mcfqspi_cs_control *cs_control)
148{
149 gpio_free(MCFQSPI_CS2);
150 gpio_free(MCFQSPI_CS1);
151 gpio_free(MCFQSPI_CS0);
152}
153
154static void m520x_cs_select(struct mcfqspi_cs_control *cs_control,
155 u8 chip_select, bool cs_high)
156{
157 switch (chip_select) {
158 case 0:
159 gpio_set_value(MCFQSPI_CS0, cs_high);
160 break;
161 case 1:
162 gpio_set_value(MCFQSPI_CS1, cs_high);
163 break;
164 case 2:
165 gpio_set_value(MCFQSPI_CS2, cs_high);
166 break;
167 }
168}
169
170static void m520x_cs_deselect(struct mcfqspi_cs_control *cs_control,
171 u8 chip_select, bool cs_high)
172{
173 switch (chip_select) {
174 case 0:
175 gpio_set_value(MCFQSPI_CS0, !cs_high);
176 break;
177 case 1:
178 gpio_set_value(MCFQSPI_CS1, !cs_high);
179 break;
180 case 2:
181 gpio_set_value(MCFQSPI_CS2, !cs_high);
182 break;
183 }
184}
185
186static struct mcfqspi_cs_control m520x_cs_control = {
187 .setup = m520x_cs_setup,
188 .teardown = m520x_cs_teardown,
189 .select = m520x_cs_select,
190 .deselect = m520x_cs_deselect,
191};
192
193static struct mcfqspi_platform_data m520x_qspi_data = {
194 .bus_num = 0,
195 .num_chipselect = 3,
196 .cs_control = &m520x_cs_control,
197};
198
199static struct platform_device m520x_qspi = {
200 .name = "mcfqspi",
201 .id = 0,
202 .num_resources = ARRAY_SIZE(m520x_qspi_resources),
203 .resource = m520x_qspi_resources,
204 .dev.platform_data = &m520x_qspi_data,
205};
206
207static void __init m520x_qspi_init(void)
208{
209 u16 par;
210 /* setup Port QS for QSPI with gpio CS control */
211 writeb(0x3f, MCF_GPIO_PAR_QSPI);
212 /* make U1CTS and U2RTS gpio for cs_control */
213 par = readw(MCF_GPIO_PAR_UART);
214 par &= 0x00ff;
215 writew(par, MCF_GPIO_PAR_UART);
216}
217#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
218
219
220static struct platform_device *m520x_devices[] __initdata = {
221 &m520x_uart,
222 &m520x_fec,
223#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
224 &m520x_qspi,
225#endif
226};
227
228/***************************************************************************/
229
230static void __init m520x_uart_init_line(int line, int irq)
231{
232 u16 par;
233 u8 par2;
234
235 switch (line) {
236 case 0:
237 par = readw(MCF_GPIO_PAR_UART);
238 par |= MCF_GPIO_PAR_UART_PAR_UTXD0 |
239 MCF_GPIO_PAR_UART_PAR_URXD0;
240 writew(par, MCF_GPIO_PAR_UART);
241 break;
242 case 1:
243 par = readw(MCF_GPIO_PAR_UART);
244 par |= MCF_GPIO_PAR_UART_PAR_UTXD1 |
245 MCF_GPIO_PAR_UART_PAR_URXD1;
246 writew(par, MCF_GPIO_PAR_UART);
247 break;
248 case 2:
249 par2 = readb(MCF_GPIO_PAR_FECI2C);
250 par2 &= ~0x0F;
251 par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 |
252 MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2;
253 writeb(par2, MCF_GPIO_PAR_FECI2C);
254 break;
255 }
256}
257
258static void __init m520x_uarts_init(void)
259{
260 const int nrlines = ARRAY_SIZE(m520x_uart_platform);
261 int line;
262
263 for (line = 0; (line < nrlines); line++)
264 m520x_uart_init_line(line, m520x_uart_platform[line].irq);
265}
266
267/***************************************************************************/
268
269static void __init m520x_fec_init(void)
270{
271 u8 v;
272
273 /* Set multi-function pins to ethernet mode */
274 v = readb(MCF_GPIO_PAR_FEC);
275 writeb(v | 0xf0, MCF_GPIO_PAR_FEC);
276
277 v = readb(MCF_GPIO_PAR_FECI2C);
278 writeb(v | 0x0f, MCF_GPIO_PAR_FECI2C);
279}
280
281/***************************************************************************/
282
283static void m520x_cpu_reset(void)
284{
285 local_irq_disable();
286 __raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
287}
288
289/***************************************************************************/
290
291void __init config_BSP(char *commandp, int size)
292{
293 mach_reset = m520x_cpu_reset;
294 m520x_uarts_init();
295 m520x_fec_init();
296#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
297 m520x_qspi_init();
298#endif
299}
300
301/***************************************************************************/
302
303static int __init init_BSP(void)
304{
305 platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices));
306 return 0;
307}
308
309arch_initcall(init_BSP);
310
311/***************************************************************************/
diff --git a/arch/m68knommu/platform/520x/gpio.c b/arch/m68knommu/platform/520x/gpio.c
deleted file mode 100644
index d757328563d1..000000000000
--- a/arch/m68knommu/platform/520x/gpio.c
+++ /dev/null
@@ -1,211 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PIRQ",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 8,
34 },
35 .pddr = (void __iomem *) MCFEPORT_EPDDR,
36 .podr = (void __iomem *) MCFEPORT_EPDR,
37 .ppdr = (void __iomem *) MCFEPORT_EPPDR,
38 },
39 {
40 .gpio_chip = {
41 .label = "BUSCTL",
42 .request = mcf_gpio_request,
43 .free = mcf_gpio_free,
44 .direction_input = mcf_gpio_direction_input,
45 .direction_output = mcf_gpio_direction_output,
46 .get = mcf_gpio_get_value,
47 .set = mcf_gpio_set_value_fast,
48 .base = 8,
49 .ngpio = 4,
50 },
51 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
52 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
53 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
54 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
55 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
56 },
57 {
58 .gpio_chip = {
59 .label = "BE",
60 .request = mcf_gpio_request,
61 .free = mcf_gpio_free,
62 .direction_input = mcf_gpio_direction_input,
63 .direction_output = mcf_gpio_direction_output,
64 .get = mcf_gpio_get_value,
65 .set = mcf_gpio_set_value_fast,
66 .base = 16,
67 .ngpio = 4,
68 },
69 .pddr = (void __iomem *) MCFGPIO_PDDR_BE,
70 .podr = (void __iomem *) MCFGPIO_PODR_BE,
71 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BE,
72 .setr = (void __iomem *) MCFGPIO_PPDSDR_BE,
73 .clrr = (void __iomem *) MCFGPIO_PCLRR_BE,
74 },
75 {
76 .gpio_chip = {
77 .label = "CS",
78 .request = mcf_gpio_request,
79 .free = mcf_gpio_free,
80 .direction_input = mcf_gpio_direction_input,
81 .direction_output = mcf_gpio_direction_output,
82 .get = mcf_gpio_get_value,
83 .set = mcf_gpio_set_value_fast,
84 .base = 25,
85 .ngpio = 3,
86 },
87 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
88 .podr = (void __iomem *) MCFGPIO_PODR_CS,
89 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
90 .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
91 .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
92 },
93 {
94 .gpio_chip = {
95 .label = "FECI2C",
96 .request = mcf_gpio_request,
97 .free = mcf_gpio_free,
98 .direction_input = mcf_gpio_direction_input,
99 .direction_output = mcf_gpio_direction_output,
100 .get = mcf_gpio_get_value,
101 .set = mcf_gpio_set_value_fast,
102 .base = 32,
103 .ngpio = 4,
104 },
105 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
106 .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
107 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
108 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
109 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
110 },
111 {
112 .gpio_chip = {
113 .label = "QSPI",
114 .request = mcf_gpio_request,
115 .free = mcf_gpio_free,
116 .direction_input = mcf_gpio_direction_input,
117 .direction_output = mcf_gpio_direction_output,
118 .get = mcf_gpio_get_value,
119 .set = mcf_gpio_set_value_fast,
120 .base = 40,
121 .ngpio = 4,
122 },
123 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
124 .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
125 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
126 .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
127 .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
128 },
129 {
130 .gpio_chip = {
131 .label = "TIMER",
132 .request = mcf_gpio_request,
133 .free = mcf_gpio_free,
134 .direction_input = mcf_gpio_direction_input,
135 .direction_output = mcf_gpio_direction_output,
136 .get = mcf_gpio_get_value,
137 .set = mcf_gpio_set_value_fast,
138 .base = 48,
139 .ngpio = 4,
140 },
141 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
142 .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
143 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
144 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
145 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
146 },
147 {
148 .gpio_chip = {
149 .label = "UART",
150 .request = mcf_gpio_request,
151 .free = mcf_gpio_free,
152 .direction_input = mcf_gpio_direction_input,
153 .direction_output = mcf_gpio_direction_output,
154 .get = mcf_gpio_get_value,
155 .set = mcf_gpio_set_value_fast,
156 .base = 56,
157 .ngpio = 8,
158 },
159 .pddr = (void __iomem *) MCFGPIO_PDDR_UART,
160 .podr = (void __iomem *) MCFGPIO_PODR_UART,
161 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UART,
162 .setr = (void __iomem *) MCFGPIO_PPDSDR_UART,
163 .clrr = (void __iomem *) MCFGPIO_PCLRR_UART,
164 },
165 {
166 .gpio_chip = {
167 .label = "FECH",
168 .request = mcf_gpio_request,
169 .free = mcf_gpio_free,
170 .direction_input = mcf_gpio_direction_input,
171 .direction_output = mcf_gpio_direction_output,
172 .get = mcf_gpio_get_value,
173 .set = mcf_gpio_set_value_fast,
174 .base = 64,
175 .ngpio = 8,
176 },
177 .pddr = (void __iomem *) MCFGPIO_PDDR_FECH,
178 .podr = (void __iomem *) MCFGPIO_PODR_FECH,
179 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
180 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
181 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECH,
182 },
183 {
184 .gpio_chip = {
185 .label = "FECL",
186 .request = mcf_gpio_request,
187 .free = mcf_gpio_free,
188 .direction_input = mcf_gpio_direction_input,
189 .direction_output = mcf_gpio_direction_output,
190 .get = mcf_gpio_get_value,
191 .set = mcf_gpio_set_value_fast,
192 .base = 72,
193 .ngpio = 8,
194 },
195 .pddr = (void __iomem *) MCFGPIO_PDDR_FECL,
196 .podr = (void __iomem *) MCFGPIO_PODR_FECL,
197 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
198 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
199 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECL,
200 },
201};
202
203static int __init mcf_gpio_init(void)
204{
205 unsigned i = 0;
206 while (i < ARRAY_SIZE(mcf_gpio_chips))
207 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
208 return 0;
209}
210
211core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/523x/Makefile b/arch/m68knommu/platform/523x/Makefile
deleted file mode 100644
index c04b8f71c88c..000000000000
--- a/arch/m68knommu/platform/523x/Makefile
+++ /dev/null
@@ -1,17 +0,0 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c
deleted file mode 100644
index 418a76feb1e3..000000000000
--- a/arch/m68knommu/platform/523x/config.c
+++ /dev/null
@@ -1,293 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/523x/config.c
5 *
6 * Sub-architcture dependant initialization code for the Freescale
7 * 523x CPUs.
8 *
9 * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
15#include <linux/kernel.h>
16#include <linux/param.h>
17#include <linux/init.h>
18#include <linux/io.h>
19#include <linux/spi/spi.h>
20#include <linux/gpio.h>
21#include <asm/machdep.h>
22#include <asm/coldfire.h>
23#include <asm/mcfsim.h>
24#include <asm/mcfuart.h>
25#include <asm/mcfqspi.h>
26
27/***************************************************************************/
28
29static struct mcf_platform_uart m523x_uart_platform[] = {
30 {
31 .mapbase = MCFUART_BASE1,
32 .irq = MCFINT_VECBASE + MCFINT_UART0,
33 },
34 {
35 .mapbase = MCFUART_BASE2,
36 .irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
37 },
38 {
39 .mapbase = MCFUART_BASE3,
40 .irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
41 },
42 { },
43};
44
45static struct platform_device m523x_uart = {
46 .name = "mcfuart",
47 .id = 0,
48 .dev.platform_data = m523x_uart_platform,
49};
50
51static struct resource m523x_fec_resources[] = {
52 {
53 .start = MCFFEC_BASE,
54 .end = MCFFEC_BASE + MCFFEC_SIZE - 1,
55 .flags = IORESOURCE_MEM,
56 },
57 {
58 .start = 64 + 23,
59 .end = 64 + 23,
60 .flags = IORESOURCE_IRQ,
61 },
62 {
63 .start = 64 + 27,
64 .end = 64 + 27,
65 .flags = IORESOURCE_IRQ,
66 },
67 {
68 .start = 64 + 29,
69 .end = 64 + 29,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct platform_device m523x_fec = {
75 .name = "fec",
76 .id = 0,
77 .num_resources = ARRAY_SIZE(m523x_fec_resources),
78 .resource = m523x_fec_resources,
79};
80
81#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
82static struct resource m523x_qspi_resources[] = {
83 {
84 .start = MCFQSPI_IOBASE,
85 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
86 .flags = IORESOURCE_MEM,
87 },
88 {
89 .start = MCFINT_VECBASE + MCFINT_QSPI,
90 .end = MCFINT_VECBASE + MCFINT_QSPI,
91 .flags = IORESOURCE_IRQ,
92 },
93};
94
95#define MCFQSPI_CS0 91
96#define MCFQSPI_CS1 92
97#define MCFQSPI_CS2 103
98#define MCFQSPI_CS3 99
99
100static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control)
101{
102 int status;
103
104 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
105 if (status) {
106 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
107 goto fail0;
108 }
109 status = gpio_direction_output(MCFQSPI_CS0, 1);
110 if (status) {
111 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
112 goto fail1;
113 }
114
115 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
116 if (status) {
117 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
118 goto fail1;
119 }
120 status = gpio_direction_output(MCFQSPI_CS1, 1);
121 if (status) {
122 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
123 goto fail2;
124 }
125
126 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
127 if (status) {
128 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
129 goto fail2;
130 }
131 status = gpio_direction_output(MCFQSPI_CS2, 1);
132 if (status) {
133 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
134 goto fail3;
135 }
136
137 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
138 if (status) {
139 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
140 goto fail3;
141 }
142 status = gpio_direction_output(MCFQSPI_CS3, 1);
143 if (status) {
144 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
145 goto fail4;
146 }
147
148 return 0;
149
150fail4:
151 gpio_free(MCFQSPI_CS3);
152fail3:
153 gpio_free(MCFQSPI_CS2);
154fail2:
155 gpio_free(MCFQSPI_CS1);
156fail1:
157 gpio_free(MCFQSPI_CS0);
158fail0:
159 return status;
160}
161
162static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control)
163{
164 gpio_free(MCFQSPI_CS3);
165 gpio_free(MCFQSPI_CS2);
166 gpio_free(MCFQSPI_CS1);
167 gpio_free(MCFQSPI_CS0);
168}
169
170static void m523x_cs_select(struct mcfqspi_cs_control *cs_control,
171 u8 chip_select, bool cs_high)
172{
173 switch (chip_select) {
174 case 0:
175 gpio_set_value(MCFQSPI_CS0, cs_high);
176 break;
177 case 1:
178 gpio_set_value(MCFQSPI_CS1, cs_high);
179 break;
180 case 2:
181 gpio_set_value(MCFQSPI_CS2, cs_high);
182 break;
183 case 3:
184 gpio_set_value(MCFQSPI_CS3, cs_high);
185 break;
186 }
187}
188
189static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control,
190 u8 chip_select, bool cs_high)
191{
192 switch (chip_select) {
193 case 0:
194 gpio_set_value(MCFQSPI_CS0, !cs_high);
195 break;
196 case 1:
197 gpio_set_value(MCFQSPI_CS1, !cs_high);
198 break;
199 case 2:
200 gpio_set_value(MCFQSPI_CS2, !cs_high);
201 break;
202 case 3:
203 gpio_set_value(MCFQSPI_CS3, !cs_high);
204 break;
205 }
206}
207
208static struct mcfqspi_cs_control m523x_cs_control = {
209 .setup = m523x_cs_setup,
210 .teardown = m523x_cs_teardown,
211 .select = m523x_cs_select,
212 .deselect = m523x_cs_deselect,
213};
214
215static struct mcfqspi_platform_data m523x_qspi_data = {
216 .bus_num = 0,
217 .num_chipselect = 4,
218 .cs_control = &m523x_cs_control,
219};
220
221static struct platform_device m523x_qspi = {
222 .name = "mcfqspi",
223 .id = 0,
224 .num_resources = ARRAY_SIZE(m523x_qspi_resources),
225 .resource = m523x_qspi_resources,
226 .dev.platform_data = &m523x_qspi_data,
227};
228
229static void __init m523x_qspi_init(void)
230{
231 u16 par;
232
233 /* setup QSPS pins for QSPI with gpio CS control */
234 writeb(0x1f, MCFGPIO_PAR_QSPI);
235 /* and CS2 & CS3 as gpio */
236 par = readw(MCFGPIO_PAR_TIMER);
237 par &= 0x3f3f;
238 writew(par, MCFGPIO_PAR_TIMER);
239}
240#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
241
242static struct platform_device *m523x_devices[] __initdata = {
243 &m523x_uart,
244 &m523x_fec,
245#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
246 &m523x_qspi,
247#endif
248};
249
250/***************************************************************************/
251
252static void __init m523x_fec_init(void)
253{
254 u16 par;
255 u8 v;
256
257 /* Set multi-function pins to ethernet use */
258 par = readw(MCF_IPSBAR + 0x100082);
259 writew(par | 0xf00, MCF_IPSBAR + 0x100082);
260 v = readb(MCF_IPSBAR + 0x100078);
261 writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
262}
263
264/***************************************************************************/
265
266static void m523x_cpu_reset(void)
267{
268 local_irq_disable();
269 __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
270}
271
272/***************************************************************************/
273
274void __init config_BSP(char *commandp, int size)
275{
276 mach_reset = m523x_cpu_reset;
277}
278
279/***************************************************************************/
280
281static int __init init_BSP(void)
282{
283 m523x_fec_init();
284#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
285 m523x_qspi_init();
286#endif
287 platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
288 return 0;
289}
290
291arch_initcall(init_BSP);
292
293/***************************************************************************/
diff --git a/arch/m68knommu/platform/523x/gpio.c b/arch/m68knommu/platform/523x/gpio.c
deleted file mode 100644
index 327ebf142c8e..000000000000
--- a/arch/m68knommu/platform/523x/gpio.c
+++ /dev/null
@@ -1,284 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PIRQ",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .base = 1,
34 .ngpio = 7,
35 },
36 .pddr = (void __iomem *) MCFEPORT_EPDDR,
37 .podr = (void __iomem *) MCFEPORT_EPDR,
38 .ppdr = (void __iomem *) MCFEPORT_EPPDR,
39 },
40 {
41 .gpio_chip = {
42 .label = "ADDR",
43 .request = mcf_gpio_request,
44 .free = mcf_gpio_free,
45 .direction_input = mcf_gpio_direction_input,
46 .direction_output = mcf_gpio_direction_output,
47 .get = mcf_gpio_get_value,
48 .set = mcf_gpio_set_value_fast,
49 .base = 13,
50 .ngpio = 3,
51 },
52 .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
53 .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
54 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
55 .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
56 .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
57 },
58 {
59 .gpio_chip = {
60 .label = "DATAH",
61 .request = mcf_gpio_request,
62 .free = mcf_gpio_free,
63 .direction_input = mcf_gpio_direction_input,
64 .direction_output = mcf_gpio_direction_output,
65 .get = mcf_gpio_get_value,
66 .set = mcf_gpio_set_value_fast,
67 .base = 16,
68 .ngpio = 8,
69 },
70 .pddr = (void __iomem *) MCFGPIO_PDDR_DATAH,
71 .podr = (void __iomem *) MCFGPIO_PODR_DATAH,
72 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
73 .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
74 .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAH,
75 },
76 {
77 .gpio_chip = {
78 .label = "DATAL",
79 .request = mcf_gpio_request,
80 .free = mcf_gpio_free,
81 .direction_input = mcf_gpio_direction_input,
82 .direction_output = mcf_gpio_direction_output,
83 .get = mcf_gpio_get_value,
84 .set = mcf_gpio_set_value_fast,
85 .base = 24,
86 .ngpio = 8,
87 },
88 .pddr = (void __iomem *) MCFGPIO_PDDR_DATAL,
89 .podr = (void __iomem *) MCFGPIO_PODR_DATAL,
90 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
91 .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
92 .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAL,
93 },
94 {
95 .gpio_chip = {
96 .label = "BUSCTL",
97 .request = mcf_gpio_request,
98 .free = mcf_gpio_free,
99 .direction_input = mcf_gpio_direction_input,
100 .direction_output = mcf_gpio_direction_output,
101 .get = mcf_gpio_get_value,
102 .set = mcf_gpio_set_value_fast,
103 .base = 32,
104 .ngpio = 8,
105 },
106 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
107 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
108 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
109 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
110 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
111 },
112 {
113 .gpio_chip = {
114 .label = "BS",
115 .request = mcf_gpio_request,
116 .free = mcf_gpio_free,
117 .direction_input = mcf_gpio_direction_input,
118 .direction_output = mcf_gpio_direction_output,
119 .get = mcf_gpio_get_value,
120 .set = mcf_gpio_set_value_fast,
121 .base = 40,
122 .ngpio = 4,
123 },
124 .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
125 .podr = (void __iomem *) MCFGPIO_PODR_BS,
126 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
127 .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
128 .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
129 },
130 {
131 .gpio_chip = {
132 .label = "CS",
133 .request = mcf_gpio_request,
134 .free = mcf_gpio_free,
135 .direction_input = mcf_gpio_direction_input,
136 .direction_output = mcf_gpio_direction_output,
137 .get = mcf_gpio_get_value,
138 .set = mcf_gpio_set_value_fast,
139 .base = 49,
140 .ngpio = 7,
141 },
142 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
143 .podr = (void __iomem *) MCFGPIO_PODR_CS,
144 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
145 .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
146 .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
147 },
148 {
149 .gpio_chip = {
150 .label = "SDRAM",
151 .request = mcf_gpio_request,
152 .free = mcf_gpio_free,
153 .direction_input = mcf_gpio_direction_input,
154 .direction_output = mcf_gpio_direction_output,
155 .get = mcf_gpio_get_value,
156 .set = mcf_gpio_set_value_fast,
157 .base = 56,
158 .ngpio = 6,
159 },
160 .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
161 .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
162 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
163 .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
164 .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
165 },
166 {
167 .gpio_chip = {
168 .label = "FECI2C",
169 .request = mcf_gpio_request,
170 .free = mcf_gpio_free,
171 .direction_input = mcf_gpio_direction_input,
172 .direction_output = mcf_gpio_direction_output,
173 .get = mcf_gpio_get_value,
174 .set = mcf_gpio_set_value_fast,
175 .base = 64,
176 .ngpio = 4,
177 },
178 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
179 .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
180 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
181 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
182 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
183 },
184 {
185 .gpio_chip = {
186 .label = "UARTH",
187 .request = mcf_gpio_request,
188 .free = mcf_gpio_free,
189 .direction_input = mcf_gpio_direction_input,
190 .direction_output = mcf_gpio_direction_output,
191 .get = mcf_gpio_get_value,
192 .set = mcf_gpio_set_value_fast,
193 .base = 72,
194 .ngpio = 2,
195 },
196 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
197 .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
198 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
199 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
200 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
201 },
202 {
203 .gpio_chip = {
204 .label = "UARTL",
205 .request = mcf_gpio_request,
206 .free = mcf_gpio_free,
207 .direction_input = mcf_gpio_direction_input,
208 .direction_output = mcf_gpio_direction_output,
209 .get = mcf_gpio_get_value,
210 .set = mcf_gpio_set_value_fast,
211 .base = 80,
212 .ngpio = 8,
213 },
214 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
215 .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
216 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
217 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
218 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
219 },
220 {
221 .gpio_chip = {
222 .label = "QSPI",
223 .request = mcf_gpio_request,
224 .free = mcf_gpio_free,
225 .direction_input = mcf_gpio_direction_input,
226 .direction_output = mcf_gpio_direction_output,
227 .get = mcf_gpio_get_value,
228 .set = mcf_gpio_set_value_fast,
229 .base = 88,
230 .ngpio = 5,
231 },
232 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
233 .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
234 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
235 .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
236 .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
237 },
238 {
239 .gpio_chip = {
240 .label = "TIMER",
241 .request = mcf_gpio_request,
242 .free = mcf_gpio_free,
243 .direction_input = mcf_gpio_direction_input,
244 .direction_output = mcf_gpio_direction_output,
245 .get = mcf_gpio_get_value,
246 .set = mcf_gpio_set_value_fast,
247 .base = 96,
248 .ngpio = 8,
249 },
250 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
251 .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
252 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
253 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
254 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
255 },
256 {
257 .gpio_chip = {
258 .label = "ETPU",
259 .request = mcf_gpio_request,
260 .free = mcf_gpio_free,
261 .direction_input = mcf_gpio_direction_input,
262 .direction_output = mcf_gpio_direction_output,
263 .get = mcf_gpio_get_value,
264 .set = mcf_gpio_set_value_fast,
265 .base = 104,
266 .ngpio = 3,
267 },
268 .pddr = (void __iomem *) MCFGPIO_PDDR_ETPU,
269 .podr = (void __iomem *) MCFGPIO_PODR_ETPU,
270 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ETPU,
271 .setr = (void __iomem *) MCFGPIO_PPDSDR_ETPU,
272 .clrr = (void __iomem *) MCFGPIO_PCLRR_ETPU,
273 },
274};
275
276static int __init mcf_gpio_init(void)
277{
278 unsigned i = 0;
279 while (i < ARRAY_SIZE(mcf_gpio_chips))
280 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
281 return 0;
282}
283
284core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5249/Makefile b/arch/m68knommu/platform/5249/Makefile
deleted file mode 100644
index 4bed30fd0073..000000000000
--- a/arch/m68knommu/platform/5249/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o intc2.o
18
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c
deleted file mode 100644
index ceb31e5744a6..000000000000
--- a/arch/m68knommu/platform/5249/config.c
+++ /dev/null
@@ -1,330 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5249/config.c
5 *
6 * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/spi/spi.h>
16#include <linux/gpio.h>
17#include <asm/machdep.h>
18#include <asm/coldfire.h>
19#include <asm/mcfsim.h>
20#include <asm/mcfuart.h>
21#include <asm/mcfqspi.h>
22
23/***************************************************************************/
24
25static struct mcf_platform_uart m5249_uart_platform[] = {
26 {
27 .mapbase = MCF_MBAR + MCFUART_BASE1,
28 .irq = 73,
29 },
30 {
31 .mapbase = MCF_MBAR + MCFUART_BASE2,
32 .irq = 74,
33 },
34 { },
35};
36
37static struct platform_device m5249_uart = {
38 .name = "mcfuart",
39 .id = 0,
40 .dev.platform_data = m5249_uart_platform,
41};
42
43#ifdef CONFIG_M5249C3
44
45static struct resource m5249_smc91x_resources[] = {
46 {
47 .start = 0xe0000300,
48 .end = 0xe0000300 + 0x100,
49 .flags = IORESOURCE_MEM,
50 },
51 {
52 .start = MCFINTC2_GPIOIRQ6,
53 .end = MCFINTC2_GPIOIRQ6,
54 .flags = IORESOURCE_IRQ,
55 },
56};
57
58static struct platform_device m5249_smc91x = {
59 .name = "smc91x",
60 .id = 0,
61 .num_resources = ARRAY_SIZE(m5249_smc91x_resources),
62 .resource = m5249_smc91x_resources,
63};
64
65#endif /* CONFIG_M5249C3 */
66
67#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
68static struct resource m5249_qspi_resources[] = {
69 {
70 .start = MCFQSPI_IOBASE,
71 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
72 .flags = IORESOURCE_MEM,
73 },
74 {
75 .start = MCF_IRQ_QSPI,
76 .end = MCF_IRQ_QSPI,
77 .flags = IORESOURCE_IRQ,
78 },
79};
80
81#define MCFQSPI_CS0 29
82#define MCFQSPI_CS1 24
83#define MCFQSPI_CS2 21
84#define MCFQSPI_CS3 22
85
86static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control)
87{
88 int status;
89
90 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
91 if (status) {
92 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
93 goto fail0;
94 }
95 status = gpio_direction_output(MCFQSPI_CS0, 1);
96 if (status) {
97 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
98 goto fail1;
99 }
100
101 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
102 if (status) {
103 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
104 goto fail1;
105 }
106 status = gpio_direction_output(MCFQSPI_CS1, 1);
107 if (status) {
108 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
109 goto fail2;
110 }
111
112 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
113 if (status) {
114 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
115 goto fail2;
116 }
117 status = gpio_direction_output(MCFQSPI_CS2, 1);
118 if (status) {
119 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
120 goto fail3;
121 }
122
123 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
124 if (status) {
125 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
126 goto fail3;
127 }
128 status = gpio_direction_output(MCFQSPI_CS3, 1);
129 if (status) {
130 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
131 goto fail4;
132 }
133
134 return 0;
135
136fail4:
137 gpio_free(MCFQSPI_CS3);
138fail3:
139 gpio_free(MCFQSPI_CS2);
140fail2:
141 gpio_free(MCFQSPI_CS1);
142fail1:
143 gpio_free(MCFQSPI_CS0);
144fail0:
145 return status;
146}
147
148static void m5249_cs_teardown(struct mcfqspi_cs_control *cs_control)
149{
150 gpio_free(MCFQSPI_CS3);
151 gpio_free(MCFQSPI_CS2);
152 gpio_free(MCFQSPI_CS1);
153 gpio_free(MCFQSPI_CS0);
154}
155
156static void m5249_cs_select(struct mcfqspi_cs_control *cs_control,
157 u8 chip_select, bool cs_high)
158{
159 switch (chip_select) {
160 case 0:
161 gpio_set_value(MCFQSPI_CS0, cs_high);
162 break;
163 case 1:
164 gpio_set_value(MCFQSPI_CS1, cs_high);
165 break;
166 case 2:
167 gpio_set_value(MCFQSPI_CS2, cs_high);
168 break;
169 case 3:
170 gpio_set_value(MCFQSPI_CS3, cs_high);
171 break;
172 }
173}
174
175static void m5249_cs_deselect(struct mcfqspi_cs_control *cs_control,
176 u8 chip_select, bool cs_high)
177{
178 switch (chip_select) {
179 case 0:
180 gpio_set_value(MCFQSPI_CS0, !cs_high);
181 break;
182 case 1:
183 gpio_set_value(MCFQSPI_CS1, !cs_high);
184 break;
185 case 2:
186 gpio_set_value(MCFQSPI_CS2, !cs_high);
187 break;
188 case 3:
189 gpio_set_value(MCFQSPI_CS3, !cs_high);
190 break;
191 }
192}
193
194static struct mcfqspi_cs_control m5249_cs_control = {
195 .setup = m5249_cs_setup,
196 .teardown = m5249_cs_teardown,
197 .select = m5249_cs_select,
198 .deselect = m5249_cs_deselect,
199};
200
201static struct mcfqspi_platform_data m5249_qspi_data = {
202 .bus_num = 0,
203 .num_chipselect = 4,
204 .cs_control = &m5249_cs_control,
205};
206
207static struct platform_device m5249_qspi = {
208 .name = "mcfqspi",
209 .id = 0,
210 .num_resources = ARRAY_SIZE(m5249_qspi_resources),
211 .resource = m5249_qspi_resources,
212 .dev.platform_data = &m5249_qspi_data,
213};
214
215static void __init m5249_qspi_init(void)
216{
217 /* QSPI irq setup */
218 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0,
219 MCF_MBAR + MCFSIM_QSPIICR);
220 mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
221}
222#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
223
224
225static struct platform_device *m5249_devices[] __initdata = {
226 &m5249_uart,
227#ifdef CONFIG_M5249C3
228 &m5249_smc91x,
229#endif
230#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
231 &m5249_qspi,
232#endif
233};
234
235/***************************************************************************/
236
237static void __init m5249_uart_init_line(int line, int irq)
238{
239 if (line == 0) {
240 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
241 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
242 mcf_mapirq2imr(irq, MCFINTC_UART0);
243 } else if (line == 1) {
244 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
245 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
246 mcf_mapirq2imr(irq, MCFINTC_UART1);
247 }
248}
249
250static void __init m5249_uarts_init(void)
251{
252 const int nrlines = ARRAY_SIZE(m5249_uart_platform);
253 int line;
254
255 for (line = 0; (line < nrlines); line++)
256 m5249_uart_init_line(line, m5249_uart_platform[line].irq);
257}
258
259/***************************************************************************/
260
261#ifdef CONFIG_M5249C3
262
263static void __init m5249_smc91x_init(void)
264{
265 u32 gpio;
266
267 /* Set the GPIO line as interrupt source for smc91x device */
268 gpio = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
269 writel(gpio | 0x40, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
270
271 gpio = readl(MCF_MBAR2 + MCFSIM2_INTLEVEL5);
272 writel(gpio | 0x04000000, MCF_MBAR2 + MCFSIM2_INTLEVEL5);
273}
274
275#endif /* CONFIG_M5249C3 */
276
277/***************************************************************************/
278
279static void __init m5249_timers_init(void)
280{
281 /* Timer1 is always used as system timer */
282 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
283 MCF_MBAR + MCFSIM_TIMER1ICR);
284 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
285
286#ifdef CONFIG_HIGHPROFILE
287 /* Timer2 is to be used as a high speed profile timer */
288 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
289 MCF_MBAR + MCFSIM_TIMER2ICR);
290 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
291#endif
292}
293
294/***************************************************************************/
295
296void m5249_cpu_reset(void)
297{
298 local_irq_disable();
299 /* Set watchdog to soft reset, and enabled */
300 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
301 for (;;)
302 /* wait for watchdog to timeout */;
303}
304
305/***************************************************************************/
306
307void __init config_BSP(char *commandp, int size)
308{
309 mach_reset = m5249_cpu_reset;
310 m5249_timers_init();
311 m5249_uarts_init();
312#ifdef CONFIG_M5249C3
313 m5249_smc91x_init();
314#endif
315#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
316 m5249_qspi_init();
317#endif
318}
319
320/***************************************************************************/
321
322static int __init init_BSP(void)
323{
324 platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
325 return 0;
326}
327
328arch_initcall(init_BSP);
329
330/***************************************************************************/
diff --git a/arch/m68knommu/platform/5249/gpio.c b/arch/m68knommu/platform/5249/gpio.c
deleted file mode 100644
index 2b56c6ef65bf..000000000000
--- a/arch/m68knommu/platform/5249/gpio.c
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "GPIO0",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 32,
34 },
35 .pddr = (void __iomem *) MCFSIM2_GPIOENABLE,
36 .podr = (void __iomem *) MCFSIM2_GPIOWRITE,
37 .ppdr = (void __iomem *) MCFSIM2_GPIOREAD,
38 },
39 {
40 .gpio_chip = {
41 .label = "GPIO1",
42 .request = mcf_gpio_request,
43 .free = mcf_gpio_free,
44 .direction_input = mcf_gpio_direction_input,
45 .direction_output = mcf_gpio_direction_output,
46 .get = mcf_gpio_get_value,
47 .set = mcf_gpio_set_value,
48 .base = 32,
49 .ngpio = 32,
50 },
51 .pddr = (void __iomem *) MCFSIM2_GPIO1ENABLE,
52 .podr = (void __iomem *) MCFSIM2_GPIO1WRITE,
53 .ppdr = (void __iomem *) MCFSIM2_GPIO1READ,
54 },
55};
56
57static int __init mcf_gpio_init(void)
58{
59 unsigned i = 0;
60 while (i < ARRAY_SIZE(mcf_gpio_chips))
61 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
62 return 0;
63}
64
65core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5249/intc2.c b/arch/m68knommu/platform/5249/intc2.c
deleted file mode 100644
index 8f4b63e17366..000000000000
--- a/arch/m68knommu/platform/5249/intc2.c
+++ /dev/null
@@ -1,61 +0,0 @@
1/*
2 * intc2.c -- support for the 2nd INTC controller of the 5249
3 *
4 * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/io.h>
17#include <asm/coldfire.h>
18#include <asm/mcfsim.h>
19
20static void intc2_irq_gpio_mask(struct irq_data *d)
21{
22 u32 imr;
23 imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
24 imr &= ~(0x1 << (d->irq - MCFINTC2_GPIOIRQ0));
25 writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
26}
27
28static void intc2_irq_gpio_unmask(struct irq_data *d)
29{
30 u32 imr;
31 imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
32 imr |= (0x1 << (d->irq - MCFINTC2_GPIOIRQ0));
33 writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
34}
35
36static void intc2_irq_gpio_ack(struct irq_data *d)
37{
38 writel(0x1 << (d->irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR);
39}
40
41static struct irq_chip intc2_irq_gpio_chip = {
42 .name = "CF-INTC2",
43 .irq_mask = intc2_irq_gpio_mask,
44 .irq_unmask = intc2_irq_gpio_unmask,
45 .irq_ack = intc2_irq_gpio_ack,
46};
47
48static int __init mcf_intc2_init(void)
49{
50 int irq;
51
52 /* GPIO interrupt sources */
53 for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) {
54 set_irq_chip(irq, &intc2_irq_gpio_chip);
55 set_irq_handler(irq, handle_edge_irq);
56 }
57
58 return 0;
59}
60
61arch_initcall(mcf_intc2_init);
diff --git a/arch/m68knommu/platform/5272/Makefile b/arch/m68knommu/platform/5272/Makefile
deleted file mode 100644
index 34110fc14301..000000000000
--- a/arch/m68knommu/platform/5272/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o intc.o
18
diff --git a/arch/m68knommu/platform/5272/config.c b/arch/m68knommu/platform/5272/config.c
deleted file mode 100644
index 65bb582734e1..000000000000
--- a/arch/m68knommu/platform/5272/config.c
+++ /dev/null
@@ -1,176 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5272/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
8 */
9
10/***************************************************************************/
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/phy.h>
17#include <linux/phy_fixed.h>
18#include <asm/machdep.h>
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfuart.h>
22
23/***************************************************************************/
24
25/*
26 * Some platforms need software versions of the GPIO data registers.
27 */
28unsigned short ppdata;
29unsigned char ledbank = 0xff;
30
31/***************************************************************************/
32
33static struct mcf_platform_uart m5272_uart_platform[] = {
34 {
35 .mapbase = MCF_MBAR + MCFUART_BASE1,
36 .irq = MCF_IRQ_UART1,
37 },
38 {
39 .mapbase = MCF_MBAR + MCFUART_BASE2,
40 .irq = MCF_IRQ_UART2,
41 },
42 { },
43};
44
45static struct platform_device m5272_uart = {
46 .name = "mcfuart",
47 .id = 0,
48 .dev.platform_data = m5272_uart_platform,
49};
50
51static struct resource m5272_fec_resources[] = {
52 {
53 .start = MCF_MBAR + 0x840,
54 .end = MCF_MBAR + 0x840 + 0x1cf,
55 .flags = IORESOURCE_MEM,
56 },
57 {
58 .start = MCF_IRQ_ERX,
59 .end = MCF_IRQ_ERX,
60 .flags = IORESOURCE_IRQ,
61 },
62 {
63 .start = MCF_IRQ_ETX,
64 .end = MCF_IRQ_ETX,
65 .flags = IORESOURCE_IRQ,
66 },
67 {
68 .start = MCF_IRQ_ENTC,
69 .end = MCF_IRQ_ENTC,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct platform_device m5272_fec = {
75 .name = "fec",
76 .id = 0,
77 .num_resources = ARRAY_SIZE(m5272_fec_resources),
78 .resource = m5272_fec_resources,
79};
80
81static struct platform_device *m5272_devices[] __initdata = {
82 &m5272_uart,
83 &m5272_fec,
84};
85
86/***************************************************************************/
87
88static void __init m5272_uart_init_line(int line, int irq)
89{
90 u32 v;
91
92 if ((line >= 0) && (line < 2)) {
93 /* Enable the output lines for the serial ports */
94 v = readl(MCF_MBAR + MCFSIM_PBCNT);
95 v = (v & ~0x000000ff) | 0x00000055;
96 writel(v, MCF_MBAR + MCFSIM_PBCNT);
97
98 v = readl(MCF_MBAR + MCFSIM_PDCNT);
99 v = (v & ~0x000003fc) | 0x000002a8;
100 writel(v, MCF_MBAR + MCFSIM_PDCNT);
101 }
102}
103
104static void __init m5272_uarts_init(void)
105{
106 const int nrlines = ARRAY_SIZE(m5272_uart_platform);
107 int line;
108
109 for (line = 0; (line < nrlines); line++)
110 m5272_uart_init_line(line, m5272_uart_platform[line].irq);
111}
112
113/***************************************************************************/
114
115static void m5272_cpu_reset(void)
116{
117 local_irq_disable();
118 /* Set watchdog to reset, and enabled */
119 __raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
120 __raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
121 __raw_writew(0, MCF_MBAR + MCFSIM_WCR);
122 for (;;)
123 /* wait for watchdog to timeout */;
124}
125
126/***************************************************************************/
127
128void __init config_BSP(char *commandp, int size)
129{
130#if defined (CONFIG_MOD5272)
131 volatile unsigned char *pivrp;
132
133 /* Set base of device vectors to be 64 */
134 pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR);
135 *pivrp = 0x40;
136#endif
137
138#if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
139 /* Copy command line from FLASH to local buffer... */
140 memcpy(commandp, (char *) 0xf0004000, size);
141 commandp[size-1] = 0;
142#elif defined(CONFIG_CANCam)
143 /* Copy command line from FLASH to local buffer... */
144 memcpy(commandp, (char *) 0xf0010000, size);
145 commandp[size-1] = 0;
146#endif
147
148 mach_reset = m5272_cpu_reset;
149}
150
151/***************************************************************************/
152
153/*
154 * Some 5272 based boards have the FEC ethernet diectly connected to
155 * an ethernet switch. In this case we need to use the fixed phy type,
156 * and we need to declare it early in boot.
157 */
158static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
159 .link = 1,
160 .speed = 100,
161 .duplex = 0,
162};
163
164/***************************************************************************/
165
166static int __init init_BSP(void)
167{
168 m5272_uarts_init();
169 fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status);
170 platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
171 return 0;
172}
173
174arch_initcall(init_BSP);
175
176/***************************************************************************/
diff --git a/arch/m68knommu/platform/5272/gpio.c b/arch/m68knommu/platform/5272/gpio.c
deleted file mode 100644
index 57ac10a5d7f7..000000000000
--- a/arch/m68knommu/platform/5272/gpio.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PA",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 16,
34 },
35 .pddr = (void __iomem *) MCFSIM_PADDR,
36 .podr = (void __iomem *) MCFSIM_PADAT,
37 .ppdr = (void __iomem *) MCFSIM_PADAT,
38 },
39 {
40 .gpio_chip = {
41 .label = "PB",
42 .request = mcf_gpio_request,
43 .free = mcf_gpio_free,
44 .direction_input = mcf_gpio_direction_input,
45 .direction_output = mcf_gpio_direction_output,
46 .get = mcf_gpio_get_value,
47 .set = mcf_gpio_set_value,
48 .base = 16,
49 .ngpio = 16,
50 },
51 .pddr = (void __iomem *) MCFSIM_PBDDR,
52 .podr = (void __iomem *) MCFSIM_PBDAT,
53 .ppdr = (void __iomem *) MCFSIM_PBDAT,
54 },
55 {
56 .gpio_chip = {
57 .label = "PC",
58 .request = mcf_gpio_request,
59 .free = mcf_gpio_free,
60 .direction_input = mcf_gpio_direction_input,
61 .direction_output = mcf_gpio_direction_output,
62 .get = mcf_gpio_get_value,
63 .set = mcf_gpio_set_value,
64 .base = 32,
65 .ngpio = 16,
66 },
67 .pddr = (void __iomem *) MCFSIM_PCDDR,
68 .podr = (void __iomem *) MCFSIM_PCDAT,
69 .ppdr = (void __iomem *) MCFSIM_PCDAT,
70 },
71};
72
73static int __init mcf_gpio_init(void)
74{
75 unsigned i = 0;
76 while (i < ARRAY_SIZE(mcf_gpio_chips))
77 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
78 return 0;
79}
80
81core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5272/intc.c b/arch/m68knommu/platform/5272/intc.c
deleted file mode 100644
index 969ff0a467c6..000000000000
--- a/arch/m68knommu/platform/5272/intc.c
+++ /dev/null
@@ -1,187 +0,0 @@
1/*
2 * intc.c -- interrupt controller or ColdFire 5272 SoC
3 *
4 * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/kernel_stat.h>
16#include <linux/irq.h>
17#include <linux/io.h>
18#include <asm/coldfire.h>
19#include <asm/mcfsim.h>
20#include <asm/traps.h>
21
22/*
23 * The 5272 ColdFire interrupt controller is nothing like any other
24 * ColdFire interrupt controller - it truly is completely different.
25 * Given its age it is unlikely to be used on any other ColdFire CPU.
26 */
27
28/*
29 * The masking and priproty setting of interrupts on the 5272 is done
30 * via a set of 4 "Interrupt Controller Registers" (ICR). There is a
31 * loose mapping of vector number to register and internal bits, but
32 * a table is the easiest and quickest way to map them.
33 *
34 * Note that the external interrupts are edge triggered (unlike the
35 * internal interrupt sources which are level triggered). Which means
36 * they also need acknowledgeing via acknowledge bits.
37 */
38struct irqmap {
39 unsigned char icr;
40 unsigned char index;
41 unsigned char ack;
42};
43
44static struct irqmap intc_irqmap[MCFINT_VECMAX - MCFINT_VECBASE] = {
45 /*MCF_IRQ_SPURIOUS*/ { .icr = 0, .index = 0, .ack = 0, },
46 /*MCF_IRQ_EINT1*/ { .icr = MCFSIM_ICR1, .index = 28, .ack = 1, },
47 /*MCF_IRQ_EINT2*/ { .icr = MCFSIM_ICR1, .index = 24, .ack = 1, },
48 /*MCF_IRQ_EINT3*/ { .icr = MCFSIM_ICR1, .index = 20, .ack = 1, },
49 /*MCF_IRQ_EINT4*/ { .icr = MCFSIM_ICR1, .index = 16, .ack = 1, },
50 /*MCF_IRQ_TIMER1*/ { .icr = MCFSIM_ICR1, .index = 12, .ack = 0, },
51 /*MCF_IRQ_TIMER2*/ { .icr = MCFSIM_ICR1, .index = 8, .ack = 0, },
52 /*MCF_IRQ_TIMER3*/ { .icr = MCFSIM_ICR1, .index = 4, .ack = 0, },
53 /*MCF_IRQ_TIMER4*/ { .icr = MCFSIM_ICR1, .index = 0, .ack = 0, },
54 /*MCF_IRQ_UART1*/ { .icr = MCFSIM_ICR2, .index = 28, .ack = 0, },
55 /*MCF_IRQ_UART2*/ { .icr = MCFSIM_ICR2, .index = 24, .ack = 0, },
56 /*MCF_IRQ_PLIP*/ { .icr = MCFSIM_ICR2, .index = 20, .ack = 0, },
57 /*MCF_IRQ_PLIA*/ { .icr = MCFSIM_ICR2, .index = 16, .ack = 0, },
58 /*MCF_IRQ_USB0*/ { .icr = MCFSIM_ICR2, .index = 12, .ack = 0, },
59 /*MCF_IRQ_USB1*/ { .icr = MCFSIM_ICR2, .index = 8, .ack = 0, },
60 /*MCF_IRQ_USB2*/ { .icr = MCFSIM_ICR2, .index = 4, .ack = 0, },
61 /*MCF_IRQ_USB3*/ { .icr = MCFSIM_ICR2, .index = 0, .ack = 0, },
62 /*MCF_IRQ_USB4*/ { .icr = MCFSIM_ICR3, .index = 28, .ack = 0, },
63 /*MCF_IRQ_USB5*/ { .icr = MCFSIM_ICR3, .index = 24, .ack = 0, },
64 /*MCF_IRQ_USB6*/ { .icr = MCFSIM_ICR3, .index = 20, .ack = 0, },
65 /*MCF_IRQ_USB7*/ { .icr = MCFSIM_ICR3, .index = 16, .ack = 0, },
66 /*MCF_IRQ_DMA*/ { .icr = MCFSIM_ICR3, .index = 12, .ack = 0, },
67 /*MCF_IRQ_ERX*/ { .icr = MCFSIM_ICR3, .index = 8, .ack = 0, },
68 /*MCF_IRQ_ETX*/ { .icr = MCFSIM_ICR3, .index = 4, .ack = 0, },
69 /*MCF_IRQ_ENTC*/ { .icr = MCFSIM_ICR3, .index = 0, .ack = 0, },
70 /*MCF_IRQ_QSPI*/ { .icr = MCFSIM_ICR4, .index = 28, .ack = 0, },
71 /*MCF_IRQ_EINT5*/ { .icr = MCFSIM_ICR4, .index = 24, .ack = 1, },
72 /*MCF_IRQ_EINT6*/ { .icr = MCFSIM_ICR4, .index = 20, .ack = 1, },
73 /*MCF_IRQ_SWTO*/ { .icr = MCFSIM_ICR4, .index = 16, .ack = 0, },
74};
75
76/*
77 * The act of masking the interrupt also has a side effect of 'ack'ing
78 * an interrupt on this irq (for the external irqs). So this mask function
79 * is also an ack_mask function.
80 */
81static void intc_irq_mask(struct irq_data *d)
82{
83 unsigned int irq = d->irq;
84
85 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
86 u32 v;
87 irq -= MCFINT_VECBASE;
88 v = 0x8 << intc_irqmap[irq].index;
89 writel(v, MCF_MBAR + intc_irqmap[irq].icr);
90 }
91}
92
93static void intc_irq_unmask(struct irq_data *d)
94{
95 unsigned int irq = d->irq;
96
97 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
98 u32 v;
99 irq -= MCFINT_VECBASE;
100 v = 0xd << intc_irqmap[irq].index;
101 writel(v, MCF_MBAR + intc_irqmap[irq].icr);
102 }
103}
104
105static void intc_irq_ack(struct irq_data *d)
106{
107 unsigned int irq = d->irq;
108
109 /* Only external interrupts are acked */
110 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
111 irq -= MCFINT_VECBASE;
112 if (intc_irqmap[irq].ack) {
113 u32 v;
114 v = readl(MCF_MBAR + intc_irqmap[irq].icr);
115 v &= (0x7 << intc_irqmap[irq].index);
116 v |= (0x8 << intc_irqmap[irq].index);
117 writel(v, MCF_MBAR + intc_irqmap[irq].icr);
118 }
119 }
120}
121
122static int intc_irq_set_type(struct irq_data *d, unsigned int type)
123{
124 unsigned int irq = d->irq;
125
126 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
127 irq -= MCFINT_VECBASE;
128 if (intc_irqmap[irq].ack) {
129 u32 v;
130 v = readl(MCF_MBAR + MCFSIM_PITR);
131 if (type == IRQ_TYPE_EDGE_FALLING)
132 v &= ~(0x1 << (32 - irq));
133 else
134 v |= (0x1 << (32 - irq));
135 writel(v, MCF_MBAR + MCFSIM_PITR);
136 }
137 }
138 return 0;
139}
140
141/*
142 * Simple flow handler to deal with the external edge triggered interrupts.
143 * We need to be careful with the masking/acking due to the side effects
144 * of masking an interrupt.
145 */
146static void intc_external_irq(unsigned int irq, struct irq_desc *desc)
147{
148 get_irq_desc_chip(desc)->irq_ack(&desc->irq_data);
149 handle_simple_irq(irq, desc);
150}
151
152static struct irq_chip intc_irq_chip = {
153 .name = "CF-INTC",
154 .irq_mask = intc_irq_mask,
155 .irq_unmask = intc_irq_unmask,
156 .irq_mask_ack = intc_irq_mask,
157 .irq_ack = intc_irq_ack,
158 .irq_set_type = intc_irq_set_type,
159};
160
161void __init init_IRQ(void)
162{
163 int irq, edge;
164
165 init_vectors();
166
167 /* Mask all interrupt sources */
168 writel(0x88888888, MCF_MBAR + MCFSIM_ICR1);
169 writel(0x88888888, MCF_MBAR + MCFSIM_ICR2);
170 writel(0x88888888, MCF_MBAR + MCFSIM_ICR3);
171 writel(0x88888888, MCF_MBAR + MCFSIM_ICR4);
172
173 for (irq = 0; (irq < NR_IRQS); irq++) {
174 set_irq_chip(irq, &intc_irq_chip);
175 edge = 0;
176 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX))
177 edge = intc_irqmap[irq - MCFINT_VECBASE].ack;
178 if (edge) {
179 set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
180 set_irq_handler(irq, intc_external_irq);
181 } else {
182 set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
183 set_irq_handler(irq, handle_level_irq);
184 }
185 }
186}
187
diff --git a/arch/m68knommu/platform/527x/Makefile b/arch/m68knommu/platform/527x/Makefile
deleted file mode 100644
index 6ac4b57370ea..000000000000
--- a/arch/m68knommu/platform/527x/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
18
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c
deleted file mode 100644
index fa359593b613..000000000000
--- a/arch/m68knommu/platform/527x/config.c
+++ /dev/null
@@ -1,384 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/527x/config.c
5 *
6 * Sub-architcture dependant initialization code for the Freescale
7 * 5270/5271 CPUs.
8 *
9 * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
15#include <linux/kernel.h>
16#include <linux/param.h>
17#include <linux/init.h>
18#include <linux/io.h>
19#include <linux/spi/spi.h>
20#include <linux/gpio.h>
21#include <asm/machdep.h>
22#include <asm/coldfire.h>
23#include <asm/mcfsim.h>
24#include <asm/mcfuart.h>
25#include <asm/mcfqspi.h>
26
27/***************************************************************************/
28
29static struct mcf_platform_uart m527x_uart_platform[] = {
30 {
31 .mapbase = MCFUART_BASE1,
32 .irq = MCFINT_VECBASE + MCFINT_UART0,
33 },
34 {
35 .mapbase = MCFUART_BASE2,
36 .irq = MCFINT_VECBASE + MCFINT_UART1,
37 },
38 {
39 .mapbase = MCFUART_BASE3,
40 .irq = MCFINT_VECBASE + MCFINT_UART2,
41 },
42 { },
43};
44
45static struct platform_device m527x_uart = {
46 .name = "mcfuart",
47 .id = 0,
48 .dev.platform_data = m527x_uart_platform,
49};
50
51static struct resource m527x_fec0_resources[] = {
52 {
53 .start = MCFFEC_BASE0,
54 .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1,
55 .flags = IORESOURCE_MEM,
56 },
57 {
58 .start = 64 + 23,
59 .end = 64 + 23,
60 .flags = IORESOURCE_IRQ,
61 },
62 {
63 .start = 64 + 27,
64 .end = 64 + 27,
65 .flags = IORESOURCE_IRQ,
66 },
67 {
68 .start = 64 + 29,
69 .end = 64 + 29,
70 .flags = IORESOURCE_IRQ,
71 },
72};
73
74static struct resource m527x_fec1_resources[] = {
75 {
76 .start = MCFFEC_BASE1,
77 .end = MCFFEC_BASE1 + MCFFEC_SIZE1 - 1,
78 .flags = IORESOURCE_MEM,
79 },
80 {
81 .start = 128 + 23,
82 .end = 128 + 23,
83 .flags = IORESOURCE_IRQ,
84 },
85 {
86 .start = 128 + 27,
87 .end = 128 + 27,
88 .flags = IORESOURCE_IRQ,
89 },
90 {
91 .start = 128 + 29,
92 .end = 128 + 29,
93 .flags = IORESOURCE_IRQ,
94 },
95};
96
97static struct platform_device m527x_fec[] = {
98 {
99 .name = "fec",
100 .id = 0,
101 .num_resources = ARRAY_SIZE(m527x_fec0_resources),
102 .resource = m527x_fec0_resources,
103 },
104 {
105 .name = "fec",
106 .id = 1,
107 .num_resources = ARRAY_SIZE(m527x_fec1_resources),
108 .resource = m527x_fec1_resources,
109 },
110};
111
112#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
113static struct resource m527x_qspi_resources[] = {
114 {
115 .start = MCFQSPI_IOBASE,
116 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
117 .flags = IORESOURCE_MEM,
118 },
119 {
120 .start = MCFINT_VECBASE + MCFINT_QSPI,
121 .end = MCFINT_VECBASE + MCFINT_QSPI,
122 .flags = IORESOURCE_IRQ,
123 },
124};
125
126#if defined(CONFIG_M5271)
127#define MCFQSPI_CS0 91
128#define MCFQSPI_CS1 92
129#define MCFQSPI_CS2 99
130#define MCFQSPI_CS3 103
131#elif defined(CONFIG_M5275)
132#define MCFQSPI_CS0 59
133#define MCFQSPI_CS1 60
134#define MCFQSPI_CS2 61
135#define MCFQSPI_CS3 62
136#endif
137
138static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control)
139{
140 int status;
141
142 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
143 if (status) {
144 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
145 goto fail0;
146 }
147 status = gpio_direction_output(MCFQSPI_CS0, 1);
148 if (status) {
149 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
150 goto fail1;
151 }
152
153 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
154 if (status) {
155 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
156 goto fail1;
157 }
158 status = gpio_direction_output(MCFQSPI_CS1, 1);
159 if (status) {
160 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
161 goto fail2;
162 }
163
164 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
165 if (status) {
166 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
167 goto fail2;
168 }
169 status = gpio_direction_output(MCFQSPI_CS2, 1);
170 if (status) {
171 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
172 goto fail3;
173 }
174
175 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
176 if (status) {
177 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
178 goto fail3;
179 }
180 status = gpio_direction_output(MCFQSPI_CS3, 1);
181 if (status) {
182 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
183 goto fail4;
184 }
185
186 return 0;
187
188fail4:
189 gpio_free(MCFQSPI_CS3);
190fail3:
191 gpio_free(MCFQSPI_CS2);
192fail2:
193 gpio_free(MCFQSPI_CS1);
194fail1:
195 gpio_free(MCFQSPI_CS0);
196fail0:
197 return status;
198}
199
200static void m527x_cs_teardown(struct mcfqspi_cs_control *cs_control)
201{
202 gpio_free(MCFQSPI_CS3);
203 gpio_free(MCFQSPI_CS2);
204 gpio_free(MCFQSPI_CS1);
205 gpio_free(MCFQSPI_CS0);
206}
207
208static void m527x_cs_select(struct mcfqspi_cs_control *cs_control,
209 u8 chip_select, bool cs_high)
210{
211 switch (chip_select) {
212 case 0:
213 gpio_set_value(MCFQSPI_CS0, cs_high);
214 break;
215 case 1:
216 gpio_set_value(MCFQSPI_CS1, cs_high);
217 break;
218 case 2:
219 gpio_set_value(MCFQSPI_CS2, cs_high);
220 break;
221 case 3:
222 gpio_set_value(MCFQSPI_CS3, cs_high);
223 break;
224 }
225}
226
227static void m527x_cs_deselect(struct mcfqspi_cs_control *cs_control,
228 u8 chip_select, bool cs_high)
229{
230 switch (chip_select) {
231 case 0:
232 gpio_set_value(MCFQSPI_CS0, !cs_high);
233 break;
234 case 1:
235 gpio_set_value(MCFQSPI_CS1, !cs_high);
236 break;
237 case 2:
238 gpio_set_value(MCFQSPI_CS2, !cs_high);
239 break;
240 case 3:
241 gpio_set_value(MCFQSPI_CS3, !cs_high);
242 break;
243 }
244}
245
246static struct mcfqspi_cs_control m527x_cs_control = {
247 .setup = m527x_cs_setup,
248 .teardown = m527x_cs_teardown,
249 .select = m527x_cs_select,
250 .deselect = m527x_cs_deselect,
251};
252
253static struct mcfqspi_platform_data m527x_qspi_data = {
254 .bus_num = 0,
255 .num_chipselect = 4,
256 .cs_control = &m527x_cs_control,
257};
258
259static struct platform_device m527x_qspi = {
260 .name = "mcfqspi",
261 .id = 0,
262 .num_resources = ARRAY_SIZE(m527x_qspi_resources),
263 .resource = m527x_qspi_resources,
264 .dev.platform_data = &m527x_qspi_data,
265};
266
267static void __init m527x_qspi_init(void)
268{
269#if defined(CONFIG_M5271)
270 u16 par;
271
272 /* setup QSPS pins for QSPI with gpio CS control */
273 writeb(0x1f, MCFGPIO_PAR_QSPI);
274 /* and CS2 & CS3 as gpio */
275 par = readw(MCFGPIO_PAR_TIMER);
276 par &= 0x3f3f;
277 writew(par, MCFGPIO_PAR_TIMER);
278#elif defined(CONFIG_M5275)
279 /* setup QSPS pins for QSPI with gpio CS control */
280 writew(0x003e, MCFGPIO_PAR_QSPI);
281#endif
282}
283#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
284
285static struct platform_device *m527x_devices[] __initdata = {
286 &m527x_uart,
287 &m527x_fec[0],
288#ifdef CONFIG_FEC2
289 &m527x_fec[1],
290#endif
291#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
292 &m527x_qspi,
293#endif
294};
295
296/***************************************************************************/
297
298static void __init m527x_uart_init_line(int line, int irq)
299{
300 u16 sepmask;
301
302 if ((line < 0) || (line > 2))
303 return;
304
305 /*
306 * External Pin Mask Setting & Enable External Pin for Interface
307 */
308 sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
309 if (line == 0)
310 sepmask |= UART0_ENABLE_MASK;
311 else if (line == 1)
312 sepmask |= UART1_ENABLE_MASK;
313 else if (line == 2)
314 sepmask |= UART2_ENABLE_MASK;
315 writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART);
316}
317
318static void __init m527x_uarts_init(void)
319{
320 const int nrlines = ARRAY_SIZE(m527x_uart_platform);
321 int line;
322
323 for (line = 0; (line < nrlines); line++)
324 m527x_uart_init_line(line, m527x_uart_platform[line].irq);
325}
326
327/***************************************************************************/
328
329static void __init m527x_fec_init(void)
330{
331 u16 par;
332 u8 v;
333
334 /* Set multi-function pins to ethernet mode for fec0 */
335#if defined(CONFIG_M5271)
336 v = readb(MCF_IPSBAR + 0x100047);
337 writeb(v | 0xf0, MCF_IPSBAR + 0x100047);
338#else
339 par = readw(MCF_IPSBAR + 0x100082);
340 writew(par | 0xf00, MCF_IPSBAR + 0x100082);
341 v = readb(MCF_IPSBAR + 0x100078);
342 writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
343#endif
344
345#ifdef CONFIG_FEC2
346 /* Set multi-function pins to ethernet mode for fec1 */
347 par = readw(MCF_IPSBAR + 0x100082);
348 writew(par | 0xa0, MCF_IPSBAR + 0x100082);
349 v = readb(MCF_IPSBAR + 0x100079);
350 writeb(v | 0xc0, MCF_IPSBAR + 0x100079);
351#endif
352}
353
354/***************************************************************************/
355
356static void m527x_cpu_reset(void)
357{
358 local_irq_disable();
359 __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
360}
361
362/***************************************************************************/
363
364void __init config_BSP(char *commandp, int size)
365{
366 mach_reset = m527x_cpu_reset;
367 m527x_uarts_init();
368 m527x_fec_init();
369#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
370 m527x_qspi_init();
371#endif
372}
373
374/***************************************************************************/
375
376static int __init init_BSP(void)
377{
378 platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
379 return 0;
380}
381
382arch_initcall(init_BSP);
383
384/***************************************************************************/
diff --git a/arch/m68knommu/platform/527x/gpio.c b/arch/m68knommu/platform/527x/gpio.c
deleted file mode 100644
index 205da0aa0f2d..000000000000
--- a/arch/m68knommu/platform/527x/gpio.c
+++ /dev/null
@@ -1,609 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24#if defined(CONFIG_M5271)
25 {
26 .gpio_chip = {
27 .label = "PIRQ",
28 .request = mcf_gpio_request,
29 .free = mcf_gpio_free,
30 .direction_input = mcf_gpio_direction_input,
31 .direction_output = mcf_gpio_direction_output,
32 .get = mcf_gpio_get_value,
33 .set = mcf_gpio_set_value,
34 .base = 1,
35 .ngpio = 7,
36 },
37 .pddr = (void __iomem *) MCFEPORT_EPDDR,
38 .podr = (void __iomem *) MCFEPORT_EPDR,
39 .ppdr = (void __iomem *) MCFEPORT_EPPDR,
40 },
41 {
42 .gpio_chip = {
43 .label = "ADDR",
44 .request = mcf_gpio_request,
45 .free = mcf_gpio_free,
46 .direction_input = mcf_gpio_direction_input,
47 .direction_output = mcf_gpio_direction_output,
48 .get = mcf_gpio_get_value,
49 .set = mcf_gpio_set_value_fast,
50 .base = 13,
51 .ngpio = 3,
52 },
53 .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
54 .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
55 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
56 .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
57 .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
58 },
59 {
60 .gpio_chip = {
61 .label = "DATAH",
62 .request = mcf_gpio_request,
63 .free = mcf_gpio_free,
64 .direction_input = mcf_gpio_direction_input,
65 .direction_output = mcf_gpio_direction_output,
66 .get = mcf_gpio_get_value,
67 .set = mcf_gpio_set_value_fast,
68 .base = 16,
69 .ngpio = 8,
70 },
71 .pddr = (void __iomem *) MCFGPIO_PDDR_DATAH,
72 .podr = (void __iomem *) MCFGPIO_PODR_DATAH,
73 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
74 .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
75 .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAH,
76 },
77 {
78 .gpio_chip = {
79 .label = "DATAL",
80 .request = mcf_gpio_request,
81 .free = mcf_gpio_free,
82 .direction_input = mcf_gpio_direction_input,
83 .direction_output = mcf_gpio_direction_output,
84 .get = mcf_gpio_get_value,
85 .set = mcf_gpio_set_value_fast,
86 .base = 24,
87 .ngpio = 8,
88 },
89 .pddr = (void __iomem *) MCFGPIO_PDDR_DATAL,
90 .podr = (void __iomem *) MCFGPIO_PODR_DATAL,
91 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
92 .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
93 .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAL,
94 },
95 {
96 .gpio_chip = {
97 .label = "BUSCTL",
98 .request = mcf_gpio_request,
99 .free = mcf_gpio_free,
100 .direction_input = mcf_gpio_direction_input,
101 .direction_output = mcf_gpio_direction_output,
102 .get = mcf_gpio_get_value,
103 .set = mcf_gpio_set_value_fast,
104 .base = 32,
105 .ngpio = 8,
106 },
107 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
108 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
109 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
110 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
111 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
112 },
113 {
114 .gpio_chip = {
115 .label = "BS",
116 .request = mcf_gpio_request,
117 .free = mcf_gpio_free,
118 .direction_input = mcf_gpio_direction_input,
119 .direction_output = mcf_gpio_direction_output,
120 .get = mcf_gpio_get_value,
121 .set = mcf_gpio_set_value_fast,
122 .base = 40,
123 .ngpio = 4,
124 },
125 .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
126 .podr = (void __iomem *) MCFGPIO_PODR_BS,
127 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
128 .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
129 .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
130 },
131 {
132 .gpio_chip = {
133 .label = "CS",
134 .request = mcf_gpio_request,
135 .free = mcf_gpio_free,
136 .direction_input = mcf_gpio_direction_input,
137 .direction_output = mcf_gpio_direction_output,
138 .get = mcf_gpio_get_value,
139 .set = mcf_gpio_set_value_fast,
140 .base = 49,
141 .ngpio = 7,
142 },
143 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
144 .podr = (void __iomem *) MCFGPIO_PODR_CS,
145 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
146 .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
147 .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
148 },
149 {
150 .gpio_chip = {
151 .label = "SDRAM",
152 .request = mcf_gpio_request,
153 .free = mcf_gpio_free,
154 .direction_input = mcf_gpio_direction_input,
155 .direction_output = mcf_gpio_direction_output,
156 .get = mcf_gpio_get_value,
157 .set = mcf_gpio_set_value_fast,
158 .base = 56,
159 .ngpio = 6,
160 },
161 .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
162 .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
163 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
164 .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
165 .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
166 },
167 {
168 .gpio_chip = {
169 .label = "FECI2C",
170 .request = mcf_gpio_request,
171 .free = mcf_gpio_free,
172 .direction_input = mcf_gpio_direction_input,
173 .direction_output = mcf_gpio_direction_output,
174 .get = mcf_gpio_get_value,
175 .set = mcf_gpio_set_value_fast,
176 .base = 64,
177 .ngpio = 4,
178 },
179 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
180 .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
181 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
182 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
183 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
184 },
185 {
186 .gpio_chip = {
187 .label = "UARTH",
188 .request = mcf_gpio_request,
189 .free = mcf_gpio_free,
190 .direction_input = mcf_gpio_direction_input,
191 .direction_output = mcf_gpio_direction_output,
192 .get = mcf_gpio_get_value,
193 .set = mcf_gpio_set_value_fast,
194 .base = 72,
195 .ngpio = 2,
196 },
197 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
198 .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
199 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
200 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
201 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
202 },
203 {
204 .gpio_chip = {
205 .label = "UARTL",
206 .request = mcf_gpio_request,
207 .free = mcf_gpio_free,
208 .direction_input = mcf_gpio_direction_input,
209 .direction_output = mcf_gpio_direction_output,
210 .get = mcf_gpio_get_value,
211 .set = mcf_gpio_set_value_fast,
212 .base = 80,
213 .ngpio = 8,
214 },
215 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
216 .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
217 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
218 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
219 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
220 },
221 {
222 .gpio_chip = {
223 .label = "QSPI",
224 .request = mcf_gpio_request,
225 .free = mcf_gpio_free,
226 .direction_input = mcf_gpio_direction_input,
227 .direction_output = mcf_gpio_direction_output,
228 .get = mcf_gpio_get_value,
229 .set = mcf_gpio_set_value_fast,
230 .base = 88,
231 .ngpio = 5,
232 },
233 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
234 .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
235 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
236 .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
237 .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
238 },
239 {
240 .gpio_chip = {
241 .label = "TIMER",
242 .request = mcf_gpio_request,
243 .free = mcf_gpio_free,
244 .direction_input = mcf_gpio_direction_input,
245 .direction_output = mcf_gpio_direction_output,
246 .get = mcf_gpio_get_value,
247 .set = mcf_gpio_set_value_fast,
248 .base = 96,
249 .ngpio = 8,
250 },
251 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
252 .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
253 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
254 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
255 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
256 },
257#elif defined(CONFIG_M5275)
258 {
259 .gpio_chip = {
260 .label = "PIRQ",
261 .request = mcf_gpio_request,
262 .free = mcf_gpio_free,
263 .direction_input = mcf_gpio_direction_input,
264 .direction_output = mcf_gpio_direction_output,
265 .get = mcf_gpio_get_value,
266 .set = mcf_gpio_set_value,
267 .base = 1,
268 .ngpio = 7,
269 },
270 .pddr = (void __iomem *) MCFEPORT_EPDDR,
271 .podr = (void __iomem *) MCFEPORT_EPDR,
272 .ppdr = (void __iomem *) MCFEPORT_EPPDR,
273 },
274 {
275 .gpio_chip = {
276 .label = "BUSCTL",
277 .request = mcf_gpio_request,
278 .free = mcf_gpio_free,
279 .direction_input = mcf_gpio_direction_input,
280 .direction_output = mcf_gpio_direction_output,
281 .get = mcf_gpio_get_value,
282 .set = mcf_gpio_set_value_fast,
283 .base = 8,
284 .ngpio = 8,
285 },
286 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
287 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
288 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
289 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
290 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
291 },
292 {
293 .gpio_chip = {
294 .label = "ADDR",
295 .request = mcf_gpio_request,
296 .free = mcf_gpio_free,
297 .direction_input = mcf_gpio_direction_input,
298 .direction_output = mcf_gpio_direction_output,
299 .get = mcf_gpio_get_value,
300 .set = mcf_gpio_set_value_fast,
301 .base = 21,
302 .ngpio = 3,
303 },
304 .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
305 .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
306 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
307 .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
308 .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
309 },
310 {
311 .gpio_chip = {
312 .label = "CS",
313 .request = mcf_gpio_request,
314 .free = mcf_gpio_free,
315 .direction_input = mcf_gpio_direction_input,
316 .direction_output = mcf_gpio_direction_output,
317 .get = mcf_gpio_get_value,
318 .set = mcf_gpio_set_value_fast,
319 .base = 25,
320 .ngpio = 7,
321 },
322 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
323 .podr = (void __iomem *) MCFGPIO_PODR_CS,
324 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
325 .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
326 .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
327 },
328 {
329 .gpio_chip = {
330 .label = "FEC0H",
331 .request = mcf_gpio_request,
332 .free = mcf_gpio_free,
333 .direction_input = mcf_gpio_direction_input,
334 .direction_output = mcf_gpio_direction_output,
335 .get = mcf_gpio_get_value,
336 .set = mcf_gpio_set_value_fast,
337 .base = 32,
338 .ngpio = 8,
339 },
340 .pddr = (void __iomem *) MCFGPIO_PDDR_FEC0H,
341 .podr = (void __iomem *) MCFGPIO_PODR_FEC0H,
342 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC0H,
343 .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC0H,
344 .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC0H,
345 },
346 {
347 .gpio_chip = {
348 .label = "FEC0L",
349 .request = mcf_gpio_request,
350 .free = mcf_gpio_free,
351 .direction_input = mcf_gpio_direction_input,
352 .direction_output = mcf_gpio_direction_output,
353 .get = mcf_gpio_get_value,
354 .set = mcf_gpio_set_value_fast,
355 .base = 40,
356 .ngpio = 8,
357 },
358 .pddr = (void __iomem *) MCFGPIO_PDDR_FEC0L,
359 .podr = (void __iomem *) MCFGPIO_PODR_FEC0L,
360 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC0L,
361 .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC0L,
362 .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC0L,
363 },
364 {
365 .gpio_chip = {
366 .label = "FECI2C",
367 .request = mcf_gpio_request,
368 .free = mcf_gpio_free,
369 .direction_input = mcf_gpio_direction_input,
370 .direction_output = mcf_gpio_direction_output,
371 .get = mcf_gpio_get_value,
372 .set = mcf_gpio_set_value_fast,
373 .base = 48,
374 .ngpio = 6,
375 },
376 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
377 .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
378 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
379 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
380 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
381 },
382 {
383 .gpio_chip = {
384 .label = "QSPI",
385 .request = mcf_gpio_request,
386 .free = mcf_gpio_free,
387 .direction_input = mcf_gpio_direction_input,
388 .direction_output = mcf_gpio_direction_output,
389 .get = mcf_gpio_get_value,
390 .set = mcf_gpio_set_value_fast,
391 .base = 56,
392 .ngpio = 7,
393 },
394 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
395 .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
396 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
397 .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
398 .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
399 },
400 {
401 .gpio_chip = {
402 .label = "SDRAM",
403 .request = mcf_gpio_request,
404 .free = mcf_gpio_free,
405 .direction_input = mcf_gpio_direction_input,
406 .direction_output = mcf_gpio_direction_output,
407 .get = mcf_gpio_get_value,
408 .set = mcf_gpio_set_value_fast,
409 .base = 64,
410 .ngpio = 8,
411 },
412 .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
413 .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
414 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
415 .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
416 .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
417 },
418 {
419 .gpio_chip = {
420 .label = "TIMERH",
421 .request = mcf_gpio_request,
422 .free = mcf_gpio_free,
423 .direction_input = mcf_gpio_direction_input,
424 .direction_output = mcf_gpio_direction_output,
425 .get = mcf_gpio_get_value,
426 .set = mcf_gpio_set_value_fast,
427 .base = 72,
428 .ngpio = 4,
429 },
430 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMERH,
431 .podr = (void __iomem *) MCFGPIO_PODR_TIMERH,
432 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMERH,
433 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMERH,
434 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMERH,
435 },
436 {
437 .gpio_chip = {
438 .label = "TIMERL",
439 .request = mcf_gpio_request,
440 .free = mcf_gpio_free,
441 .direction_input = mcf_gpio_direction_input,
442 .direction_output = mcf_gpio_direction_output,
443 .get = mcf_gpio_get_value,
444 .set = mcf_gpio_set_value_fast,
445 .base = 80,
446 .ngpio = 4,
447 },
448 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMERL,
449 .podr = (void __iomem *) MCFGPIO_PODR_TIMERL,
450 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMERL,
451 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMERL,
452 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMERL,
453 },
454 {
455 .gpio_chip = {
456 .label = "UARTL",
457 .request = mcf_gpio_request,
458 .free = mcf_gpio_free,
459 .direction_input = mcf_gpio_direction_input,
460 .direction_output = mcf_gpio_direction_output,
461 .get = mcf_gpio_get_value,
462 .set = mcf_gpio_set_value_fast,
463 .base = 88,
464 .ngpio = 8,
465 },
466 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
467 .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
468 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
469 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
470 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
471 },
472 {
473 .gpio_chip = {
474 .label = "FEC1H",
475 .request = mcf_gpio_request,
476 .free = mcf_gpio_free,
477 .direction_input = mcf_gpio_direction_input,
478 .direction_output = mcf_gpio_direction_output,
479 .get = mcf_gpio_get_value,
480 .set = mcf_gpio_set_value_fast,
481 .base = 96,
482 .ngpio = 8,
483 },
484 .pddr = (void __iomem *) MCFGPIO_PDDR_FEC1H,
485 .podr = (void __iomem *) MCFGPIO_PODR_FEC1H,
486 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC1H,
487 .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC1H,
488 .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC1H,
489 },
490 {
491 .gpio_chip = {
492 .label = "FEC1L",
493 .request = mcf_gpio_request,
494 .free = mcf_gpio_free,
495 .direction_input = mcf_gpio_direction_input,
496 .direction_output = mcf_gpio_direction_output,
497 .get = mcf_gpio_get_value,
498 .set = mcf_gpio_set_value_fast,
499 .base = 104,
500 .ngpio = 8,
501 },
502 .pddr = (void __iomem *) MCFGPIO_PDDR_FEC1L,
503 .podr = (void __iomem *) MCFGPIO_PODR_FEC1L,
504 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC1L,
505 .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC1L,
506 .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC1L,
507 },
508 {
509 .gpio_chip = {
510 .label = "BS",
511 .request = mcf_gpio_request,
512 .free = mcf_gpio_free,
513 .direction_input = mcf_gpio_direction_input,
514 .direction_output = mcf_gpio_direction_output,
515 .get = mcf_gpio_get_value,
516 .set = mcf_gpio_set_value_fast,
517 .base = 114,
518 .ngpio = 2,
519 },
520 .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
521 .podr = (void __iomem *) MCFGPIO_PODR_BS,
522 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
523 .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
524 .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
525 },
526 {
527 .gpio_chip = {
528 .label = "IRQ",
529 .request = mcf_gpio_request,
530 .free = mcf_gpio_free,
531 .direction_input = mcf_gpio_direction_input,
532 .direction_output = mcf_gpio_direction_output,
533 .get = mcf_gpio_get_value,
534 .set = mcf_gpio_set_value_fast,
535 .base = 121,
536 .ngpio = 7,
537 },
538 .pddr = (void __iomem *) MCFGPIO_PDDR_IRQ,
539 .podr = (void __iomem *) MCFGPIO_PODR_IRQ,
540 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_IRQ,
541 .setr = (void __iomem *) MCFGPIO_PPDSDR_IRQ,
542 .clrr = (void __iomem *) MCFGPIO_PCLRR_IRQ,
543 },
544 {
545 .gpio_chip = {
546 .label = "USBH",
547 .request = mcf_gpio_request,
548 .free = mcf_gpio_free,
549 .direction_input = mcf_gpio_direction_input,
550 .direction_output = mcf_gpio_direction_output,
551 .get = mcf_gpio_get_value,
552 .set = mcf_gpio_set_value_fast,
553 .base = 128,
554 .ngpio = 1,
555 },
556 .pddr = (void __iomem *) MCFGPIO_PDDR_USBH,
557 .podr = (void __iomem *) MCFGPIO_PODR_USBH,
558 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_USBH,
559 .setr = (void __iomem *) MCFGPIO_PPDSDR_USBH,
560 .clrr = (void __iomem *) MCFGPIO_PCLRR_USBH,
561 },
562 {
563 .gpio_chip = {
564 .label = "USBL",
565 .request = mcf_gpio_request,
566 .free = mcf_gpio_free,
567 .direction_input = mcf_gpio_direction_input,
568 .direction_output = mcf_gpio_direction_output,
569 .get = mcf_gpio_get_value,
570 .set = mcf_gpio_set_value_fast,
571 .base = 136,
572 .ngpio = 8,
573 },
574 .pddr = (void __iomem *) MCFGPIO_PDDR_USBL,
575 .podr = (void __iomem *) MCFGPIO_PODR_USBL,
576 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_USBL,
577 .setr = (void __iomem *) MCFGPIO_PPDSDR_USBL,
578 .clrr = (void __iomem *) MCFGPIO_PCLRR_USBL,
579 },
580 {
581 .gpio_chip = {
582 .label = "UARTH",
583 .request = mcf_gpio_request,
584 .free = mcf_gpio_free,
585 .direction_input = mcf_gpio_direction_input,
586 .direction_output = mcf_gpio_direction_output,
587 .get = mcf_gpio_get_value,
588 .set = mcf_gpio_set_value_fast,
589 .base = 144,
590 .ngpio = 4,
591 },
592 .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
593 .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
594 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
595 .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
596 .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
597 },
598#endif
599};
600
601static int __init mcf_gpio_init(void)
602{
603 unsigned i = 0;
604 while (i < ARRAY_SIZE(mcf_gpio_chips))
605 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
606 return 0;
607}
608
609core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/528x/Makefile b/arch/m68knommu/platform/528x/Makefile
deleted file mode 100644
index 6ac4b57370ea..000000000000
--- a/arch/m68knommu/platform/528x/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
18
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c
deleted file mode 100644
index ac39fc661219..000000000000
--- a/arch/m68knommu/platform/528x/config.c
+++ /dev/null
@@ -1,320 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/528x/config.c
5 *
6 * Sub-architcture dependant initialization code for the Freescale
7 * 5280, 5281 and 5282 CPUs.
8 *
9 * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
15#include <linux/kernel.h>
16#include <linux/param.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20#include <linux/spi/spi.h>
21#include <linux/gpio.h>
22#include <asm/machdep.h>
23#include <asm/coldfire.h>
24#include <asm/mcfsim.h>
25#include <asm/mcfuart.h>
26#include <asm/mcfqspi.h>
27
28/***************************************************************************/
29
30static struct mcf_platform_uart m528x_uart_platform[] = {
31 {
32 .mapbase = MCFUART_BASE1,
33 .irq = MCFINT_VECBASE + MCFINT_UART0,
34 },
35 {
36 .mapbase = MCFUART_BASE2,
37 .irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
38 },
39 {
40 .mapbase = MCFUART_BASE3,
41 .irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
42 },
43 { },
44};
45
46static struct platform_device m528x_uart = {
47 .name = "mcfuart",
48 .id = 0,
49 .dev.platform_data = m528x_uart_platform,
50};
51
52static struct resource m528x_fec_resources[] = {
53 {
54 .start = MCFFEC_BASE,
55 .end = MCFFEC_BASE + MCFFEC_SIZE - 1,
56 .flags = IORESOURCE_MEM,
57 },
58 {
59 .start = 64 + 23,
60 .end = 64 + 23,
61 .flags = IORESOURCE_IRQ,
62 },
63 {
64 .start = 64 + 27,
65 .end = 64 + 27,
66 .flags = IORESOURCE_IRQ,
67 },
68 {
69 .start = 64 + 29,
70 .end = 64 + 29,
71 .flags = IORESOURCE_IRQ,
72 },
73};
74
75static struct platform_device m528x_fec = {
76 .name = "fec",
77 .id = 0,
78 .num_resources = ARRAY_SIZE(m528x_fec_resources),
79 .resource = m528x_fec_resources,
80};
81
82#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
83static struct resource m528x_qspi_resources[] = {
84 {
85 .start = MCFQSPI_IOBASE,
86 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
87 .flags = IORESOURCE_MEM,
88 },
89 {
90 .start = MCFINT_VECBASE + MCFINT_QSPI,
91 .end = MCFINT_VECBASE + MCFINT_QSPI,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96#define MCFQSPI_CS0 147
97#define MCFQSPI_CS1 148
98#define MCFQSPI_CS2 149
99#define MCFQSPI_CS3 150
100
101static int m528x_cs_setup(struct mcfqspi_cs_control *cs_control)
102{
103 int status;
104
105 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
106 if (status) {
107 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
108 goto fail0;
109 }
110 status = gpio_direction_output(MCFQSPI_CS0, 1);
111 if (status) {
112 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
113 goto fail1;
114 }
115
116 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
117 if (status) {
118 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
119 goto fail1;
120 }
121 status = gpio_direction_output(MCFQSPI_CS1, 1);
122 if (status) {
123 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
124 goto fail2;
125 }
126
127 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
128 if (status) {
129 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
130 goto fail2;
131 }
132 status = gpio_direction_output(MCFQSPI_CS2, 1);
133 if (status) {
134 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
135 goto fail3;
136 }
137
138 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
139 if (status) {
140 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
141 goto fail3;
142 }
143 status = gpio_direction_output(MCFQSPI_CS3, 1);
144 if (status) {
145 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
146 goto fail4;
147 }
148
149 return 0;
150
151fail4:
152 gpio_free(MCFQSPI_CS3);
153fail3:
154 gpio_free(MCFQSPI_CS2);
155fail2:
156 gpio_free(MCFQSPI_CS1);
157fail1:
158 gpio_free(MCFQSPI_CS0);
159fail0:
160 return status;
161}
162
163static void m528x_cs_teardown(struct mcfqspi_cs_control *cs_control)
164{
165 gpio_free(MCFQSPI_CS3);
166 gpio_free(MCFQSPI_CS2);
167 gpio_free(MCFQSPI_CS1);
168 gpio_free(MCFQSPI_CS0);
169}
170
171static void m528x_cs_select(struct mcfqspi_cs_control *cs_control,
172 u8 chip_select, bool cs_high)
173{
174 gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high);
175}
176
177static void m528x_cs_deselect(struct mcfqspi_cs_control *cs_control,
178 u8 chip_select, bool cs_high)
179{
180 gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high);
181}
182
183static struct mcfqspi_cs_control m528x_cs_control = {
184 .setup = m528x_cs_setup,
185 .teardown = m528x_cs_teardown,
186 .select = m528x_cs_select,
187 .deselect = m528x_cs_deselect,
188};
189
190static struct mcfqspi_platform_data m528x_qspi_data = {
191 .bus_num = 0,
192 .num_chipselect = 4,
193 .cs_control = &m528x_cs_control,
194};
195
196static struct platform_device m528x_qspi = {
197 .name = "mcfqspi",
198 .id = 0,
199 .num_resources = ARRAY_SIZE(m528x_qspi_resources),
200 .resource = m528x_qspi_resources,
201 .dev.platform_data = &m528x_qspi_data,
202};
203
204static void __init m528x_qspi_init(void)
205{
206 /* setup Port QS for QSPI with gpio CS control */
207 __raw_writeb(0x07, MCFGPIO_PQSPAR);
208}
209#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
210
211static struct platform_device *m528x_devices[] __initdata = {
212 &m528x_uart,
213 &m528x_fec,
214#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
215 &m528x_qspi,
216#endif
217};
218
219/***************************************************************************/
220
221static void __init m528x_uart_init_line(int line, int irq)
222{
223 u8 port;
224
225 if ((line < 0) || (line > 2))
226 return;
227
228 /* make sure PUAPAR is set for UART0 and UART1 */
229 if (line < 2) {
230 port = readb(MCF5282_GPIO_PUAPAR);
231 port |= (0x03 << (line * 2));
232 writeb(port, MCF5282_GPIO_PUAPAR);
233 }
234}
235
236static void __init m528x_uarts_init(void)
237{
238 const int nrlines = ARRAY_SIZE(m528x_uart_platform);
239 int line;
240
241 for (line = 0; (line < nrlines); line++)
242 m528x_uart_init_line(line, m528x_uart_platform[line].irq);
243}
244
245/***************************************************************************/
246
247static void __init m528x_fec_init(void)
248{
249 u16 v16;
250
251 /* Set multi-function pins to ethernet mode for fec0 */
252 v16 = readw(MCF_IPSBAR + 0x100056);
253 writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
254 writeb(0xc0, MCF_IPSBAR + 0x100058);
255}
256
257/***************************************************************************/
258
259static void m528x_cpu_reset(void)
260{
261 local_irq_disable();
262 __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
263}
264
265/***************************************************************************/
266
267#ifdef CONFIG_WILDFIRE
268void wildfire_halt(void)
269{
270 writeb(0, 0x30000007);
271 writeb(0x2, 0x30000007);
272}
273#endif
274
275#ifdef CONFIG_WILDFIREMOD
276void wildfiremod_halt(void)
277{
278 printk(KERN_INFO "WildFireMod hibernating...\n");
279
280 /* Set portE.5 to Digital IO */
281 MCF5282_GPIO_PEPAR &= ~(1 << (5 * 2));
282
283 /* Make portE.5 an output */
284 MCF5282_GPIO_DDRE |= (1 << 5);
285
286 /* Now toggle portE.5 from low to high */
287 MCF5282_GPIO_PORTE &= ~(1 << 5);
288 MCF5282_GPIO_PORTE |= (1 << 5);
289
290 printk(KERN_EMERG "Failed to hibernate. Halting!\n");
291}
292#endif
293
294void __init config_BSP(char *commandp, int size)
295{
296#ifdef CONFIG_WILDFIRE
297 mach_halt = wildfire_halt;
298#endif
299#ifdef CONFIG_WILDFIREMOD
300 mach_halt = wildfiremod_halt;
301#endif
302}
303
304/***************************************************************************/
305
306static int __init init_BSP(void)
307{
308 mach_reset = m528x_cpu_reset;
309 m528x_uarts_init();
310 m528x_fec_init();
311#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
312 m528x_qspi_init();
313#endif
314 platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
315 return 0;
316}
317
318arch_initcall(init_BSP);
319
320/***************************************************************************/
diff --git a/arch/m68knommu/platform/528x/gpio.c b/arch/m68knommu/platform/528x/gpio.c
deleted file mode 100644
index 526db665d87e..000000000000
--- a/arch/m68knommu/platform/528x/gpio.c
+++ /dev/null
@@ -1,438 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "NQ",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .base = 1,
34 .ngpio = 7,
35 },
36 .pddr = (void __iomem *)MCFEPORT_EPDDR,
37 .podr = (void __iomem *)MCFEPORT_EPDR,
38 .ppdr = (void __iomem *)MCFEPORT_EPPDR,
39 },
40 {
41 .gpio_chip = {
42 .label = "TA",
43 .request = mcf_gpio_request,
44 .free = mcf_gpio_free,
45 .direction_input = mcf_gpio_direction_input,
46 .direction_output = mcf_gpio_direction_output,
47 .get = mcf_gpio_get_value,
48 .set = mcf_gpio_set_value_fast,
49 .base = 8,
50 .ngpio = 4,
51 },
52 .pddr = (void __iomem *)MCFGPTA_GPTDDR,
53 .podr = (void __iomem *)MCFGPTA_GPTPORT,
54 .ppdr = (void __iomem *)MCFGPTB_GPTPORT,
55 },
56 {
57 .gpio_chip = {
58 .label = "TB",
59 .request = mcf_gpio_request,
60 .free = mcf_gpio_free,
61 .direction_input = mcf_gpio_direction_input,
62 .direction_output = mcf_gpio_direction_output,
63 .get = mcf_gpio_get_value,
64 .set = mcf_gpio_set_value_fast,
65 .base = 16,
66 .ngpio = 4,
67 },
68 .pddr = (void __iomem *)MCFGPTB_GPTDDR,
69 .podr = (void __iomem *)MCFGPTB_GPTPORT,
70 .ppdr = (void __iomem *)MCFGPTB_GPTPORT,
71 },
72 {
73 .gpio_chip = {
74 .label = "QA",
75 .request = mcf_gpio_request,
76 .free = mcf_gpio_free,
77 .direction_input = mcf_gpio_direction_input,
78 .direction_output = mcf_gpio_direction_output,
79 .get = mcf_gpio_get_value,
80 .set = mcf_gpio_set_value_fast,
81 .base = 24,
82 .ngpio = 4,
83 },
84 .pddr = (void __iomem *)MCFQADC_DDRQA,
85 .podr = (void __iomem *)MCFQADC_PORTQA,
86 .ppdr = (void __iomem *)MCFQADC_PORTQA,
87 },
88 {
89 .gpio_chip = {
90 .label = "QB",
91 .request = mcf_gpio_request,
92 .free = mcf_gpio_free,
93 .direction_input = mcf_gpio_direction_input,
94 .direction_output = mcf_gpio_direction_output,
95 .get = mcf_gpio_get_value,
96 .set = mcf_gpio_set_value_fast,
97 .base = 32,
98 .ngpio = 4,
99 },
100 .pddr = (void __iomem *)MCFQADC_DDRQB,
101 .podr = (void __iomem *)MCFQADC_PORTQB,
102 .ppdr = (void __iomem *)MCFQADC_PORTQB,
103 },
104 {
105 .gpio_chip = {
106 .label = "A",
107 .request = mcf_gpio_request,
108 .free = mcf_gpio_free,
109 .direction_input = mcf_gpio_direction_input,
110 .direction_output = mcf_gpio_direction_output,
111 .get = mcf_gpio_get_value,
112 .set = mcf_gpio_set_value_fast,
113 .base = 40,
114 .ngpio = 8,
115 },
116 .pddr = (void __iomem *)MCFGPIO_DDRA,
117 .podr = (void __iomem *)MCFGPIO_PORTA,
118 .ppdr = (void __iomem *)MCFGPIO_PORTAP,
119 .setr = (void __iomem *)MCFGPIO_SETA,
120 .clrr = (void __iomem *)MCFGPIO_CLRA,
121 },
122 {
123 .gpio_chip = {
124 .label = "B",
125 .request = mcf_gpio_request,
126 .free = mcf_gpio_free,
127 .direction_input = mcf_gpio_direction_input,
128 .direction_output = mcf_gpio_direction_output,
129 .get = mcf_gpio_get_value,
130 .set = mcf_gpio_set_value_fast,
131 .base = 48,
132 .ngpio = 8,
133 },
134 .pddr = (void __iomem *)MCFGPIO_DDRB,
135 .podr = (void __iomem *)MCFGPIO_PORTB,
136 .ppdr = (void __iomem *)MCFGPIO_PORTBP,
137 .setr = (void __iomem *)MCFGPIO_SETB,
138 .clrr = (void __iomem *)MCFGPIO_CLRB,
139 },
140 {
141 .gpio_chip = {
142 .label = "C",
143 .request = mcf_gpio_request,
144 .free = mcf_gpio_free,
145 .direction_input = mcf_gpio_direction_input,
146 .direction_output = mcf_gpio_direction_output,
147 .get = mcf_gpio_get_value,
148 .set = mcf_gpio_set_value_fast,
149 .base = 56,
150 .ngpio = 8,
151 },
152 .pddr = (void __iomem *)MCFGPIO_DDRC,
153 .podr = (void __iomem *)MCFGPIO_PORTC,
154 .ppdr = (void __iomem *)MCFGPIO_PORTCP,
155 .setr = (void __iomem *)MCFGPIO_SETC,
156 .clrr = (void __iomem *)MCFGPIO_CLRC,
157 },
158 {
159 .gpio_chip = {
160 .label = "D",
161 .request = mcf_gpio_request,
162 .free = mcf_gpio_free,
163 .direction_input = mcf_gpio_direction_input,
164 .direction_output = mcf_gpio_direction_output,
165 .get = mcf_gpio_get_value,
166 .set = mcf_gpio_set_value_fast,
167 .base = 64,
168 .ngpio = 8,
169 },
170 .pddr = (void __iomem *)MCFGPIO_DDRD,
171 .podr = (void __iomem *)MCFGPIO_PORTD,
172 .ppdr = (void __iomem *)MCFGPIO_PORTDP,
173 .setr = (void __iomem *)MCFGPIO_SETD,
174 .clrr = (void __iomem *)MCFGPIO_CLRD,
175 },
176 {
177 .gpio_chip = {
178 .label = "E",
179 .request = mcf_gpio_request,
180 .free = mcf_gpio_free,
181 .direction_input = mcf_gpio_direction_input,
182 .direction_output = mcf_gpio_direction_output,
183 .get = mcf_gpio_get_value,
184 .set = mcf_gpio_set_value_fast,
185 .base = 72,
186 .ngpio = 8,
187 },
188 .pddr = (void __iomem *)MCFGPIO_DDRE,
189 .podr = (void __iomem *)MCFGPIO_PORTE,
190 .ppdr = (void __iomem *)MCFGPIO_PORTEP,
191 .setr = (void __iomem *)MCFGPIO_SETE,
192 .clrr = (void __iomem *)MCFGPIO_CLRE,
193 },
194 {
195 .gpio_chip = {
196 .label = "F",
197 .request = mcf_gpio_request,
198 .free = mcf_gpio_free,
199 .direction_input = mcf_gpio_direction_input,
200 .direction_output = mcf_gpio_direction_output,
201 .get = mcf_gpio_get_value,
202 .set = mcf_gpio_set_value_fast,
203 .base = 80,
204 .ngpio = 8,
205 },
206 .pddr = (void __iomem *)MCFGPIO_DDRF,
207 .podr = (void __iomem *)MCFGPIO_PORTF,
208 .ppdr = (void __iomem *)MCFGPIO_PORTFP,
209 .setr = (void __iomem *)MCFGPIO_SETF,
210 .clrr = (void __iomem *)MCFGPIO_CLRF,
211 },
212 {
213 .gpio_chip = {
214 .label = "G",
215 .request = mcf_gpio_request,
216 .free = mcf_gpio_free,
217 .direction_input = mcf_gpio_direction_input,
218 .direction_output = mcf_gpio_direction_output,
219 .get = mcf_gpio_get_value,
220 .set = mcf_gpio_set_value_fast,
221 .base = 88,
222 .ngpio = 8,
223 },
224 .pddr = (void __iomem *)MCFGPIO_DDRG,
225 .podr = (void __iomem *)MCFGPIO_PORTG,
226 .ppdr = (void __iomem *)MCFGPIO_PORTGP,
227 .setr = (void __iomem *)MCFGPIO_SETG,
228 .clrr = (void __iomem *)MCFGPIO_CLRG,
229 },
230 {
231 .gpio_chip = {
232 .label = "H",
233 .request = mcf_gpio_request,
234 .free = mcf_gpio_free,
235 .direction_input = mcf_gpio_direction_input,
236 .direction_output = mcf_gpio_direction_output,
237 .get = mcf_gpio_get_value,
238 .set = mcf_gpio_set_value_fast,
239 .base = 96,
240 .ngpio = 8,
241 },
242 .pddr = (void __iomem *)MCFGPIO_DDRH,
243 .podr = (void __iomem *)MCFGPIO_PORTH,
244 .ppdr = (void __iomem *)MCFGPIO_PORTHP,
245 .setr = (void __iomem *)MCFGPIO_SETH,
246 .clrr = (void __iomem *)MCFGPIO_CLRH,
247 },
248 {
249 .gpio_chip = {
250 .label = "J",
251 .request = mcf_gpio_request,
252 .free = mcf_gpio_free,
253 .direction_input = mcf_gpio_direction_input,
254 .direction_output = mcf_gpio_direction_output,
255 .get = mcf_gpio_get_value,
256 .set = mcf_gpio_set_value_fast,
257 .base = 104,
258 .ngpio = 8,
259 },
260 .pddr = (void __iomem *)MCFGPIO_DDRJ,
261 .podr = (void __iomem *)MCFGPIO_PORTJ,
262 .ppdr = (void __iomem *)MCFGPIO_PORTJP,
263 .setr = (void __iomem *)MCFGPIO_SETJ,
264 .clrr = (void __iomem *)MCFGPIO_CLRJ,
265 },
266 {
267 .gpio_chip = {
268 .label = "DD",
269 .request = mcf_gpio_request,
270 .free = mcf_gpio_free,
271 .direction_input = mcf_gpio_direction_input,
272 .direction_output = mcf_gpio_direction_output,
273 .get = mcf_gpio_get_value,
274 .set = mcf_gpio_set_value_fast,
275 .base = 112,
276 .ngpio = 8,
277 },
278 .pddr = (void __iomem *)MCFGPIO_DDRDD,
279 .podr = (void __iomem *)MCFGPIO_PORTDD,
280 .ppdr = (void __iomem *)MCFGPIO_PORTDDP,
281 .setr = (void __iomem *)MCFGPIO_SETDD,
282 .clrr = (void __iomem *)MCFGPIO_CLRDD,
283 },
284 {
285 .gpio_chip = {
286 .label = "EH",
287 .request = mcf_gpio_request,
288 .free = mcf_gpio_free,
289 .direction_input = mcf_gpio_direction_input,
290 .direction_output = mcf_gpio_direction_output,
291 .get = mcf_gpio_get_value,
292 .set = mcf_gpio_set_value_fast,
293 .base = 120,
294 .ngpio = 8,
295 },
296 .pddr = (void __iomem *)MCFGPIO_DDREH,
297 .podr = (void __iomem *)MCFGPIO_PORTEH,
298 .ppdr = (void __iomem *)MCFGPIO_PORTEHP,
299 .setr = (void __iomem *)MCFGPIO_SETEH,
300 .clrr = (void __iomem *)MCFGPIO_CLREH,
301 },
302 {
303 .gpio_chip = {
304 .label = "EL",
305 .request = mcf_gpio_request,
306 .free = mcf_gpio_free,
307 .direction_input = mcf_gpio_direction_input,
308 .direction_output = mcf_gpio_direction_output,
309 .get = mcf_gpio_get_value,
310 .set = mcf_gpio_set_value_fast,
311 .base = 128,
312 .ngpio = 8,
313 },
314 .pddr = (void __iomem *)MCFGPIO_DDREL,
315 .podr = (void __iomem *)MCFGPIO_PORTEL,
316 .ppdr = (void __iomem *)MCFGPIO_PORTELP,
317 .setr = (void __iomem *)MCFGPIO_SETEL,
318 .clrr = (void __iomem *)MCFGPIO_CLREL,
319 },
320 {
321 .gpio_chip = {
322 .label = "AS",
323 .request = mcf_gpio_request,
324 .free = mcf_gpio_free,
325 .direction_input = mcf_gpio_direction_input,
326 .direction_output = mcf_gpio_direction_output,
327 .get = mcf_gpio_get_value,
328 .set = mcf_gpio_set_value_fast,
329 .base = 136,
330 .ngpio = 6,
331 },
332 .pddr = (void __iomem *)MCFGPIO_DDRAS,
333 .podr = (void __iomem *)MCFGPIO_PORTAS,
334 .ppdr = (void __iomem *)MCFGPIO_PORTASP,
335 .setr = (void __iomem *)MCFGPIO_SETAS,
336 .clrr = (void __iomem *)MCFGPIO_CLRAS,
337 },
338 {
339 .gpio_chip = {
340 .label = "QS",
341 .request = mcf_gpio_request,
342 .free = mcf_gpio_free,
343 .direction_input = mcf_gpio_direction_input,
344 .direction_output = mcf_gpio_direction_output,
345 .get = mcf_gpio_get_value,
346 .set = mcf_gpio_set_value_fast,
347 .base = 144,
348 .ngpio = 7,
349 },
350 .pddr = (void __iomem *)MCFGPIO_DDRQS,
351 .podr = (void __iomem *)MCFGPIO_PORTQS,
352 .ppdr = (void __iomem *)MCFGPIO_PORTQSP,
353 .setr = (void __iomem *)MCFGPIO_SETQS,
354 .clrr = (void __iomem *)MCFGPIO_CLRQS,
355 },
356 {
357 .gpio_chip = {
358 .label = "SD",
359 .request = mcf_gpio_request,
360 .free = mcf_gpio_free,
361 .direction_input = mcf_gpio_direction_input,
362 .direction_output = mcf_gpio_direction_output,
363 .get = mcf_gpio_get_value,
364 .set = mcf_gpio_set_value_fast,
365 .base = 152,
366 .ngpio = 6,
367 },
368 .pddr = (void __iomem *)MCFGPIO_DDRSD,
369 .podr = (void __iomem *)MCFGPIO_PORTSD,
370 .ppdr = (void __iomem *)MCFGPIO_PORTSDP,
371 .setr = (void __iomem *)MCFGPIO_SETSD,
372 .clrr = (void __iomem *)MCFGPIO_CLRSD,
373 },
374 {
375 .gpio_chip = {
376 .label = "TC",
377 .request = mcf_gpio_request,
378 .free = mcf_gpio_free,
379 .direction_input = mcf_gpio_direction_input,
380 .direction_output = mcf_gpio_direction_output,
381 .get = mcf_gpio_get_value,
382 .set = mcf_gpio_set_value_fast,
383 .base = 160,
384 .ngpio = 4,
385 },
386 .pddr = (void __iomem *)MCFGPIO_DDRTC,
387 .podr = (void __iomem *)MCFGPIO_PORTTC,
388 .ppdr = (void __iomem *)MCFGPIO_PORTTCP,
389 .setr = (void __iomem *)MCFGPIO_SETTC,
390 .clrr = (void __iomem *)MCFGPIO_CLRTC,
391 },
392 {
393 .gpio_chip = {
394 .label = "TD",
395 .request = mcf_gpio_request,
396 .free = mcf_gpio_free,
397 .direction_input = mcf_gpio_direction_input,
398 .direction_output = mcf_gpio_direction_output,
399 .get = mcf_gpio_get_value,
400 .set = mcf_gpio_set_value_fast,
401 .base = 168,
402 .ngpio = 4,
403 },
404 .pddr = (void __iomem *)MCFGPIO_DDRTD,
405 .podr = (void __iomem *)MCFGPIO_PORTTD,
406 .ppdr = (void __iomem *)MCFGPIO_PORTTDP,
407 .setr = (void __iomem *)MCFGPIO_SETTD,
408 .clrr = (void __iomem *)MCFGPIO_CLRTD,
409 },
410 {
411 .gpio_chip = {
412 .label = "UA",
413 .request = mcf_gpio_request,
414 .free = mcf_gpio_free,
415 .direction_input = mcf_gpio_direction_input,
416 .direction_output = mcf_gpio_direction_output,
417 .get = mcf_gpio_get_value,
418 .set = mcf_gpio_set_value_fast,
419 .base = 176,
420 .ngpio = 4,
421 },
422 .pddr = (void __iomem *)MCFGPIO_DDRUA,
423 .podr = (void __iomem *)MCFGPIO_PORTUA,
424 .ppdr = (void __iomem *)MCFGPIO_PORTUAP,
425 .setr = (void __iomem *)MCFGPIO_SETUA,
426 .clrr = (void __iomem *)MCFGPIO_CLRUA,
427 },
428};
429
430static int __init mcf_gpio_init(void)
431{
432 unsigned i = 0;
433 while (i < ARRAY_SIZE(mcf_gpio_chips))
434 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
435 return 0;
436}
437
438core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5307/Makefile b/arch/m68knommu/platform/5307/Makefile
deleted file mode 100644
index d4293b791f2e..000000000000
--- a/arch/m68knommu/platform/5307/Makefile
+++ /dev/null
@@ -1,20 +0,0 @@
1#
2# Makefile for the m68knommu kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y += config.o gpio.o
18obj-$(CONFIG_NETtel) += nettel.o
19obj-$(CONFIG_CLEOPATRA) += nettel.o
20
diff --git a/arch/m68knommu/platform/5307/config.c b/arch/m68knommu/platform/5307/config.c
deleted file mode 100644
index 00900ac06a9c..000000000000
--- a/arch/m68knommu/platform/5307/config.c
+++ /dev/null
@@ -1,147 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5307/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000, Lineo (www.lineo.com)
8 */
9
10/***************************************************************************/
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <asm/machdep.h>
17#include <asm/coldfire.h>
18#include <asm/mcfsim.h>
19#include <asm/mcfuart.h>
20#include <asm/mcfwdebug.h>
21
22/***************************************************************************/
23
24/*
25 * Some platforms need software versions of the GPIO data registers.
26 */
27unsigned short ppdata;
28unsigned char ledbank = 0xff;
29
30/***************************************************************************/
31
32static struct mcf_platform_uart m5307_uart_platform[] = {
33 {
34 .mapbase = MCF_MBAR + MCFUART_BASE1,
35 .irq = 73,
36 },
37 {
38 .mapbase = MCF_MBAR + MCFUART_BASE2,
39 .irq = 74,
40 },
41 { },
42};
43
44static struct platform_device m5307_uart = {
45 .name = "mcfuart",
46 .id = 0,
47 .dev.platform_data = m5307_uart_platform,
48};
49
50static struct platform_device *m5307_devices[] __initdata = {
51 &m5307_uart,
52};
53
54/***************************************************************************/
55
56static void __init m5307_uart_init_line(int line, int irq)
57{
58 if (line == 0) {
59 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
60 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
61 mcf_mapirq2imr(irq, MCFINTC_UART0);
62 } else if (line == 1) {
63 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
64 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
65 mcf_mapirq2imr(irq, MCFINTC_UART1);
66 }
67}
68
69static void __init m5307_uarts_init(void)
70{
71 const int nrlines = ARRAY_SIZE(m5307_uart_platform);
72 int line;
73
74 for (line = 0; (line < nrlines); line++)
75 m5307_uart_init_line(line, m5307_uart_platform[line].irq);
76}
77
78/***************************************************************************/
79
80static void __init m5307_timers_init(void)
81{
82 /* Timer1 is always used as system timer */
83 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
84 MCF_MBAR + MCFSIM_TIMER1ICR);
85 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
86
87#ifdef CONFIG_HIGHPROFILE
88 /* Timer2 is to be used as a high speed profile timer */
89 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
90 MCF_MBAR + MCFSIM_TIMER2ICR);
91 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
92#endif
93}
94
95/***************************************************************************/
96
97void m5307_cpu_reset(void)
98{
99 local_irq_disable();
100 /* Set watchdog to soft reset, and enabled */
101 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
102 for (;;)
103 /* wait for watchdog to timeout */;
104}
105
106/***************************************************************************/
107
108void __init config_BSP(char *commandp, int size)
109{
110#if defined(CONFIG_NETtel) || \
111 defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
112 /* Copy command line from FLASH to local buffer... */
113 memcpy(commandp, (char *) 0xf0004000, size);
114 commandp[size-1] = 0;
115#endif
116
117 mach_reset = m5307_cpu_reset;
118 m5307_timers_init();
119 m5307_uarts_init();
120
121 /* Only support the external interrupts on their primary level */
122 mcf_mapirq2imr(25, MCFINTC_EINT1);
123 mcf_mapirq2imr(27, MCFINTC_EINT3);
124 mcf_mapirq2imr(29, MCFINTC_EINT5);
125 mcf_mapirq2imr(31, MCFINTC_EINT7);
126
127#ifdef CONFIG_BDM_DISABLE
128 /*
129 * Disable the BDM clocking. This also turns off most of the rest of
130 * the BDM device. This is good for EMC reasons. This option is not
131 * incompatible with the memory protection option.
132 */
133 wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
134#endif
135}
136
137/***************************************************************************/
138
139static int __init init_BSP(void)
140{
141 platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices));
142 return 0;
143}
144
145arch_initcall(init_BSP);
146
147/***************************************************************************/
diff --git a/arch/m68knommu/platform/5307/gpio.c b/arch/m68knommu/platform/5307/gpio.c
deleted file mode 100644
index 5850612b4a38..000000000000
--- a/arch/m68knommu/platform/5307/gpio.c
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PP",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 16,
34 },
35 .pddr = (void __iomem *) MCFSIM_PADDR,
36 .podr = (void __iomem *) MCFSIM_PADAT,
37 .ppdr = (void __iomem *) MCFSIM_PADAT,
38 },
39};
40
41static int __init mcf_gpio_init(void)
42{
43 unsigned i = 0;
44 while (i < ARRAY_SIZE(mcf_gpio_chips))
45 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
46 return 0;
47}
48
49core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5307/nettel.c b/arch/m68knommu/platform/5307/nettel.c
deleted file mode 100644
index e925ea4602f8..000000000000
--- a/arch/m68knommu/platform/5307/nettel.c
+++ /dev/null
@@ -1,153 +0,0 @@
1/***************************************************************************/
2
3/*
4 * nettel.c -- startup code support for the NETtel boards
5 *
6 * Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
16#include <asm/coldfire.h>
17#include <asm/mcfsim.h>
18#include <asm/nettel.h>
19
20/***************************************************************************/
21
22/*
23 * Define the IO and interrupt resources of the 2 SMC9196 interfaces.
24 */
25#define NETTEL_SMC0_ADDR 0x30600300
26#define NETTEL_SMC0_IRQ 29
27
28#define NETTEL_SMC1_ADDR 0x30600000
29#define NETTEL_SMC1_IRQ 27
30
31/*
32 * We need some access into the SMC9196 registers. Define those registers
33 * we will need here (including the smc91x.h doesn't seem to give us these
34 * in a simple form).
35 */
36#define SMC91xx_BANKSELECT 14
37#define SMC91xx_BASEADDR 2
38#define SMC91xx_BASEMAC 4
39
40/***************************************************************************/
41
42static struct resource nettel_smc91x_0_resources[] = {
43 {
44 .start = NETTEL_SMC0_ADDR,
45 .end = NETTEL_SMC0_ADDR + 0x20,
46 .flags = IORESOURCE_MEM,
47 },
48 {
49 .start = NETTEL_SMC0_IRQ,
50 .end = NETTEL_SMC0_IRQ,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
55static struct resource nettel_smc91x_1_resources[] = {
56 {
57 .start = NETTEL_SMC1_ADDR,
58 .end = NETTEL_SMC1_ADDR + 0x20,
59 .flags = IORESOURCE_MEM,
60 },
61 {
62 .start = NETTEL_SMC1_IRQ,
63 .end = NETTEL_SMC1_IRQ,
64 .flags = IORESOURCE_IRQ,
65 },
66};
67
68static struct platform_device nettel_smc91x[] = {
69 {
70 .name = "smc91x",
71 .id = 0,
72 .num_resources = ARRAY_SIZE(nettel_smc91x_0_resources),
73 .resource = nettel_smc91x_0_resources,
74 },
75 {
76 .name = "smc91x",
77 .id = 1,
78 .num_resources = ARRAY_SIZE(nettel_smc91x_1_resources),
79 .resource = nettel_smc91x_1_resources,
80 },
81};
82
83static struct platform_device *nettel_devices[] __initdata = {
84 &nettel_smc91x[0],
85 &nettel_smc91x[1],
86};
87
88/***************************************************************************/
89
90static u8 nettel_macdefault[] __initdata = {
91 0x00, 0xd0, 0xcf, 0x00, 0x00, 0x01,
92};
93
94/*
95 * Set flash contained MAC address into SMC9196 core. Make sure the flash
96 * MAC address is sane, and not an empty flash. If no good use the Moreton
97 * Bay default MAC address instead.
98 */
99
100static void __init nettel_smc91x_setmac(unsigned int ioaddr, unsigned int flashaddr)
101{
102 u16 *macp;
103
104 macp = (u16 *) flashaddr;
105 if ((macp[0] == 0xffff) && (macp[1] == 0xffff) && (macp[2] == 0xffff))
106 macp = (u16 *) &nettel_macdefault[0];
107
108 writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
109 writew(macp[0], ioaddr + SMC91xx_BASEMAC);
110 writew(macp[1], ioaddr + SMC91xx_BASEMAC + 2);
111 writew(macp[2], ioaddr + SMC91xx_BASEMAC + 4);
112}
113
114/***************************************************************************/
115
116/*
117 * Re-map the address space of at least one of the SMC ethernet
118 * parts. Both parts power up decoding the same address, so we
119 * need to move one of them first, before doing anything else.
120 */
121
122static void __init nettel_smc91x_init(void)
123{
124 writew(0x00ec, MCF_MBAR + MCFSIM_PADDR);
125 mcf_setppdata(0, 0x0080);
126 writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
127 writew(0x0067, NETTEL_SMC0_ADDR + SMC91xx_BASEADDR);
128 mcf_setppdata(0x0080, 0);
129
130 /* Set correct chip select timing for SMC9196 accesses */
131 writew(0x1180, MCF_MBAR + MCFSIM_CSCR3);
132
133 /* Set the SMC interrupts to be auto-vectored */
134 mcf_autovector(NETTEL_SMC0_IRQ);
135 mcf_autovector(NETTEL_SMC1_IRQ);
136
137 /* Set MAC addresses from flash for both interfaces */
138 nettel_smc91x_setmac(NETTEL_SMC0_ADDR, 0xf0006000);
139 nettel_smc91x_setmac(NETTEL_SMC1_ADDR, 0xf0006006);
140}
141
142/***************************************************************************/
143
144static int __init init_nettel(void)
145{
146 nettel_smc91x_init();
147 platform_add_devices(nettel_devices, ARRAY_SIZE(nettel_devices));
148 return 0;
149}
150
151arch_initcall(init_nettel);
152
153/***************************************************************************/
diff --git a/arch/m68knommu/platform/532x/Makefile b/arch/m68knommu/platform/532x/Makefile
deleted file mode 100644
index ce01669399c6..000000000000
--- a/arch/m68knommu/platform/532x/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17#obj-y := config.o usb-mcf532x.o spi-mcf532x.o
18obj-y := config.o gpio.o
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c
deleted file mode 100644
index ca51323f957b..000000000000
--- a/arch/m68knommu/platform/532x/config.c
+++ /dev/null
@@ -1,648 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/532x/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000, Lineo (www.lineo.com)
8 * Yaroslav Vinogradov yaroslav.vinogradov@freescale.com
9 * Copyright Freescale Semiconductor, Inc 2006
10 * Copyright (c) 2006, emlix, Sebastian Hess <sh@emlix.com>
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17
18/***************************************************************************/
19
20#include <linux/kernel.h>
21#include <linux/param.h>
22#include <linux/init.h>
23#include <linux/io.h>
24#include <linux/spi/spi.h>
25#include <linux/gpio.h>
26#include <asm/machdep.h>
27#include <asm/coldfire.h>
28#include <asm/mcfsim.h>
29#include <asm/mcfuart.h>
30#include <asm/mcfdma.h>
31#include <asm/mcfwdebug.h>
32#include <asm/mcfqspi.h>
33
34/***************************************************************************/
35
36static struct mcf_platform_uart m532x_uart_platform[] = {
37 {
38 .mapbase = MCFUART_BASE1,
39 .irq = MCFINT_VECBASE + MCFINT_UART0,
40 },
41 {
42 .mapbase = MCFUART_BASE2,
43 .irq = MCFINT_VECBASE + MCFINT_UART1,
44 },
45 {
46 .mapbase = MCFUART_BASE3,
47 .irq = MCFINT_VECBASE + MCFINT_UART2,
48 },
49 { },
50};
51
52static struct platform_device m532x_uart = {
53 .name = "mcfuart",
54 .id = 0,
55 .dev.platform_data = m532x_uart_platform,
56};
57
58static struct resource m532x_fec_resources[] = {
59 {
60 .start = 0xfc030000,
61 .end = 0xfc0307ff,
62 .flags = IORESOURCE_MEM,
63 },
64 {
65 .start = 64 + 36,
66 .end = 64 + 36,
67 .flags = IORESOURCE_IRQ,
68 },
69 {
70 .start = 64 + 40,
71 .end = 64 + 40,
72 .flags = IORESOURCE_IRQ,
73 },
74 {
75 .start = 64 + 42,
76 .end = 64 + 42,
77 .flags = IORESOURCE_IRQ,
78 },
79};
80
81static struct platform_device m532x_fec = {
82 .name = "fec",
83 .id = 0,
84 .num_resources = ARRAY_SIZE(m532x_fec_resources),
85 .resource = m532x_fec_resources,
86};
87
88#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
89static struct resource m532x_qspi_resources[] = {
90 {
91 .start = MCFQSPI_IOBASE,
92 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
93 .flags = IORESOURCE_MEM,
94 },
95 {
96 .start = MCFINT_VECBASE + MCFINT_QSPI,
97 .end = MCFINT_VECBASE + MCFINT_QSPI,
98 .flags = IORESOURCE_IRQ,
99 },
100};
101
102#define MCFQSPI_CS0 84
103#define MCFQSPI_CS1 85
104#define MCFQSPI_CS2 86
105
106static int m532x_cs_setup(struct mcfqspi_cs_control *cs_control)
107{
108 int status;
109
110 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
111 if (status) {
112 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
113 goto fail0;
114 }
115 status = gpio_direction_output(MCFQSPI_CS0, 1);
116 if (status) {
117 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
118 goto fail1;
119 }
120
121 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
122 if (status) {
123 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
124 goto fail1;
125 }
126 status = gpio_direction_output(MCFQSPI_CS1, 1);
127 if (status) {
128 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
129 goto fail2;
130 }
131
132 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
133 if (status) {
134 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
135 goto fail2;
136 }
137 status = gpio_direction_output(MCFQSPI_CS2, 1);
138 if (status) {
139 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
140 goto fail3;
141 }
142
143 return 0;
144
145fail3:
146 gpio_free(MCFQSPI_CS2);
147fail2:
148 gpio_free(MCFQSPI_CS1);
149fail1:
150 gpio_free(MCFQSPI_CS0);
151fail0:
152 return status;
153}
154
155static void m532x_cs_teardown(struct mcfqspi_cs_control *cs_control)
156{
157 gpio_free(MCFQSPI_CS2);
158 gpio_free(MCFQSPI_CS1);
159 gpio_free(MCFQSPI_CS0);
160}
161
162static void m532x_cs_select(struct mcfqspi_cs_control *cs_control,
163 u8 chip_select, bool cs_high)
164{
165 gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high);
166}
167
168static void m532x_cs_deselect(struct mcfqspi_cs_control *cs_control,
169 u8 chip_select, bool cs_high)
170{
171 gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high);
172}
173
174static struct mcfqspi_cs_control m532x_cs_control = {
175 .setup = m532x_cs_setup,
176 .teardown = m532x_cs_teardown,
177 .select = m532x_cs_select,
178 .deselect = m532x_cs_deselect,
179};
180
181static struct mcfqspi_platform_data m532x_qspi_data = {
182 .bus_num = 0,
183 .num_chipselect = 3,
184 .cs_control = &m532x_cs_control,
185};
186
187static struct platform_device m532x_qspi = {
188 .name = "mcfqspi",
189 .id = 0,
190 .num_resources = ARRAY_SIZE(m532x_qspi_resources),
191 .resource = m532x_qspi_resources,
192 .dev.platform_data = &m532x_qspi_data,
193};
194
195static void __init m532x_qspi_init(void)
196{
197 /* setup QSPS pins for QSPI with gpio CS control */
198 writew(0x01f0, MCF_GPIO_PAR_QSPI);
199}
200#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
201
202
203static struct platform_device *m532x_devices[] __initdata = {
204 &m532x_uart,
205 &m532x_fec,
206#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
207 &m532x_qspi,
208#endif
209};
210
211/***************************************************************************/
212
213static void __init m532x_uart_init_line(int line, int irq)
214{
215 if (line == 0) {
216 /* GPIO initialization */
217 MCF_GPIO_PAR_UART |= 0x000F;
218 } else if (line == 1) {
219 /* GPIO initialization */
220 MCF_GPIO_PAR_UART |= 0x0FF0;
221 }
222}
223
224static void __init m532x_uarts_init(void)
225{
226 const int nrlines = ARRAY_SIZE(m532x_uart_platform);
227 int line;
228
229 for (line = 0; (line < nrlines); line++)
230 m532x_uart_init_line(line, m532x_uart_platform[line].irq);
231}
232/***************************************************************************/
233
234static void __init m532x_fec_init(void)
235{
236 /* Set multi-function pins to ethernet mode for fec0 */
237 MCF_GPIO_PAR_FECI2C |= (MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC |
238 MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO);
239 MCF_GPIO_PAR_FEC = (MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC |
240 MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC);
241}
242
243/***************************************************************************/
244
245static void m532x_cpu_reset(void)
246{
247 local_irq_disable();
248 __raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
249}
250
251/***************************************************************************/
252
253void __init config_BSP(char *commandp, int size)
254{
255#if !defined(CONFIG_BOOTPARAM)
256 /* Copy command line from FLASH to local buffer... */
257 memcpy(commandp, (char *) 0x4000, 4);
258 if(strncmp(commandp, "kcl ", 4) == 0){
259 memcpy(commandp, (char *) 0x4004, size);
260 commandp[size-1] = 0;
261 } else {
262 memset(commandp, 0, size);
263 }
264#endif
265
266#ifdef CONFIG_BDM_DISABLE
267 /*
268 * Disable the BDM clocking. This also turns off most of the rest of
269 * the BDM device. This is good for EMC reasons. This option is not
270 * incompatible with the memory protection option.
271 */
272 wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
273#endif
274}
275
276/***************************************************************************/
277
278static int __init init_BSP(void)
279{
280 m532x_uarts_init();
281 m532x_fec_init();
282#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
283 m532x_qspi_init();
284#endif
285 platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices));
286 return 0;
287}
288
289arch_initcall(init_BSP);
290
291/***************************************************************************/
292/* Board initialization */
293/***************************************************************************/
294/*
295 * PLL min/max specifications
296 */
297#define MAX_FVCO 500000 /* KHz */
298#define MAX_FSYS 80000 /* KHz */
299#define MIN_FSYS 58333 /* KHz */
300#define FREF 16000 /* KHz */
301
302
303#define MAX_MFD 135 /* Multiplier */
304#define MIN_MFD 88 /* Multiplier */
305#define BUSDIV 6 /* Divider */
306
307/*
308 * Low Power Divider specifications
309 */
310#define MIN_LPD (1 << 0) /* Divider (not encoded) */
311#define MAX_LPD (1 << 15) /* Divider (not encoded) */
312#define DEFAULT_LPD (1 << 1) /* Divider (not encoded) */
313
314#define SYS_CLK_KHZ 80000
315#define SYSTEM_PERIOD 12.5
316/*
317 * SDRAM Timing Parameters
318 */
319#define SDRAM_BL 8 /* # of beats in a burst */
320#define SDRAM_TWR 2 /* in clocks */
321#define SDRAM_CASL 2.5 /* CASL in clocks */
322#define SDRAM_TRCD 2 /* in clocks */
323#define SDRAM_TRP 2 /* in clocks */
324#define SDRAM_TRFC 7 /* in clocks */
325#define SDRAM_TREFI 7800 /* in ns */
326
327#define EXT_SRAM_ADDRESS (0xC0000000)
328#define FLASH_ADDRESS (0x00000000)
329#define SDRAM_ADDRESS (0x40000000)
330
331#define NAND_FLASH_ADDRESS (0xD0000000)
332
333int sys_clk_khz = 0;
334int sys_clk_mhz = 0;
335
336void wtm_init(void);
337void scm_init(void);
338void gpio_init(void);
339void fbcs_init(void);
340void sdramc_init(void);
341int clock_pll (int fsys, int flags);
342int clock_limp (int);
343int clock_exit_limp (void);
344int get_sys_clock (void);
345
346asmlinkage void __init sysinit(void)
347{
348 sys_clk_khz = clock_pll(0, 0);
349 sys_clk_mhz = sys_clk_khz/1000;
350
351 wtm_init();
352 scm_init();
353 gpio_init();
354 fbcs_init();
355 sdramc_init();
356}
357
358void wtm_init(void)
359{
360 /* Disable watchdog timer */
361 MCF_WTM_WCR = 0;
362}
363
364#define MCF_SCM_BCR_GBW (0x00000100)
365#define MCF_SCM_BCR_GBR (0x00000200)
366
367void scm_init(void)
368{
369 /* All masters are trusted */
370 MCF_SCM_MPR = 0x77777777;
371
372 /* Allow supervisor/user, read/write, and trusted/untrusted
373 access to all slaves */
374 MCF_SCM_PACRA = 0;
375 MCF_SCM_PACRB = 0;
376 MCF_SCM_PACRC = 0;
377 MCF_SCM_PACRD = 0;
378 MCF_SCM_PACRE = 0;
379 MCF_SCM_PACRF = 0;
380
381 /* Enable bursts */
382 MCF_SCM_BCR = (MCF_SCM_BCR_GBR | MCF_SCM_BCR_GBW);
383}
384
385
386void fbcs_init(void)
387{
388 MCF_GPIO_PAR_CS = 0x0000003E;
389
390 /* Latch chip select */
391 MCF_FBCS1_CSAR = 0x10080000;
392
393 MCF_FBCS1_CSCR = 0x002A3780;
394 MCF_FBCS1_CSMR = (MCF_FBCS_CSMR_BAM_2M | MCF_FBCS_CSMR_V);
395
396 /* Initialize latch to drive signals to inactive states */
397 *((u16 *)(0x10080000)) = 0xFFFF;
398
399 /* External SRAM */
400 MCF_FBCS1_CSAR = EXT_SRAM_ADDRESS;
401 MCF_FBCS1_CSCR = (MCF_FBCS_CSCR_PS_16
402 | MCF_FBCS_CSCR_AA
403 | MCF_FBCS_CSCR_SBM
404 | MCF_FBCS_CSCR_WS(1));
405 MCF_FBCS1_CSMR = (MCF_FBCS_CSMR_BAM_512K
406 | MCF_FBCS_CSMR_V);
407
408 /* Boot Flash connected to FBCS0 */
409 MCF_FBCS0_CSAR = FLASH_ADDRESS;
410 MCF_FBCS0_CSCR = (MCF_FBCS_CSCR_PS_16
411 | MCF_FBCS_CSCR_BEM
412 | MCF_FBCS_CSCR_AA
413 | MCF_FBCS_CSCR_SBM
414 | MCF_FBCS_CSCR_WS(7));
415 MCF_FBCS0_CSMR = (MCF_FBCS_CSMR_BAM_32M
416 | MCF_FBCS_CSMR_V);
417}
418
419void sdramc_init(void)
420{
421 /*
422 * Check to see if the SDRAM has already been initialized
423 * by a run control tool
424 */
425 if (!(MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)) {
426 /* SDRAM chip select initialization */
427
428 /* Initialize SDRAM chip select */
429 MCF_SDRAMC_SDCS0 = (0
430 | MCF_SDRAMC_SDCS_BA(SDRAM_ADDRESS)
431 | MCF_SDRAMC_SDCS_CSSZ(MCF_SDRAMC_SDCS_CSSZ_32MBYTE));
432
433 /*
434 * Basic configuration and initialization
435 */
436 MCF_SDRAMC_SDCFG1 = (0
437 | MCF_SDRAMC_SDCFG1_SRD2RW((int)((SDRAM_CASL + 2) + 0.5 ))
438 | MCF_SDRAMC_SDCFG1_SWT2RD(SDRAM_TWR + 1)
439 | MCF_SDRAMC_SDCFG1_RDLAT((int)((SDRAM_CASL*2) + 2))
440 | MCF_SDRAMC_SDCFG1_ACT2RW((int)((SDRAM_TRCD ) + 0.5))
441 | MCF_SDRAMC_SDCFG1_PRE2ACT((int)((SDRAM_TRP ) + 0.5))
442 | MCF_SDRAMC_SDCFG1_REF2ACT((int)(((SDRAM_TRFC) ) + 0.5))
443 | MCF_SDRAMC_SDCFG1_WTLAT(3));
444 MCF_SDRAMC_SDCFG2 = (0
445 | MCF_SDRAMC_SDCFG2_BRD2PRE(SDRAM_BL/2 + 1)
446 | MCF_SDRAMC_SDCFG2_BWT2RW(SDRAM_BL/2 + SDRAM_TWR)
447 | MCF_SDRAMC_SDCFG2_BRD2WT((int)((SDRAM_CASL+SDRAM_BL/2-1.0)+0.5))
448 | MCF_SDRAMC_SDCFG2_BL(SDRAM_BL-1));
449
450
451 /*
452 * Precharge and enable write to SDMR
453 */
454 MCF_SDRAMC_SDCR = (0
455 | MCF_SDRAMC_SDCR_MODE_EN
456 | MCF_SDRAMC_SDCR_CKE
457 | MCF_SDRAMC_SDCR_DDR
458 | MCF_SDRAMC_SDCR_MUX(1)
459 | MCF_SDRAMC_SDCR_RCNT((int)(((SDRAM_TREFI/(SYSTEM_PERIOD*64)) - 1) + 0.5))
460 | MCF_SDRAMC_SDCR_PS_16
461 | MCF_SDRAMC_SDCR_IPALL);
462
463 /*
464 * Write extended mode register
465 */
466 MCF_SDRAMC_SDMR = (0
467 | MCF_SDRAMC_SDMR_BNKAD_LEMR
468 | MCF_SDRAMC_SDMR_AD(0x0)
469 | MCF_SDRAMC_SDMR_CMD);
470
471 /*
472 * Write mode register and reset DLL
473 */
474 MCF_SDRAMC_SDMR = (0
475 | MCF_SDRAMC_SDMR_BNKAD_LMR
476 | MCF_SDRAMC_SDMR_AD(0x163)
477 | MCF_SDRAMC_SDMR_CMD);
478
479 /*
480 * Execute a PALL command
481 */
482 MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_IPALL;
483
484 /*
485 * Perform two REF cycles
486 */
487 MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_IREF;
488 MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_IREF;
489
490 /*
491 * Write mode register and clear reset DLL
492 */
493 MCF_SDRAMC_SDMR = (0
494 | MCF_SDRAMC_SDMR_BNKAD_LMR
495 | MCF_SDRAMC_SDMR_AD(0x063)
496 | MCF_SDRAMC_SDMR_CMD);
497
498 /*
499 * Enable auto refresh and lock SDMR
500 */
501 MCF_SDRAMC_SDCR &= ~MCF_SDRAMC_SDCR_MODE_EN;
502 MCF_SDRAMC_SDCR |= (0
503 | MCF_SDRAMC_SDCR_REF
504 | MCF_SDRAMC_SDCR_DQS_OE(0xC));
505 }
506}
507
508void gpio_init(void)
509{
510 /* Enable UART0 pins */
511 MCF_GPIO_PAR_UART = ( 0
512 | MCF_GPIO_PAR_UART_PAR_URXD0
513 | MCF_GPIO_PAR_UART_PAR_UTXD0);
514
515 /* Initialize TIN3 as a GPIO output to enable the write
516 half of the latch */
517 MCF_GPIO_PAR_TIMER = 0x00;
518 __raw_writeb(0x08, MCFGPIO_PDDR_TIMER);
519 __raw_writeb(0x00, MCFGPIO_PCLRR_TIMER);
520
521}
522
523int clock_pll(int fsys, int flags)
524{
525 int fref, temp, fout, mfd;
526 u32 i;
527
528 fref = FREF;
529
530 if (fsys == 0) {
531 /* Return current PLL output */
532 mfd = MCF_PLL_PFDR;
533
534 return (fref * mfd / (BUSDIV * 4));
535 }
536
537 /* Check bounds of requested system clock */
538 if (fsys > MAX_FSYS)
539 fsys = MAX_FSYS;
540 if (fsys < MIN_FSYS)
541 fsys = MIN_FSYS;
542
543 /* Multiplying by 100 when calculating the temp value,
544 and then dividing by 100 to calculate the mfd allows
545 for exact values without needing to include floating
546 point libraries. */
547 temp = 100 * fsys / fref;
548 mfd = 4 * BUSDIV * temp / 100;
549
550 /* Determine the output frequency for selected values */
551 fout = (fref * mfd / (BUSDIV * 4));
552
553 /*
554 * Check to see if the SDRAM has already been initialized.
555 * If it has then the SDRAM needs to be put into self refresh
556 * mode before reprogramming the PLL.
557 */
558 if (MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)
559 /* Put SDRAM into self refresh mode */
560 MCF_SDRAMC_SDCR &= ~MCF_SDRAMC_SDCR_CKE;
561
562 /*
563 * Initialize the PLL to generate the new system clock frequency.
564 * The device must be put into LIMP mode to reprogram the PLL.
565 */
566
567 /* Enter LIMP mode */
568 clock_limp(DEFAULT_LPD);
569
570 /* Reprogram PLL for desired fsys */
571 MCF_PLL_PODR = (0
572 | MCF_PLL_PODR_CPUDIV(BUSDIV/3)
573 | MCF_PLL_PODR_BUSDIV(BUSDIV));
574
575 MCF_PLL_PFDR = mfd;
576
577 /* Exit LIMP mode */
578 clock_exit_limp();
579
580 /*
581 * Return the SDRAM to normal operation if it is in use.
582 */
583 if (MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)
584 /* Exit self refresh mode */
585 MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_CKE;
586
587 /* Errata - workaround for SDRAM opeartion after exiting LIMP mode */
588 MCF_SDRAMC_LIMP_FIX = MCF_SDRAMC_REFRESH;
589
590 /* wait for DQS logic to relock */
591 for (i = 0; i < 0x200; i++)
592 ;
593
594 return fout;
595}
596
597int clock_limp(int div)
598{
599 u32 temp;
600
601 /* Check bounds of divider */
602 if (div < MIN_LPD)
603 div = MIN_LPD;
604 if (div > MAX_LPD)
605 div = MAX_LPD;
606
607 /* Save of the current value of the SSIDIV so we don't
608 overwrite the value*/
609 temp = (MCF_CCM_CDR & MCF_CCM_CDR_SSIDIV(0xF));
610
611 /* Apply the divider to the system clock */
612 MCF_CCM_CDR = ( 0
613 | MCF_CCM_CDR_LPDIV(div)
614 | MCF_CCM_CDR_SSIDIV(temp));
615
616 MCF_CCM_MISCCR |= MCF_CCM_MISCCR_LIMP;
617
618 return (FREF/(3*(1 << div)));
619}
620
621int clock_exit_limp(void)
622{
623 int fout;
624
625 /* Exit LIMP mode */
626 MCF_CCM_MISCCR = (MCF_CCM_MISCCR & ~ MCF_CCM_MISCCR_LIMP);
627
628 /* Wait for PLL to lock */
629 while (!(MCF_CCM_MISCCR & MCF_CCM_MISCCR_PLL_LOCK))
630 ;
631
632 fout = get_sys_clock();
633
634 return fout;
635}
636
637int get_sys_clock(void)
638{
639 int divider;
640
641 /* Test to see if device is in LIMP mode */
642 if (MCF_CCM_MISCCR & MCF_CCM_MISCCR_LIMP) {
643 divider = MCF_CCM_CDR & MCF_CCM_CDR_LPDIV(0xF);
644 return (FREF/(2 << divider));
645 }
646 else
647 return ((FREF * MCF_PLL_PFDR) / (BUSDIV * 4));
648}
diff --git a/arch/m68knommu/platform/532x/gpio.c b/arch/m68knommu/platform/532x/gpio.c
deleted file mode 100644
index 212a85deac90..000000000000
--- a/arch/m68knommu/platform/532x/gpio.c
+++ /dev/null
@@ -1,337 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PIRQ",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 8,
34 },
35 .pddr = (void __iomem *) MCFEPORT_EPDDR,
36 .podr = (void __iomem *) MCFEPORT_EPDR,
37 .ppdr = (void __iomem *) MCFEPORT_EPPDR,
38 },
39 {
40 .gpio_chip = {
41 .label = "FECH",
42 .request = mcf_gpio_request,
43 .free = mcf_gpio_free,
44 .direction_input = mcf_gpio_direction_input,
45 .direction_output = mcf_gpio_direction_output,
46 .get = mcf_gpio_get_value,
47 .set = mcf_gpio_set_value_fast,
48 .base = 8,
49 .ngpio = 8,
50 },
51 .pddr = (void __iomem *) MCFGPIO_PDDR_FECH,
52 .podr = (void __iomem *) MCFGPIO_PODR_FECH,
53 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
54 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECH,
55 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECH,
56 },
57 {
58 .gpio_chip = {
59 .label = "FECL",
60 .request = mcf_gpio_request,
61 .free = mcf_gpio_free,
62 .direction_input = mcf_gpio_direction_input,
63 .direction_output = mcf_gpio_direction_output,
64 .get = mcf_gpio_get_value,
65 .set = mcf_gpio_set_value_fast,
66 .base = 16,
67 .ngpio = 8,
68 },
69 .pddr = (void __iomem *) MCFGPIO_PDDR_FECL,
70 .podr = (void __iomem *) MCFGPIO_PODR_FECL,
71 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
72 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECL,
73 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECL,
74 },
75 {
76 .gpio_chip = {
77 .label = "SSI",
78 .request = mcf_gpio_request,
79 .free = mcf_gpio_free,
80 .direction_input = mcf_gpio_direction_input,
81 .direction_output = mcf_gpio_direction_output,
82 .get = mcf_gpio_get_value,
83 .set = mcf_gpio_set_value_fast,
84 .base = 24,
85 .ngpio = 5,
86 },
87 .pddr = (void __iomem *) MCFGPIO_PDDR_SSI,
88 .podr = (void __iomem *) MCFGPIO_PODR_SSI,
89 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SSI,
90 .setr = (void __iomem *) MCFGPIO_PPDSDR_SSI,
91 .clrr = (void __iomem *) MCFGPIO_PCLRR_SSI,
92 },
93 {
94 .gpio_chip = {
95 .label = "BUSCTL",
96 .request = mcf_gpio_request,
97 .free = mcf_gpio_free,
98 .direction_input = mcf_gpio_direction_input,
99 .direction_output = mcf_gpio_direction_output,
100 .get = mcf_gpio_get_value,
101 .set = mcf_gpio_set_value_fast,
102 .base = 32,
103 .ngpio = 4,
104 },
105 .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
106 .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
107 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
108 .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
109 .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
110 },
111 {
112 .gpio_chip = {
113 .label = "BE",
114 .request = mcf_gpio_request,
115 .free = mcf_gpio_free,
116 .direction_input = mcf_gpio_direction_input,
117 .direction_output = mcf_gpio_direction_output,
118 .get = mcf_gpio_get_value,
119 .set = mcf_gpio_set_value_fast,
120 .base = 40,
121 .ngpio = 4,
122 },
123 .pddr = (void __iomem *) MCFGPIO_PDDR_BE,
124 .podr = (void __iomem *) MCFGPIO_PODR_BE,
125 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BE,
126 .setr = (void __iomem *) MCFGPIO_PPDSDR_BE,
127 .clrr = (void __iomem *) MCFGPIO_PCLRR_BE,
128 },
129 {
130 .gpio_chip = {
131 .label = "CS",
132 .request = mcf_gpio_request,
133 .free = mcf_gpio_free,
134 .direction_input = mcf_gpio_direction_input,
135 .direction_output = mcf_gpio_direction_output,
136 .get = mcf_gpio_get_value,
137 .set = mcf_gpio_set_value_fast,
138 .base = 49,
139 .ngpio = 5,
140 },
141 .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
142 .podr = (void __iomem *) MCFGPIO_PODR_CS,
143 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
144 .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
145 .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
146 },
147 {
148 .gpio_chip = {
149 .label = "PWM",
150 .request = mcf_gpio_request,
151 .free = mcf_gpio_free,
152 .direction_input = mcf_gpio_direction_input,
153 .direction_output = mcf_gpio_direction_output,
154 .get = mcf_gpio_get_value,
155 .set = mcf_gpio_set_value_fast,
156 .base = 58,
157 .ngpio = 4,
158 },
159 .pddr = (void __iomem *) MCFGPIO_PDDR_PWM,
160 .podr = (void __iomem *) MCFGPIO_PODR_PWM,
161 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_PWM,
162 .setr = (void __iomem *) MCFGPIO_PPDSDR_PWM,
163 .clrr = (void __iomem *) MCFGPIO_PCLRR_PWM,
164 },
165 {
166 .gpio_chip = {
167 .label = "FECI2C",
168 .request = mcf_gpio_request,
169 .free = mcf_gpio_free,
170 .direction_input = mcf_gpio_direction_input,
171 .direction_output = mcf_gpio_direction_output,
172 .get = mcf_gpio_get_value,
173 .set = mcf_gpio_set_value_fast,
174 .base = 64,
175 .ngpio = 4,
176 },
177 .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
178 .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
179 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
180 .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
181 .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
182 },
183 {
184 .gpio_chip = {
185 .label = "UART",
186 .request = mcf_gpio_request,
187 .free = mcf_gpio_free,
188 .direction_input = mcf_gpio_direction_input,
189 .direction_output = mcf_gpio_direction_output,
190 .get = mcf_gpio_get_value,
191 .set = mcf_gpio_set_value_fast,
192 .base = 72,
193 .ngpio = 8,
194 },
195 .pddr = (void __iomem *) MCFGPIO_PDDR_UART,
196 .podr = (void __iomem *) MCFGPIO_PODR_UART,
197 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UART,
198 .setr = (void __iomem *) MCFGPIO_PPDSDR_UART,
199 .clrr = (void __iomem *) MCFGPIO_PCLRR_UART,
200 },
201 {
202 .gpio_chip = {
203 .label = "QSPI",
204 .request = mcf_gpio_request,
205 .free = mcf_gpio_free,
206 .direction_input = mcf_gpio_direction_input,
207 .direction_output = mcf_gpio_direction_output,
208 .get = mcf_gpio_get_value,
209 .set = mcf_gpio_set_value_fast,
210 .base = 80,
211 .ngpio = 6,
212 },
213 .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
214 .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
215 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
216 .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
217 .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
218 },
219 {
220 .gpio_chip = {
221 .label = "TIMER",
222 .request = mcf_gpio_request,
223 .free = mcf_gpio_free,
224 .direction_input = mcf_gpio_direction_input,
225 .direction_output = mcf_gpio_direction_output,
226 .get = mcf_gpio_get_value,
227 .set = mcf_gpio_set_value_fast,
228 .base = 88,
229 .ngpio = 4,
230 },
231 .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
232 .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
233 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
234 .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
235 .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
236 },
237 {
238 .gpio_chip = {
239 .label = "LCDDATAH",
240 .request = mcf_gpio_request,
241 .free = mcf_gpio_free,
242 .direction_input = mcf_gpio_direction_input,
243 .direction_output = mcf_gpio_direction_output,
244 .get = mcf_gpio_get_value,
245 .set = mcf_gpio_set_value_fast,
246 .base = 96,
247 .ngpio = 2,
248 },
249 .pddr = (void __iomem *) MCFGPIO_PDDR_LCDDATAH,
250 .podr = (void __iomem *) MCFGPIO_PODR_LCDDATAH,
251 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAH,
252 .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAH,
253 .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDDATAH,
254 },
255 {
256 .gpio_chip = {
257 .label = "LCDDATAM",
258 .request = mcf_gpio_request,
259 .free = mcf_gpio_free,
260 .direction_input = mcf_gpio_direction_input,
261 .direction_output = mcf_gpio_direction_output,
262 .get = mcf_gpio_get_value,
263 .set = mcf_gpio_set_value_fast,
264 .base = 104,
265 .ngpio = 8,
266 },
267 .pddr = (void __iomem *) MCFGPIO_PDDR_LCDDATAM,
268 .podr = (void __iomem *) MCFGPIO_PODR_LCDDATAM,
269 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAM,
270 .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAM,
271 .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDDATAM,
272 },
273 {
274 .gpio_chip = {
275 .label = "LCDDATAL",
276 .request = mcf_gpio_request,
277 .free = mcf_gpio_free,
278 .direction_input = mcf_gpio_direction_input,
279 .direction_output = mcf_gpio_direction_output,
280 .get = mcf_gpio_get_value,
281 .set = mcf_gpio_set_value_fast,
282 .base = 112,
283 .ngpio = 8,
284 },
285 .pddr = (void __iomem *) MCFGPIO_PDDR_LCDDATAL,
286 .podr = (void __iomem *) MCFGPIO_PODR_LCDDATAL,
287 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAL,
288 .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAL,
289 .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDDATAL,
290 },
291 {
292 .gpio_chip = {
293 .label = "LCDCTLH",
294 .request = mcf_gpio_request,
295 .free = mcf_gpio_free,
296 .direction_input = mcf_gpio_direction_input,
297 .direction_output = mcf_gpio_direction_output,
298 .get = mcf_gpio_get_value,
299 .set = mcf_gpio_set_value_fast,
300 .base = 120,
301 .ngpio = 1,
302 },
303 .pddr = (void __iomem *) MCFGPIO_PDDR_LCDCTLH,
304 .podr = (void __iomem *) MCFGPIO_PODR_LCDCTLH,
305 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLH,
306 .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLH,
307 .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDCTLH,
308 },
309 {
310 .gpio_chip = {
311 .label = "LCDCTLL",
312 .request = mcf_gpio_request,
313 .free = mcf_gpio_free,
314 .direction_input = mcf_gpio_direction_input,
315 .direction_output = mcf_gpio_direction_output,
316 .get = mcf_gpio_get_value,
317 .set = mcf_gpio_set_value_fast,
318 .base = 128,
319 .ngpio = 8,
320 },
321 .pddr = (void __iomem *) MCFGPIO_PDDR_LCDCTLL,
322 .podr = (void __iomem *) MCFGPIO_PODR_LCDCTLL,
323 .ppdr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLL,
324 .setr = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLL,
325 .clrr = (void __iomem *) MCFGPIO_PCLRR_LCDCTLL,
326 },
327};
328
329static int __init mcf_gpio_init(void)
330{
331 unsigned i = 0;
332 while (i < ARRAY_SIZE(mcf_gpio_chips))
333 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
334 return 0;
335}
336
337core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5407/Makefile b/arch/m68knommu/platform/5407/Makefile
deleted file mode 100644
index e83fe148eddc..000000000000
--- a/arch/m68knommu/platform/5407/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o gpio.o
18
diff --git a/arch/m68knommu/platform/5407/config.c b/arch/m68knommu/platform/5407/config.c
deleted file mode 100644
index 70ea789a400c..000000000000
--- a/arch/m68knommu/platform/5407/config.c
+++ /dev/null
@@ -1,122 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5407/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000, Lineo (www.lineo.com)
8 */
9
10/***************************************************************************/
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/io.h>
16#include <asm/machdep.h>
17#include <asm/coldfire.h>
18#include <asm/mcfsim.h>
19#include <asm/mcfuart.h>
20
21/***************************************************************************/
22
23static struct mcf_platform_uart m5407_uart_platform[] = {
24 {
25 .mapbase = MCF_MBAR + MCFUART_BASE1,
26 .irq = 73,
27 },
28 {
29 .mapbase = MCF_MBAR + MCFUART_BASE2,
30 .irq = 74,
31 },
32 { },
33};
34
35static struct platform_device m5407_uart = {
36 .name = "mcfuart",
37 .id = 0,
38 .dev.platform_data = m5407_uart_platform,
39};
40
41static struct platform_device *m5407_devices[] __initdata = {
42 &m5407_uart,
43};
44
45/***************************************************************************/
46
47static void __init m5407_uart_init_line(int line, int irq)
48{
49 if (line == 0) {
50 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
51 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
52 mcf_mapirq2imr(irq, MCFINTC_UART0);
53 } else if (line == 1) {
54 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
55 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
56 mcf_mapirq2imr(irq, MCFINTC_UART1);
57 }
58}
59
60static void __init m5407_uarts_init(void)
61{
62 const int nrlines = ARRAY_SIZE(m5407_uart_platform);
63 int line;
64
65 for (line = 0; (line < nrlines); line++)
66 m5407_uart_init_line(line, m5407_uart_platform[line].irq);
67}
68
69/***************************************************************************/
70
71static void __init m5407_timers_init(void)
72{
73 /* Timer1 is always used as system timer */
74 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
75 MCF_MBAR + MCFSIM_TIMER1ICR);
76 mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
77
78#ifdef CONFIG_HIGHPROFILE
79 /* Timer2 is to be used as a high speed profile timer */
80 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
81 MCF_MBAR + MCFSIM_TIMER2ICR);
82 mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
83#endif
84}
85
86/***************************************************************************/
87
88void m5407_cpu_reset(void)
89{
90 local_irq_disable();
91 /* set watchdog to soft reset, and enabled */
92 __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
93 for (;;)
94 /* wait for watchdog to timeout */;
95}
96
97/***************************************************************************/
98
99void __init config_BSP(char *commandp, int size)
100{
101 mach_reset = m5407_cpu_reset;
102 m5407_timers_init();
103 m5407_uarts_init();
104
105 /* Only support the external interrupts on their primary level */
106 mcf_mapirq2imr(25, MCFINTC_EINT1);
107 mcf_mapirq2imr(27, MCFINTC_EINT3);
108 mcf_mapirq2imr(29, MCFINTC_EINT5);
109 mcf_mapirq2imr(31, MCFINTC_EINT7);
110}
111
112/***************************************************************************/
113
114static int __init init_BSP(void)
115{
116 platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
117 return 0;
118}
119
120arch_initcall(init_BSP);
121
122/***************************************************************************/
diff --git a/arch/m68knommu/platform/5407/gpio.c b/arch/m68knommu/platform/5407/gpio.c
deleted file mode 100644
index 5850612b4a38..000000000000
--- a/arch/m68knommu/platform/5407/gpio.c
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * Coldfire generic GPIO support
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14*/
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfgpio.h>
22
23static struct mcf_gpio_chip mcf_gpio_chips[] = {
24 {
25 .gpio_chip = {
26 .label = "PP",
27 .request = mcf_gpio_request,
28 .free = mcf_gpio_free,
29 .direction_input = mcf_gpio_direction_input,
30 .direction_output = mcf_gpio_direction_output,
31 .get = mcf_gpio_get_value,
32 .set = mcf_gpio_set_value,
33 .ngpio = 16,
34 },
35 .pddr = (void __iomem *) MCFSIM_PADDR,
36 .podr = (void __iomem *) MCFSIM_PADAT,
37 .ppdr = (void __iomem *) MCFSIM_PADAT,
38 },
39};
40
41static int __init mcf_gpio_init(void)
42{
43 unsigned i = 0;
44 while (i < ARRAY_SIZE(mcf_gpio_chips))
45 (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
46 return 0;
47}
48
49core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/54xx/Makefile b/arch/m68knommu/platform/54xx/Makefile
deleted file mode 100644
index 6cfd090ec3cd..000000000000
--- a/arch/m68knommu/platform/54xx/Makefile
+++ /dev/null
@@ -1,19 +0,0 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT
12# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-y := config.o
18obj-$(CONFIG_FIREBEE) += firebee.o
19
diff --git a/arch/m68knommu/platform/54xx/config.c b/arch/m68knommu/platform/54xx/config.c
deleted file mode 100644
index 78130984db95..000000000000
--- a/arch/m68knommu/platform/54xx/config.c
+++ /dev/null
@@ -1,115 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/54xx/config.c
5 *
6 * Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
16#include <asm/machdep.h>
17#include <asm/coldfire.h>
18#include <asm/m54xxsim.h>
19#include <asm/mcfuart.h>
20#include <asm/m54xxgpt.h>
21
22/***************************************************************************/
23
24static struct mcf_platform_uart m54xx_uart_platform[] = {
25 {
26 .mapbase = MCF_MBAR + MCFUART_BASE1,
27 .irq = 64 + 35,
28 },
29 {
30 .mapbase = MCF_MBAR + MCFUART_BASE2,
31 .irq = 64 + 34,
32 },
33 {
34 .mapbase = MCF_MBAR + MCFUART_BASE3,
35 .irq = 64 + 33,
36 },
37 {
38 .mapbase = MCF_MBAR + MCFUART_BASE4,
39 .irq = 64 + 32,
40 },
41};
42
43static struct platform_device m54xx_uart = {
44 .name = "mcfuart",
45 .id = 0,
46 .dev.platform_data = m54xx_uart_platform,
47};
48
49static struct platform_device *m54xx_devices[] __initdata = {
50 &m54xx_uart,
51};
52
53
54/***************************************************************************/
55
56static void __init m54xx_uart_init_line(int line, int irq)
57{
58 int rts_cts;
59
60 /* enable io pins */
61 switch (line) {
62 case 0:
63 rts_cts = 0; break;
64 case 1:
65 rts_cts = MCF_PAR_PSC_RTS_RTS; break;
66 case 2:
67 rts_cts = MCF_PAR_PSC_RTS_RTS | MCF_PAR_PSC_CTS_CTS; break;
68 case 3:
69 rts_cts = 0; break;
70 }
71 __raw_writeb(MCF_PAR_PSC_TXD | rts_cts | MCF_PAR_PSC_RXD,
72 MCF_MBAR + MCF_PAR_PSC(line));
73}
74
75static void __init m54xx_uarts_init(void)
76{
77 const int nrlines = ARRAY_SIZE(m54xx_uart_platform);
78 int line;
79
80 for (line = 0; (line < nrlines); line++)
81 m54xx_uart_init_line(line, m54xx_uart_platform[line].irq);
82}
83
84/***************************************************************************/
85
86static void mcf54xx_reset(void)
87{
88 /* disable interrupts and enable the watchdog */
89 asm("movew #0x2700, %sr\n");
90 __raw_writel(0, MCF_MBAR + MCF_GPT_GMS0);
91 __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_MBAR + MCF_GPT_GCIR0);
92 __raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4),
93 MCF_MBAR + MCF_GPT_GMS0);
94}
95
96/***************************************************************************/
97
98void __init config_BSP(char *commandp, int size)
99{
100 mach_reset = mcf54xx_reset;
101 m54xx_uarts_init();
102}
103
104/***************************************************************************/
105
106static int __init init_BSP(void)
107{
108
109 platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices));
110 return 0;
111}
112
113arch_initcall(init_BSP);
114
115/***************************************************************************/
diff --git a/arch/m68knommu/platform/54xx/firebee.c b/arch/m68knommu/platform/54xx/firebee.c
deleted file mode 100644
index 46d50534f981..000000000000
--- a/arch/m68knommu/platform/54xx/firebee.c
+++ /dev/null
@@ -1,86 +0,0 @@
1/***************************************************************************/
2
3/*
4 * firebee.c -- extra startup code support for the FireBee boards
5 *
6 * Copyright (C) 2011, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/io.h>
14#include <linux/platform_device.h>
15#include <linux/mtd/mtd.h>
16#include <linux/mtd/partitions.h>
17#include <linux/mtd/physmap.h>
18#include <asm/coldfire.h>
19#include <asm/mcfsim.h>
20
21/***************************************************************************/
22
23/*
24 * 8MB of NOR flash fitted to the FireBee board.
25 */
26#define FLASH_PHYS_ADDR 0xe0000000 /* Physical address of flash */
27#define FLASH_PHYS_SIZE 0x00800000 /* Size of flash */
28
29#define PART_BOOT_START 0x00000000 /* Start at bottom of flash */
30#define PART_BOOT_SIZE 0x00040000 /* 256k in size */
31#define PART_IMAGE_START 0x00040000 /* Start after boot loader */
32#define PART_IMAGE_SIZE 0x006c0000 /* Most of flash */
33#define PART_FPGA_START 0x00700000 /* Start at offset 7MB */
34#define PART_FPGA_SIZE 0x00100000 /* 1MB in size */
35
36static struct mtd_partition firebee_flash_parts[] = {
37 {
38 .name = "dBUG",
39 .offset = PART_BOOT_START,
40 .size = PART_BOOT_SIZE,
41 },
42 {
43 .name = "FPGA",
44 .offset = PART_FPGA_START,
45 .size = PART_FPGA_SIZE,
46 },
47 {
48 .name = "image",
49 .offset = PART_IMAGE_START,
50 .size = PART_IMAGE_SIZE,
51 },
52};
53
54static struct physmap_flash_data firebee_flash_data = {
55 .width = 2,
56 .nr_parts = ARRAY_SIZE(firebee_flash_parts),
57 .parts = firebee_flash_parts,
58};
59
60static struct resource firebee_flash_resource = {
61 .start = FLASH_PHYS_ADDR,
62 .end = FLASH_PHYS_ADDR + FLASH_PHYS_SIZE,
63 .flags = IORESOURCE_MEM,
64};
65
66static struct platform_device firebee_flash = {
67 .name = "physmap-flash",
68 .id = 0,
69 .dev = {
70 .platform_data = &firebee_flash_data,
71 },
72 .num_resources = 1,
73 .resource = &firebee_flash_resource,
74};
75
76/***************************************************************************/
77
78static int __init init_firebee(void)
79{
80 platform_device_register(&firebee_flash);
81 return 0;
82}
83
84arch_initcall(init_firebee);
85
86/***************************************************************************/
diff --git a/arch/m68knommu/platform/68328/Makefile b/arch/m68knommu/platform/68328/Makefile
deleted file mode 100644
index 5e5435552d56..000000000000
--- a/arch/m68knommu/platform/68328/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
1#
2# Makefile for arch/m68knommu/platform/68328.
3#
4
5head-y = head-$(MODEL).o
6head-$(CONFIG_PILOT) = head-pilot.o
7head-$(CONFIG_DRAGEN2) = head-de2.o
8
9obj-y += entry.o ints.o timers.o
10obj-$(CONFIG_M68328) += config.o
11obj-$(CONFIG_ROM) += romvec.o
12
13extra-y := head.o
14extra-$(CONFIG_M68328) += bootlogo.rh head.o
15
16$(obj)/bootlogo.rh: $(src)/bootlogo.h
17 perl $(src)/bootlogo.pl < $(src)/bootlogo.h > $(obj)/bootlogo.rh
18
19$(obj)/head.o: $(obj)/$(head-y)
20 ln -sf $(head-y) $(obj)/head.o
21
22clean-files := $(obj)/bootlogo.rh $(obj)/head.o $(head-y)
diff --git a/arch/m68knommu/platform/68328/bootlogo.h b/arch/m68knommu/platform/68328/bootlogo.h
deleted file mode 100644
index 67bc2c17386e..000000000000
--- a/arch/m68knommu/platform/68328/bootlogo.h
+++ /dev/null
@@ -1,270 +0,0 @@
1#define bootlogo_width 160
2#define bootlogo_height 160
3static unsigned char bootlogo_bits[] = {
4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x01, 0x00, 0x00, 0x00,
5 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
6 0x00, 0x00, 0x40, 0x55, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55,
8 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xac, 0x00, 0x00, 0x00, 0x00, 0x00,
10 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
11 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
12 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
13 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
14 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
15 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
16 0x00, 0x10, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
17 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x01, 0x00,
18 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
19 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
20 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
21 0x00, 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
22 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x20, 0x00, 0x00,
23 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
24 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
25 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
26 0x80, 0x08, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00,
27 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x08, 0x00, 0x00,
28 0x00, 0xff, 0x80, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
29 0x00, 0x00, 0x00, 0x00, 0x20, 0x04, 0x00, 0x00, 0x00, 0xf8, 0x80, 0x0f,
30 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
31 0x50, 0x04, 0x00, 0x00, 0x00, 0x78, 0x80, 0x0f, 0x00, 0x00, 0x00, 0x00,
32 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x03, 0x00, 0x00,
33 0x00, 0x78, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
34 0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00,
35 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x40,
36 0xa8, 0x02, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
37 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x70, 0x28, 0x01, 0x00, 0x00,
38 0x00, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
39 0x00, 0x20, 0x00, 0x00, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00,
40 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x70,
41 0x54, 0x01, 0x00, 0x00, 0x00, 0x3e, 0x80, 0x01, 0x3a, 0x78, 0x80, 0x0e,
42 0x50, 0xc0, 0x03, 0x0e, 0x00, 0x20, 0x00, 0x00, 0xaa, 0x00, 0x00, 0x00,
43 0x00, 0x3e, 0xf0, 0x83, 0x1f, 0xfc, 0xe0, 0x0f, 0x78, 0xf8, 0x87, 0x1f,
44 0x00, 0x18, 0x00, 0x30, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x1e, 0xf8, 0xc3,
45 0x1f, 0xfc, 0xe0, 0x0f, 0x78, 0xf8, 0x87, 0x0f, 0x00, 0x20, 0x00, 0x10,
46 0x55, 0x00, 0x00, 0x00, 0x00, 0x1e, 0xc0, 0x03, 0x9f, 0xf3, 0x80, 0x0f,
47 0x78, 0x80, 0xc7, 0x0e, 0x00, 0x18, 0x00, 0x20, 0xaa, 0x00, 0x00, 0x00,
48 0x00, 0x1e, 0xe0, 0x03, 0x9f, 0xf1, 0x80, 0x07, 0x78, 0x80, 0x67, 0x00,
49 0x00, 0x24, 0x00, 0x18, 0x55, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xe0, 0x01,
50 0x5e, 0xf0, 0x80, 0x07, 0x3c, 0x00, 0x2f, 0x00, 0x00, 0x14, 0x00, 0x20,
51 0xaa, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xe0, 0x01, 0x7f, 0xf0, 0x80, 0x07,
52 0x3c, 0x00, 0x3f, 0x00, 0x00, 0x08, 0x00, 0x18, 0x55, 0x00, 0x00, 0x00,
53 0x00, 0x0f, 0xe0, 0x00, 0x3f, 0xf0, 0xc0, 0x03, 0x1e, 0x00, 0x1f, 0x00,
54 0x00, 0x14, 0x00, 0x28, 0xaa, 0x00, 0x00, 0x00, 0x80, 0x0f, 0xf0, 0x00,
55 0x1f, 0xf0, 0xc0, 0x03, 0x1f, 0x00, 0x1f, 0x00, 0x00, 0x04, 0x00, 0x0c,
56 0x54, 0x00, 0x00, 0x00, 0x80, 0x07, 0x78, 0x00, 0x1f, 0x78, 0xc0, 0x03,
57 0x1f, 0x00, 0x1e, 0x00, 0x00, 0x0a, 0x00, 0x12, 0xa8, 0x00, 0x00, 0x00,
58 0x80, 0x07, 0x78, 0x00, 0x1f, 0x78, 0xe0, 0x03, 0x1f, 0x00, 0x1f, 0x00,
59 0x00, 0x04, 0x00, 0x0a, 0x54, 0x00, 0x00, 0x00, 0x80, 0x07, 0x78, 0x80,
60 0x0f, 0x78, 0xe0, 0x03, 0x1f, 0x00, 0x1e, 0x00, 0x00, 0x0a, 0x00, 0x08,
61 0x50, 0x01, 0x00, 0x00, 0x84, 0x03, 0x78, 0x80, 0x07, 0x3c, 0xe0, 0xc1,
62 0x0f, 0x00, 0x1f, 0x00, 0x00, 0x04, 0x00, 0x06, 0xa8, 0x00, 0x00, 0x00,
63 0xc0, 0x03, 0x78, 0xc0, 0x07, 0x3c, 0xe0, 0xc1, 0x0f, 0x00, 0x1f, 0x00,
64 0x00, 0x0a, 0x00, 0x08, 0x50, 0x01, 0x00, 0x00, 0xc2, 0x01, 0x38, 0xc0,
65 0x07, 0x3c, 0xe0, 0x60, 0x0f, 0x80, 0x1e, 0x00, 0x00, 0x05, 0x00, 0x07,
66 0xa0, 0x00, 0x00, 0x80, 0xe0, 0x01, 0x3c, 0xc0, 0x07, 0x3c, 0xf0, 0xa0,
67 0x07, 0xc0, 0x1c, 0x00, 0x00, 0x0a, 0x80, 0x08, 0xa0, 0x02, 0x00, 0xa0,
68 0xe0, 0x21, 0x1c, 0xc0, 0x03, 0x1c, 0x71, 0x90, 0x47, 0x40, 0x3c, 0x04,
69 0x00, 0x05, 0x80, 0x06, 0xa0, 0x02, 0x00, 0x20, 0xe0, 0x31, 0x1e, 0xc3,
70 0x03, 0x1e, 0x79, 0x98, 0x47, 0x60, 0x38, 0x04, 0x00, 0x15, 0x40, 0x0a,
71 0xa0, 0x0a, 0x00, 0x1a, 0xe0, 0x19, 0x9e, 0xe1, 0x01, 0x9e, 0x78, 0xcc,
72 0xa7, 0x32, 0x78, 0x02, 0x80, 0x2a, 0x40, 0x05, 0x80, 0x2a, 0x00, 0x05,
73 0xe0, 0x0d, 0x9e, 0xe0, 0x01, 0xde, 0x78, 0xc6, 0x97, 0x1b, 0x78, 0x03,
74 0x80, 0x52, 0x30, 0x0a, 0x00, 0x95, 0xd2, 0x0a, 0xe0, 0x0f, 0xfe, 0xe0,
75 0x00, 0x7e, 0xf8, 0x87, 0x9f, 0x0f, 0xf8, 0x01, 0x00, 0xa1, 0x0e, 0x15,
76 0x80, 0x55, 0x55, 0x01, 0xe0, 0x01, 0x3c, 0xf0, 0x00, 0x3c, 0xf0, 0x80,
77 0x8f, 0x0f, 0x70, 0x00, 0x00, 0x81, 0x02, 0x14, 0x00, 0x54, 0x55, 0x00,
78 0xc0, 0x01, 0x3c, 0x00, 0x00, 0x0c, 0x60, 0x00, 0x07, 0x03, 0x70, 0x00,
79 0x80, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
80 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
81 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
82 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
83 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
84 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
85 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
86 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
87 0x00, 0x00, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
88 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
89 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
90 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
91 0x00, 0x00, 0x40, 0x01, 0x00, 0x11, 0x09, 0x00, 0x04, 0x00, 0x01, 0x00,
92 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00,
93 0x00, 0x20, 0x01, 0x00, 0x04, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
94 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x49, 0x32, 0x49, 0x49, 0x91,
95 0x24, 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
96 0x00, 0x00, 0x20, 0x49, 0x0a, 0x09, 0xc9, 0x92, 0x14, 0x81, 0x00, 0x00,
97 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x49,
98 0x18, 0x01, 0x49, 0x92, 0x0c, 0x43, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
99 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x49, 0x30, 0x01, 0x49, 0x92,
100 0x14, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
101 0x00, 0x00, 0x08, 0x69, 0x22, 0x09, 0x49, 0xd2, 0x24, 0x24, 0x00, 0x00,
102 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x51,
103 0x1a, 0x09, 0x49, 0xa2, 0x44, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
104 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
105 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
106 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
107 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
108 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
109 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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265 0x88, 0x1a, 0x41, 0x92, 0x34, 0x49, 0x49, 0x68, 0x00, 0x38, 0x10, 0x07,
266 0x00, 0x60, 0x80, 0x00, 0x00, 0x20, 0x42, 0x84, 0x88, 0x14, 0x4e, 0x92,
267 0x28, 0x49, 0x46, 0x50, 0x00, 0x80, 0x83, 0x01, 0x00, 0xa0, 0x6a, 0x00,
268 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
269 0x00, 0x00, 0xfc, 0x00, 0x00, 0xc0, 0x3b, 0x00, 0x00, 0x00, 0x00, 0x00,
270 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, };
diff --git a/arch/m68knommu/platform/68328/bootlogo.pl b/arch/m68knommu/platform/68328/bootlogo.pl
deleted file mode 100644
index b04ae3f50da5..000000000000
--- a/arch/m68knommu/platform/68328/bootlogo.pl
+++ /dev/null
@@ -1,10 +0,0 @@
1
2$_ = join("", <>);
3
4s/(0x[0-9a-f]{2})/sprintf("0x%.2x",ord(pack("b8",unpack("B8",chr(hex($1))))))/gei;
5
6s/^ / .byte /gm;
7s/[,};]+$//gm;
8s/^static.*//gm;
9
10print $_;
diff --git a/arch/m68knommu/platform/68328/config.c b/arch/m68knommu/platform/68328/config.c
deleted file mode 100644
index a7bd21deb00f..000000000000
--- a/arch/m68knommu/platform/68328/config.c
+++ /dev/null
@@ -1,52 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/68328/config.c
5 *
6 * Copyright (C) 1993 Hamish Macdonald
7 * Copyright (C) 1999 D. Jeff Dionne
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file COPYING in the main directory of this archive
11 * for more details.
12 *
13 * VZ Support/Fixes Evan Stawnyczy <e@lineo.ca>
14 */
15
16/***************************************************************************/
17
18#include <linux/types.h>
19#include <linux/kernel.h>
20#include <asm/system.h>
21#include <asm/machdep.h>
22#include <asm/MC68328.h>
23
24/***************************************************************************/
25
26void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
27
28/***************************************************************************/
29
30void m68328_reset (void)
31{
32 local_irq_disable();
33 asm volatile ("moveal #0x10c00000, %a0;\n\t"
34 "moveb #0, 0xFFFFF300;\n\t"
35 "moveal 0(%a0), %sp;\n\t"
36 "moveal 4(%a0), %a0;\n\t"
37 "jmp (%a0);");
38}
39
40/***************************************************************************/
41
42void config_BSP(char *command, int len)
43{
44 printk(KERN_INFO "\n68328 support D. Jeff Dionne <jeff@uclinux.org>\n");
45 printk(KERN_INFO "68328 support Kenneth Albanowski <kjahds@kjshds.com>\n");
46 printk(KERN_INFO "68328/Pilot support Bernhard Kuhn <kuhn@lpr.e-technik.tu-muenchen.de>\n");
47
48 mach_gettod = m68328_timer_gettod;
49 mach_reset = m68328_reset;
50}
51
52/***************************************************************************/
diff --git a/arch/m68knommu/platform/68328/entry.S b/arch/m68knommu/platform/68328/entry.S
deleted file mode 100644
index 676960cf022a..000000000000
--- a/arch/m68knommu/platform/68328/entry.S
+++ /dev/null
@@ -1,263 +0,0 @@
1/*
2 * linux/arch/m68knommu/platform/68328/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file README.legal in the main directory of this archive
8 * for more details.
9 *
10 * Linux/m68k support by Hamish Macdonald
11 */
12
13#include <linux/sys.h>
14#include <linux/linkage.h>
15#include <asm/thread_info.h>
16#include <asm/unistd.h>
17#include <asm/errno.h>
18#include <asm/setup.h>
19#include <asm/segment.h>
20#include <asm/traps.h>
21#include <asm/asm-offsets.h>
22#include <asm/entry.h>
23
24.text
25
26.globl system_call
27.globl resume
28.globl ret_from_exception
29.globl ret_from_signal
30.globl sys_call_table
31.globl ret_from_interrupt
32.globl bad_interrupt
33.globl inthandler1
34.globl inthandler2
35.globl inthandler3
36.globl inthandler4
37.globl inthandler5
38.globl inthandler6
39.globl inthandler7
40
41badsys:
42 movel #-ENOSYS,%sp@(PT_OFF_D0)
43 jra ret_from_exception
44
45do_trace:
46 movel #-ENOSYS,%sp@(PT_OFF_D0) /* needed for strace*/
47 subql #4,%sp
48 SAVE_SWITCH_STACK
49 jbsr syscall_trace_enter
50 RESTORE_SWITCH_STACK
51 addql #4,%sp
52 movel %sp@(PT_OFF_ORIG_D0),%d1
53 movel #-ENOSYS,%d0
54 cmpl #NR_syscalls,%d1
55 jcc 1f
56 lsl #2,%d1
57 lea sys_call_table, %a0
58 jbsr %a0@(%d1)
59
601: movel %d0,%sp@(PT_OFF_D0) /* save the return value */
61 subql #4,%sp /* dummy return address */
62 SAVE_SWITCH_STACK
63 jbsr syscall_trace_leave
64
65ret_from_signal:
66 RESTORE_SWITCH_STACK
67 addql #4,%sp
68 jra ret_from_exception
69
70ENTRY(system_call)
71 SAVE_ALL
72
73 /* save top of frame*/
74 pea %sp@
75 jbsr set_esp0
76 addql #4,%sp
77
78 movel %sp@(PT_OFF_ORIG_D0),%d0
79
80 movel %sp,%d1 /* get thread_info pointer */
81 andl #-THREAD_SIZE,%d1
82 movel %d1,%a2
83 btst #(TIF_SYSCALL_TRACE%8),%a2@(TI_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
84 jne do_trace
85 cmpl #NR_syscalls,%d0
86 jcc badsys
87 lsl #2,%d0
88 lea sys_call_table,%a0
89 movel %a0@(%d0), %a0
90 jbsr %a0@
91 movel %d0,%sp@(PT_OFF_D0) /* save the return value*/
92
93ret_from_exception:
94 btst #5,%sp@(PT_OFF_SR) /* check if returning to kernel*/
95 jeq Luser_return /* if so, skip resched, signals*/
96
97Lkernel_return:
98 RESTORE_ALL
99
100Luser_return:
101 /* only allow interrupts when we are really the last one on the*/
102 /* kernel stack, otherwise stack overflow can occur during*/
103 /* heavy interrupt load*/
104 andw #ALLOWINT,%sr
105
106 movel %sp,%d1 /* get thread_info pointer */
107 andl #-THREAD_SIZE,%d1
108 movel %d1,%a2
1091:
110 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */
111 jne Lwork_to_do
112 RESTORE_ALL
113
114Lwork_to_do:
115 movel %a2@(TI_FLAGS),%d1 /* thread_info->flags */
116 btst #TIF_NEED_RESCHED,%d1
117 jne reschedule
118
119Lsignal_return:
120 subql #4,%sp /* dummy return address*/
121 SAVE_SWITCH_STACK
122 pea %sp@(SWITCH_STACK_SIZE)
123 bsrw do_signal
124 addql #4,%sp
125 RESTORE_SWITCH_STACK
126 addql #4,%sp
127 jra 1b
128
129/*
130 * This is the main interrupt handler, responsible for calling process_int()
131 */
132inthandler1:
133 SAVE_ALL
134 movew %sp@(PT_OFF_FORMATVEC), %d0
135 and #0x3ff, %d0
136
137 movel %sp,%sp@-
138 movel #65,%sp@- /* put vector # on stack*/
139 jbsr process_int /* process the IRQ*/
1403: addql #8,%sp /* pop parameters off stack*/
141 bra ret_from_interrupt
142
143inthandler2:
144 SAVE_ALL
145 movew %sp@(PT_OFF_FORMATVEC), %d0
146 and #0x3ff, %d0
147
148 movel %sp,%sp@-
149 movel #66,%sp@- /* put vector # on stack*/
150 jbsr process_int /* process the IRQ*/
1513: addql #8,%sp /* pop parameters off stack*/
152 bra ret_from_interrupt
153
154inthandler3:
155 SAVE_ALL
156 movew %sp@(PT_OFF_FORMATVEC), %d0
157 and #0x3ff, %d0
158
159 movel %sp,%sp@-
160 movel #67,%sp@- /* put vector # on stack*/
161 jbsr process_int /* process the IRQ*/
1623: addql #8,%sp /* pop parameters off stack*/
163 bra ret_from_interrupt
164
165inthandler4:
166 SAVE_ALL
167 movew %sp@(PT_OFF_FORMATVEC), %d0
168 and #0x3ff, %d0
169
170 movel %sp,%sp@-
171 movel #68,%sp@- /* put vector # on stack*/
172 jbsr process_int /* process the IRQ*/
1733: addql #8,%sp /* pop parameters off stack*/
174 bra ret_from_interrupt
175
176inthandler5:
177 SAVE_ALL
178 movew %sp@(PT_OFF_FORMATVEC), %d0
179 and #0x3ff, %d0
180
181 movel %sp,%sp@-
182 movel #69,%sp@- /* put vector # on stack*/
183 jbsr process_int /* process the IRQ*/
1843: addql #8,%sp /* pop parameters off stack*/
185 bra ret_from_interrupt
186
187inthandler6:
188 SAVE_ALL
189 movew %sp@(PT_OFF_FORMATVEC), %d0
190 and #0x3ff, %d0
191
192 movel %sp,%sp@-
193 movel #70,%sp@- /* put vector # on stack*/
194 jbsr process_int /* process the IRQ*/
1953: addql #8,%sp /* pop parameters off stack*/
196 bra ret_from_interrupt
197
198inthandler7:
199 SAVE_ALL
200 movew %sp@(PT_OFF_FORMATVEC), %d0
201 and #0x3ff, %d0
202
203 movel %sp,%sp@-
204 movel #71,%sp@- /* put vector # on stack*/
205 jbsr process_int /* process the IRQ*/
2063: addql #8,%sp /* pop parameters off stack*/
207 bra ret_from_interrupt
208
209inthandler:
210 SAVE_ALL
211 movew %sp@(PT_OFF_FORMATVEC), %d0
212 and #0x3ff, %d0
213
214 movel %sp,%sp@-
215 movel %d0,%sp@- /* put vector # on stack*/
216 jbsr process_int /* process the IRQ*/
2173: addql #8,%sp /* pop parameters off stack*/
218 bra ret_from_interrupt
219
220ret_from_interrupt:
221 jeq 1f
2222:
223 RESTORE_ALL
2241:
225 moveb %sp@(PT_OFF_SR), %d0
226 and #7, %d0
227 jhi 2b
228
229 /* check if we need to do software interrupts */
230 jeq ret_from_exception
231
232 pea ret_from_exception
233 jra do_softirq
234
235
236/*
237 * Handler for uninitialized and spurious interrupts.
238 */
239ENTRY(bad_interrupt)
240 addql #1,num_spurious
241 rte
242
243/*
244 * Beware - when entering resume, prev (the current task) is
245 * in a0, next (the new task) is in a1,so don't change these
246 * registers until their contents are no longer needed.
247 */
248ENTRY(resume)
249 movel %a0,%d1 /* save prev thread in d1 */
250 movew %sr,%a0@(TASK_THREAD+THREAD_SR) /* save sr */
251 movel %usp,%a2 /* save usp */
252 movel %a2,%a0@(TASK_THREAD+THREAD_USP)
253
254 SAVE_SWITCH_STACK
255 movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack */
256 movel %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new thread stack */
257 RESTORE_SWITCH_STACK
258
259 movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore user stack */
260 movel %a0,%usp
261 movew %a1@(TASK_THREAD+THREAD_SR),%sr /* restore thread status reg */
262 rts
263
diff --git a/arch/m68knommu/platform/68328/head-de2.S b/arch/m68knommu/platform/68328/head-de2.S
deleted file mode 100644
index f632fdcb93e9..000000000000
--- a/arch/m68knommu/platform/68328/head-de2.S
+++ /dev/null
@@ -1,128 +0,0 @@
1
2#define MEM_END 0x00800000 /* Memory size 8Mb */
3
4#undef CRT_DEBUG
5
6.macro PUTC CHAR
7#ifdef CRT_DEBUG
8 moveq #\CHAR, %d7
9 jsr putc
10#endif
11.endm
12
13 .global _start
14 .global _rambase
15 .global _ramvec
16 .global _ramstart
17 .global _ramend
18
19 .data
20
21/*
22 * Set up the usable of RAM stuff
23 */
24_rambase:
25 .long 0
26_ramvec:
27 .long 0
28_ramstart:
29 .long 0
30_ramend:
31 .long 0
32
33 .text
34
35_start:
36
37/*
38 * Setup initial stack
39 */
40 /* disable all interrupts */
41 movew #0x2700, %sr
42 movel #-1, 0xfffff304
43 movel #MEM_END-4, %sp
44
45 PUTC '\r'
46 PUTC '\n'
47 PUTC 'A'
48 PUTC 'B'
49
50/*
51 * Determine end of RAM
52 */
53
54 movel #MEM_END, %a0
55 movel %a0, _ramend
56
57 PUTC 'C'
58
59/*
60 * Move ROM filesystem above bss :-)
61 */
62
63 moveal #_sbss, %a0 /* romfs at the start of bss */
64 moveal #_ebss, %a1 /* Set up destination */
65 movel %a0, %a2 /* Copy of bss start */
66
67 movel 8(%a0), %d1 /* Get size of ROMFS */
68 addql #8, %d1 /* Allow for rounding */
69 andl #0xfffffffc, %d1 /* Whole words */
70
71 addl %d1, %a0 /* Copy from end */
72 addl %d1, %a1 /* Copy from end */
73 movel %a1, _ramstart /* Set start of ram */
74
751:
76 movel -(%a0), %d0 /* Copy dword */
77 movel %d0, -(%a1)
78 cmpl %a0, %a2 /* Check if at end */
79 bne 1b
80
81 PUTC 'D'
82
83/*
84 * Initialize BSS segment to 0
85 */
86
87 lea _sbss, %a0
88 lea _ebss, %a1
89
90 /* Copy 0 to %a0 until %a0 == %a1 */
912: cmpal %a0, %a1
92 beq 1f
93 clrl (%a0)+
94 bra 2b
951:
96
97 PUTC 'E'
98
99/*
100 * Load the current task pointer and stack
101 */
102
103 lea init_thread_union, %a0
104 lea 0x2000(%a0), %sp
105
106 PUTC 'F'
107 PUTC '\r'
108 PUTC '\n'
109
110/*
111 * Go
112 */
113
114 jmp start_kernel
115
116/*
117 * Local functions
118 */
119
120#ifdef CRT_DEBUG
121putc:
122 moveb %d7, 0xfffff907
1231:
124 movew 0xfffff906, %d7
125 andw #0x2000, %d7
126 beq 1b
127 rts
128#endif
diff --git a/arch/m68knommu/platform/68328/head-pilot.S b/arch/m68knommu/platform/68328/head-pilot.S
deleted file mode 100644
index aecff532b343..000000000000
--- a/arch/m68knommu/platform/68328/head-pilot.S
+++ /dev/null
@@ -1,222 +0,0 @@
1/*
2 * linux/arch/m68knommu/platform/68328/head-pilot.S
3 * - A startup file for the MC68328
4 *
5 * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
6 * Kenneth Albanowski <kjahds@kjahds.com>,
7 * The Silver Hammer Group, Ltd.
8 *
9 * (c) 1995, Dionne & Associates
10 * (c) 1995, DKG Display Tech.
11 */
12
13#define ASSEMBLY
14
15#define IMMED #
16#define DBG_PUTC(x) moveb IMMED x, 0xfffff907
17
18
19.global _stext
20.global _start
21
22.global _rambase
23.global _ramvec
24.global _ramstart
25.global _ramend
26
27.global penguin_bits
28
29#ifdef CONFIG_PILOT
30
31#define IMR 0xFFFFF304
32
33 .data
34 .align 16
35
36penguin_bits:
37#include "bootlogo.rh"
38
39#endif
40
41/*****************************************************************************/
42
43.data
44
45/*
46 * Set up the usable of RAM stuff. Size of RAM is determined then
47 * an initial stack set up at the end.
48 */
49.align 4
50_ramvec:
51.long 0
52_rambase:
53.long 0
54_ramstart:
55.long 0
56_ramend:
57.long 0
58
59.text
60
61_start:
62_stext:
63
64
65#ifdef CONFIG_M68328
66
67#ifdef CONFIG_PILOT
68 .byte 0x4e, 0xfa, 0x00, 0x0a /* Jmp +X bytes */
69 .byte 'b', 'o', 'o', 't'
70 .word 10000
71
72 nop
73#endif
74
75 moveq #0, %d0
76 movew %d0, 0xfffff618 /* Watchdog off */
77 movel #0x00011f07, 0xfffff114 /* CS A1 Mask */
78
79 movew #0x0800, 0xfffff906 /* Ignore CTS */
80 movew #0x010b, 0xfffff902 /* BAUD to 9600 */
81
82 movew #0x2410, 0xfffff200 /* PLLCR */
83 movew #0x123, 0xfffff202 /* PLLFSR */
84
85#ifdef CONFIG_PILOT
86 moveb #0, 0xfffffA27 /* LCKCON */
87 movel #_start, 0xfffffA00 /* LSSA */
88 moveb #0xa, 0xfffffA05 /* LVPW */
89 movew #0x9f, 0xFFFFFa08 /* LXMAX */
90 movew #0x9f, 0xFFFFFa0a /* LYMAX */
91 moveb #9, 0xfffffa29 /* LBAR */
92 moveb #0, 0xfffffa25 /* LPXCD */
93 moveb #0x04, 0xFFFFFa20 /* LPICF */
94 moveb #0x58, 0xfffffA27 /* LCKCON */
95 moveb #0x85, 0xfffff429 /* PFDATA */
96 moveb #0xd8, 0xfffffA27 /* LCKCON */
97 moveb #0xc5, 0xfffff429 /* PFDATA */
98 moveb #0xd5, 0xfffff429 /* PFDATA */
99
100 moveal #0x00100000, %a3
101 moveal #0x100ffc00, %a4
102#endif /* CONFIG_PILOT */
103
104#endif /* CONFIG_M68328 */
105
106 movew #0x2700, %sr
107 lea %a4@(-4), %sp
108
109 DBG_PUTC('\r')
110 DBG_PUTC('\n')
111 DBG_PUTC('A')
112
113 moveq #0,%d0
114 movew #16384, %d0 /* PLL settle wait loop */
115L0:
116 subw #1, %d0
117 bne L0
118
119 DBG_PUTC('B')
120
121 /* Copy command line from beginning of RAM (+16) to end of bss */
122 movel #CONFIG_VECTORBASE, %d7
123 addl #16, %d7
124 moveal %d7, %a0
125 moveal #_ebss, %a1
126 lea %a1@(512), %a2
127
128 DBG_PUTC('C')
129
130 /* Copy %a0 to %a1 until %a1 == %a2 */
131L2:
132 movel %a0@+, %d0
133 movel %d0, %a1@+
134 cmpal %a1, %a2
135 bhi L2
136
137 /* Copy data+init segment from ROM to RAM */
138 moveal #_etext, %a0
139 moveal #_sdata, %a1
140 moveal #__init_end, %a2
141
142 DBG_PUTC('D')
143
144 /* Copy %a0 to %a1 until %a1 == %a2 */
145LD1:
146 movel %a0@+, %d0
147 movel %d0, %a1@+
148 cmpal %a1, %a2
149 bhi LD1
150
151 DBG_PUTC('E')
152
153 moveal #_sbss, %a0
154 moveal #_ebss, %a1
155
156 /* Copy 0 to %a0 until %a0 == %a1 */
157L1:
158 movel #0, %a0@+
159 cmpal %a0, %a1
160 bhi L1
161
162 DBG_PUTC('F')
163
164 /* Copy command line from end of bss to command line */
165 moveal #_ebss, %a0
166 moveal #command_line, %a1
167 lea %a1@(512), %a2
168
169 DBG_PUTC('G')
170
171 /* Copy %a0 to %a1 until %a1 == %a2 */
172L3:
173 movel %a0@+, %d0
174 movel %d0, %a1@+
175 cmpal %a1, %a2
176 bhi L3
177
178 movel #_sdata, %d0
179 movel %d0, _rambase
180 movel #_ebss, %d0
181 movel %d0, _ramstart
182
183 movel %a4, %d0
184 subl #4096, %d0 /* Reserve 4K of stack */
185 moveq #79, %d7
186 movel %d0, _ramend
187
188 movel %a3, %d0
189 movel %d0, rom_length
190
191 pea 0
192 pea env
193 pea %sp@(4)
194 pea 0
195
196 DBG_PUTC('H')
197
198#ifdef CONFIG_PILOT
199 movel #penguin_bits, 0xFFFFFA00
200 moveb #10, 0xFFFFFA05
201 movew #160, 0xFFFFFA08
202 movew #160, 0xFFFFFA0A
203#endif /* CONFIG_PILOT */
204
205 DBG_PUTC('I')
206
207 lea init_thread_union, %a0
208 lea 0x2000(%a0), %sp
209
210 DBG_PUTC('J')
211 DBG_PUTC('\r')
212 DBG_PUTC('\n')
213
214 jsr start_kernel
215_exit:
216
217 jmp _exit
218
219
220 .data
221env:
222 .long 0
diff --git a/arch/m68knommu/platform/68328/head-ram.S b/arch/m68knommu/platform/68328/head-ram.S
deleted file mode 100644
index 7f1aeeacb219..000000000000
--- a/arch/m68knommu/platform/68328/head-ram.S
+++ /dev/null
@@ -1,141 +0,0 @@
1
2 .global __main
3 .global __rom_start
4
5 .global _rambase
6 .global _ramstart
7
8 .global splash_bits
9 .global _start
10 .global _stext
11 .global _edata
12
13#define DEBUG
14#define ROM_OFFSET 0x10C00000
15#define STACK_GAURD 0x10
16
17 .text
18
19_start:
20_stext:
21 movew #0x2700, %sr /* Exceptions off! */
22
23#if 0
24 /* Init chip registers. uCsimm specific */
25 moveb #0x00, 0xfffffb0b /* Watchdog off */
26 moveb #0x10, 0xfffff000 /* SCR */
27
28 movew #0x2400, 0xfffff200 /* PLLCR */
29 movew #0x0123, 0xfffff202 /* PLLFSR */
30
31 moveb #0x00, 0xfffff40b /* enable chip select */
32 moveb #0x00, 0xfffff423 /* enable /DWE */
33 moveb #0x08, 0xfffffd0d /* disable hardmap */
34 moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
35
36 movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
37 movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
38
39 movew #0x8f00, 0xfffffc00 /* DRAM configuration */
40 movew #0x9667, 0xfffffc02 /* DRAM control */
41 movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
42 movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
43
44 moveb #0x40, 0xfffff300 /* IVR */
45 movel #0x007FFFFF, %d0 /* IMR */
46 movel %d0, 0xfffff304
47
48 moveb 0xfffff42b, %d0
49 andb #0xe0, %d0
50 moveb %d0, 0xfffff42b
51
52 moveb #0x08, 0xfffff907 /* Ignore CTS */
53 movew #0x010b, 0xfffff902 /* BAUD to 9600 */
54 movew #0xe100, 0xfffff900 /* enable */
55#endif
56
57 movew #16384, %d0 /* PLL settle wait loop */
58L0:
59 subw #1, %d0
60 bne L0
61#ifdef DEBUG
62 moveq #70, %d7 /* 'F' */
63 moveb %d7,0xfffff907 /* No absolute addresses */
64pclp1:
65 movew 0xfffff906, %d7
66 andw #0x2000, %d7
67 beq pclp1
68#endif /* DEBUG */
69
70#ifdef DEBUG
71 moveq #82, %d7 /* 'R' */
72 moveb %d7,0xfffff907 /* No absolute addresses */
73pclp3:
74 movew 0xfffff906, %d7
75 andw #0x2000, %d7
76 beq pclp3
77#endif /* DEBUG */
78 moveal #0x007ffff0, %ssp
79 moveal #_sbss, %a0
80 moveal #_ebss, %a1
81
82 /* Copy 0 to %a0 until %a0 >= %a1 */
83L1:
84 movel #0, %a0@+
85 cmpal %a0, %a1
86 bhi L1
87
88#ifdef DEBUG
89 moveq #67, %d7 /* 'C' */
90 jsr putc
91#endif /* DEBUG */
92
93 pea 0
94 pea env
95 pea %sp@(4)
96 pea 0
97
98#ifdef DEBUG
99 moveq #70, %d7 /* 'F' */
100 jsr putc
101#endif /* DEBUG */
102
103lp:
104 jsr start_kernel
105 jmp lp
106_exit:
107
108 jmp _exit
109
110__main:
111 /* nothing */
112 rts
113
114#ifdef DEBUG
115putc:
116 moveb %d7,0xfffff907
117pclp:
118 movew 0xfffff906, %d7
119 andw #0x2000, %d7
120 beq pclp
121 rts
122#endif /* DEBUG */
123
124 .data
125
126/*
127 * Set up the usable of RAM stuff. Size of RAM is determined then
128 * an initial stack set up at the end.
129 */
130.align 4
131_ramvec:
132.long 0
133_rambase:
134.long 0
135_ramstart:
136.long 0
137_ramend:
138.long 0
139
140env:
141 .long 0
diff --git a/arch/m68knommu/platform/68328/head-rom.S b/arch/m68knommu/platform/68328/head-rom.S
deleted file mode 100644
index 6ec77d3ea0b3..000000000000
--- a/arch/m68knommu/platform/68328/head-rom.S
+++ /dev/null
@@ -1,110 +0,0 @@
1
2 .global _start
3 .global _stext
4
5 .global _rambase
6 .global _ramvec
7 .global _ramstart
8 .global _ramend
9
10#ifdef CONFIG_INIT_LCD
11 .global splash_bits
12#endif
13
14 .data
15
16/*
17 * Set up the usable of RAM stuff. Size of RAM is determined then
18 * an initial stack set up at the end.
19 */
20.align 4
21_ramvec:
22.long 0
23_rambase:
24.long 0
25_ramstart:
26.long 0
27_ramend:
28.long 0
29
30#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)
31
32#ifdef CONFIG_INIT_LCD
33splash_bits:
34#include "bootlogo.rh"
35#endif
36
37 .text
38_start:
39_stext: movew #0x2700,%sr
40#ifdef CONFIG_INIT_LCD
41 movel #splash_bits, 0xfffffA00 /* LSSA */
42 moveb #0x28, 0xfffffA05 /* LVPW */
43 movew #0x280, 0xFFFFFa08 /* LXMAX */
44 movew #0x1df, 0xFFFFFa0a /* LYMAX */
45 moveb #0, 0xfffffa29 /* LBAR */
46 moveb #0, 0xfffffa25 /* LPXCD */
47 moveb #0x08, 0xFFFFFa20 /* LPICF */
48 moveb #0x01, 0xFFFFFA21 /* -ve pol */
49 moveb #0x81, 0xfffffA27 /* LCKCON */
50 movew #0xff00, 0xfffff412 /* LCD pins */
51#endif
52 moveal #RAMEND-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp
53 movew #32767, %d0 /* PLL settle wait loop */
541: subq #1, %d0
55 bne 1b
56
57 /* Copy data segment from ROM to RAM */
58 moveal #_etext, %a0
59 moveal #_sdata, %a1
60 moveal #_edata, %a2
61
62 /* Copy %a0 to %a1 until %a1 == %a2 */
631: movel %a0@+, %a1@+
64 cmpal %a1, %a2
65 bhi 1b
66
67 moveal #_sbss, %a0
68 moveal #_ebss, %a1
69 /* Copy 0 to %a0 until %a0 == %a1 */
70
711:
72 clrl %a0@+
73 cmpal %a0, %a1
74 bhi 1b
75
76 movel #_sdata, %d0
77 movel %d0, _rambase
78 movel #_ebss, %d0
79 movel %d0, _ramstart
80 movel #RAMEND-CONFIG_MEMORY_RESERVE*0x100000, %d0
81 movel %d0, _ramend
82 movel #CONFIG_VECTORBASE, %d0
83 movel %d0, _ramvec
84
85/*
86 * load the current task pointer and stack
87 */
88 lea init_thread_union, %a0
89 lea 0x2000(%a0), %sp
90
911: jsr start_kernel
92 bra 1b
93_exit:
94
95 jmp _exit
96
97
98putc:
99 moveb %d7,0xfffff907
1001:
101 movew 0xfffff906, %d7
102 andw #0x2000, %d7
103 beq 1b
104 rts
105
106 .data
107env:
108 .long 0
109 .text
110
diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c
deleted file mode 100644
index e5631831a200..000000000000
--- a/arch/m68knommu/platform/68328/ints.c
+++ /dev/null
@@ -1,186 +0,0 @@
1/*
2 * linux/arch/m68knommu/platform/68328/ints.c
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive
6 * for more details.
7 *
8 * Copyright 1996 Roman Zippel
9 * Copyright 1999 D. Jeff Dionne <jeff@rt-control.com>
10 */
11
12#include <linux/types.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <asm/traps.h>
18#include <asm/io.h>
19#include <asm/machdep.h>
20
21#if defined(CONFIG_M68328)
22#include <asm/MC68328.h>
23#elif defined(CONFIG_M68EZ328)
24#include <asm/MC68EZ328.h>
25#elif defined(CONFIG_M68VZ328)
26#include <asm/MC68VZ328.h>
27#endif
28
29/* assembler routines */
30asmlinkage void system_call(void);
31asmlinkage void buserr(void);
32asmlinkage void trap(void);
33asmlinkage void trap3(void);
34asmlinkage void trap4(void);
35asmlinkage void trap5(void);
36asmlinkage void trap6(void);
37asmlinkage void trap7(void);
38asmlinkage void trap8(void);
39asmlinkage void trap9(void);
40asmlinkage void trap10(void);
41asmlinkage void trap11(void);
42asmlinkage void trap12(void);
43asmlinkage void trap13(void);
44asmlinkage void trap14(void);
45asmlinkage void trap15(void);
46asmlinkage void trap33(void);
47asmlinkage void trap34(void);
48asmlinkage void trap35(void);
49asmlinkage void trap36(void);
50asmlinkage void trap37(void);
51asmlinkage void trap38(void);
52asmlinkage void trap39(void);
53asmlinkage void trap40(void);
54asmlinkage void trap41(void);
55asmlinkage void trap42(void);
56asmlinkage void trap43(void);
57asmlinkage void trap44(void);
58asmlinkage void trap45(void);
59asmlinkage void trap46(void);
60asmlinkage void trap47(void);
61asmlinkage irqreturn_t bad_interrupt(int, void *);
62asmlinkage irqreturn_t inthandler(void);
63asmlinkage irqreturn_t inthandler1(void);
64asmlinkage irqreturn_t inthandler2(void);
65asmlinkage irqreturn_t inthandler3(void);
66asmlinkage irqreturn_t inthandler4(void);
67asmlinkage irqreturn_t inthandler5(void);
68asmlinkage irqreturn_t inthandler6(void);
69asmlinkage irqreturn_t inthandler7(void);
70
71extern e_vector *_ramvec;
72
73/* The number of spurious interrupts */
74volatile unsigned int num_spurious;
75
76/* The 68k family did not have a good way to determine the source
77 * of interrupts until later in the family. The EC000 core does
78 * not provide the vector number on the stack, we vector everything
79 * into one vector and look in the blasted mask register...
80 * This code is designed to be fast, almost constant time, not clean!
81 */
82void process_int(int vec, struct pt_regs *fp)
83{
84 int irq;
85 int mask;
86
87 unsigned long pend = ISR;
88
89 while (pend) {
90 if (pend & 0x0000ffff) {
91 if (pend & 0x000000ff) {
92 if (pend & 0x0000000f) {
93 mask = 0x00000001;
94 irq = 0;
95 } else {
96 mask = 0x00000010;
97 irq = 4;
98 }
99 } else {
100 if (pend & 0x00000f00) {
101 mask = 0x00000100;
102 irq = 8;
103 } else {
104 mask = 0x00001000;
105 irq = 12;
106 }
107 }
108 } else {
109 if (pend & 0x00ff0000) {
110 if (pend & 0x000f0000) {
111 mask = 0x00010000;
112 irq = 16;
113 } else {
114 mask = 0x00100000;
115 irq = 20;
116 }
117 } else {
118 if (pend & 0x0f000000) {
119 mask = 0x01000000;
120 irq = 24;
121 } else {
122 mask = 0x10000000;
123 irq = 28;
124 }
125 }
126 }
127
128 while (! (mask & pend)) {
129 mask <<=1;
130 irq++;
131 }
132
133 do_IRQ(irq, fp);
134 pend &= ~mask;
135 }
136}
137
138static void intc_irq_unmask(struct irq_data *d)
139{
140 IMR &= ~(1 << d->irq);
141}
142
143static void intc_irq_mask(struct irq_data *d)
144{
145 IMR |= (1 << d->irq);
146}
147
148static struct irq_chip intc_irq_chip = {
149 .name = "M68K-INTC",
150 .irq_mask = intc_irq_mask,
151 .irq_unmask = intc_irq_unmask,
152};
153
154/*
155 * This function should be called during kernel startup to initialize
156 * the machine vector table.
157 */
158void __init init_IRQ(void)
159{
160 int i;
161
162 /* set up the vectors */
163 for (i = 72; i < 256; ++i)
164 _ramvec[i] = (e_vector) bad_interrupt;
165
166 _ramvec[32] = system_call;
167
168 _ramvec[65] = (e_vector) inthandler1;
169 _ramvec[66] = (e_vector) inthandler2;
170 _ramvec[67] = (e_vector) inthandler3;
171 _ramvec[68] = (e_vector) inthandler4;
172 _ramvec[69] = (e_vector) inthandler5;
173 _ramvec[70] = (e_vector) inthandler6;
174 _ramvec[71] = (e_vector) inthandler7;
175
176 IVR = 0x40; /* Set DragonBall IVR (interrupt base) to 64 */
177
178 /* turn off all interrupts */
179 IMR = ~0;
180
181 for (i = 0; (i < NR_IRQS); i++) {
182 set_irq_chip(i, &intc_irq_chip);
183 set_irq_handler(i, handle_level_irq);
184 }
185}
186
diff --git a/arch/m68knommu/platform/68328/romvec.S b/arch/m68knommu/platform/68328/romvec.S
deleted file mode 100644
index 31084466eae8..000000000000
--- a/arch/m68knommu/platform/68328/romvec.S
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * linux/arch/m68knommu/platform/68328/romvec.S
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive
6 * for more details.
7 *
8 * Copyright 1996 Roman Zippel
9 * Copyright 1999 D. Jeff Dionne <jeff@rt-control.com>
10 * Copyright 2006 Greg Ungerer <gerg@snapgear.com>
11 */
12
13.global _start
14.global _buserr
15.global trap
16.global system_call
17
18.section .romvec
19
20e_vectors:
21.long CONFIG_RAMBASE+CONFIG_RAMSIZE-4, _start, buserr, trap
22.long trap, trap, trap, trap
23.long trap, trap, trap, trap
24.long trap, trap, trap, trap
25.long trap, trap, trap, trap
26.long trap, trap, trap, trap
27.long trap, trap, trap, trap
28.long trap, trap, trap, trap
29/* TRAP #0-15 */
30.long system_call, trap, trap, trap
31.long trap, trap, trap, trap
32.long trap, trap, trap, trap
33.long trap, trap, trap, trap
34.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
35
diff --git a/arch/m68knommu/platform/68328/timers.c b/arch/m68knommu/platform/68328/timers.c
deleted file mode 100644
index 309f725995bf..000000000000
--- a/arch/m68knommu/platform/68328/timers.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/68328/timers.c
5 *
6 * Copyright (C) 1993 Hamish Macdonald
7 * Copyright (C) 1999 D. Jeff Dionne
8 * Copyright (C) 2001 Georges Menie, Ken Desmet
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive
12 * for more details.
13 */
14
15/***************************************************************************/
16
17#include <linux/types.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/interrupt.h>
21#include <linux/irq.h>
22#include <linux/clocksource.h>
23#include <asm/setup.h>
24#include <asm/system.h>
25#include <asm/pgtable.h>
26#include <asm/machdep.h>
27#include <asm/MC68VZ328.h>
28
29/***************************************************************************/
30
31#if defined(CONFIG_DRAGEN2)
32/* with a 33.16 MHz clock, this will give usec resolution to the time functions */
33#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
34#define CLOCK_PRE 7
35#define TICKS_PER_JIFFY 41450
36
37#elif defined(CONFIG_XCOPILOT_BUGS)
38/*
39 * The only thing I know is that CLK32 is not available on Xcopilot
40 * I have little idea about what frequency SYSCLK has on Xcopilot.
41 * The values for prescaler and compare registers were simply
42 * taken from the original source
43 */
44#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
45#define CLOCK_PRE 2
46#define TICKS_PER_JIFFY 0xd7e4
47
48#else
49/* default to using the 32Khz clock */
50#define CLOCK_SOURCE TCTL_CLKSOURCE_32KHZ
51#define CLOCK_PRE 31
52#define TICKS_PER_JIFFY 10
53#endif
54
55static u32 m68328_tick_cnt;
56
57/***************************************************************************/
58
59static irqreturn_t hw_tick(int irq, void *dummy)
60{
61 /* Reset Timer1 */
62 TSTAT &= 0;
63
64 m68328_tick_cnt += TICKS_PER_JIFFY;
65 return arch_timer_interrupt(irq, dummy);
66}
67
68/***************************************************************************/
69
70static struct irqaction m68328_timer_irq = {
71 .name = "timer",
72 .flags = IRQF_DISABLED | IRQF_TIMER,
73 .handler = hw_tick,
74};
75
76/***************************************************************************/
77
78static cycle_t m68328_read_clk(struct clocksource *cs)
79{
80 unsigned long flags;
81 u32 cycles;
82
83 local_irq_save(flags);
84 cycles = m68328_tick_cnt + TCN;
85 local_irq_restore(flags);
86
87 return cycles;
88}
89
90/***************************************************************************/
91
92static struct clocksource m68328_clk = {
93 .name = "timer",
94 .rating = 250,
95 .read = m68328_read_clk,
96 .shift = 20,
97 .mask = CLOCKSOURCE_MASK(32),
98 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
99};
100
101/***************************************************************************/
102
103void hw_timer_init(void)
104{
105 /* disable timer 1 */
106 TCTL = 0;
107
108 /* set ISR */
109 setup_irq(TMR_IRQ_NUM, &m68328_timer_irq);
110
111 /* Restart mode, Enable int, Set clock source */
112 TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
113 TPRER = CLOCK_PRE;
114 TCMP = TICKS_PER_JIFFY;
115
116 /* Enable timer 1 */
117 TCTL |= TCTL_TEN;
118 m68328_clk.mult = clocksource_hz2mult(TICKS_PER_JIFFY*HZ, m68328_clk.shift);
119 clocksource_register(&m68328_clk);
120}
121
122/***************************************************************************/
123
124void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec)
125{
126 long now = RTCTIME;
127
128 *year = *mon = *day = 1;
129 *hour = (now >> 24) % 24;
130 *min = (now >> 16) % 60;
131 *sec = now % 60;
132}
133
134/***************************************************************************/
diff --git a/arch/m68knommu/platform/68360/Makefile b/arch/m68knommu/platform/68360/Makefile
deleted file mode 100644
index cf5af73a5789..000000000000
--- a/arch/m68knommu/platform/68360/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
1#
2# Makefile for arch/m68knommu/platform/68360.
3#
4
5obj-y := config.o commproc.o entry.o ints.o
6
7extra-y := head.o
8
9$(obj)/head.o: $(obj)/head-$(MODEL).o
10 ln -sf head-$(MODEL).o $(obj)/head.o
diff --git a/arch/m68knommu/platform/68360/commproc.c b/arch/m68knommu/platform/68360/commproc.c
deleted file mode 100644
index 8e4e10cc0080..000000000000
--- a/arch/m68knommu/platform/68360/commproc.c
+++ /dev/null
@@ -1,308 +0,0 @@
1/*
2 * General Purpose functions for the global management of the
3 * Communication Processor Module.
4 *
5 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
6 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
7 *
8 * In addition to the individual control of the communication
9 * channels, there are a few functions that globally affect the
10 * communication processor.
11 *
12 * Buffer descriptors must be allocated from the dual ported memory
13 * space. The allocator for that is here. When the communication
14 * process is reset, we reclaim the memory available. There is
15 * currently no deallocator for this memory.
16 * The amount of space available is platform dependent. On the
17 * MBX, the EPPC software loads additional microcode into the
18 * communication processor, and uses some of the DP ram for this
19 * purpose. Current, the first 512 bytes and the last 256 bytes of
20 * memory are used. Right now I am conservative and only use the
21 * memory that can never be used for microcode. If there are
22 * applications that require more DP ram, we can expand the boundaries
23 * but then we have to be careful of any downloaded microcode.
24 *
25 */
26
27/*
28 * Michael Leslie <mleslie@lineo.com>
29 * adapted Dan Malek's ppc8xx drivers to M68360
30 *
31 */
32
33#include <linux/errno.h>
34#include <linux/sched.h>
35#include <linux/kernel.h>
36#include <linux/param.h>
37#include <linux/string.h>
38#include <linux/mm.h>
39#include <linux/interrupt.h>
40#include <asm/irq.h>
41#include <asm/m68360.h>
42#include <asm/commproc.h>
43
44/* #include <asm/page.h> */
45/* #include <asm/pgtable.h> */
46extern void *_quicc_base;
47extern unsigned int system_clock;
48
49
50static uint dp_alloc_base; /* Starting offset in DP ram */
51static uint dp_alloc_top; /* Max offset + 1 */
52
53#if 0
54static void *host_buffer; /* One page of host buffer */
55static void *host_end; /* end + 1 */
56#endif
57
58/* struct cpm360_t *cpmp; */ /* Pointer to comm processor space */
59
60QUICC *pquicc;
61/* QUICC *quicc_dpram; */ /* mleslie - temporary; use extern pquicc elsewhere instead */
62
63
64/* CPM interrupt vector functions. */
65struct cpm_action {
66 void (*handler)(void *);
67 void *dev_id;
68};
69static struct cpm_action cpm_vecs[CPMVEC_NR];
70static void cpm_interrupt(int irq, void * dev, struct pt_regs * regs);
71static void cpm_error_interrupt(void *);
72
73/* prototypes: */
74void cpm_install_handler(int vec, void (*handler)(), void *dev_id);
75void m360_cpm_reset(void);
76
77
78
79
80void m360_cpm_reset()
81{
82/* pte_t *pte; */
83
84 pquicc = (struct quicc *)(_quicc_base); /* initialized in crt0_rXm.S */
85
86 /* Perform a CPM reset. */
87 pquicc->cp_cr = (SOFTWARE_RESET | CMD_FLAG);
88
89 /* Wait for CPM to become ready (should be 2 clocks). */
90 while (pquicc->cp_cr & CMD_FLAG);
91
92 /* On the recommendation of the 68360 manual, p. 7-60
93 * - Set sdma interrupt service mask to 7
94 * - Set sdma arbitration ID to 4
95 */
96 pquicc->sdma_sdcr = 0x0740;
97
98
99 /* Claim the DP memory for our use.
100 */
101 dp_alloc_base = CPM_DATAONLY_BASE;
102 dp_alloc_top = dp_alloc_base + CPM_DATAONLY_SIZE;
103
104
105 /* Set the host page for allocation.
106 */
107 /* host_buffer = host_page_addr; */
108 /* host_end = host_page_addr + PAGE_SIZE; */
109
110 /* pte = find_pte(&init_mm, host_page_addr); */
111 /* pte_val(*pte) |= _PAGE_NO_CACHE; */
112 /* flush_tlb_page(current->mm->mmap, host_buffer); */
113
114 /* Tell everyone where the comm processor resides.
115 */
116/* cpmp = (cpm360_t *)commproc; */
117}
118
119
120/* This is called during init_IRQ. We used to do it above, but this
121 * was too early since init_IRQ was not yet called.
122 */
123void
124cpm_interrupt_init(void)
125{
126 /* Initialize the CPM interrupt controller.
127 * NOTE THAT pquicc had better have been initialized!
128 * reference: MC68360UM p. 7-377
129 */
130 pquicc->intr_cicr =
131 (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
132 (CPM_INTERRUPT << 13) |
133 CICR_HP_MASK |
134 (CPM_VECTOR_BASE << 5) |
135 CICR_SPS;
136
137 /* mask all CPM interrupts from reaching the cpu32 core: */
138 pquicc->intr_cimr = 0;
139
140
141 /* mles - If I understand correctly, the 360 just pops over to the CPM
142 * specific vector, obviating the necessity to vector through the IRQ
143 * whose priority the CPM is set to. This needs a closer look, though.
144 */
145
146 /* Set our interrupt handler with the core CPU. */
147/* if (request_irq(CPM_INTERRUPT, cpm_interrupt, 0, "cpm", NULL) != 0) */
148/* panic("Could not allocate CPM IRQ!"); */
149
150 /* Install our own error handler.
151 */
152 /* I think we want to hold off on this one for the moment - mles */
153 /* cpm_install_handler(CPMVEC_ERROR, cpm_error_interrupt, NULL); */
154
155 /* master CPM interrupt enable */
156 /* pquicc->intr_cicr |= CICR_IEN; */ /* no such animal for 360 */
157}
158
159
160
161/* CPM interrupt controller interrupt.
162*/
163static void
164cpm_interrupt(int irq, void * dev, struct pt_regs * regs)
165{
166 /* uint vec; */
167
168 /* mles: Note that this stuff is currently being performed by
169 * M68360_do_irq(int vec, struct pt_regs *fp), in ../ints.c */
170
171 /* figure out the vector */
172 /* call that vector's handler */
173 /* clear the irq's bit in the service register */
174
175#if 0 /* old 860 stuff: */
176 /* Get the vector by setting the ACK bit and then reading
177 * the register.
178 */
179 ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr = 1;
180 vec = ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr;
181 vec >>= 11;
182
183
184 if (cpm_vecs[vec].handler != 0)
185 (*cpm_vecs[vec].handler)(cpm_vecs[vec].dev_id);
186 else
187 ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec);
188
189 /* After servicing the interrupt, we have to remove the status
190 * indicator.
191 */
192 ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr |= (1 << vec);
193#endif
194
195}
196
197/* The CPM can generate the error interrupt when there is a race condition
198 * between generating and masking interrupts. All we have to do is ACK it
199 * and return. This is a no-op function so we don't need any special
200 * tests in the interrupt handler.
201 */
202static void
203cpm_error_interrupt(void *dev)
204{
205}
206
207/* Install a CPM interrupt handler.
208*/
209void
210cpm_install_handler(int vec, void (*handler)(), void *dev_id)
211{
212
213 request_irq(vec, handler, 0, "timer", dev_id);
214
215/* if (cpm_vecs[vec].handler != 0) */
216/* printk(KERN_INFO "CPM interrupt %x replacing %x\n", */
217/* (uint)handler, (uint)cpm_vecs[vec].handler); */
218/* cpm_vecs[vec].handler = handler; */
219/* cpm_vecs[vec].dev_id = dev_id; */
220
221 /* ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr |= (1 << vec); */
222/* pquicc->intr_cimr |= (1 << vec); */
223
224}
225
226/* Free a CPM interrupt handler.
227*/
228void
229cpm_free_handler(int vec)
230{
231 cpm_vecs[vec].handler = NULL;
232 cpm_vecs[vec].dev_id = NULL;
233 /* ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec); */
234 pquicc->intr_cimr &= ~(1 << vec);
235}
236
237
238
239
240/* Allocate some memory from the dual ported ram. We may want to
241 * enforce alignment restrictions, but right now everyone is a good
242 * citizen.
243 */
244uint
245m360_cpm_dpalloc(uint size)
246{
247 uint retloc;
248
249 if ((dp_alloc_base + size) >= dp_alloc_top)
250 return(CPM_DP_NOSPACE);
251
252 retloc = dp_alloc_base;
253 dp_alloc_base += size;
254
255 return(retloc);
256}
257
258
259#if 0 /* mleslie - for now these are simply kmalloc'd */
260/* We also own one page of host buffer space for the allocation of
261 * UART "fifos" and the like.
262 */
263uint
264m360_cpm_hostalloc(uint size)
265{
266 uint retloc;
267
268 if ((host_buffer + size) >= host_end)
269 return(0);
270
271 retloc = host_buffer;
272 host_buffer += size;
273
274 return(retloc);
275}
276#endif
277
278
279/* Set a baud rate generator. This needs lots of work. There are
280 * four BRGs, any of which can be wired to any channel.
281 * The internal baud rate clock is the system clock divided by 16.
282 * This assumes the baudrate is 16x oversampled by the uart.
283 */
284/* #define BRG_INT_CLK (((bd_t *)__res)->bi_intfreq * 1000000) */
285#define BRG_INT_CLK system_clock
286#define BRG_UART_CLK (BRG_INT_CLK/16)
287
288void
289m360_cpm_setbrg(uint brg, uint rate)
290{
291 volatile uint *bp;
292
293 /* This is good enough to get SMCs running.....
294 */
295 /* bp = (uint *)&cpmp->cp_brgc1; */
296 bp = (volatile uint *)(&pquicc->brgc[0].l);
297 bp += brg;
298 *bp = ((BRG_UART_CLK / rate - 1) << 1) | CPM_BRG_EN;
299}
300
301
302/*
303 * Local variables:
304 * c-indent-level: 4
305 * c-basic-offset: 4
306 * tab-width: 4
307 * End:
308 */
diff --git a/arch/m68knommu/platform/68360/config.c b/arch/m68knommu/platform/68360/config.c
deleted file mode 100644
index 9dd5bca38749..000000000000
--- a/arch/m68knommu/platform/68360/config.c
+++ /dev/null
@@ -1,186 +0,0 @@
1/*
2 * linux/arch/m68knommu/platform/68360/config.c
3 *
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
5 * Copyright (C) 1993 Hamish Macdonald
6 * Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
10 * for more details.
11 */
12
13#include <stdarg.h>
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19
20#include <asm/setup.h>
21#include <asm/system.h>
22#include <asm/pgtable.h>
23#include <asm/machdep.h>
24#include <asm/m68360.h>
25
26#ifdef CONFIG_UCQUICC
27#include <asm/bootstd.h>
28#endif
29
30extern void m360_cpm_reset(void);
31
32// Mask to select if the PLL prescaler is enabled.
33#define MCU_PREEN ((unsigned short)(0x0001 << 13))
34
35#if defined(CONFIG_UCQUICC)
36#define OSCILLATOR (unsigned long int)33000000
37#endif
38
39unsigned long int system_clock;
40
41extern QUICC *pquicc;
42
43/* TODO DON"T Hard Code this */
44/* calculate properly using the right PLL and prescaller */
45// unsigned int system_clock = 33000000l;
46extern unsigned long int system_clock; //In kernel setup.c
47
48
49static irqreturn_t hw_tick(int irq, void *dummy)
50{
51 /* Reset Timer1 */
52 /* TSTAT &= 0; */
53
54 pquicc->timer_ter1 = 0x0002; /* clear timer event */
55
56 return arch_timer_interrupt(irq, dummy);
57}
58
59static struct irqaction m68360_timer_irq = {
60 .name = "timer",
61 .flags = IRQF_DISABLED | IRQF_TIMER,
62 .handler = hw_tick,
63};
64
65void hw_timer_init(void)
66{
67 unsigned char prescaler;
68 unsigned short tgcr_save;
69
70#if 0
71 /* Restart mode, Enable int, 32KHz, Enable timer */
72 TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
73 /* Set prescaler (Divide 32KHz by 32)*/
74 TPRER = 31;
75 /* Set compare register 32Khz / 32 / 10 = 100 */
76 TCMP = 10;
77
78 request_irq(IRQ_MACHSPEC | 1, timer_routine, 0, "timer", NULL);
79#endif
80
81 /* General purpose quicc timers: MC68360UM p7-20 */
82
83 /* Set up timer 1 (in [1..4]) to do 100Hz */
84 tgcr_save = pquicc->timer_tgcr & 0xfff0;
85 pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */
86 /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
87
88 prescaler = 8;
89 pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */
90 (unsigned short)((prescaler - 1) << 8);
91
92 pquicc->timer_tcn1 = 0x0000; /* initial count */
93 /* calculate interval for 100Hz based on the _system_clock: */
94 pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */
95
96 pquicc->timer_ter1 = 0x0003; /* clear timer events */
97
98 /* enable timer 1 interrupt in CIMR */
99 setup_irq(CPMVEC_TIMER1, &m68360_timer_irq);
100
101 /* Start timer 1: */
102 tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001;
103 pquicc->timer_tgcr = tgcr_save;
104}
105
106void BSP_gettod (int *yearp, int *monp, int *dayp,
107 int *hourp, int *minp, int *secp)
108{
109}
110
111int BSP_set_clock_mmss(unsigned long nowtime)
112{
113#if 0
114 short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
115
116 tod->second1 = real_seconds / 10;
117 tod->second2 = real_seconds % 10;
118 tod->minute1 = real_minutes / 10;
119 tod->minute2 = real_minutes % 10;
120#endif
121 return 0;
122}
123
124void BSP_reset (void)
125{
126 local_irq_disable();
127 asm volatile (
128 "moveal #_start, %a0;\n"
129 "moveb #0, 0xFFFFF300;\n"
130 "moveal 0(%a0), %sp;\n"
131 "moveal 4(%a0), %a0;\n"
132 "jmp (%a0);\n"
133 );
134}
135
136unsigned char *scc1_hwaddr;
137static int errno;
138
139#if defined (CONFIG_UCQUICC)
140_bsc0(char *, getserialnum)
141_bsc1(unsigned char *, gethwaddr, int, a)
142_bsc1(char *, getbenv, char *, a)
143#endif
144
145
146void config_BSP(char *command, int len)
147{
148 unsigned char *p;
149
150 m360_cpm_reset();
151
152 /* Calculate the real system clock value. */
153 {
154 unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr);
155 if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128
156 {
157 int mf = (int)(pquicc->sim_pllcr & 0x0fff);
158 system_clock = (OSCILLATOR / 128) * (mf + 1);
159 }
160 else
161 {
162 int mf = (int)(pquicc->sim_pllcr & 0x0fff);
163 system_clock = (OSCILLATOR) * (mf + 1);
164 }
165 }
166
167 printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n");
168
169#if defined(CONFIG_UCQUICC) && 0
170 printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum());
171 p = scc1_hwaddr = gethwaddr(0);
172 printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
173 p[0], p[1], p[2], p[3], p[4], p[5]);
174
175 p = getbenv("APPEND");
176 if (p)
177 strcpy(p,command);
178 else
179 command[0] = 0;
180#else
181 scc1_hwaddr = "\00\01\02\03\04\05";
182#endif
183
184 mach_gettod = BSP_gettod;
185 mach_reset = BSP_reset;
186}
diff --git a/arch/m68knommu/platform/68360/entry.S b/arch/m68knommu/platform/68360/entry.S
deleted file mode 100644
index 46c1b18c9dcb..000000000000
--- a/arch/m68knommu/platform/68360/entry.S
+++ /dev/null
@@ -1,184 +0,0 @@
1/*
2 * linux/arch/m68knommu/platform/68360/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2001 SED Systems, a Division of Calian Ltd.
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file README.legal in the main directory of this archive
9 * for more details.
10 *
11 * Linux/m68k support by Hamish Macdonald
12 * M68360 Port by SED Systems, and Lineo.
13 */
14
15#include <linux/sys.h>
16#include <linux/linkage.h>
17#include <asm/thread_info.h>
18#include <asm/unistd.h>
19#include <asm/errno.h>
20#include <asm/setup.h>
21#include <asm/segment.h>
22#include <asm/traps.h>
23#include <asm/asm-offsets.h>
24#include <asm/entry.h>
25
26.text
27
28.globl system_call
29.globl resume
30.globl ret_from_exception
31.globl ret_from_signal
32.globl sys_call_table
33.globl ret_from_interrupt
34.globl bad_interrupt
35.globl inthandler
36
37badsys:
38 movel #-ENOSYS,%sp@(PT_OFF_D0)
39 jra ret_from_exception
40
41do_trace:
42 movel #-ENOSYS,%sp@(PT_OFF_D0) /* needed for strace*/
43 subql #4,%sp
44 SAVE_SWITCH_STACK
45 jbsr syscall_trace_enter
46 RESTORE_SWITCH_STACK
47 addql #4,%sp
48 movel %sp@(PT_OFF_ORIG_D0),%d1
49 movel #-ENOSYS,%d0
50 cmpl #NR_syscalls,%d1
51 jcc 1f
52 lsl #2,%d1
53 lea sys_call_table, %a0
54 jbsr %a0@(%d1)
55
561: movel %d0,%sp@(PT_OFF_D0) /* save the return value */
57 subql #4,%sp /* dummy return address */
58 SAVE_SWITCH_STACK
59 jbsr syscall_trace_leave
60
61ret_from_signal:
62 RESTORE_SWITCH_STACK
63 addql #4,%sp
64 jra ret_from_exception
65
66ENTRY(system_call)
67 SAVE_ALL
68
69 /* save top of frame*/
70 pea %sp@
71 jbsr set_esp0
72 addql #4,%sp
73
74 movel %sp@(PT_OFF_ORIG_D0),%d0
75
76 movel %sp,%d1 /* get thread_info pointer */
77 andl #-THREAD_SIZE,%d1
78 movel %d1,%a2
79 btst #(TIF_SYSCALL_TRACE%8),%a2@(TI_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
80 jne do_trace
81 cmpl #NR_syscalls,%d0
82 jcc badsys
83 lsl #2,%d0
84 lea sys_call_table,%a0
85 movel %a0@(%d0), %a0
86 jbsr %a0@
87 movel %d0,%sp@(PT_OFF_D0) /* save the return value*/
88
89ret_from_exception:
90 btst #5,%sp@(PT_OFF_SR) /* check if returning to kernel*/
91 jeq Luser_return /* if so, skip resched, signals*/
92
93Lkernel_return:
94 RESTORE_ALL
95
96Luser_return:
97 /* only allow interrupts when we are really the last one on the*/
98 /* kernel stack, otherwise stack overflow can occur during*/
99 /* heavy interrupt load*/
100 andw #ALLOWINT,%sr
101
102 movel %sp,%d1 /* get thread_info pointer */
103 andl #-THREAD_SIZE,%d1
104 movel %d1,%a2
1051:
106 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */
107 jne Lwork_to_do
108 RESTORE_ALL
109
110Lwork_to_do:
111 movel %a2@(TI_FLAGS),%d1 /* thread_info->flags */
112 btst #TIF_NEED_RESCHED,%d1
113 jne reschedule
114
115Lsignal_return:
116 subql #4,%sp /* dummy return address*/
117 SAVE_SWITCH_STACK
118 pea %sp@(SWITCH_STACK_SIZE)
119 bsrw do_signal
120 addql #4,%sp
121 RESTORE_SWITCH_STACK
122 addql #4,%sp
123 jra 1b
124
125/*
126 * This is the main interrupt handler, responsible for calling do_IRQ()
127 */
128inthandler:
129 SAVE_ALL
130 movew %sp@(PT_OFF_FORMATVEC), %d0
131 and.l #0x3ff, %d0
132 lsr.l #0x02, %d0
133
134 movel %sp,%sp@-
135 movel %d0,%sp@- /* put vector # on stack*/
136 jbsr do_IRQ /* process the IRQ*/
1373: addql #8,%sp /* pop parameters off stack*/
138 bra ret_from_interrupt
139
140ret_from_interrupt:
141 jeq 1f
1422:
143 RESTORE_ALL
1441:
145 moveb %sp@(PT_OFF_SR), %d0
146 and #7, %d0
147 jhi 2b
148 /* check if we need to do software interrupts */
149
150 movel irq_stat+CPUSTAT_SOFTIRQ_PENDING,%d0
151 jeq ret_from_exception
152
153 pea ret_from_exception
154 jra do_softirq
155
156
157/*
158 * Handler for uninitialized and spurious interrupts.
159 */
160bad_interrupt:
161 addql #1,num_spurious
162 rte
163
164/*
165 * Beware - when entering resume, prev (the current task) is
166 * in a0, next (the new task) is in a1,so don't change these
167 * registers until their contents are no longer needed.
168 */
169ENTRY(resume)
170 movel %a0,%d1 /* save prev thread in d1 */
171 movew %sr,%a0@(TASK_THREAD+THREAD_SR) /* save sr */
172 movel %usp,%a2 /* save usp */
173 movel %a2,%a0@(TASK_THREAD+THREAD_USP)
174
175 SAVE_SWITCH_STACK
176 movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack */
177 movel %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new thread stack */
178 RESTORE_SWITCH_STACK
179
180 movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore user stack */
181 movel %a0,%usp
182 movew %a1@(TASK_THREAD+THREAD_SR),%sr /* restore thread status reg */
183 rts
184
diff --git a/arch/m68knommu/platform/68360/head-ram.S b/arch/m68knommu/platform/68360/head-ram.S
deleted file mode 100644
index 8eb94fb6b971..000000000000
--- a/arch/m68knommu/platform/68360/head-ram.S
+++ /dev/null
@@ -1,403 +0,0 @@
1/* arch/m68knommu/platform/68360/head-ram.S
2 *
3 * Startup code for Motorola 68360
4 *
5 * Copyright 2001 (C) SED Systems, a Division of Calian Ltd.
6 * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S
7 * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7
8 * uClinux Kernel
9 * Copyright (C) Michael Leslie <mleslie@lineo.com>
10 * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
11 * Copyright (C) 1998 D. Jeff Dionne <jeff@uclinux.org>,
12 *
13 */
14#define ASSEMBLY
15
16.global _stext
17.global _start
18
19.global _rambase
20.global _ramvec
21.global _ramstart
22.global _ramend
23
24.global _quicc_base
25.global _periph_base
26
27#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)
28#define ROMEND (CONFIG_ROMBASE + CONFIG_ROMSIZE)
29
30#define REGB 0x1000
31#define PEPAR (_dprbase + REGB + 0x0016)
32#define GMR (_dprbase + REGB + 0x0040)
33#define OR0 (_dprbase + REGB + 0x0054)
34#define BR0 (_dprbase + REGB + 0x0050)
35#define OR1 (_dprbase + REGB + 0x0064)
36#define BR1 (_dprbase + REGB + 0x0060)
37#define OR4 (_dprbase + REGB + 0x0094)
38#define BR4 (_dprbase + REGB + 0x0090)
39#define OR6 (_dprbase + REGB + 0x00b4)
40#define BR6 (_dprbase + REGB + 0x00b0)
41#define OR7 (_dprbase + REGB + 0x00c4)
42#define BR7 (_dprbase + REGB + 0x00c0)
43
44#define MCR (_dprbase + REGB + 0x0000)
45#define AVR (_dprbase + REGB + 0x0008)
46
47#define SYPCR (_dprbase + REGB + 0x0022)
48
49#define PLLCR (_dprbase + REGB + 0x0010)
50#define CLKOCR (_dprbase + REGB + 0x000C)
51#define CDVCR (_dprbase + REGB + 0x0014)
52
53#define BKAR (_dprbase + REGB + 0x0030)
54#define BKCR (_dprbase + REGB + 0x0034)
55#define SWIV (_dprbase + REGB + 0x0023)
56#define PICR (_dprbase + REGB + 0x0026)
57#define PITR (_dprbase + REGB + 0x002A)
58
59/* Define for all memory configuration */
60#define MCU_SIM_GMR 0x00000000
61#define SIM_OR_MASK 0x0fffffff
62
63/* Defines for chip select zero - the flash */
64#define SIM_OR0_MASK 0x20000002
65#define SIM_BR0_MASK 0x00000001
66
67
68/* Defines for chip select one - the RAM */
69#define SIM_OR1_MASK 0x10000000
70#define SIM_BR1_MASK 0x00000001
71
72#define MCU_SIM_MBAR_ADRS 0x0003ff00
73#define MCU_SIM_MBAR_BA_MASK 0xfffff000
74#define MCU_SIM_MBAR_AS_MASK 0x00000001
75
76#define MCU_SIM_PEPAR 0x00B4
77
78#define MCU_DISABLE_INTRPTS 0x2700
79#define MCU_SIM_AVR 0x00
80
81#define MCU_SIM_MCR 0x00005cff
82
83#define MCU_SIM_CLKOCR 0x00
84#define MCU_SIM_PLLCR 0x8000
85#define MCU_SIM_CDVCR 0x0000
86
87#define MCU_SIM_SYPCR 0x0000
88#define MCU_SIM_SWIV 0x00
89#define MCU_SIM_PICR 0x0000
90#define MCU_SIM_PITR 0x0000
91
92
93#include <asm/m68360_regs.h>
94
95
96/*
97 * By the time this RAM specific code begins to execute, DPRAM
98 * and DRAM should already be mapped and accessible.
99 */
100
101 .text
102_start:
103_stext:
104 nop
105 ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
106 /* We should not need to setup the boot stack the reset should do it. */
107 movea.l #RAMEND, %sp /*set up stack at the end of DRAM:*/
108
109set_mbar_register:
110 moveq.l #0x07, %d1 /* Setup MBAR */
111 movec %d1, %dfc
112
113 lea.l MCU_SIM_MBAR_ADRS, %a0
114 move.l #_dprbase, %d0
115 andi.l #MCU_SIM_MBAR_BA_MASK, %d0
116 ori.l #MCU_SIM_MBAR_AS_MASK, %d0
117 moves.l %d0, %a0@
118
119 moveq.l #0x05, %d1
120 movec.l %d1, %dfc
121
122 /* Now we can begin to access registers in DPRAM */
123
124set_sim_mcr:
125 /* Set Module Configuration Register */
126 move.l #MCU_SIM_MCR, MCR
127
128 /* to do: Determine cause of reset */
129
130 /*
131 * configure system clock MC68360 p. 6-40
132 * (value +1)*osc/128 = system clock
133 */
134set_sim_clock:
135 move.w #MCU_SIM_PLLCR, PLLCR
136 move.b #MCU_SIM_CLKOCR, CLKOCR
137 move.w #MCU_SIM_CDVCR, CDVCR
138
139 /* Wait for the PLL to settle */
140 move.w #16384, %d0
141pll_settle_wait:
142 subi.w #1, %d0
143 bne pll_settle_wait
144
145 /* Setup the system protection register, and watchdog timer register */
146 move.b #MCU_SIM_SWIV, SWIV
147 move.w #MCU_SIM_PICR, PICR
148 move.w #MCU_SIM_PITR, PITR
149 move.w #MCU_SIM_SYPCR, SYPCR
150
151 /* Clear DPRAM - system + parameter */
152 movea.l #_dprbase, %a0
153 movea.l #_dprbase+0x2000, %a1
154
155 /* Copy 0 to %a0 until %a0 == %a1 */
156clear_dpram:
157 movel #0, %a0@+
158 cmpal %a0, %a1
159 bhi clear_dpram
160
161configure_memory_controller:
162 /* Set up Global Memory Register (GMR) */
163 move.l #MCU_SIM_GMR, %d0
164 move.l %d0, GMR
165
166configure_chip_select_0:
167 move.l #RAMEND, %d0
168 subi.l #__ramstart, %d0
169 subq.l #0x01, %d0
170 eori.l #SIM_OR_MASK, %d0
171 ori.l #SIM_OR0_MASK, %d0
172 move.l %d0, OR0
173
174 move.l #__ramstart, %d0
175 ori.l #SIM_BR0_MASK, %d0
176 move.l %d0, BR0
177
178configure_chip_select_1:
179 move.l #ROMEND, %d0
180 subi.l #__rom_start, %d0
181 subq.l #0x01, %d0
182 eori.l #SIM_OR_MASK, %d0
183 ori.l #SIM_OR1_MASK, %d0
184 move.l %d0, OR1
185
186 move.l #__rom_start, %d0
187 ori.l #SIM_BR1_MASK, %d0
188 move.l %d0, BR1
189
190 move.w #MCU_SIM_PEPAR, PEPAR
191
192 /* point to vector table: */
193 move.l #_romvec, %a0
194 move.l #_ramvec, %a1
195copy_vectors:
196 move.l %a0@, %d0
197 move.l %d0, %a1@
198 move.l %a0@, %a1@
199 addq.l #0x04, %a0
200 addq.l #0x04, %a1
201 cmp.l #_start, %a0
202 blt copy_vectors
203
204 move.l #_ramvec, %a1
205 movec %a1, %vbr
206
207
208 /* Copy data segment from ROM to RAM */
209 moveal #_stext, %a0
210 moveal #_sdata, %a1
211 moveal #_edata, %a2
212
213 /* Copy %a0 to %a1 until %a1 == %a2 */
214LD1:
215 move.l %a0@, %d0
216 addq.l #0x04, %a0
217 move.l %d0, %a1@
218 addq.l #0x04, %a1
219 cmp.l #_edata, %a1
220 blt LD1
221
222 moveal #_sbss, %a0
223 moveal #_ebss, %a1
224
225 /* Copy 0 to %a0 until %a0 == %a1 */
226L1:
227 movel #0, %a0@+
228 cmpal %a0, %a1
229 bhi L1
230
231load_quicc:
232 move.l #_dprbase, _quicc_base
233
234store_ram_size:
235 /* Set ram size information */
236 move.l #_sdata, _rambase
237 move.l #_ebss, _ramstart
238 move.l #RAMEND, %d0
239 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
240 move.l %d0, _ramend /* Different from RAMEND.*/
241
242 pea 0
243 pea env
244 pea %sp@(4)
245 pea 0
246
247 lea init_thread_union, %a2
248 lea 0x2000(%a2), %sp
249
250lp:
251 jsr start_kernel
252
253_exit:
254 jmp _exit
255
256
257 .data
258 .align 4
259env:
260 .long 0
261_quicc_base:
262 .long 0
263_periph_base:
264 .long 0
265_ramvec:
266 .long 0
267_rambase:
268 .long 0
269_ramstart:
270 .long 0
271_ramend:
272 .long 0
273_dprbase:
274 .long 0xffffe000
275
276 .text
277
278 /*
279 * These are the exception vectors at boot up, they are copied into RAM
280 * and then overwritten as needed.
281 */
282
283.section ".data..initvect","awx"
284 .long RAMEND /* Reset: Initial Stack Pointer - 0. */
285 .long _start /* Reset: Initial Program Counter - 1. */
286 .long buserr /* Bus Error - 2. */
287 .long trap /* Address Error - 3. */
288 .long trap /* Illegal Instruction - 4. */
289 .long trap /* Divide by zero - 5. */
290 .long trap /* CHK, CHK2 Instructions - 6. */
291 .long trap /* TRAPcc, TRAPV Instructions - 7. */
292 .long trap /* Privilege Violation - 8. */
293 .long trap /* Trace - 9. */
294 .long trap /* Line 1010 Emulator - 10. */
295 .long trap /* Line 1111 Emualtor - 11. */
296 .long trap /* Harware Breakpoint - 12. */
297 .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */
298 .long trap /* Format Error - 14. */
299 .long trap /* Uninitialized Interrupt - 15. */
300 .long trap /* (Unassigned, Reserver) - 16. */
301 .long trap /* (Unassigned, Reserver) - 17. */
302 .long trap /* (Unassigned, Reserver) - 18. */
303 .long trap /* (Unassigned, Reserver) - 19. */
304 .long trap /* (Unassigned, Reserver) - 20. */
305 .long trap /* (Unassigned, Reserver) - 21. */
306 .long trap /* (Unassigned, Reserver) - 22. */
307 .long trap /* (Unassigned, Reserver) - 23. */
308 .long trap /* Spurious Interrupt - 24. */
309 .long trap /* Level 1 Interrupt Autovector - 25. */
310 .long trap /* Level 2 Interrupt Autovector - 26. */
311 .long trap /* Level 3 Interrupt Autovector - 27. */
312 .long trap /* Level 4 Interrupt Autovector - 28. */
313 .long trap /* Level 5 Interrupt Autovector - 29. */
314 .long trap /* Level 6 Interrupt Autovector - 30. */
315 .long trap /* Level 7 Interrupt Autovector - 31. */
316 .long system_call /* Trap Instruction Vectors 0 - 32. */
317 .long trap /* Trap Instruction Vectors 1 - 33. */
318 .long trap /* Trap Instruction Vectors 2 - 34. */
319 .long trap /* Trap Instruction Vectors 3 - 35. */
320 .long trap /* Trap Instruction Vectors 4 - 36. */
321 .long trap /* Trap Instruction Vectors 5 - 37. */
322 .long trap /* Trap Instruction Vectors 6 - 38. */
323 .long trap /* Trap Instruction Vectors 7 - 39. */
324 .long trap /* Trap Instruction Vectors 8 - 40. */
325 .long trap /* Trap Instruction Vectors 9 - 41. */
326 .long trap /* Trap Instruction Vectors 10 - 42. */
327 .long trap /* Trap Instruction Vectors 11 - 43. */
328 .long trap /* Trap Instruction Vectors 12 - 44. */
329 .long trap /* Trap Instruction Vectors 13 - 45. */
330 .long trap /* Trap Instruction Vectors 14 - 46. */
331 .long trap /* Trap Instruction Vectors 15 - 47. */
332 .long 0 /* (Reserved for Coprocessor) - 48. */
333 .long 0 /* (Reserved for Coprocessor) - 49. */
334 .long 0 /* (Reserved for Coprocessor) - 50. */
335 .long 0 /* (Reserved for Coprocessor) - 51. */
336 .long 0 /* (Reserved for Coprocessor) - 52. */
337 .long 0 /* (Reserved for Coprocessor) - 53. */
338 .long 0 /* (Reserved for Coprocessor) - 54. */
339 .long 0 /* (Reserved for Coprocessor) - 55. */
340 .long 0 /* (Reserved for Coprocessor) - 56. */
341 .long 0 /* (Reserved for Coprocessor) - 57. */
342 .long 0 /* (Reserved for Coprocessor) - 58. */
343 .long 0 /* (Unassigned, Reserved) - 59. */
344 .long 0 /* (Unassigned, Reserved) - 60. */
345 .long 0 /* (Unassigned, Reserved) - 61. */
346 .long 0 /* (Unassigned, Reserved) - 62. */
347 .long 0 /* (Unassigned, Reserved) - 63. */
348 /* The assignment of these vectors to the CPM is */
349 /* dependent on the configuration of the CPM vba */
350 /* fields. */
351 .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */
352 .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */
353 .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */
354 .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */
355 .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */
356 .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */
357 .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */
358 .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */
359 .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */
360 .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */
361 .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */
362 .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */
363 .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */
364 .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */
365 .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */
366 .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */
367 .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */
368 .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */
369 .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */
370 .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */
371 .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */
372 .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */
373 .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */
374 .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */
375 .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */
376 .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */
377 .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */
378 .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */
379 .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */
380 .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */
381 .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */
382 .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */
383 /* I don't think anything uses the vectors after here. */
384 .long 0 /* (User-Defined Vectors 34) - 96. */
385 .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */
386 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */
387 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */
388 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */
389 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */
390 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */
391 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */
392 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */
393 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */
394 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */
395 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */
396 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */
397 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */
398 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */
399 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */
400 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */
401 .long 0,0,0 /* (User-Defined Vectors 190 - 192). */
402.text
403ignore: rte
diff --git a/arch/m68knommu/platform/68360/head-rom.S b/arch/m68knommu/platform/68360/head-rom.S
deleted file mode 100644
index 97510e55b802..000000000000
--- a/arch/m68knommu/platform/68360/head-rom.S
+++ /dev/null
@@ -1,414 +0,0 @@
1/* arch/m68knommu/platform/68360/head-rom.S
2 *
3 * Startup code for Motorola 68360
4 *
5 * Copyright (C) SED Systems, a Division of Calian Ltd.
6 * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S
7 * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7
8 * uClinux Kernel
9 * Copyright (C) Michael Leslie <mleslie@lineo.com>
10 * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
11 * Copyright (C) 1998 D. Jeff Dionne <jeff@uclinux.org>,
12 *
13 */
14
15.global _stext
16.global _sbss
17.global _start
18
19.global _rambase
20.global _ramvec
21.global _ramstart
22.global _ramend
23
24.global _quicc_base
25.global _periph_base
26
27#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)
28
29#define REGB 0x1000
30#define PEPAR (_dprbase + REGB + 0x0016)
31#define GMR (_dprbase + REGB + 0x0040)
32#define OR0 (_dprbase + REGB + 0x0054)
33#define BR0 (_dprbase + REGB + 0x0050)
34
35#define OR1 (_dprbase + REGB + 0x0064)
36#define BR1 (_dprbase + REGB + 0x0060)
37
38#define OR2 (_dprbase + REGB + 0x0074)
39#define BR2 (_dprbase + REGB + 0x0070)
40
41#define OR3 (_dprbase + REGB + 0x0084)
42#define BR3 (_dprbase + REGB + 0x0080)
43
44#define OR4 (_dprbase + REGB + 0x0094)
45#define BR4 (_dprbase + REGB + 0x0090)
46
47#define OR5 (_dprbase + REGB + 0x00A4)
48#define BR5 (_dprbase + REGB + 0x00A0)
49
50#define OR6 (_dprbase + REGB + 0x00b4)
51#define BR6 (_dprbase + REGB + 0x00b0)
52
53#define OR7 (_dprbase + REGB + 0x00c4)
54#define BR7 (_dprbase + REGB + 0x00c0)
55
56#define MCR (_dprbase + REGB + 0x0000)
57#define AVR (_dprbase + REGB + 0x0008)
58
59#define SYPCR (_dprbase + REGB + 0x0022)
60
61#define PLLCR (_dprbase + REGB + 0x0010)
62#define CLKOCR (_dprbase + REGB + 0x000C)
63#define CDVCR (_dprbase + REGB + 0x0014)
64
65#define BKAR (_dprbase + REGB + 0x0030)
66#define BKCR (_dprbase + REGB + 0x0034)
67#define SWIV (_dprbase + REGB + 0x0023)
68#define PICR (_dprbase + REGB + 0x0026)
69#define PITR (_dprbase + REGB + 0x002A)
70
71/* Define for all memory configuration */
72#define MCU_SIM_GMR 0x00000000
73#define SIM_OR_MASK 0x0fffffff
74
75/* Defines for chip select zero - the flash */
76#define SIM_OR0_MASK 0x20000000
77#define SIM_BR0_MASK 0x00000001
78
79/* Defines for chip select one - the RAM */
80#define SIM_OR1_MASK 0x10000000
81#define SIM_BR1_MASK 0x00000001
82
83#define MCU_SIM_MBAR_ADRS 0x0003ff00
84#define MCU_SIM_MBAR_BA_MASK 0xfffff000
85#define MCU_SIM_MBAR_AS_MASK 0x00000001
86
87#define MCU_SIM_PEPAR 0x00B4
88
89#define MCU_DISABLE_INTRPTS 0x2700
90#define MCU_SIM_AVR 0x00
91
92#define MCU_SIM_MCR 0x00005cff
93
94#define MCU_SIM_CLKOCR 0x00
95#define MCU_SIM_PLLCR 0x8000
96#define MCU_SIM_CDVCR 0x0000
97
98#define MCU_SIM_SYPCR 0x0000
99#define MCU_SIM_SWIV 0x00
100#define MCU_SIM_PICR 0x0000
101#define MCU_SIM_PITR 0x0000
102
103
104#include <asm/m68360_regs.h>
105
106
107/*
108 * By the time this RAM specific code begins to execute, DPRAM
109 * and DRAM should already be mapped and accessible.
110 */
111
112 .text
113_start:
114_stext:
115 nop
116 ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
117 /* We should not need to setup the boot stack the reset should do it. */
118 movea.l #RAMEND, %sp /* set up stack at the end of DRAM:*/
119
120
121set_mbar_register:
122 moveq.l #0x07, %d1 /* Setup MBAR */
123 movec %d1, %dfc
124
125 lea.l MCU_SIM_MBAR_ADRS, %a0
126 move.l #_dprbase, %d0
127 andi.l #MCU_SIM_MBAR_BA_MASK, %d0
128 ori.l #MCU_SIM_MBAR_AS_MASK, %d0
129 moves.l %d0, %a0@
130
131 moveq.l #0x05, %d1
132 movec.l %d1, %dfc
133
134 /* Now we can begin to access registers in DPRAM */
135
136set_sim_mcr:
137 /* Set Module Configuration Register */
138 move.l #MCU_SIM_MCR, MCR
139
140 /* to do: Determine cause of reset */
141
142 /*
143 * configure system clock MC68360 p. 6-40
144 * (value +1)*osc/128 = system clock
145 * or
146 * (value + 1)*osc = system clock
147 * You do not need to divide the oscillator by 128 unless you want to.
148 */
149set_sim_clock:
150 move.w #MCU_SIM_PLLCR, PLLCR
151 move.b #MCU_SIM_CLKOCR, CLKOCR
152 move.w #MCU_SIM_CDVCR, CDVCR
153
154 /* Wait for the PLL to settle */
155 move.w #16384, %d0
156pll_settle_wait:
157 subi.w #1, %d0
158 bne pll_settle_wait
159
160 /* Setup the system protection register, and watchdog timer register */
161 move.b #MCU_SIM_SWIV, SWIV
162 move.w #MCU_SIM_PICR, PICR
163 move.w #MCU_SIM_PITR, PITR
164 move.w #MCU_SIM_SYPCR, SYPCR
165
166 /* Clear DPRAM - system + parameter */
167 movea.l #_dprbase, %a0
168 movea.l #_dprbase+0x2000, %a1
169
170 /* Copy 0 to %a0 until %a0 == %a1 */
171clear_dpram:
172 movel #0, %a0@+
173 cmpal %a0, %a1
174 bhi clear_dpram
175
176configure_memory_controller:
177 /* Set up Global Memory Register (GMR) */
178 move.l #MCU_SIM_GMR, %d0
179 move.l %d0, GMR
180
181configure_chip_select_0:
182 move.l #0x00400000, %d0
183 subq.l #0x01, %d0
184 eori.l #SIM_OR_MASK, %d0
185 ori.l #SIM_OR0_MASK, %d0
186 move.l %d0, OR0
187
188 move.l #__rom_start, %d0
189 ori.l #SIM_BR0_MASK, %d0
190 move.l %d0, BR0
191
192 move.l #0x0, BR1
193 move.l #0x0, BR2
194 move.l #0x0, BR3
195 move.l #0x0, BR4
196 move.l #0x0, BR5
197 move.l #0x0, BR6
198 move.l #0x0, BR7
199
200 move.w #MCU_SIM_PEPAR, PEPAR
201
202 /* point to vector table: */
203 move.l #_romvec, %a0
204 move.l #_ramvec, %a1
205copy_vectors:
206 move.l %a0@, %d0
207 move.l %d0, %a1@
208 move.l %a0@, %a1@
209 addq.l #0x04, %a0
210 addq.l #0x04, %a1
211 cmp.l #_start, %a0
212 blt copy_vectors
213
214 move.l #_ramvec, %a1
215 movec %a1, %vbr
216
217
218 /* Copy data segment from ROM to RAM */
219 moveal #_etext, %a0
220 moveal #_sdata, %a1
221 moveal #_edata, %a2
222
223 /* Copy %a0 to %a1 until %a1 == %a2 */
224LD1:
225 move.l %a0@, %d0
226 addq.l #0x04, %a0
227 move.l %d0, %a1@
228 addq.l #0x04, %a1
229 cmp.l #_edata, %a1
230 blt LD1
231
232 moveal #_sbss, %a0
233 moveal #_ebss, %a1
234
235 /* Copy 0 to %a0 until %a0 == %a1 */
236L1:
237 movel #0, %a0@+
238 cmpal %a0, %a1
239 bhi L1
240
241load_quicc:
242 move.l #_dprbase, _quicc_base
243
244store_ram_size:
245 /* Set ram size information */
246 move.l #_sdata, _rambase
247 move.l #_ebss, _ramstart
248 move.l #RAMEND, %d0
249 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
250 move.l %d0, _ramend /* Different from RAMEND.*/
251
252 pea 0
253 pea env
254 pea %sp@(4)
255 pea 0
256
257 lea init_thread_union, %a2
258 lea 0x2000(%a2), %sp
259
260lp:
261 jsr start_kernel
262
263_exit:
264 jmp _exit
265
266
267 .data
268 .align 4
269env:
270 .long 0
271_quicc_base:
272 .long 0
273_periph_base:
274 .long 0
275_ramvec:
276 .long 0
277_rambase:
278 .long 0
279_ramstart:
280 .long 0
281_ramend:
282 .long 0
283_dprbase:
284 .long 0xffffe000
285
286
287 .text
288
289 /*
290 * These are the exception vectors at boot up, they are copied into RAM
291 * and then overwritten as needed.
292 */
293
294.section ".data..initvect","awx"
295 .long RAMEND /* Reset: Initial Stack Pointer - 0. */
296 .long _start /* Reset: Initial Program Counter - 1. */
297 .long buserr /* Bus Error - 2. */
298 .long trap /* Address Error - 3. */
299 .long trap /* Illegal Instruction - 4. */
300 .long trap /* Divide by zero - 5. */
301 .long trap /* CHK, CHK2 Instructions - 6. */
302 .long trap /* TRAPcc, TRAPV Instructions - 7. */
303 .long trap /* Privilege Violation - 8. */
304 .long trap /* Trace - 9. */
305 .long trap /* Line 1010 Emulator - 10. */
306 .long trap /* Line 1111 Emualtor - 11. */
307 .long trap /* Harware Breakpoint - 12. */
308 .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */
309 .long trap /* Format Error - 14. */
310 .long trap /* Uninitialized Interrupt - 15. */
311 .long trap /* (Unassigned, Reserver) - 16. */
312 .long trap /* (Unassigned, Reserver) - 17. */
313 .long trap /* (Unassigned, Reserver) - 18. */
314 .long trap /* (Unassigned, Reserver) - 19. */
315 .long trap /* (Unassigned, Reserver) - 20. */
316 .long trap /* (Unassigned, Reserver) - 21. */
317 .long trap /* (Unassigned, Reserver) - 22. */
318 .long trap /* (Unassigned, Reserver) - 23. */
319 .long trap /* Spurious Interrupt - 24. */
320 .long trap /* Level 1 Interrupt Autovector - 25. */
321 .long trap /* Level 2 Interrupt Autovector - 26. */
322 .long trap /* Level 3 Interrupt Autovector - 27. */
323 .long trap /* Level 4 Interrupt Autovector - 28. */
324 .long trap /* Level 5 Interrupt Autovector - 29. */
325 .long trap /* Level 6 Interrupt Autovector - 30. */
326 .long trap /* Level 7 Interrupt Autovector - 31. */
327 .long system_call /* Trap Instruction Vectors 0 - 32. */
328 .long trap /* Trap Instruction Vectors 1 - 33. */
329 .long trap /* Trap Instruction Vectors 2 - 34. */
330 .long trap /* Trap Instruction Vectors 3 - 35. */
331 .long trap /* Trap Instruction Vectors 4 - 36. */
332 .long trap /* Trap Instruction Vectors 5 - 37. */
333 .long trap /* Trap Instruction Vectors 6 - 38. */
334 .long trap /* Trap Instruction Vectors 7 - 39. */
335 .long trap /* Trap Instruction Vectors 8 - 40. */
336 .long trap /* Trap Instruction Vectors 9 - 41. */
337 .long trap /* Trap Instruction Vectors 10 - 42. */
338 .long trap /* Trap Instruction Vectors 11 - 43. */
339 .long trap /* Trap Instruction Vectors 12 - 44. */
340 .long trap /* Trap Instruction Vectors 13 - 45. */
341 .long trap /* Trap Instruction Vectors 14 - 46. */
342 .long trap /* Trap Instruction Vectors 15 - 47. */
343 .long 0 /* (Reserved for Coprocessor) - 48. */
344 .long 0 /* (Reserved for Coprocessor) - 49. */
345 .long 0 /* (Reserved for Coprocessor) - 50. */
346 .long 0 /* (Reserved for Coprocessor) - 51. */
347 .long 0 /* (Reserved for Coprocessor) - 52. */
348 .long 0 /* (Reserved for Coprocessor) - 53. */
349 .long 0 /* (Reserved for Coprocessor) - 54. */
350 .long 0 /* (Reserved for Coprocessor) - 55. */
351 .long 0 /* (Reserved for Coprocessor) - 56. */
352 .long 0 /* (Reserved for Coprocessor) - 57. */
353 .long 0 /* (Reserved for Coprocessor) - 58. */
354 .long 0 /* (Unassigned, Reserved) - 59. */
355 .long 0 /* (Unassigned, Reserved) - 60. */
356 .long 0 /* (Unassigned, Reserved) - 61. */
357 .long 0 /* (Unassigned, Reserved) - 62. */
358 .long 0 /* (Unassigned, Reserved) - 63. */
359 /* The assignment of these vectors to the CPM is */
360 /* dependent on the configuration of the CPM vba */
361 /* fields. */
362 .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */
363 .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */
364 .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */
365 .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */
366 .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */
367 .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */
368 .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */
369 .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */
370 .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */
371 .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */
372 .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */
373 .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */
374 .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */
375 .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */
376 .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */
377 .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */
378 .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */
379 .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */
380 .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */
381 .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */
382 .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */
383 .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */
384 .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */
385 .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */
386 .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */
387 .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */
388 .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */
389 .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */
390 .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */
391 .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */
392 .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */
393 .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */
394 /* I don't think anything uses the vectors after here. */
395 .long 0 /* (User-Defined Vectors 34) - 96. */
396 .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */
397 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */
398 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */
399 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */
400 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */
401 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */
402 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */
403 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */
404 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */
405 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */
406 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */
407 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */
408 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */
409 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */
410 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */
411 .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */
412 .long 0,0,0 /* (User-Defined Vectors 190 - 192). */
413.text
414ignore: rte
diff --git a/arch/m68knommu/platform/68360/ints.c b/arch/m68knommu/platform/68360/ints.c
deleted file mode 100644
index 8de3feb568c6..000000000000
--- a/arch/m68knommu/platform/68360/ints.c
+++ /dev/null
@@ -1,139 +0,0 @@
1/*
2 * linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
9 * Copyright (c) 1996 Roman Zippel
10 * Copyright (c) 1999 D. Jeff Dionne <jeff@uclinux.org>
11 */
12
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <asm/traps.h>
19#include <asm/machdep.h>
20#include <asm/m68360.h>
21
22/* from quicc/commproc.c: */
23extern QUICC *pquicc;
24extern void cpm_interrupt_init(void);
25
26#define INTERNAL_IRQS (96)
27
28/* assembler routines */
29asmlinkage void system_call(void);
30asmlinkage void buserr(void);
31asmlinkage void trap(void);
32asmlinkage void bad_interrupt(void);
33asmlinkage void inthandler(void);
34
35extern void *_ramvec[];
36
37/* The number of spurious interrupts */
38volatile unsigned int num_spurious;
39
40static void intc_irq_unmask(struct irq_data *d)
41{
42 pquicc->intr_cimr |= (1 << d->irq);
43}
44
45static void intc_irq_mask(struct irq_data *d)
46{
47 pquicc->intr_cimr &= ~(1 << d->irq);
48}
49
50static void intc_irq_ack(struct irq_data *d)
51{
52 pquicc->intr_cisr = (1 << d->irq);
53}
54
55static struct irq_chip intc_irq_chip = {
56 .name = "M68K-INTC",
57 .irq_mask = intc_irq_mask,
58 .irq_unmask = intc_irq_unmask,
59 .irq_ack = intc_irq_ack,
60};
61
62/*
63 * This function should be called during kernel startup to initialize
64 * the vector table.
65 */
66void init_IRQ(void)
67{
68 int i;
69 int vba = (CPM_VECTOR_BASE<<4);
70
71 /* set up the vectors */
72 _ramvec[2] = buserr;
73 _ramvec[3] = trap;
74 _ramvec[4] = trap;
75 _ramvec[5] = trap;
76 _ramvec[6] = trap;
77 _ramvec[7] = trap;
78 _ramvec[8] = trap;
79 _ramvec[9] = trap;
80 _ramvec[10] = trap;
81 _ramvec[11] = trap;
82 _ramvec[12] = trap;
83 _ramvec[13] = trap;
84 _ramvec[14] = trap;
85 _ramvec[15] = trap;
86
87 _ramvec[32] = system_call;
88 _ramvec[33] = trap;
89
90 cpm_interrupt_init();
91
92 /* set up CICR for vector base address and irq level */
93 /* irl = 4, hp = 1f - see MC68360UM p 7-377 */
94 pquicc->intr_cicr = 0x00e49f00 | vba;
95
96 /* CPM interrupt vectors: (p 7-376) */
97 _ramvec[vba+CPMVEC_ERROR] = bad_interrupt; /* Error */
98 _ramvec[vba+CPMVEC_PIO_PC11] = inthandler; /* pio - pc11 */
99 _ramvec[vba+CPMVEC_PIO_PC10] = inthandler; /* pio - pc10 */
100 _ramvec[vba+CPMVEC_SMC2] = inthandler; /* smc2/pip */
101 _ramvec[vba+CPMVEC_SMC1] = inthandler; /* smc1 */
102 _ramvec[vba+CPMVEC_SPI] = inthandler; /* spi */
103 _ramvec[vba+CPMVEC_PIO_PC9] = inthandler; /* pio - pc9 */
104 _ramvec[vba+CPMVEC_TIMER4] = inthandler; /* timer 4 */
105 _ramvec[vba+CPMVEC_RESERVED1] = inthandler; /* reserved */
106 _ramvec[vba+CPMVEC_PIO_PC8] = inthandler; /* pio - pc8 */
107 _ramvec[vba+CPMVEC_PIO_PC7] = inthandler; /* pio - pc7 */
108 _ramvec[vba+CPMVEC_PIO_PC6] = inthandler; /* pio - pc6 */
109 _ramvec[vba+CPMVEC_TIMER3] = inthandler; /* timer 3 */
110 _ramvec[vba+CPMVEC_PIO_PC5] = inthandler; /* pio - pc5 */
111 _ramvec[vba+CPMVEC_PIO_PC4] = inthandler; /* pio - pc4 */
112 _ramvec[vba+CPMVEC_RESERVED2] = inthandler; /* reserved */
113 _ramvec[vba+CPMVEC_RISCTIMER] = inthandler; /* timer table */
114 _ramvec[vba+CPMVEC_TIMER2] = inthandler; /* timer 2 */
115 _ramvec[vba+CPMVEC_RESERVED3] = inthandler; /* reserved */
116 _ramvec[vba+CPMVEC_IDMA2] = inthandler; /* idma 2 */
117 _ramvec[vba+CPMVEC_IDMA1] = inthandler; /* idma 1 */
118 _ramvec[vba+CPMVEC_SDMA_CB_ERR] = inthandler; /* sdma channel bus error */
119 _ramvec[vba+CPMVEC_PIO_PC3] = inthandler; /* pio - pc3 */
120 _ramvec[vba+CPMVEC_PIO_PC2] = inthandler; /* pio - pc2 */
121 /* _ramvec[vba+CPMVEC_TIMER1] = cpm_isr_timer1; */ /* timer 1 */
122 _ramvec[vba+CPMVEC_TIMER1] = inthandler; /* timer 1 */
123 _ramvec[vba+CPMVEC_PIO_PC1] = inthandler; /* pio - pc1 */
124 _ramvec[vba+CPMVEC_SCC4] = inthandler; /* scc 4 */
125 _ramvec[vba+CPMVEC_SCC3] = inthandler; /* scc 3 */
126 _ramvec[vba+CPMVEC_SCC2] = inthandler; /* scc 2 */
127 _ramvec[vba+CPMVEC_SCC1] = inthandler; /* scc 1 */
128 _ramvec[vba+CPMVEC_PIO_PC0] = inthandler; /* pio - pc0 */
129
130
131 /* turn off all CPM interrupts */
132 pquicc->intr_cimr = 0x00000000;
133
134 for (i = 0; (i < NR_IRQS); i++) {
135 set_irq_chip(i, &intc_irq_chip);
136 set_irq_handler(i, handle_level_irq);
137 }
138}
139
diff --git a/arch/m68knommu/platform/68EZ328/Makefile b/arch/m68knommu/platform/68EZ328/Makefile
deleted file mode 100644
index ee97735a242c..000000000000
--- a/arch/m68knommu/platform/68EZ328/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
1#
2# Makefile for arch/m68knommu/platform/68EZ328.
3#
4
5obj-y := config.o
6
7extra-y := bootlogo.rh
8
9$(obj)/bootlogo.rh: $(src)/bootlogo.h
10 perl $(src)/../68328/bootlogo.pl < $(src)/bootlogo.h \
11 > $(obj)/bootlogo.rh
diff --git a/arch/m68knommu/platform/68EZ328/bootlogo.h b/arch/m68knommu/platform/68EZ328/bootlogo.h
deleted file mode 100644
index e842bdae5839..000000000000
--- a/arch/m68knommu/platform/68EZ328/bootlogo.h
+++ /dev/null
@@ -1,3204 +0,0 @@
1#define splash_width 640
2#define splash_height 480
3static unsigned char splash_bits[] = {
4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
6 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
8 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
10 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
11 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
12 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
13 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
14 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
15 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
16 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
17 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
18 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
19 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
20 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
21 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
22 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
23 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
24 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
25 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
26 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
27 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
28 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
29 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
30 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
31 0x00, 0x00, 0x80, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
32 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
33 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
34 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
35 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
36 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
37 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff,
38 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
39 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
40 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
41 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
42 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
43 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
44 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00,
45 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
46 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
47 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
48 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
49 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
50 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
51 0x00, 0xf8, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
52 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
53 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
54 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
55 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
56 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
57 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff,
58 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
59 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
60 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
61 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
62 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
63 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
64 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
65 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
66 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
67 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
68 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
69 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 0x00,
70 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
71 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,
72 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
73 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
74 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
75 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
76 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00,
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925 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
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950 0xff, 0x01, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
951 0x00, 0x00, 0x10, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
952 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x1c,
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954 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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957 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x10, 0x80,
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959 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x64, 0x4c, 0x00, 0x00, 0x00,
960 0x36, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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969 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
970 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
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978 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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980 0x30, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
981 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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984 0x00, 0x00, 0x00, 0xff, 0xff, 0x03, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00,
985 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
986 0x0f, 0x00, 0x00, 0x64, 0x8c, 0x01, 0x18, 0x40, 0x30, 0x01, 0x00, 0x00,
987 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
988 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
989 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
990 0x00, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
991 0xff, 0x03, 0x10, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
992 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x0f, 0x00, 0x00, 0x9b,
993 0x01, 0xc0, 0x00, 0x00, 0xc6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
994 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
995 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
996 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbc, 0xff, 0x01,
997 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x02, 0x00, 0x40,
998 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
999 0x00, 0x00, 0x00, 0xff, 0x09, 0x00, 0x00, 0x9b, 0x01, 0xc0, 0x00, 0x00,
1000 0xc6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1001 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1002 0x00, 0x00, 0x00, 0xc0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1003 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0xf8, 0x01, 0x00, 0x00, 0x00, 0x00,
1004 0x00, 0x00, 0x00, 0x01, 0x02, 0x02, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00,
1005 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
1006 0x00, 0x00, 0x00, 0x07, 0x32, 0x06, 0x18, 0x43, 0x00, 0x06, 0x00, 0x00,
1007 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1008 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
1009 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1010 0x00, 0xf0, 0xc1, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1011 0x02, 0x02, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1012 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x07,
1013 0x32, 0x06, 0x18, 0x43, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1014 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1015 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x00,
1016 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x03, 0x00,
1017 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x02, 0x10, 0xe0,
1018 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1019 0x00, 0x00, 0x00, 0x70, 0x08, 0x00, 0x00, 0x7b, 0x00, 0x30, 0x03, 0x0c,
1020 0x08, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1021 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1022 0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1023 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
1024 0x00, 0x00, 0x00, 0xe0, 0x07, 0x03, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00,
1025 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1026 0x09, 0x00, 0xc0, 0x84, 0x8d, 0x01, 0x80, 0x00, 0xc0, 0x06, 0x00, 0x00,
1027 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1028 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
1029 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1030 0x00, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
1031 0xfd, 0x03, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1032 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0xc0, 0x84,
1033 0x8d, 0x01, 0x80, 0x00, 0xc0, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1034 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1035 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00,
1036 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00,
1037 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xfd, 0x03, 0xf0, 0x7f,
1038 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1039 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0xc0, 0x1b, 0x00, 0x30, 0x00, 0x40,
1040 0x08, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1041 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1042 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1043 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
1044 0x00, 0x00, 0x00, 0xff, 0xfc, 0x01, 0xf0, 0x3f, 0x00, 0x00, 0x00, 0x00,
1045 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1046 0x08, 0x00, 0xc0, 0x1b, 0x00, 0x30, 0x00, 0x40, 0x08, 0x18, 0x00, 0x00,
1047 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1048 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20,
1049 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
1050 0x07, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
1051 0xf8, 0x01, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1052 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0xc0, 0x64,
1053 0x42, 0x06, 0x1b, 0x03, 0x00, 0x61, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
1054 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1055 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x80, 0x00, 0x00, 0x00,
1056 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x7f, 0x00, 0xc0, 0x00,
1057 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xf0, 0x00, 0x10, 0x00,
1058 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1059 0x00, 0x00, 0x00, 0x00, 0x0e, 0x00, 0xc0, 0x64, 0x42, 0x06, 0x1b, 0x03,
1060 0x00, 0x61, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1061 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1062 0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1063 0x00, 0x00, 0x00, 0xfe, 0xff, 0x03, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00,
1064 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1065 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
1066 0x0f, 0x00, 0x00, 0x1b, 0x00, 0x00, 0x80, 0x30, 0x08, 0x86, 0x00, 0x00,
1067 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1068 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
1069 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1070 0xff, 0x3f, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
1071 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1072 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x0f, 0x00, 0x00, 0x1b,
1073 0x00, 0x00, 0x80, 0x30, 0x08, 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1074 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1075 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x00,
1076 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xc3, 0x03,
1077 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00,
1078 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1079 0x00, 0x00, 0x00, 0xfc, 0x0f, 0x00, 0xe0, 0x84, 0x31, 0x30, 0x04, 0x80,
1080 0xc1, 0x18, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1081 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1082 0x00, 0x00, 0x00, 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1083 0x00, 0x00, 0x00, 0x1c, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00,
1084 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1085 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1086 0x09, 0x00, 0xc0, 0x63, 0x02, 0x06, 0x00, 0x00, 0x00, 0x60, 0x6c, 0xfc,
1087 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1088 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
1089 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
1090 0xe0, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1091 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1092 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x08, 0x00, 0xc0, 0x63,
1093 0x02, 0x06, 0x00, 0x00, 0x00, 0x60, 0x6c, 0xfc, 0xff, 0x03, 0x00, 0x00,
1094 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1095 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00,
1096 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0xff, 0xff, 0x03,
1097 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1098 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1099 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0xe0, 0x1c, 0x40, 0x00, 0x1b, 0x4c,
1100 0x06, 0x81, 0x80, 0xfd, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1102 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1103 0x00, 0x00, 0x00, 0x70, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
1104 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1105 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
1106 0x00, 0x00, 0xe0, 0x1c, 0x40, 0x00, 0x1b, 0x4c, 0x06, 0x81, 0x80, 0xfd,
1107 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1108 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1109 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
1110 0x00, 0x80, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1111 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1112 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x09, 0x00, 0x20, 0x63,
1113 0x0c, 0x08, 0x80, 0x00, 0x30, 0x06, 0x0c, 0xfc, 0xff, 0x7f, 0x00, 0x00,
1114 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1115 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x00, 0x00,
1116 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x01, 0x00, 0x30, 0x00,
1117 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f,
1118 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1119 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x20, 0x63, 0x0c, 0x08, 0x80, 0x00,
1120 0x30, 0x06, 0x0c, 0xfc, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1122 0x00, 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1123 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1124 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, 0x00, 0x00, 0x00, 0x00,
1125 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
1126 0x0f, 0x00, 0xd8, 0x84, 0x01, 0xc0, 0x00, 0x00, 0x06, 0x00, 0x80, 0xf1,
1127 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1129 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1131 0x00, 0x00, 0xe0, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1132 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, 0x00, 0xf8, 0x1b,
1133 0x40, 0x08, 0x84, 0x0c, 0xc0, 0x18, 0x13, 0xcc, 0xff, 0xff, 0x0f, 0x00,
1134 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1135 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00,
1136 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1137 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0xe0, 0x7f,
1138 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1139 0x00, 0x00, 0x00, 0xfc, 0x0f, 0x00, 0xf8, 0x1b, 0x40, 0x08, 0x84, 0x0c,
1140 0xc0, 0x18, 0x13, 0xcc, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00,
1141 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1142 0x00, 0x00, 0x00, 0xe0, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1144 0x00, 0x00, 0x00, 0xfc, 0x03, 0x00, 0xf0, 0xe4, 0x00, 0x00, 0x00, 0x00,
1145 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1146 0x09, 0x00, 0x38, 0x80, 0x01, 0x00, 0x18, 0x30, 0x06, 0x01, 0x00, 0xc0,
1147 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1148 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30,
1149 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1150 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1151 0x07, 0x00, 0x30, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1152 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x00, 0x00, 0x38, 0x80,
1153 0x01, 0x00, 0x18, 0x30, 0x06, 0x01, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x01,
1154 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1155 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x30, 0x00, 0x00,
1156 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x07, 0x00, 0x00, 0x00,
1157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x07, 0x00, 0x10, 0x84,
1158 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1159 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0xd8, 0x1f, 0x30, 0x36, 0x80, 0x00,
1160 0x00, 0x00, 0x03, 0xf2, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00,
1161 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1162 0x00, 0x00, 0x00, 0x10, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1163 0x00, 0x00, 0x00, 0xfc, 0x3f, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
1164 0x00, 0x00, 0x00, 0x4f, 0x0e, 0x00, 0x10, 0x84, 0x00, 0x00, 0x00, 0x00,
1165 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
1166 0x08, 0x00, 0xd8, 0x1f, 0x30, 0x36, 0x80, 0x00, 0x00, 0x00, 0x03, 0xf2,
1167 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1168 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
1169 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1170 0xff, 0x03, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43,
1171 0x08, 0x00, 0x10, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1172 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x09, 0x00, 0x3e, 0x00,
1173 0x82, 0x01, 0x03, 0x40, 0x30, 0x98, 0x10, 0xf0, 0xe7, 0xff, 0xff, 0xff,
1174 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1175 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x00,
1176 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x1f, 0xc0, 0x00,
1177 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41, 0x08, 0x00, 0x10, 0xe4,
1178 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1179 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0xe6, 0x1b, 0x00, 0x00, 0x18, 0x0c,
1180 0x00, 0x00, 0x00, 0xfc, 0xff, 0xfb, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00,
1181 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1182 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1183 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00,
1184 0x00, 0x00, 0x00, 0x41, 0x08, 0x00, 0x30, 0x7c, 0x00, 0x00, 0x00, 0x00,
1185 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1186 0x08, 0x00, 0xe6, 0x1b, 0x00, 0x00, 0x18, 0x0c, 0x00, 0x00, 0x00, 0xfc,
1187 0xff, 0xfb, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1188 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
1189 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9e,
1190 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41,
1191 0x08, 0x00, 0x20, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1192 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x1e, 0x64,
1193 0x30, 0xc6, 0x80, 0x80, 0x09, 0x06, 0x63, 0xfe, 0xf9, 0xff, 0xff, 0xff,
1194 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1195 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x30, 0x00, 0x00,
1196 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0xf8, 0xff, 0xff, 0x01,
1197 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41, 0x0e, 0x00, 0xc0, 0x3c,
1198 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1199 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x1e, 0x64, 0x30, 0xc6, 0x80, 0x80,
1200 0x09, 0x06, 0x63, 0xfe, 0xf9, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00,
1201 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1202 0x00, 0x00, 0x00, 0x20, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1203 0x00, 0x00, 0x00, 0x1c, 0x80, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
1204 0x00, 0x00, 0x00, 0xc3, 0x07, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00,
1205 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1206 0x0e, 0x00, 0x39, 0x03, 0x00, 0x00, 0x04, 0x0c, 0xc0, 0x60, 0x80, 0x3f,
1207 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
1208 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1209 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c,
1210 0x00, 0xfc, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2,
1211 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1212 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0f, 0x00, 0x39, 0x03,
1213 0x00, 0x00, 0x04, 0x0c, 0xc0, 0x60, 0x80, 0x3f, 0xff, 0xff, 0xff, 0xff,
1214 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1215 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x3e, 0x00, 0x00,
1216 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x80, 0xff, 0x01,
1217 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xcc, 0x03, 0x00, 0x00, 0x00,
1218 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1219 0x00, 0x00, 0x00, 0xe0, 0x0f, 0x00, 0xe7, 0x04, 0x42, 0xc6, 0x00, 0x00,
1220 0x00, 0x00, 0xec, 0xcf, 0xff, 0xff, 0xff, 0x3f, 0xff, 0xff, 0x0f, 0x00,
1221 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1222 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1223 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0xfc, 0x01, 0x00, 0x00, 0x00, 0x00,
1224 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1225 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
1226 0x0f, 0xc0, 0x1f, 0x80, 0x01, 0x00, 0x98, 0x4c, 0x06, 0x06, 0xf0, 0x01,
1227 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
1228 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
1229 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
1230 0x01, 0x00, 0xc0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1231 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1232 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x09, 0xc0, 0x1f, 0x80,
1233 0x01, 0x00, 0x98, 0x4c, 0x06, 0x06, 0xf0, 0x01, 0x00, 0xe0, 0xff, 0xff,
1234 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1235 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x20, 0x00, 0x00,
1236 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x00,
1237 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1238 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1239 0x00, 0x00, 0x00, 0x3f, 0x08, 0xc0, 0xe6, 0x04, 0x0c, 0x08, 0x00, 0x00,
1240 0xc0, 0x60, 0x7c, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0x01,
1241 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1242 0x00, 0x00, 0x00, 0xf0, 0x1f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1246 0x00, 0xc0, 0xe6, 0x04, 0x0c, 0x08, 0x00, 0x00, 0xc0, 0x60, 0x7c, 0x00,
1247 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
1248 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
1249 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1250 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1251 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1252 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0xc0, 0x19, 0x60,
1253 0x40, 0x00, 0x63, 0x30, 0x08, 0x00, 0x7f, 0x00, 0x00, 0x00, 0x00, 0xf8,
1254 0xff, 0xf3, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1255 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x3f, 0x00, 0x00,
1256 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00,
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1258 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1259 0x00, 0x00, 0x00, 0xc0, 0x09, 0xc0, 0x19, 0x60, 0x40, 0x00, 0x63, 0x30,
1260 0x08, 0x00, 0x7f, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xf3, 0xff, 0x07,
1261 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1262 0x00, 0x00, 0x00, 0xf0, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1263 0x00, 0x00, 0x00, 0x78, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1264 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00,
1265 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1266 0x0f, 0xc0, 0x27, 0x03, 0x00, 0x30, 0x00, 0x03, 0x00, 0xe6, 0x1f, 0x00,
1267 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00,
1268 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
1269 0xe0, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
1270 0xcf, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1271 0x00, 0x00, 0xe0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1273 0x00, 0x30, 0x00, 0x03, 0x00, 0xe6, 0x1f, 0x00, 0x00, 0x00, 0x00, 0xc0,
1274 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1275 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00,
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1277 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff,
1278 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1279 0x00, 0x00, 0x00, 0xf0, 0x0f, 0xc0, 0xde, 0x04, 0x0c, 0x06, 0x03, 0x80,
1280 0xc1, 0xf8, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0x7f,
1281 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1284 0x00, 0x00, 0x00, 0x0f, 0x03, 0x00, 0xf8, 0xff, 0x07, 0x00, 0x00, 0x00,
1285 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
1286 0x0f, 0xc0, 0x19, 0x00, 0x32, 0x00, 0x60, 0x30, 0x08, 0xff, 0x03, 0x00,
1287 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00,
1288 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
1289 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1290 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x9f,
1291 0x07, 0x00, 0xf8, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1292 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x09, 0xc0, 0x19, 0x00,
1293 0x32, 0x00, 0x60, 0x30, 0x08, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
1294 0xe0, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1295 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x80, 0x00, 0x00, 0x00,
1296 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x07, 0x00,
1297 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x9f, 0x07, 0x00, 0x18, 0x40,
1298 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1299 0x00, 0x00, 0x00, 0x3f, 0x00, 0xc0, 0x27, 0x63, 0x80, 0x31, 0x04, 0x03,
1300 0xf0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff,
1301 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1302 0x00, 0x00, 0x00, 0xf8, 0x5f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1303 0x00, 0x00, 0x00, 0x1c, 0xfe, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00,
1304 0x00, 0x00, 0x80, 0x1f, 0x07, 0x00, 0x18, 0x40, 0x00, 0x00, 0x00, 0x00,
1305 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c,
1306 0x00, 0xc0, 0x27, 0x63, 0x80, 0x31, 0x04, 0x03, 0xf0, 0xff, 0x00, 0x00,
1307 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00,
1308 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
1309 0x7f, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c,
1310 0xe0, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x31,
1311 0x04, 0x00, 0x10, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1312 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x08, 0x00, 0xd9, 0x04,
1313 0x00, 0x08, 0x00, 0x80, 0xf9, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1314 0x00, 0xf0, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1315 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x7f, 0x1e, 0x00, 0x00,
1316 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0xfe, 0xff, 0x01,
1317 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x20, 0x04, 0x00, 0x60, 0x00,
1318 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1319 0x00, 0x00, 0x00, 0xc0, 0x09, 0x00, 0xd9, 0x04, 0x00, 0x08, 0x00, 0x80,
1320 0xf9, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff,
1321 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1322 0x00, 0x00, 0x00, 0xf8, 0x7f, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1323 0x00, 0x00, 0x00, 0x78, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
1324 0x00, 0x00, 0x80, 0x20, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1325 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1326 0x0f, 0xc0, 0x27, 0x00, 0x30, 0xc0, 0x60, 0xb0, 0xff, 0x7f, 0x00, 0x00,
1327 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00,
1328 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
1329 0x60, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1330 0x00, 0x00, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41,
1331 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1332 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0xc0, 0xde, 0x9b,
1333 0x8d, 0x01, 0x04, 0xc3, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1334 0x00, 0x80, 0xf1, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1335 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00,
1336 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbc, 0x03, 0x00, 0xf0, 0x01,
1337 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x07, 0x00, 0x00, 0x00,
1338 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1339 0x00, 0x00, 0x00, 0x00, 0x08, 0xc0, 0xde, 0x9b, 0x8d, 0x01, 0x04, 0xc3,
1340 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xf1, 0xff,
1341 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1342 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1343 0x00, 0x00, 0x00, 0x3e, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
1344 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1345 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1346 0x00, 0xc0, 0x39, 0x04, 0x00, 0xc8, 0x00, 0xfc, 0xff, 0x07, 0x00, 0x00,
1347 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0xf8, 0xff, 0x3f, 0x00, 0x00,
1348 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
1349 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e,
1350 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff,
1351 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1352 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0e, 0x00, 0xc0, 0x39, 0x04,
1353 0x00, 0xc8, 0x00, 0xfc, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1354 0x00, 0x00, 0xc6, 0xf8, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1355 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x40, 0x00, 0x00, 0x00,
1356 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00,
1357 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x01, 0x00, 0x00, 0x00,
1358 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1359 0x00, 0x00, 0x00, 0x1f, 0x00, 0xc0, 0xc7, 0x60, 0x42, 0x00, 0x60, 0xff,
1360 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1361 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1362 0x00, 0x00, 0x00, 0xf8, 0x5f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1363 0x00, 0x00, 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1364 0x00, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1365 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f,
1366 0x00, 0xc0, 0xc7, 0x60, 0x42, 0x00, 0x60, 0xff, 0xff, 0x01, 0x00, 0x00,
1367 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xff, 0xff, 0x00, 0x00,
1368 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
1369 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c,
1370 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1371 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1372 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0xc0, 0xff, 0x07,
1373 0xb0, 0x09, 0xe4, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1374 0x00, 0x00, 0x30, 0x00, 0xfc, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
1375 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00,
1376 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00,
1377 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1378 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1379 0x00, 0x00, 0x00, 0x0e, 0x00, 0xc0, 0xde, 0x78, 0x02, 0x00, 0xfb, 0xff,
1380 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1381 0x80, 0xff, 0x1f, 0xf8, 0xff, 0xff, 0x1f, 0xf0, 0xff, 0xff, 0x00, 0x00,
1382 0x00, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1383 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00,
1384 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1385 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1386 0x00, 0xc0, 0xde, 0x78, 0x02, 0x00, 0xfb, 0xff, 0xff, 0x00, 0x00, 0x00,
1387 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, 0xf8,
1388 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x08,
1389 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
1390 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1391 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1392 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0xc0, 0x3f, 0x07,
1393 0xb0, 0xc9, 0xf8, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1394 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1395 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1396 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0xc0, 0x01,
1397 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1398 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1399 0x00, 0x00, 0x00, 0x00, 0x08, 0xc0, 0x3f, 0x07, 0xb0, 0xc9, 0xf8, 0xff,
1400 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1401 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f,
1402 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1403 0x00, 0x00, 0x00, 0x80, 0x03, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00,
1404 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1405 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
1406 0x0f, 0x00, 0xe7, 0xfb, 0x43, 0x30, 0xf8, 0xff, 0x0f, 0x00, 0x00, 0x00,
1407 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff,
1408 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00,
1409 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1410 0x07, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1411 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1412 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x0f, 0x00, 0xe7, 0xfb,
1413 0x43, 0x30, 0xf8, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1414 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1415 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x08, 0x70, 0x00, 0x00, 0x00,
1416 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0xe0, 0x01,
1417 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1418 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1419 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0xfe, 0x1c, 0xb2, 0x0f, 0xe0, 0xff,
1420 0x07, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00,
1421 0x00, 0xc0, 0xff, 0xff, 0xcf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1422 0x00, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1423 0x00, 0x00, 0x00, 0x00, 0x78, 0x00, 0xfc, 0x03, 0x00, 0x00, 0x00, 0x00,
1424 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1425 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1426 0x0f, 0x00, 0xf8, 0xe7, 0xfd, 0x01, 0xe0, 0xff, 0x07, 0x00, 0xe0, 0xff,
1427 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc1, 0xe0,
1428 0xb1, 0x3f, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0xf8,
1429 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1430 0xf0, 0xc0, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78,
1431 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1432 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0xf8, 0xe7,
1433 0xfd, 0x01, 0xe0, 0xff, 0x07, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x0f, 0x00,
1434 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc1, 0xe0, 0xb1, 0x3f, 0x00, 0x00,
1435 0xf8, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00,
1436 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0x03,
1437 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x00, 0x00, 0x00,
1438 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1439 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0xf8, 0xff, 0x7f, 0x00, 0x80, 0xff,
1440 0x01, 0x00, 0xe0, 0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1441 0x00, 0x00, 0x00, 0x98, 0x4f, 0x0e, 0x18, 0x00, 0xf8, 0xff, 0xff, 0xff,
1442 0x07, 0x00, 0x00, 0xf8, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1443 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
1444 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1445 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
1446 0x00, 0x00, 0xf8, 0xff, 0x7f, 0x00, 0x80, 0xff, 0x01, 0x00, 0xe0, 0x03,
1447 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x98,
1448 0x4f, 0x0e, 0xf8, 0x1f, 0xf6, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x08,
1449 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
1450 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1451 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1452 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0xf8, 0xff,
1453 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00,
1454 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xb1, 0x01, 0xff, 0x1f,
1455 0xf6, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00,
1456 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x1f, 0x00,
1457 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x03, 0x07, 0x00, 0x00, 0x00,
1458 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1459 0x00, 0x00, 0x00, 0x04, 0x08, 0x00, 0xf8, 0xff, 0x7f, 0x00, 0x00, 0x00,
1460 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1461 0x00, 0x00, 0x00, 0xf8, 0xb1, 0x01, 0xff, 0x7f, 0xc0, 0xff, 0xff, 0xff,
1462 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1463 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1464 0x00, 0x00, 0x80, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1465 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1466 0x0f, 0x00, 0xe0, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1467 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f,
1468 0x00, 0xce, 0xff, 0x7f, 0xc0, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00,
1469 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1470 0xff, 0xe3, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
1471 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1472 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0xe0, 0xff,
1473 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00,
1474 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x00, 0xce, 0xff, 0x7f,
1475 0x00, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
1476 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, 0x00, 0x07, 0x00,
1477 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x04, 0x00, 0x00, 0x00,
1478 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1479 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0xc0, 0xff, 0x3f, 0x00, 0x00, 0x00,
1480 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1481 0x00, 0x00, 0x20, 0x1b, 0xb2, 0x31, 0xff, 0x7f, 0x00, 0xff, 0xff, 0xff,
1482 0x3f, 0x00, 0x00, 0xe0, 0x5f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1483 0x00, 0x00, 0x00, 0xfe, 0x03, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00,
1484 0x00, 0x00, 0x80, 0x01, 0x06, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1485 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1486 0x0f, 0x00, 0xc0, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1487 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x1c,
1488 0x00, 0xc0, 0xff, 0x73, 0xc0, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0xf0,
1489 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e,
1490 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03,
1491 0x03, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1492 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xc0, 0xff,
1493 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x00,
1494 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x1c, 0x00, 0xc0, 0x7f, 0x1c,
1495 0x30, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00,
1496 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x78, 0x00,
1497 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x01, 0x00, 0x00,
1498 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1499 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00,
1500 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00,
1501 0x00, 0x00, 0x38, 0x87, 0x31, 0x06, 0x7c, 0x1c, 0x30, 0xff, 0xff, 0xff,
1502 0xff, 0x00, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1503 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00,
1504 0x00, 0x00, 0x80, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1505 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1506 0x00, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1507 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x87,
1508 0x31, 0x06, 0xfc, 0x0f, 0xc8, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x38,
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1513 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x0f, 0x00,
1514 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0xe6, 0x04, 0x00, 0x30, 0xe3, 0x0f,
1515 0xc8, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00,
1516 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0xe0, 0x01,
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1522 0xff, 0x03, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1526 0x07, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1527 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x1b,
1528 0x4c, 0x00, 0x04, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x10,
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1533 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00,
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1535 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00,
1536 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03,
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1540 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1541 0x00, 0x02, 0x07, 0x04, 0x00, 0x06, 0x78, 0xf3, 0xff, 0xff, 0xff, 0xff,
1542 0xff, 0x07, 0x00, 0xf8, 0x5f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1546 0x08, 0x00, 0xc0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1547 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x3e, 0x04,
1548 0x02, 0x30, 0x60, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0xf8,
1549 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1554 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x3e, 0x04, 0x02, 0x30, 0xe0, 0xff,
1555 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00,
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1562 0xff, 0x07, 0x00, 0xf8, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1567 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0x04,
1568 0x40, 0x00, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x08,
1569 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1573 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 0x00,
1574 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x39, 0x67, 0x00, 0x06, 0xe0, 0xff,
1575 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00,
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1582 0xff, 0x3f, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1586 0x0f, 0x00, 0x00, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1587 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x04,
1588 0x30, 0x00, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x08,
1589 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1594 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x3e, 0x9b, 0x01, 0x30, 0xe0, 0xff,
1595 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x08, 0x60, 0x00, 0x00, 0x00,
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1602 0xff, 0x3f, 0x00, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1606 0x00, 0x02, 0x00, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
1607 0x01, 0x00, 0xf0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0x1c,
1608 0x0c, 0x06, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x38,
1609 0x78, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1610 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0xe0,
1611 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1612 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0xff,
1613 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, 0x00, 0xf0, 0x01,
1614 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0x1c, 0x0c, 0x06, 0xfb, 0xff,
1615 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x68, 0x7c, 0x00, 0x00, 0x00,
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1622 0xff, 0x3f, 0x00, 0xc0, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1625 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1626 0xff, 0x03, 0x00, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
1627 0x00, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc6, 0x9b,
1628 0x81, 0x01, 0x60, 0x00, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x80,
1629 0x5f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1630 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x7f,
1631 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1632 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x03, 0x00, 0xff,
1633 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x00, 0xc0, 0x07,
1634 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc6, 0x9b, 0x81, 0x01, 0x00, 0x00,
1635 0xf6, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0xc0, 0x0f, 0x00, 0x00, 0x00,
1636 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1638 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1639 0x00, 0x00, 0x00, 0xff, 0xff, 0x03, 0x00, 0xff, 0x3f, 0x00, 0x00, 0x00,
1640 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00,
1641 0x00, 0x00, 0x38, 0x78, 0x0c, 0x30, 0x04, 0x00, 0xf6, 0xff, 0xff, 0xff,
1642 0xff, 0x3f, 0x00, 0xe8, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1643 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1645 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1646 0x00, 0x00, 0x00, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c,
1647 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x78,
1648 0x0c, 0x30, 0x04, 0x00, 0xc8, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0xf8,
1649 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1650 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38,
1651 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1652 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xff,
1653 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x80, 0x07,
1654 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x64, 0x40, 0x00, 0x1c, 0x00,
1655 0xc8, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0xf8, 0x58, 0x00, 0x00, 0x00,
1656 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1657 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x04, 0x00, 0x00, 0x00,
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1659 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, 0x00, 0x00, 0x00,
1660 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x80, 0x07, 0x00, 0x00, 0x00, 0x00,
1661 0x00, 0x00, 0xc0, 0x64, 0x40, 0x00, 0xfc, 0x03, 0xc0, 0xff, 0xff, 0xff,
1662 0xff, 0x3f, 0x00, 0x78, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1782 0x3f, 0x00, 0x00, 0x38, 0x06, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1785 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1786 0x0c, 0x00, 0x00, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1787 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
1788 0xff, 0xff, 0x03, 0xfc, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x38,
1789 0x1e, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1791 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x18, 0x00, 0x00,
1792 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0e, 0x00, 0x00, 0xff,
1793 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1794 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x03, 0xfc,
1795 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x38, 0xfc, 0x1f, 0x00, 0x00,
1796 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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1801 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1802 0x1f, 0x00, 0x00, 0x38, 0xf8, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1803 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1804 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30,
1805 0x80, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1806 0x0f, 0x00, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1807 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1808 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x78,
1809 0xf0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1810 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1811 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0xe0, 0x1f, 0x00, 0x00,
1812 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x07, 0x00, 0x00, 0xff,
1813 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1814 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff,
1815 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0xf8, 0xc1, 0x07, 0x00, 0x00,
1816 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1817 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1818 0x00, 0x00, 0x00, 0x60, 0xf8, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1819 0x00, 0x00, 0x00, 0xff, 0x03, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x03, 0x00,
1820 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00,
1821 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1822 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1823 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1824 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0,
1825 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1826 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
1827 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0xff, 0xff,
1828 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00,
1829 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1830 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1831 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x00, 0x00,
1832 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xc0, 0xff,
1833 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1834 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1835 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1836 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1837 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1838 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1839 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, 0x00,
1840 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1841 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1842 0x01, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1843 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1844 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1845 0xe0, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1846 0x08, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00,
1847 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x67,
1848 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0xf8,
1849 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1850 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1851 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x13, 0x00, 0x00,
1852 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0xc0, 0xff,
1853 0xff, 0xff, 0x1f, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1854 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0x67, 0xfe, 0xff, 0xff, 0xff,
1855 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00,
1856 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1857 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1858 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1859 0x00, 0x00, 0x00, 0xfc, 0x0f, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, 0x03,
1860 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1861 0xf0, 0xff, 0xff, 0x98, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f,
1862 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1863 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1864 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1865 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1866 0x0f, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x08, 0x00, 0x00, 0x00,
1867 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x98,
1868 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x70,
1869 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1870 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1871 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
1872 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0xf8, 0xff,
1873 0xff, 0xff, 0x7f, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1874 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x3f, 0xe7, 0xff, 0xff, 0xff, 0xff,
1875 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1876 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1877 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1878 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1879 0x00, 0x00, 0x00, 0xff, 0x0f, 0x00, 0xff, 0xfc, 0xff, 0xff, 0xff, 0x00,
1880 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe,
1881 0xff, 0xff, 0x3f, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01,
1882 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1883 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1884 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1885 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
1886 0x00, 0xc0, 0xff, 0x67, 0x8c, 0xf9, 0xfb, 0x73, 0x00, 0x67, 0x10, 0x00,
1887 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xf8,
1888 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x80,
1889 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1890 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1891 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1892 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0xc0, 0xff, 0x67,
1893 0x8c, 0xf9, 0xfb, 0x73, 0x00, 0x67, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
1894 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x1f, 0xe7, 0xff, 0xff, 0xff, 0xff,
1895 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x07, 0x00, 0x00,
1896 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1897 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1898 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1899 0x00, 0x00, 0x00, 0x03, 0x00, 0xc0, 0x27, 0xfc, 0x73, 0xc6, 0x1c, 0x8c,
1900 0x37, 0x80, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff,
1901 0xff, 0xff, 0x1f, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00,
1902 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1903 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1904 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1905 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
1906 0x00, 0xc0, 0x27, 0xfc, 0x73, 0xc6, 0x1c, 0x8c, 0x37, 0x80, 0x0c, 0x00,
1907 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xfc,
1908 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
1909 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1910 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1911 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1912 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x08, 0xc0, 0xfe, 0x03,
1913 0x8c, 0x09, 0xe3, 0x73, 0xc8, 0x06, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
1914 0x00, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfc, 0xff, 0xff, 0xff, 0xff,
1915 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x18, 0x00, 0x00,
1916 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1917 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1918 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1919 0x00, 0x00, 0x00, 0xff, 0x0f, 0xc0, 0xfe, 0x03, 0x8c, 0x09, 0xe3, 0x73,
1920 0xc8, 0x06, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff,
1921 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00,
1922 0x00, 0x00, 0x00, 0x08, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1923 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1924 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1925 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
1926 0x0f, 0xc0, 0x27, 0xe7, 0x31, 0x36, 0x04, 0x8c, 0x01, 0x60, 0x03, 0x00,
1927 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1928 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
1929 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1930 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1931 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1932 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0f, 0xc0, 0xde, 0x18,
1933 0x42, 0xc0, 0x98, 0x30, 0x08, 0x01, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00,
1934 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00,
1935 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x18, 0x00, 0x00,
1936 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1937 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1938 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
1939 0x00, 0x00, 0x00, 0xff, 0x0f, 0xc0, 0xde, 0x18, 0x42, 0xc0, 0x98, 0x30,
1940 0x08, 0x01, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff,
1941 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1942 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1943 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1944 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1945 0x02, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1946 0x00, 0xc0, 0x27, 0x63, 0x00, 0x08, 0x63, 0x03, 0x06, 0x60, 0x10, 0x00,
1947 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1948 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
1949 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1950 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1951 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00,
1952 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0xc0, 0x27, 0x63,
1953 0x00, 0x08, 0x63, 0x03, 0x06, 0x60, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00,
1954 0xe0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00,
1955 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x07, 0x00, 0x00,
1956 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1957 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1958 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
1959 0x00, 0x00, 0x00, 0x00, 0x08, 0xc0, 0xd9, 0x04, 0xb2, 0x01, 0x00, 0xb0,
1960 0x31, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xf9, 0xff,
1961 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1962 0x00, 0x00, 0x00, 0x80, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1963 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1964 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1965 0xfe, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
1966 0x08, 0xc0, 0xd9, 0x04, 0xb2, 0x01, 0x00, 0xb0, 0x31, 0x19, 0x03, 0x00,
1967 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xf9, 0xff, 0xff, 0xff, 0xff, 0x07,
1968 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1969 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1970 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1971 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00,
1972 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0c, 0xc0, 0x1e, 0x63,
1973 0x00, 0x30, 0x04, 0x03, 0xc8, 0x60, 0x00, 0x0e, 0x00, 0x00, 0xfc, 0xff,
1974 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00,
1975 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1976 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1977 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1978 0x00, 0x00, 0x00, 0x00, 0x02, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
1979 0x00, 0x00, 0x00, 0x03, 0x0e, 0xc0, 0xe1, 0x18, 0x80, 0x01, 0x60, 0xb0,
1980 0x01, 0xe7, 0xf3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1981 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1982 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1983 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1984 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1985 0x02, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
1986 0x0f, 0xc0, 0xe1, 0x18, 0x80, 0x01, 0x60, 0xb0, 0x01, 0xe7, 0xf3, 0xff,
1987 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00,
1988 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8,
1989 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1990 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1991 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x04, 0x04, 0x00,
1992 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8d, 0x0f, 0xc0, 0x1e, 0x03,
1993 0x02, 0x08, 0x04, 0x00, 0xc8, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
1994 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
1995 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00,
1996 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1997 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1998 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
1999 0x00, 0x00, 0x00, 0xd8, 0x0f, 0xc0, 0x1e, 0x03, 0x02, 0x08, 0x04, 0x00,
2000 0xc8, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2001 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2002 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2003 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2004 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2005 0xc0, 0x0f, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
2006 0x0b, 0x00, 0x21, 0x64, 0x40, 0xc0, 0x00, 0xb3, 0xf1, 0xfe, 0xff, 0xff,
2007 0xff, 0xff, 0xff, 0xff, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00,
2008 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70,
2009 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2010 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2011 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xfb, 0x07, 0x00,
2012 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, 0x00, 0x21, 0x64,
2013 0x40, 0xc0, 0x00, 0xb3, 0xf1, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2014 0xfb, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2015 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2016 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2017 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2018 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfb, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
2019 0x00, 0x00, 0x00, 0xfd, 0x00, 0xc0, 0xdf, 0x00, 0x00, 0x06, 0x60, 0x00,
2020 0x0e, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2021 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2022 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2023 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2024 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2025 0xfe, 0xf9, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbf,
2026 0x01, 0xc0, 0xdf, 0x00, 0x00, 0x06, 0x60, 0x00, 0x0e, 0xff, 0xff, 0xff,
2027 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00,
2028 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0,
2029 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2030 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2031 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xf0, 0x03, 0x00,
2032 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x0b, 0xc0, 0xc0, 0x84,
2033 0x31, 0xc0, 0x00, 0x4c, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2034 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2035 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x83, 0x07, 0x00, 0x00,
2036 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2037 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2038 0x00, 0x00, 0x00, 0x00, 0x1e, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
2039 0x00, 0x00, 0x00, 0x0f, 0x0e, 0xc0, 0x3f, 0x18, 0x00, 0x06, 0x84, 0x80,
2040 0x09, 0xff, 0xff, 0x3f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2041 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2042 0x00, 0x00, 0x00, 0xf0, 0xc3, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2043 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2044 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2045 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
2046 0x0c, 0xc0, 0x3f, 0x18, 0x00, 0x06, 0x84, 0x80, 0x09, 0xff, 0xff, 0x3f,
2047 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00,
2048 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc8,
2049 0xc1, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2050 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2051 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
2052 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x08, 0xc0, 0xc1, 0x03,
2053 0x4c, 0x00, 0x00, 0x30, 0xf6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2054 0xff, 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2055 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x90, 0x13, 0x00, 0x00,
2056 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2057 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2058 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2059 0x00, 0x00, 0x00, 0x01, 0x08, 0xc0, 0xc1, 0x03, 0x4c, 0x00, 0x00, 0x30,
2060 0xf6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2061 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2062 0x00, 0x00, 0x00, 0x08, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2063 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2064 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2065 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
2066 0x00, 0xc0, 0x3f, 0x98, 0x01, 0x08, 0x1b, 0x43, 0xc8, 0xff, 0xff, 0xff,
2067 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00,
2068 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08,
2069 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2070 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2071 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2072 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, 0x98,
2073 0x01, 0x08, 0x1b, 0x43, 0xc8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2074 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2075 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x38, 0x18, 0x00, 0x00,
2076 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2077 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2078 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
2079 0x00, 0x00, 0x00, 0x0e, 0x00, 0xc0, 0xc6, 0x03, 0x40, 0x00, 0x00, 0x80,
2080 0x31, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff,
2081 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2082 0x00, 0x00, 0x00, 0xf8, 0xef, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2083 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2084 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2085 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f,
2086 0x00, 0x00, 0x3f, 0x18, 0x0c, 0x30, 0x60, 0x0c, 0xce, 0xff, 0xff, 0xff,
2087 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
2088 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
2089 0xef, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2090 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2091 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00,
2092 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00, 0x3f, 0x18,
2093 0x0c, 0x30, 0x60, 0x0c, 0xce, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2094 0xff, 0xff, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2095 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xc7, 0x0f, 0x00, 0x00,
2096 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2097 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2098 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00,
2099 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00, 0xde, 0x63, 0x40, 0x06, 0x03, 0x30,
2100 0x30, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f,
2101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2102 0x00, 0x00, 0x00, 0xc0, 0x83, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2103 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2104 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2105 0x02, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0e,
2106 0x00, 0x00, 0xde, 0x63, 0x40, 0x06, 0x03, 0x30, 0x30, 0xff, 0xff, 0xff,
2107 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00,
2108 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2109 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2110 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2111 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x04, 0x00,
2112 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x04,
2113 0x02, 0x00, 0x00, 0x83, 0xc9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2114 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2115 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2116 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2117 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2118 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
2119 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x38, 0x04, 0x02, 0x00, 0x00, 0x83,
2120 0xc9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01,
2121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2122 0x00, 0x00, 0x00, 0xc0, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2124 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2125 0xfe, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
2126 0x03, 0x00, 0xe0, 0x1b, 0x0c, 0x08, 0x18, 0x40, 0x30, 0xfe, 0xff, 0xff,
2127 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
2128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0,
2129 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2131 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00,
2132 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x07, 0x00, 0xc0, 0x84,
2133 0x81, 0x01, 0x03, 0x0c, 0xc6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
2134 0xff, 0xff, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2135 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, 0x00, 0x00,
2136 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2137 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2138 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
2139 0x00, 0x00, 0x00, 0xfe, 0x07, 0x00, 0xc0, 0x84, 0x81, 0x01, 0x03, 0x0c,
2140 0xc6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0f, 0x00,
2141 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2142 0x00, 0x00, 0x00, 0xf8, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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3163 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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3166 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3167 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3168 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3169 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3170 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3171 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3172 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3173 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3174 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3175 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3176 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3177 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3178 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3179 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3180 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3181 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3182 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3183 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3184 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3185 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3186 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3187 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3188 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3189 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3191 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3192 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3193 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3194 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3195 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3196 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3197 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3198 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3199 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3200 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3201 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3202 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3203 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
3204 };
diff --git a/arch/m68knommu/platform/68EZ328/config.c b/arch/m68knommu/platform/68EZ328/config.c
deleted file mode 100644
index 1be1a16f6896..000000000000
--- a/arch/m68knommu/platform/68EZ328/config.c
+++ /dev/null
@@ -1,76 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/68EZ328/config.c
5 *
6 * Copyright (C) 1993 Hamish Macdonald
7 * Copyright (C) 1999 D. Jeff Dionne
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file COPYING in the main directory of this archive
11 * for more details.
12 */
13
14/***************************************************************************/
15
16#include <linux/types.h>
17#include <linux/kernel.h>
18#include <asm/system.h>
19#include <asm/pgtable.h>
20#include <asm/machdep.h>
21#include <asm/MC68EZ328.h>
22#ifdef CONFIG_UCSIMM
23#include <asm/bootstd.h>
24#endif
25
26/***************************************************************************/
27
28void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
29
30/***************************************************************************/
31
32void m68ez328_reset(void)
33{
34 local_irq_disable();
35 asm volatile (
36 "moveal #0x10c00000, %a0;\n"
37 "moveb #0, 0xFFFFF300;\n"
38 "moveal 0(%a0), %sp;\n"
39 "moveal 4(%a0), %a0;\n"
40 "jmp (%a0);\n"
41 );
42}
43
44/***************************************************************************/
45
46unsigned char *cs8900a_hwaddr;
47static int errno;
48
49#ifdef CONFIG_UCSIMM
50_bsc0(char *, getserialnum)
51_bsc1(unsigned char *, gethwaddr, int, a)
52_bsc1(char *, getbenv, char *, a)
53#endif
54
55void config_BSP(char *command, int len)
56{
57 unsigned char *p;
58
59 printk(KERN_INFO "\n68EZ328 DragonBallEZ support (C) 1999 Rt-Control, Inc\n");
60
61#ifdef CONFIG_UCSIMM
62 printk(KERN_INFO "uCsimm serial string [%s]\n",getserialnum());
63 p = cs8900a_hwaddr = gethwaddr(0);
64 printk(KERN_INFO "uCsimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
65 p[0], p[1], p[2], p[3], p[4], p[5]);
66
67 p = getbenv("APPEND");
68 if (p) strcpy(p,command);
69 else command[0] = 0;
70#endif
71
72 mach_gettod = m68328_timer_gettod;
73 mach_reset = m68ez328_reset;
74}
75
76/***************************************************************************/
diff --git a/arch/m68knommu/platform/68VZ328/Makefile b/arch/m68knommu/platform/68VZ328/Makefile
deleted file mode 100644
index 447ffa0fd7c7..000000000000
--- a/arch/m68knommu/platform/68VZ328/Makefile
+++ /dev/null
@@ -1,16 +0,0 @@
1#
2# Makefile for arch/m68knommu/platform/68VZ328.
3#
4
5obj-y := config.o
6logo-$(UCDIMM) := bootlogo.rh
7logo-$(DRAGEN2) := screen.h
8extra-y := $(logo-y)
9
10$(obj)/bootlogo.rh: $(src)/../68EZ328/bootlogo.h
11 perl $(src)/bootlogo.pl < $(src)/../68328/bootlogo.h > $(obj)/bootlogo.rh
12
13$(obj)/screen.h: $(src)/screen.xbm $(src)/xbm2lcd.pl
14 perl $(src)/xbm2lcd.pl < $(src)/screen.xbm > $(obj)/screen.h
15
16clean-files := $(obj)/screen.h $(obj)/bootlogo.rh
diff --git a/arch/m68knommu/platform/68VZ328/config.c b/arch/m68knommu/platform/68VZ328/config.c
deleted file mode 100644
index eabaabe8af36..000000000000
--- a/arch/m68knommu/platform/68VZ328/config.c
+++ /dev/null
@@ -1,188 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/68VZ328/config.c
5 *
6 * Copyright (C) 1993 Hamish Macdonald
7 * Copyright (C) 1999 D. Jeff Dionne
8 * Copyright (C) 2001 Georges Menie, Ken Desmet
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive
12 * for more details.
13 */
14
15/***************************************************************************/
16
17#include <linux/types.h>
18#include <linux/kernel.h>
19#include <linux/kd.h>
20#include <linux/netdevice.h>
21#include <linux/interrupt.h>
22#include <linux/irq.h>
23
24#include <asm/system.h>
25#include <asm/pgtable.h>
26#include <asm/machdep.h>
27#include <asm/MC68VZ328.h>
28#include <asm/bootstd.h>
29
30#ifdef CONFIG_INIT_LCD
31#include "bootlogo.h"
32#endif
33
34/***************************************************************************/
35
36void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
37
38/***************************************************************************/
39/* Init Drangon Engine hardware */
40/***************************************************************************/
41#if defined(CONFIG_DRAGEN2)
42
43static void m68vz328_reset(void)
44{
45 local_irq_disable();
46
47#ifdef CONFIG_INIT_LCD
48 PBDATA |= 0x20; /* disable CCFL light */
49 PKDATA |= 0x4; /* disable LCD controller */
50 LCKCON = 0;
51#endif
52
53 __asm__ __volatile__(
54 "reset\n\t"
55 "moveal #0x04000000, %a0\n\t"
56 "moveal 0(%a0), %sp\n\t"
57 "moveal 4(%a0), %a0\n\t"
58 "jmp (%a0)"
59 );
60}
61
62static void init_hardware(char *command, int size)
63{
64#ifdef CONFIG_DIRECT_IO_ACCESS
65 SCR = 0x10; /* allow user access to internal registers */
66#endif
67
68 /* CSGB Init */
69 CSGBB = 0x4000;
70 CSB = 0x1a1;
71
72 /* CS8900 init */
73 /* PK3: hardware sleep function pin, active low */
74 PKSEL |= PK(3); /* select pin as I/O */
75 PKDIR |= PK(3); /* select pin as output */
76 PKDATA |= PK(3); /* set pin high */
77
78 /* PF5: hardware reset function pin, active high */
79 PFSEL |= PF(5); /* select pin as I/O */
80 PFDIR |= PF(5); /* select pin as output */
81 PFDATA &= ~PF(5); /* set pin low */
82
83 /* cs8900 hardware reset */
84 PFDATA |= PF(5);
85 { int i; for (i = 0; i < 32000; ++i); }
86 PFDATA &= ~PF(5);
87
88 /* INT1 enable (cs8900 IRQ) */
89 PDPOL &= ~PD(1); /* active high signal */
90 PDIQEG &= ~PD(1);
91 PDIRQEN |= PD(1); /* IRQ enabled */
92
93#ifdef CONFIG_INIT_LCD
94 /* initialize LCD controller */
95 LSSA = (long) screen_bits;
96 LVPW = 0x14;
97 LXMAX = 0x140;
98 LYMAX = 0xef;
99 LRRA = 0;
100 LPXCD = 3;
101 LPICF = 0x08;
102 LPOLCF = 0;
103 LCKCON = 0x80;
104 PCPDEN = 0xff;
105 PCSEL = 0;
106
107 /* Enable LCD controller */
108 PKDIR |= 0x4;
109 PKSEL |= 0x4;
110 PKDATA &= ~0x4;
111
112 /* Enable CCFL backlighting circuit */
113 PBDIR |= 0x20;
114 PBSEL |= 0x20;
115 PBDATA &= ~0x20;
116
117 /* contrast control register */
118 PFDIR |= 0x1;
119 PFSEL &= ~0x1;
120 PWMR = 0x037F;
121#endif
122}
123
124/***************************************************************************/
125/* Init RT-Control uCdimm hardware */
126/***************************************************************************/
127#elif defined(CONFIG_UCDIMM)
128
129static void m68vz328_reset(void)
130{
131 local_irq_disable();
132 asm volatile (
133 "moveal #0x10c00000, %a0;\n\t"
134 "moveb #0, 0xFFFFF300;\n\t"
135 "moveal 0(%a0), %sp;\n\t"
136 "moveal 4(%a0), %a0;\n\t"
137 "jmp (%a0);\n"
138 );
139}
140
141unsigned char *cs8900a_hwaddr;
142static int errno;
143
144_bsc0(char *, getserialnum)
145_bsc1(unsigned char *, gethwaddr, int, a)
146_bsc1(char *, getbenv, char *, a)
147
148static void init_hardware(char *command, int size)
149{
150 char *p;
151
152 printk(KERN_INFO "uCdimm serial string [%s]\n", getserialnum());
153 p = cs8900a_hwaddr = gethwaddr(0);
154 printk(KERN_INFO "uCdimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
155 p[0], p[1], p[2], p[3], p[4], p[5]);
156 p = getbenv("APPEND");
157 if (p)
158 strcpy(p, command);
159 else
160 command[0] = 0;
161}
162
163/***************************************************************************/
164#else
165
166static void m68vz328_reset(void)
167{
168}
169
170static void init_hardware(char *command, int size)
171{
172}
173
174/***************************************************************************/
175#endif
176/***************************************************************************/
177
178void config_BSP(char *command, int size)
179{
180 printk(KERN_INFO "68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n");
181
182 init_hardware(command, size);
183
184 mach_gettod = m68328_timer_gettod;
185 mach_reset = m68vz328_reset;
186}
187
188/***************************************************************************/
diff --git a/arch/m68knommu/platform/Makefile b/arch/m68knommu/platform/Makefile
deleted file mode 100644
index fc932bf65d34..000000000000
--- a/arch/m68knommu/platform/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
1#
2# Makefile for the arch/m68knommu/platform.
3#
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile
deleted file mode 100644
index a8967baabd72..000000000000
--- a/arch/m68knommu/platform/coldfire/Makefile
+++ /dev/null
@@ -1,32 +0,0 @@
1#
2# Makefile for the m68knommu kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# ccflags-y := -DTRAP_DBG_INTERRUPT
12# asflags-y := -DTRAP_DBG_INTERRUPT
13#
14
15asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
16
17obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o
18obj-$(CONFIG_M5206) += timers.o intc.o
19obj-$(CONFIG_M5206e) += timers.o intc.o
20obj-$(CONFIG_M520x) += pit.o intc-simr.o
21obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o
22obj-$(CONFIG_M5249) += timers.o intc.o
23obj-$(CONFIG_M527x) += pit.o intc-2.o
24obj-$(CONFIG_M5272) += timers.o
25obj-$(CONFIG_M528x) += pit.o intc-2.o
26obj-$(CONFIG_M5307) += timers.o intc.o
27obj-$(CONFIG_M532x) += timers.o intc-simr.o
28obj-$(CONFIG_M5407) += timers.o intc.o
29obj-$(CONFIG_M54xx) += sltimers.o intc-2.o
30
31obj-y += pinmux.o gpio.o
32extra-y := head.o
diff --git a/arch/m68knommu/platform/coldfire/cache.c b/arch/m68knommu/platform/coldfire/cache.c
deleted file mode 100644
index 235d3c4f4f0f..000000000000
--- a/arch/m68knommu/platform/coldfire/cache.c
+++ /dev/null
@@ -1,48 +0,0 @@
1/***************************************************************************/
2
3/*
4 * cache.c -- general ColdFire Cache maintainence code
5 *
6 * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <asm/coldfire.h>
13#include <asm/mcfsim.h>
14
15/***************************************************************************/
16#ifdef CACHE_PUSH
17/***************************************************************************/
18
19/*
20 * Use cpushl to push all dirty cache lines back to memory.
21 * Older versions of GAS don't seem to know how to generate the
22 * ColdFire cpushl instruction... Oh well, bit stuff it for now.
23 */
24
25void mcf_cache_push(void)
26{
27 __asm__ __volatile__ (
28 "clrl %%d0\n\t"
29 "1:\n\t"
30 "movel %%d0,%%a0\n\t"
31 "2:\n\t"
32 ".word 0xf468\n\t"
33 "addl %0,%%a0\n\t"
34 "cmpl %1,%%a0\n\t"
35 "blt 2b\n\t"
36 "addql #1,%%d0\n\t"
37 "cmpil %2,%%d0\n\t"
38 "bne 1b\n\t"
39 : /* No output */
40 : "i" (CACHE_LINE_SIZE),
41 "i" (DCACHE_SIZE / CACHE_WAYS),
42 "i" (CACHE_WAYS)
43 : "d0", "a0" );
44}
45
46/***************************************************************************/
47#endif /* CACHE_PUSH */
48/***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/clk.c b/arch/m68knommu/platform/coldfire/clk.c
deleted file mode 100644
index 9f1260c5e2ad..000000000000
--- a/arch/m68knommu/platform/coldfire/clk.c
+++ /dev/null
@@ -1,45 +0,0 @@
1/***************************************************************************/
2
3/*
4 * clk.c -- general ColdFire CPU kernel clk handling
5 *
6 * Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/clk.h>
14#include <asm/coldfire.h>
15
16/***************************************************************************/
17
18struct clk *clk_get(struct device *dev, const char *id)
19{
20 return NULL;
21}
22EXPORT_SYMBOL(clk_get);
23
24int clk_enable(struct clk *clk)
25{
26 return 0;
27}
28EXPORT_SYMBOL(clk_enable);
29
30void clk_disable(struct clk *clk)
31{
32}
33EXPORT_SYMBOL(clk_disable);
34
35void clk_put(struct clk *clk)
36{
37}
38EXPORT_SYMBOL(clk_put);
39
40unsigned long clk_get_rate(struct clk *clk)
41{
42 return MCF_CLK;
43}
44EXPORT_SYMBOL(clk_get_rate);
45/***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/dma.c b/arch/m68knommu/platform/coldfire/dma.c
deleted file mode 100644
index e88b95e2cc62..000000000000
--- a/arch/m68knommu/platform/coldfire/dma.c
+++ /dev/null
@@ -1,39 +0,0 @@
1/***************************************************************************/
2
3/*
4 * dma.c -- Freescale ColdFire DMA support
5 *
6 * Copyright (C) 2007, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <asm/dma.h>
13#include <asm/coldfire.h>
14#include <asm/mcfsim.h>
15#include <asm/mcfdma.h>
16
17/***************************************************************************/
18
19/*
20 * DMA channel base address table.
21 */
22unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
23#ifdef MCFDMA_BASE0
24 MCFDMA_BASE0,
25#endif
26#ifdef MCFDMA_BASE1
27 MCFDMA_BASE1,
28#endif
29#ifdef MCFDMA_BASE2
30 MCFDMA_BASE2,
31#endif
32#ifdef MCFDMA_BASE3
33 MCFDMA_BASE3,
34#endif
35};
36
37unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
38
39/***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/dma_timer.c b/arch/m68knommu/platform/coldfire/dma_timer.c
deleted file mode 100644
index a5f562823d7a..000000000000
--- a/arch/m68knommu/platform/coldfire/dma_timer.c
+++ /dev/null
@@ -1,84 +0,0 @@
1/*
2 * dma_timer.c -- Freescale ColdFire DMA Timer.
3 *
4 * Copyright (C) 2007, Benedikt Spranger <b.spranger@linutronix.de>
5 * Copyright (C) 2008. Sebastian Siewior, Linutronix
6 *
7 */
8
9#include <linux/clocksource.h>
10#include <linux/io.h>
11
12#include <asm/machdep.h>
13#include <asm/coldfire.h>
14#include <asm/mcfpit.h>
15#include <asm/mcfsim.h>
16
17#define DMA_TIMER_0 (0x00)
18#define DMA_TIMER_1 (0x40)
19#define DMA_TIMER_2 (0x80)
20#define DMA_TIMER_3 (0xc0)
21
22#define DTMR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x400)
23#define DTXMR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x402)
24#define DTER0 (MCF_IPSBAR + DMA_TIMER_0 + 0x403)
25#define DTRR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x404)
26#define DTCR0 (MCF_IPSBAR + DMA_TIMER_0 + 0x408)
27#define DTCN0 (MCF_IPSBAR + DMA_TIMER_0 + 0x40c)
28
29#define DMA_FREQ ((MCF_CLK / 2) / 16)
30
31/* DTMR */
32#define DMA_DTMR_RESTART (1 << 3)
33#define DMA_DTMR_CLK_DIV_1 (1 << 1)
34#define DMA_DTMR_CLK_DIV_16 (2 << 1)
35#define DMA_DTMR_ENABLE (1 << 0)
36
37static cycle_t cf_dt_get_cycles(struct clocksource *cs)
38{
39 return __raw_readl(DTCN0);
40}
41
42static struct clocksource clocksource_cf_dt = {
43 .name = "coldfire_dma_timer",
44 .rating = 200,
45 .read = cf_dt_get_cycles,
46 .mask = CLOCKSOURCE_MASK(32),
47 .shift = 20,
48 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
49};
50
51static int __init init_cf_dt_clocksource(void)
52{
53 /*
54 * We setup DMA timer 0 in free run mode. This incrementing counter is
55 * used as a highly precious clock source. With MCF_CLOCK = 150 MHz we
56 * get a ~213 ns resolution and the 32bit register will overflow almost
57 * every 15 minutes.
58 */
59 __raw_writeb(0x00, DTXMR0);
60 __raw_writeb(0x00, DTER0);
61 __raw_writel(0x00000000, DTRR0);
62 __raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0);
63 clocksource_cf_dt.mult = clocksource_hz2mult(DMA_FREQ,
64 clocksource_cf_dt.shift);
65 return clocksource_register(&clocksource_cf_dt);
66}
67
68arch_initcall(init_cf_dt_clocksource);
69
70#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
71#define CYC2NS_SCALE ((1000000 << CYC2NS_SCALE_FACTOR) / (DMA_FREQ / 1000))
72
73static unsigned long long cycles2ns(unsigned long cycl)
74{
75 return (unsigned long long) ((unsigned long long)cycl *
76 CYC2NS_SCALE) >> CYC2NS_SCALE_FACTOR;
77}
78
79unsigned long long sched_clock(void)
80{
81 unsigned long cycl = __raw_readl(DTCN0);
82
83 return cycles2ns(cycl);
84}
diff --git a/arch/m68knommu/platform/coldfire/entry.S b/arch/m68knommu/platform/coldfire/entry.S
deleted file mode 100644
index 5837cf080b6d..000000000000
--- a/arch/m68knommu/platform/coldfire/entry.S
+++ /dev/null
@@ -1,203 +0,0 @@
1/*
2 * linux/arch/m68knommu/platform/5307/entry.S
3 *
4 * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
5 * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>,
6 * Kenneth Albanowski <kjahds@kjahds.com>,
7 * Copyright (C) 2000 Lineo Inc. (www.lineo.com)
8 * Copyright (C) 2004-2006 Macq Electronique SA. (www.macqel.com)
9 *
10 * Based on:
11 *
12 * linux/arch/m68k/kernel/entry.S
13 *
14 * Copyright (C) 1991, 1992 Linus Torvalds
15 *
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file README.legal in the main directory of this archive
18 * for more details.
19 *
20 * Linux/m68k support by Hamish Macdonald
21 *
22 * 68060 fixes by Jesper Skov
23 * ColdFire support by Greg Ungerer (gerg@snapgear.com)
24 * 5307 fixes by David W. Miller
25 * linux 2.4 support David McCullough <davidm@snapgear.com>
26 * Bug, speed and maintainability fixes by Philippe De Muyter <phdm@macqel.be>
27 */
28
29#include <linux/sys.h>
30#include <linux/linkage.h>
31#include <asm/unistd.h>
32#include <asm/thread_info.h>
33#include <asm/errno.h>
34#include <asm/setup.h>
35#include <asm/segment.h>
36#include <asm/asm-offsets.h>
37#include <asm/entry.h>
38
39#ifdef CONFIG_COLDFIRE_SW_A7
40/*
41 * Define software copies of the supervisor and user stack pointers.
42 */
43.bss
44sw_ksp:
45.long 0
46sw_usp:
47.long 0
48#endif /* CONFIG_COLDFIRE_SW_A7 */
49
50.text
51
52.globl system_call
53.globl resume
54.globl ret_from_exception
55.globl ret_from_signal
56.globl sys_call_table
57.globl inthandler
58.globl fasthandler
59
60enosys:
61 mov.l #sys_ni_syscall,%d3
62 bra 1f
63
64ENTRY(system_call)
65 SAVE_ALL
66 move #0x2000,%sr /* enable intrs again */
67
68 cmpl #NR_syscalls,%d0
69 jcc enosys
70 lea sys_call_table,%a0
71 lsll #2,%d0 /* movel %a0@(%d0:l:4),%d3 */
72 movel %a0@(%d0),%d3
73 jeq enosys
74
751:
76 movel %sp,%d2 /* get thread_info pointer */
77 andl #-THREAD_SIZE,%d2 /* at start of kernel stack */
78 movel %d2,%a0
79 movel %a0@,%a1 /* save top of frame */
80 movel %sp,%a1@(TASK_THREAD+THREAD_ESP0)
81 btst #(TIF_SYSCALL_TRACE%8),%a0@(TI_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
82 bnes 1f
83
84 movel %d3,%a0
85 jbsr %a0@
86 movel %d0,%sp@(PT_OFF_D0) /* save the return value */
87 jra ret_from_exception
881:
89 movel #-ENOSYS,%d2 /* strace needs -ENOSYS in PT_OFF_D0 */
90 movel %d2,PT_OFF_D0(%sp) /* on syscall entry */
91 subql #4,%sp
92 SAVE_SWITCH_STACK
93 jbsr syscall_trace_enter
94 RESTORE_SWITCH_STACK
95 addql #4,%sp
96 movel %d3,%a0
97 jbsr %a0@
98 movel %d0,%sp@(PT_OFF_D0) /* save the return value */
99 subql #4,%sp /* dummy return address */
100 SAVE_SWITCH_STACK
101 jbsr syscall_trace_leave
102
103ret_from_signal:
104 RESTORE_SWITCH_STACK
105 addql #4,%sp
106
107ret_from_exception:
108 move #0x2700,%sr /* disable intrs */
109 btst #5,%sp@(PT_OFF_SR) /* check if returning to kernel */
110 jeq Luser_return /* if so, skip resched, signals */
111
112#ifdef CONFIG_PREEMPT
113 movel %sp,%d1 /* get thread_info pointer */
114 andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
115 movel %d1,%a0
116 movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
117 andl #(1<<TIF_NEED_RESCHED),%d1
118 jeq Lkernel_return
119
120 movel %a0@(TI_PREEMPTCOUNT),%d1
121 cmpl #0,%d1
122 jne Lkernel_return
123
124 pea Lkernel_return
125 jmp preempt_schedule_irq /* preempt the kernel */
126#endif
127
128Lkernel_return:
129 moveml %sp@,%d1-%d5/%a0-%a2
130 lea %sp@(32),%sp /* space for 8 regs */
131 movel %sp@+,%d0
132 addql #4,%sp /* orig d0 */
133 addl %sp@+,%sp /* stk adj */
134 rte
135
136Luser_return:
137 movel %sp,%d1 /* get thread_info pointer */
138 andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
139 movel %d1,%a0
140 movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
141 jne Lwork_to_do /* still work to do */
142
143Lreturn:
144 RESTORE_USER
145
146Lwork_to_do:
147 movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
148 move #0x2000,%sr /* enable intrs again */
149 btst #TIF_NEED_RESCHED,%d1
150 jne reschedule
151
152 /* GERG: do we need something here for TRACEing?? */
153
154Lsignal_return:
155 subql #4,%sp /* dummy return address */
156 SAVE_SWITCH_STACK
157 pea %sp@(SWITCH_STACK_SIZE)
158 jsr do_signal
159 addql #4,%sp
160 RESTORE_SWITCH_STACK
161 addql #4,%sp
162 jmp Luser_return
163
164/*
165 * This is the generic interrupt handler (for all hardware interrupt
166 * sources). Calls upto high level code to do all the work.
167 */
168ENTRY(inthandler)
169 SAVE_ALL
170 moveq #-1,%d0
171 movel %d0,%sp@(PT_OFF_ORIG_D0)
172
173 movew %sp@(PT_OFF_FORMATVEC),%d0 /* put exception # in d0 */
174 andl #0x03fc,%d0 /* mask out vector only */
175
176 movel %sp,%sp@- /* push regs arg */
177 lsrl #2,%d0 /* calculate real vector # */
178 movel %d0,%sp@- /* push vector number */
179 jbsr do_IRQ /* call high level irq handler */
180 lea %sp@(8),%sp /* pop args off stack */
181
182 bra ret_from_exception
183
184/*
185 * Beware - when entering resume, prev (the current task) is
186 * in a0, next (the new task) is in a1,so don't change these
187 * registers until their contents are no longer needed.
188 * This is always called in supervisor mode, so don't bother to save
189 * and restore sr; user's process sr is actually in the stack.
190 */
191ENTRY(resume)
192 movel %a0, %d1 /* get prev thread in d1 */
193 RDUSP
194 movel %a2,%a0@(TASK_THREAD+THREAD_USP)
195
196 SAVE_SWITCH_STACK
197 movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */
198 movel %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new thread stack */
199 RESTORE_SWITCH_STACK
200
201 movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */
202 WRUSP
203 rts
diff --git a/arch/m68knommu/platform/coldfire/gpio.c b/arch/m68knommu/platform/coldfire/gpio.c
deleted file mode 100644
index ff0045793450..000000000000
--- a/arch/m68knommu/platform/coldfire/gpio.c
+++ /dev/null
@@ -1,127 +0,0 @@
1/*
2 * Coldfire generic GPIO support.
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/sysdev.h>
19
20#include <asm/gpio.h>
21#include <asm/pinmux.h>
22#include <asm/mcfgpio.h>
23
24#define MCF_CHIP(chip) container_of(chip, struct mcf_gpio_chip, gpio_chip)
25
26int mcf_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
27{
28 unsigned long flags;
29 MCFGPIO_PORTTYPE dir;
30 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
31
32 local_irq_save(flags);
33 dir = mcfgpio_read(mcf_chip->pddr);
34 dir &= ~mcfgpio_bit(chip->base + offset);
35 mcfgpio_write(dir, mcf_chip->pddr);
36 local_irq_restore(flags);
37
38 return 0;
39}
40
41int mcf_gpio_get_value(struct gpio_chip *chip, unsigned offset)
42{
43 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
44
45 return mcfgpio_read(mcf_chip->ppdr) & mcfgpio_bit(chip->base + offset);
46}
47
48int mcf_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
49 int value)
50{
51 unsigned long flags;
52 MCFGPIO_PORTTYPE data;
53 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
54
55 local_irq_save(flags);
56 /* write the value to the output latch */
57 data = mcfgpio_read(mcf_chip->podr);
58 if (value)
59 data |= mcfgpio_bit(chip->base + offset);
60 else
61 data &= ~mcfgpio_bit(chip->base + offset);
62 mcfgpio_write(data, mcf_chip->podr);
63
64 /* now set the direction to output */
65 data = mcfgpio_read(mcf_chip->pddr);
66 data |= mcfgpio_bit(chip->base + offset);
67 mcfgpio_write(data, mcf_chip->pddr);
68 local_irq_restore(flags);
69
70 return 0;
71}
72
73void mcf_gpio_set_value(struct gpio_chip *chip, unsigned offset, int value)
74{
75 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
76
77 unsigned long flags;
78 MCFGPIO_PORTTYPE data;
79
80 local_irq_save(flags);
81 data = mcfgpio_read(mcf_chip->podr);
82 if (value)
83 data |= mcfgpio_bit(chip->base + offset);
84 else
85 data &= ~mcfgpio_bit(chip->base + offset);
86 mcfgpio_write(data, mcf_chip->podr);
87 local_irq_restore(flags);
88}
89
90void mcf_gpio_set_value_fast(struct gpio_chip *chip, unsigned offset, int value)
91{
92 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
93
94 if (value)
95 mcfgpio_write(mcfgpio_bit(chip->base + offset), mcf_chip->setr);
96 else
97 mcfgpio_write(~mcfgpio_bit(chip->base + offset), mcf_chip->clrr);
98}
99
100int mcf_gpio_request(struct gpio_chip *chip, unsigned offset)
101{
102 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
103
104 return mcf_chip->gpio_to_pinmux ?
105 mcf_pinmux_request(mcf_chip->gpio_to_pinmux[offset], 0) : 0;
106}
107
108void mcf_gpio_free(struct gpio_chip *chip, unsigned offset)
109{
110 struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
111
112 mcf_gpio_direction_input(chip, offset);
113
114 if (mcf_chip->gpio_to_pinmux)
115 mcf_pinmux_release(mcf_chip->gpio_to_pinmux[offset], 0);
116}
117
118struct sysdev_class mcf_gpio_sysclass = {
119 .name = "gpio",
120};
121
122static int __init mcf_gpio_sysinit(void)
123{
124 return sysdev_class_register(&mcf_gpio_sysclass);
125}
126
127core_initcall(mcf_gpio_sysinit);
diff --git a/arch/m68knommu/platform/coldfire/head.S b/arch/m68knommu/platform/coldfire/head.S
deleted file mode 100644
index 129bff4956b5..000000000000
--- a/arch/m68knommu/platform/coldfire/head.S
+++ /dev/null
@@ -1,250 +0,0 @@
1/*****************************************************************************/
2
3/*
4 * head.S -- common startup code for ColdFire CPUs.
5 *
6 * (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>.
7 */
8
9/*****************************************************************************/
10
11#include <linux/sys.h>
12#include <linux/linkage.h>
13#include <linux/init.h>
14#include <asm/asm-offsets.h>
15#include <asm/coldfire.h>
16#include <asm/mcfsim.h>
17#include <asm/thread_info.h>
18
19/*****************************************************************************/
20
21/*
22 * If we don't have a fixed memory size, then lets build in code
23 * to auto detect the DRAM size. Obviously this is the prefered
24 * method, and should work for most boards. It won't work for those
25 * that do not have their RAM starting at address 0, and it only
26 * works on SDRAM (not boards fitted with SRAM).
27 */
28#if CONFIG_RAMSIZE != 0
29.macro GET_MEM_SIZE
30 movel #CONFIG_RAMSIZE,%d0 /* hard coded memory size */
31.endm
32
33#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
34 defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
35 defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
36 defined(CONFIG_M5407)
37/*
38 * Not all these devices have exactly the same DRAM controller,
39 * but the DCMR register is virtually identical - give or take
40 * a couple of bits. The only exception is the 5272 devices, their
41 * DRAM controller is quite different.
42 */
43.macro GET_MEM_SIZE
44 movel MCFSIM_DMR0,%d0 /* get mask for 1st bank */
45 btst #0,%d0 /* check if region enabled */
46 beq 1f
47 andl #0xfffc0000,%d0
48 beq 1f
49 addl #0x00040000,%d0 /* convert mask to size */
501:
51 movel MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
52 btst #0,%d1 /* check if region enabled */
53 beq 2f
54 andl #0xfffc0000,%d1
55 beq 2f
56 addl #0x00040000,%d1
57 addl %d1,%d0 /* total mem size in d0 */
582:
59.endm
60
61#elif defined(CONFIG_M5272)
62.macro GET_MEM_SIZE
63 movel MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
64 andil #0xfffff000,%d0 /* mask out chip select options */
65 negl %d0 /* negate bits */
66.endm
67
68#elif defined(CONFIG_M520x)
69.macro GET_MEM_SIZE
70 clrl %d0
71 movel MCFSIM_SDCS0, %d2 /* Get SDRAM chip select 0 config */
72 andl #0x1f, %d2 /* Get only the chip select size */
73 beq 3f /* Check if it is enabled */
74 addql #1, %d2 /* Form exponent */
75 moveql #1, %d0
76 lsll %d2, %d0 /* 2 ^ exponent */
773:
78 movel MCFSIM_SDCS1, %d2 /* Get SDRAM chip select 1 config */
79 andl #0x1f, %d2 /* Get only the chip select size */
80 beq 4f /* Check if it is enabled */
81 addql #1, %d2 /* Form exponent */
82 moveql #1, %d1
83 lsll %d2, %d1 /* 2 ^ exponent */
84 addl %d1, %d0 /* Total size of SDRAM in d0 */
854:
86.endm
87
88#else
89#error "ERROR: I don't know how to probe your boards memory size?"
90#endif
91
92/*****************************************************************************/
93
94/*
95 * Boards and platforms can do specific early hardware setup if
96 * they need to. Most don't need this, define away if not required.
97 */
98#ifndef PLATFORM_SETUP
99#define PLATFORM_SETUP
100#endif
101
102/*****************************************************************************/
103
104.global _start
105.global _rambase
106.global _ramvec
107.global _ramstart
108.global _ramend
109#if defined(CONFIG_UBOOT)
110.global _init_sp
111#endif
112
113/*****************************************************************************/
114
115.data
116
117/*
118 * During startup we store away the RAM setup. These are not in the
119 * bss, since their values are determined and written before the bss
120 * has been cleared.
121 */
122_rambase:
123.long 0
124_ramvec:
125.long 0
126_ramstart:
127.long 0
128_ramend:
129.long 0
130#if defined(CONFIG_UBOOT)
131_init_sp:
132.long 0
133#endif
134
135/*****************************************************************************/
136
137__HEAD
138
139/*
140 * This is the codes first entry point. This is where it all
141 * begins...
142 */
143
144_start:
145 nop /* filler */
146 movew #0x2700, %sr /* no interrupts */
147#if defined(CONFIG_UBOOT)
148 movel %sp,_init_sp /* save initial stack pointer */
149#endif
150
151 /*
152 * Do any platform or board specific setup now. Most boards
153 * don't need anything. Those exceptions are define this in
154 * their board specific includes.
155 */
156 PLATFORM_SETUP
157
158 /*
159 * Create basic memory configuration. Set VBR accordingly,
160 * and size memory.
161 */
162 movel #CONFIG_VECTORBASE,%a7
163 movec %a7,%VBR /* set vectors addr */
164 movel %a7,_ramvec
165
166 movel #CONFIG_RAMBASE,%a7 /* mark the base of RAM */
167 movel %a7,_rambase
168
169 GET_MEM_SIZE /* macro code determines size */
170 addl %a7,%d0
171 movel %d0,_ramend /* set end ram addr */
172
173 /*
174 * Now that we know what the memory is, lets enable cache
175 * and get things moving. This is Coldfire CPU specific. Not
176 * all version cores have identical cache register setup. But
177 * it is very similar. Define the exact settings in the headers
178 * then the code here is the same for all.
179 */
180 movel #CACHE_INIT,%d0 /* invalidate whole cache */
181 movec %d0,%CACR
182 nop
183 movel #ACR0_MODE,%d0 /* set RAM region for caching */
184 movec %d0,%ACR0
185 movel #ACR1_MODE,%d0 /* anything else to cache? */
186 movec %d0,%ACR1
187#ifdef ACR2_MODE
188 movel #ACR2_MODE,%d0
189 movec %d0,%ACR2
190 movel #ACR3_MODE,%d0
191 movec %d0,%ACR3
192#endif
193 movel #CACHE_MODE,%d0 /* enable cache */
194 movec %d0,%CACR
195 nop
196
197#ifdef CONFIG_ROMFS_FS
198 /*
199 * Move ROM filesystem above bss :-)
200 */
201 lea _sbss,%a0 /* get start of bss */
202 lea _ebss,%a1 /* set up destination */
203 movel %a0,%a2 /* copy of bss start */
204
205 movel 8(%a0),%d0 /* get size of ROMFS */
206 addql #8,%d0 /* allow for rounding */
207 andl #0xfffffffc, %d0 /* whole words */
208
209 addl %d0,%a0 /* copy from end */
210 addl %d0,%a1 /* copy from end */
211 movel %a1,_ramstart /* set start of ram */
212
213_copy_romfs:
214 movel -(%a0),%d0 /* copy dword */
215 movel %d0,-(%a1)
216 cmpl %a0,%a2 /* check if at end */
217 bne _copy_romfs
218
219#else /* CONFIG_ROMFS_FS */
220 lea _ebss,%a1
221 movel %a1,_ramstart
222#endif /* CONFIG_ROMFS_FS */
223
224
225 /*
226 * Zero out the bss region.
227 */
228 lea _sbss,%a0 /* get start of bss */
229 lea _ebss,%a1 /* get end of bss */
230 clrl %d0 /* set value */
231_clear_bss:
232 movel %d0,(%a0)+ /* clear each word */
233 cmpl %a0,%a1 /* check if at end */
234 bne _clear_bss
235
236 /*
237 * Load the current task pointer and stack.
238 */
239 lea init_thread_union,%a0
240 lea THREAD_SIZE(%a0),%sp
241
242 /*
243 * Assember start up done, start code proper.
244 */
245 jsr start_kernel /* start Linux kernel */
246
247_exit:
248 jmp _exit /* should never get here */
249
250/*****************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/intc-2.c b/arch/m68knommu/platform/coldfire/intc-2.c
deleted file mode 100644
index 2cbfbf035db9..000000000000
--- a/arch/m68knommu/platform/coldfire/intc-2.c
+++ /dev/null
@@ -1,214 +0,0 @@
1/*
2 * intc-2.c
3 *
4 * General interrupt controller code for the many ColdFire cores that use
5 * interrupt controllers with 63 interrupt sources, organized as 56 fully-
6 * programmable + 7 fixed-level interrupt sources. This includes the 523x
7 * family, the 5270, 5271, 5274, 5275, and the 528x family which have two such
8 * controllers, and the 547x and 548x families which have only one of them.
9 *
10 * The external 7 fixed interrupts are part the the Edge Port unit of these
11 * ColdFire parts. They can be configured as level or edge triggered.
12 *
13 * (C) Copyright 2009-2011, Greg Ungerer <gerg@snapgear.com>
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive
17 * for more details.
18 */
19
20#include <linux/types.h>
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/io.h>
26#include <asm/coldfire.h>
27#include <asm/mcfsim.h>
28#include <asm/traps.h>
29
30/*
31 * Bit definitions for the ICR family of registers.
32 */
33#define MCFSIM_ICR_LEVEL(l) ((l)<<3) /* Level l intr */
34#define MCFSIM_ICR_PRI(p) (p) /* Priority p intr */
35
36/*
37 * The EDGE Port interrupts are the fixed 7 external interrupts.
38 * They need some special treatment, for example they need to be acked.
39 */
40#define EINT0 64 /* Is not actually used, but spot reserved for it */
41#define EINT1 65 /* EDGE Port interrupt 1 */
42#define EINT7 71 /* EDGE Port interrupt 7 */
43
44#ifdef MCFICM_INTC1
45#define NR_VECS 128
46#else
47#define NR_VECS 64
48#endif
49
50static void intc_irq_mask(struct irq_data *d)
51{
52 unsigned int irq = d->irq - MCFINT_VECBASE;
53 unsigned long imraddr;
54 u32 val, imrbit;
55
56#ifdef MCFICM_INTC1
57 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
58#else
59 imraddr = MCFICM_INTC0;
60#endif
61 imraddr += (irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL;
62 imrbit = 0x1 << (irq & 0x1f);
63
64 val = __raw_readl(imraddr);
65 __raw_writel(val | imrbit, imraddr);
66}
67
68static void intc_irq_unmask(struct irq_data *d)
69{
70 unsigned int irq = d->irq - MCFINT_VECBASE;
71 unsigned long imraddr;
72 u32 val, imrbit;
73
74#ifdef MCFICM_INTC1
75 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
76#else
77 imraddr = MCFICM_INTC0;
78#endif
79 imraddr += ((irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL);
80 imrbit = 0x1 << (irq & 0x1f);
81
82 /* Don't set the "maskall" bit! */
83 if ((irq & 0x20) == 0)
84 imrbit |= 0x1;
85
86 val = __raw_readl(imraddr);
87 __raw_writel(val & ~imrbit, imraddr);
88}
89
90/*
91 * Only the external (or EDGE Port) interrupts need to be acknowledged
92 * here, as part of the IRQ handler. They only really need to be ack'ed
93 * if they are in edge triggered mode, but there is no harm in doing it
94 * for all types.
95 */
96static void intc_irq_ack(struct irq_data *d)
97{
98 unsigned int irq = d->irq;
99
100 __raw_writeb(0x1 << (irq - EINT0), MCFEPORT_EPFR);
101}
102
103/*
104 * Each vector needs a unique priority and level associated with it.
105 * We don't really care so much what they are, we don't rely on the
106 * traditional priority interrupt scheme of the m68k/ColdFire. This
107 * only needs to be set once for an interrupt, and we will never change
108 * these values once we have set them.
109 */
110static u8 intc_intpri = MCFSIM_ICR_LEVEL(6) | MCFSIM_ICR_PRI(6);
111
112static unsigned int intc_irq_startup(struct irq_data *d)
113{
114 unsigned int irq = d->irq - MCFINT_VECBASE;
115 unsigned long icraddr;
116
117#ifdef MCFICM_INTC1
118 icraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
119#else
120 icraddr = MCFICM_INTC0;
121#endif
122 icraddr += MCFINTC_ICR0 + (irq & 0x3f);
123 if (__raw_readb(icraddr) == 0)
124 __raw_writeb(intc_intpri--, icraddr);
125
126 irq = d->irq;
127 if ((irq >= EINT1) && (irq <= EINT7)) {
128 u8 v;
129
130 irq -= EINT0;
131
132 /* Set EPORT line as input */
133 v = __raw_readb(MCFEPORT_EPDDR);
134 __raw_writeb(v & ~(0x1 << irq), MCFEPORT_EPDDR);
135
136 /* Set EPORT line as interrupt source */
137 v = __raw_readb(MCFEPORT_EPIER);
138 __raw_writeb(v | (0x1 << irq), MCFEPORT_EPIER);
139 }
140
141 intc_irq_unmask(d);
142 return 0;
143}
144
145static int intc_irq_set_type(struct irq_data *d, unsigned int type)
146{
147 unsigned int irq = d->irq;
148 u16 pa, tb;
149
150 switch (type) {
151 case IRQ_TYPE_EDGE_RISING:
152 tb = 0x1;
153 break;
154 case IRQ_TYPE_EDGE_FALLING:
155 tb = 0x2;
156 break;
157 case IRQ_TYPE_EDGE_BOTH:
158 tb = 0x3;
159 break;
160 default:
161 /* Level triggered */
162 tb = 0;
163 break;
164 }
165
166 if (tb)
167 set_irq_handler(irq, handle_edge_irq);
168
169 irq -= EINT0;
170 pa = __raw_readw(MCFEPORT_EPPAR);
171 pa = (pa & ~(0x3 << (irq * 2))) | (tb << (irq * 2));
172 __raw_writew(pa, MCFEPORT_EPPAR);
173
174 return 0;
175}
176
177static struct irq_chip intc_irq_chip = {
178 .name = "CF-INTC",
179 .irq_startup = intc_irq_startup,
180 .irq_mask = intc_irq_mask,
181 .irq_unmask = intc_irq_unmask,
182};
183
184static struct irq_chip intc_irq_chip_edge_port = {
185 .name = "CF-INTC-EP",
186 .irq_startup = intc_irq_startup,
187 .irq_mask = intc_irq_mask,
188 .irq_unmask = intc_irq_unmask,
189 .irq_ack = intc_irq_ack,
190 .irq_set_type = intc_irq_set_type,
191};
192
193void __init init_IRQ(void)
194{
195 int irq;
196
197 init_vectors();
198
199 /* Mask all interrupt sources */
200 __raw_writel(0x1, MCFICM_INTC0 + MCFINTC_IMRL);
201#ifdef MCFICM_INTC1
202 __raw_writel(0x1, MCFICM_INTC1 + MCFINTC_IMRL);
203#endif
204
205 for (irq = MCFINT_VECBASE; (irq < MCFINT_VECBASE + NR_VECS); irq++) {
206 if ((irq >= EINT1) && (irq <=EINT7))
207 set_irq_chip(irq, &intc_irq_chip_edge_port);
208 else
209 set_irq_chip(irq, &intc_irq_chip);
210 set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
211 set_irq_handler(irq, handle_level_irq);
212 }
213}
214
diff --git a/arch/m68knommu/platform/coldfire/intc-simr.c b/arch/m68knommu/platform/coldfire/intc-simr.c
deleted file mode 100644
index e642b24ab729..000000000000
--- a/arch/m68knommu/platform/coldfire/intc-simr.c
+++ /dev/null
@@ -1,191 +0,0 @@
1/*
2 * intc-simr.c
3 *
4 * Interrupt controller code for the ColdFire 5208, 5207 & 532x parts.
5 *
6 * (C) Copyright 2009-2011, Greg Ungerer <gerg@snapgear.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/types.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/io.h>
19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/traps.h>
22
23/*
24 * The EDGE Port interrupts are the fixed 7 external interrupts.
25 * They need some special treatment, for example they need to be acked.
26 */
27#ifdef CONFIG_M520x
28/*
29 * The 520x parts only support a limited range of these external
30 * interrupts, only 1, 4 and 7 (as interrupts 65, 66 and 67).
31 */
32#define EINT0 64 /* Is not actually used, but spot reserved for it */
33#define EINT1 65 /* EDGE Port interrupt 1 */
34#define EINT4 66 /* EDGE Port interrupt 4 */
35#define EINT7 67 /* EDGE Port interrupt 7 */
36
37static unsigned int irqebitmap[] = { 0, 1, 4, 7 };
38static unsigned int inline irq2ebit(unsigned int irq)
39{
40 return irqebitmap[irq - EINT0];
41}
42
43#else
44
45/*
46 * Most of the ColdFire parts with the EDGE Port module just have
47 * a strait direct mapping of the 7 external interrupts. Although
48 * there is a bit reserved for 0, it is not used.
49 */
50#define EINT0 64 /* Is not actually used, but spot reserved for it */
51#define EINT1 65 /* EDGE Port interrupt 1 */
52#define EINT7 71 /* EDGE Port interrupt 7 */
53
54static unsigned int inline irq2ebit(unsigned int irq)
55{
56 return irq - EINT0;
57}
58
59#endif
60
61/*
62 * There maybe one or two interrupt control units, each has 64
63 * interrupts. If there is no second unit then MCFINTC1_* defines
64 * will be 0 (and code for them optimized away).
65 */
66
67static void intc_irq_mask(struct irq_data *d)
68{
69 unsigned int irq = d->irq - MCFINT_VECBASE;
70
71 if (MCFINTC1_SIMR && (irq > 64))
72 __raw_writeb(irq - 64, MCFINTC1_SIMR);
73 else
74 __raw_writeb(irq, MCFINTC0_SIMR);
75}
76
77static void intc_irq_unmask(struct irq_data *d)
78{
79 unsigned int irq = d->irq - MCFINT_VECBASE;
80
81 if (MCFINTC1_CIMR && (irq > 64))
82 __raw_writeb(irq - 64, MCFINTC1_CIMR);
83 else
84 __raw_writeb(irq, MCFINTC0_CIMR);
85}
86
87static void intc_irq_ack(struct irq_data *d)
88{
89 unsigned int ebit = irq2ebit(d->irq);
90
91 __raw_writeb(0x1 << ebit, MCFEPORT_EPFR);
92}
93
94static unsigned int intc_irq_startup(struct irq_data *d)
95{
96 unsigned int irq = d->irq;
97
98 if ((irq >= EINT1) && (irq <= EINT7)) {
99 unsigned int ebit = irq2ebit(irq);
100 u8 v;
101
102 /* Set EPORT line as input */
103 v = __raw_readb(MCFEPORT_EPDDR);
104 __raw_writeb(v & ~(0x1 << ebit), MCFEPORT_EPDDR);
105
106 /* Set EPORT line as interrupt source */
107 v = __raw_readb(MCFEPORT_EPIER);
108 __raw_writeb(v | (0x1 << ebit), MCFEPORT_EPIER);
109 }
110
111 irq -= MCFINT_VECBASE;
112 if (MCFINTC1_ICR0 && (irq > 64))
113 __raw_writeb(5, MCFINTC1_ICR0 + irq - 64);
114 else
115 __raw_writeb(5, MCFINTC0_ICR0 + irq);
116
117
118 intc_irq_unmask(d);
119 return 0;
120}
121
122static int intc_irq_set_type(struct irq_data *d, unsigned int type)
123{
124 unsigned int ebit, irq = d->irq;
125 u16 pa, tb;
126
127 switch (type) {
128 case IRQ_TYPE_EDGE_RISING:
129 tb = 0x1;
130 break;
131 case IRQ_TYPE_EDGE_FALLING:
132 tb = 0x2;
133 break;
134 case IRQ_TYPE_EDGE_BOTH:
135 tb = 0x3;
136 break;
137 default:
138 /* Level triggered */
139 tb = 0;
140 break;
141 }
142
143 if (tb)
144 set_irq_handler(irq, handle_edge_irq);
145
146 ebit = irq2ebit(irq) * 2;
147 pa = __raw_readw(MCFEPORT_EPPAR);
148 pa = (pa & ~(0x3 << ebit)) | (tb << ebit);
149 __raw_writew(pa, MCFEPORT_EPPAR);
150
151 return 0;
152}
153
154static struct irq_chip intc_irq_chip = {
155 .name = "CF-INTC",
156 .irq_startup = intc_irq_startup,
157 .irq_mask = intc_irq_mask,
158 .irq_unmask = intc_irq_unmask,
159};
160
161static struct irq_chip intc_irq_chip_edge_port = {
162 .name = "CF-INTC-EP",
163 .irq_startup = intc_irq_startup,
164 .irq_mask = intc_irq_mask,
165 .irq_unmask = intc_irq_unmask,
166 .irq_ack = intc_irq_ack,
167 .irq_set_type = intc_irq_set_type,
168};
169
170void __init init_IRQ(void)
171{
172 int irq, eirq;
173
174 init_vectors();
175
176 /* Mask all interrupt sources */
177 __raw_writeb(0xff, MCFINTC0_SIMR);
178 if (MCFINTC1_SIMR)
179 __raw_writeb(0xff, MCFINTC1_SIMR);
180
181 eirq = MCFINT_VECBASE + 64 + (MCFINTC1_ICR0 ? 64 : 0);
182 for (irq = MCFINT_VECBASE; (irq < eirq); irq++) {
183 if ((irq >= EINT1) && (irq <= EINT7))
184 set_irq_chip(irq, &intc_irq_chip_edge_port);
185 else
186 set_irq_chip(irq, &intc_irq_chip);
187 set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
188 set_irq_handler(irq, handle_level_irq);
189 }
190}
191
diff --git a/arch/m68knommu/platform/coldfire/intc.c b/arch/m68knommu/platform/coldfire/intc.c
deleted file mode 100644
index d648081a63f6..000000000000
--- a/arch/m68knommu/platform/coldfire/intc.c
+++ /dev/null
@@ -1,151 +0,0 @@
1/*
2 * intc.c -- support for the old ColdFire interrupt controller
3 *
4 * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/io.h>
17#include <asm/traps.h>
18#include <asm/coldfire.h>
19#include <asm/mcfsim.h>
20
21/*
22 * The mapping of irq number to a mask register bit is not one-to-one.
23 * The irq numbers are either based on "level" of interrupt or fixed
24 * for an autovector-able interrupt. So we keep a local data structure
25 * that maps from irq to mask register. Not all interrupts will have
26 * an IMR bit.
27 */
28unsigned char mcf_irq2imr[NR_IRQS];
29
30/*
31 * Define the miniumun and maximum external interrupt numbers.
32 * This is also used as the "level" interrupt numbers.
33 */
34#define EIRQ1 25
35#define EIRQ7 31
36
37/*
38 * In the early version 2 core ColdFire parts the IMR register was 16 bits
39 * in size. Version 3 (and later version 2) core parts have a 32 bit
40 * sized IMR register. Provide some size independant methods to access the
41 * IMR register.
42 */
43#ifdef MCFSIM_IMR_IS_16BITS
44
45void mcf_setimr(int index)
46{
47 u16 imr;
48 imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
49 __raw_writew(imr | (0x1 << index), MCF_MBAR + MCFSIM_IMR);
50}
51
52void mcf_clrimr(int index)
53{
54 u16 imr;
55 imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
56 __raw_writew(imr & ~(0x1 << index), MCF_MBAR + MCFSIM_IMR);
57}
58
59void mcf_maskimr(unsigned int mask)
60{
61 u16 imr;
62 imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
63 imr |= mask;
64 __raw_writew(imr, MCF_MBAR + MCFSIM_IMR);
65}
66
67#else
68
69void mcf_setimr(int index)
70{
71 u32 imr;
72 imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
73 __raw_writel(imr | (0x1 << index), MCF_MBAR + MCFSIM_IMR);
74}
75
76void mcf_clrimr(int index)
77{
78 u32 imr;
79 imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
80 __raw_writel(imr & ~(0x1 << index), MCF_MBAR + MCFSIM_IMR);
81}
82
83void mcf_maskimr(unsigned int mask)
84{
85 u32 imr;
86 imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
87 imr |= mask;
88 __raw_writel(imr, MCF_MBAR + MCFSIM_IMR);
89}
90
91#endif
92
93/*
94 * Interrupts can be "vectored" on the ColdFire cores that support this old
95 * interrupt controller. That is, the device raising the interrupt can also
96 * supply the vector number to interrupt through. The AVR register of the
97 * interrupt controller enables or disables this for each external interrupt,
98 * so provide generic support for this. Setting this up is out-of-band for
99 * the interrupt system API's, and needs to be done by the driver that
100 * supports this device. Very few devices actually use this.
101 */
102void mcf_autovector(int irq)
103{
104#ifdef MCFSIM_AVR
105 if ((irq >= EIRQ1) && (irq <= EIRQ7)) {
106 u8 avec;
107 avec = __raw_readb(MCF_MBAR + MCFSIM_AVR);
108 avec |= (0x1 << (irq - EIRQ1 + 1));
109 __raw_writeb(avec, MCF_MBAR + MCFSIM_AVR);
110 }
111#endif
112}
113
114static void intc_irq_mask(struct irq_data *d)
115{
116 if (mcf_irq2imr[d->irq])
117 mcf_setimr(mcf_irq2imr[d->irq]);
118}
119
120static void intc_irq_unmask(struct irq_data *d)
121{
122 if (mcf_irq2imr[d->irq])
123 mcf_clrimr(mcf_irq2imr[d->irq]);
124}
125
126static int intc_irq_set_type(struct irq_data *d, unsigned int type)
127{
128 return 0;
129}
130
131static struct irq_chip intc_irq_chip = {
132 .name = "CF-INTC",
133 .irq_mask = intc_irq_mask,
134 .irq_unmask = intc_irq_unmask,
135 .irq_set_type = intc_irq_set_type,
136};
137
138void __init init_IRQ(void)
139{
140 int irq;
141
142 init_vectors();
143 mcf_maskimr(0xffffffff);
144
145 for (irq = 0; (irq < NR_IRQS); irq++) {
146 set_irq_chip(irq, &intc_irq_chip);
147 set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
148 set_irq_handler(irq, handle_level_irq);
149 }
150}
151
diff --git a/arch/m68knommu/platform/coldfire/pinmux.c b/arch/m68knommu/platform/coldfire/pinmux.c
deleted file mode 100644
index 8c62b825939f..000000000000
--- a/arch/m68knommu/platform/coldfire/pinmux.c
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * Coldfire generic GPIO pinmux support.
3 *
4 * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
18
19#include <asm/pinmux.h>
20
21int mcf_pinmux_request(unsigned pinmux, unsigned func)
22{
23 return 0;
24}
25
26void mcf_pinmux_release(unsigned pinmux, unsigned func)
27{
28}
diff --git a/arch/m68knommu/platform/coldfire/pit.c b/arch/m68knommu/platform/coldfire/pit.c
deleted file mode 100644
index c2b980926bec..000000000000
--- a/arch/m68knommu/platform/coldfire/pit.c
+++ /dev/null
@@ -1,169 +0,0 @@
1/***************************************************************************/
2
3/*
4 * pit.c -- Freescale ColdFire PIT timer. Currently this type of
5 * hardware timer only exists in the Freescale ColdFire
6 * 5270/5271, 5282 and 5208 CPUs. No doubt newer ColdFire
7 * family members will probably use it too.
8 *
9 * Copyright (C) 1999-2008, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
15#include <linux/kernel.h>
16#include <linux/sched.h>
17#include <linux/param.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/irq.h>
21#include <linux/clockchips.h>
22#include <asm/machdep.h>
23#include <asm/io.h>
24#include <asm/coldfire.h>
25#include <asm/mcfpit.h>
26#include <asm/mcfsim.h>
27
28/***************************************************************************/
29
30/*
31 * By default use timer1 as the system clock timer.
32 */
33#define FREQ ((MCF_CLK / 2) / 64)
34#define TA(a) (MCFPIT_BASE1 + (a))
35#define PIT_CYCLES_PER_JIFFY (FREQ / HZ)
36
37static u32 pit_cnt;
38
39/*
40 * Initialize the PIT timer.
41 *
42 * This is also called after resume to bring the PIT into operation again.
43 */
44
45static void init_cf_pit_timer(enum clock_event_mode mode,
46 struct clock_event_device *evt)
47{
48 switch (mode) {
49 case CLOCK_EVT_MODE_PERIODIC:
50
51 __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
52 __raw_writew(PIT_CYCLES_PER_JIFFY, TA(MCFPIT_PMR));
53 __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | \
54 MCFPIT_PCSR_OVW | MCFPIT_PCSR_RLD | \
55 MCFPIT_PCSR_CLK64, TA(MCFPIT_PCSR));
56 break;
57
58 case CLOCK_EVT_MODE_SHUTDOWN:
59 case CLOCK_EVT_MODE_UNUSED:
60
61 __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
62 break;
63
64 case CLOCK_EVT_MODE_ONESHOT:
65
66 __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
67 __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | \
68 MCFPIT_PCSR_OVW | MCFPIT_PCSR_CLK64, \
69 TA(MCFPIT_PCSR));
70 break;
71
72 case CLOCK_EVT_MODE_RESUME:
73 /* Nothing to do here */
74 break;
75 }
76}
77
78/*
79 * Program the next event in oneshot mode
80 *
81 * Delta is given in PIT ticks
82 */
83static int cf_pit_next_event(unsigned long delta,
84 struct clock_event_device *evt)
85{
86 __raw_writew(delta, TA(MCFPIT_PMR));
87 return 0;
88}
89
90struct clock_event_device cf_pit_clockevent = {
91 .name = "pit",
92 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
93 .set_mode = init_cf_pit_timer,
94 .set_next_event = cf_pit_next_event,
95 .shift = 32,
96 .irq = MCFINT_VECBASE + MCFINT_PIT1,
97};
98
99
100
101/***************************************************************************/
102
103static irqreturn_t pit_tick(int irq, void *dummy)
104{
105 struct clock_event_device *evt = &cf_pit_clockevent;
106 u16 pcsr;
107
108 /* Reset the ColdFire timer */
109 pcsr = __raw_readw(TA(MCFPIT_PCSR));
110 __raw_writew(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR));
111
112 pit_cnt += PIT_CYCLES_PER_JIFFY;
113 evt->event_handler(evt);
114 return IRQ_HANDLED;
115}
116
117/***************************************************************************/
118
119static struct irqaction pit_irq = {
120 .name = "timer",
121 .flags = IRQF_DISABLED | IRQF_TIMER,
122 .handler = pit_tick,
123};
124
125/***************************************************************************/
126
127static cycle_t pit_read_clk(struct clocksource *cs)
128{
129 unsigned long flags;
130 u32 cycles;
131 u16 pcntr;
132
133 local_irq_save(flags);
134 pcntr = __raw_readw(TA(MCFPIT_PCNTR));
135 cycles = pit_cnt;
136 local_irq_restore(flags);
137
138 return cycles + PIT_CYCLES_PER_JIFFY - pcntr;
139}
140
141/***************************************************************************/
142
143static struct clocksource pit_clk = {
144 .name = "pit",
145 .rating = 100,
146 .read = pit_read_clk,
147 .shift = 20,
148 .mask = CLOCKSOURCE_MASK(32),
149};
150
151/***************************************************************************/
152
153void hw_timer_init(void)
154{
155 cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id());
156 cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32);
157 cf_pit_clockevent.max_delta_ns =
158 clockevent_delta2ns(0xFFFF, &cf_pit_clockevent);
159 cf_pit_clockevent.min_delta_ns =
160 clockevent_delta2ns(0x3f, &cf_pit_clockevent);
161 clockevents_register_device(&cf_pit_clockevent);
162
163 setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq);
164
165 pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift);
166 clocksource_register(&pit_clk);
167}
168
169/***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/sltimers.c b/arch/m68knommu/platform/coldfire/sltimers.c
deleted file mode 100644
index 0a1b937c3e18..000000000000
--- a/arch/m68knommu/platform/coldfire/sltimers.c
+++ /dev/null
@@ -1,145 +0,0 @@
1/***************************************************************************/
2
3/*
4 * sltimers.c -- generic ColdFire slice timer support.
5 *
6 * Copyright (C) 2009-2010, Philippe De Muyter <phdm@macqel.be>
7 * based on
8 * timers.c -- generic ColdFire hardware timer support.
9 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
10 */
11
12/***************************************************************************/
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/sched.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19#include <linux/profile.h>
20#include <linux/clocksource.h>
21#include <asm/io.h>
22#include <asm/traps.h>
23#include <asm/machdep.h>
24#include <asm/coldfire.h>
25#include <asm/mcfslt.h>
26#include <asm/mcfsim.h>
27
28/***************************************************************************/
29
30#ifdef CONFIG_HIGHPROFILE
31
32/*
33 * By default use Slice Timer 1 as the profiler clock timer.
34 */
35#define PA(a) (MCF_MBAR + MCFSLT_TIMER1 + (a))
36
37/*
38 * Choose a reasonably fast profile timer. Make it an odd value to
39 * try and get good coverage of kernel operations.
40 */
41#define PROFILEHZ 1013
42
43irqreturn_t mcfslt_profile_tick(int irq, void *dummy)
44{
45 /* Reset Slice Timer 1 */
46 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, PA(MCFSLT_SSR));
47 if (current->pid)
48 profile_tick(CPU_PROFILING);
49 return IRQ_HANDLED;
50}
51
52static struct irqaction mcfslt_profile_irq = {
53 .name = "profile timer",
54 .flags = IRQF_DISABLED | IRQF_TIMER,
55 .handler = mcfslt_profile_tick,
56};
57
58void mcfslt_profile_init(void)
59{
60 printk(KERN_INFO "PROFILE: lodging TIMER 1 @ %dHz as profile timer\n",
61 PROFILEHZ);
62
63 setup_irq(MCF_IRQ_PROFILER, &mcfslt_profile_irq);
64
65 /* Set up TIMER 2 as high speed profile clock */
66 __raw_writel(MCF_BUSCLK / PROFILEHZ - 1, PA(MCFSLT_STCNT));
67 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
68 PA(MCFSLT_SCR));
69
70}
71
72#endif /* CONFIG_HIGHPROFILE */
73
74/***************************************************************************/
75
76/*
77 * By default use Slice Timer 0 as the system clock timer.
78 */
79#define TA(a) (MCF_MBAR + MCFSLT_TIMER0 + (a))
80
81static u32 mcfslt_cycles_per_jiffy;
82static u32 mcfslt_cnt;
83
84static irqreturn_t mcfslt_tick(int irq, void *dummy)
85{
86 /* Reset Slice Timer 0 */
87 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
88 mcfslt_cnt += mcfslt_cycles_per_jiffy;
89 return arch_timer_interrupt(irq, dummy);
90}
91
92static struct irqaction mcfslt_timer_irq = {
93 .name = "timer",
94 .flags = IRQF_DISABLED | IRQF_TIMER,
95 .handler = mcfslt_tick,
96};
97
98static cycle_t mcfslt_read_clk(struct clocksource *cs)
99{
100 unsigned long flags;
101 u32 cycles;
102 u16 scnt;
103
104 local_irq_save(flags);
105 scnt = __raw_readl(TA(MCFSLT_SCNT));
106 cycles = mcfslt_cnt;
107 local_irq_restore(flags);
108
109 /* substract because slice timers count down */
110 return cycles - scnt;
111}
112
113static struct clocksource mcfslt_clk = {
114 .name = "slt",
115 .rating = 250,
116 .read = mcfslt_read_clk,
117 .shift = 20,
118 .mask = CLOCKSOURCE_MASK(32),
119 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
120};
121
122void hw_timer_init(void)
123{
124 mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ;
125 /*
126 * The coldfire slice timer (SLT) runs from STCNT to 0 included,
127 * then STCNT again and so on. It counts thus actually
128 * STCNT + 1 steps for 1 tick, not STCNT. So if you want
129 * n cycles, initialize STCNT with n - 1.
130 */
131 __raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT));
132 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
133 TA(MCFSLT_SCR));
134 /* initialize mcfslt_cnt knowing that slice timers count down */
135 mcfslt_cnt = mcfslt_cycles_per_jiffy;
136
137 setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq);
138
139 mcfslt_clk.mult = clocksource_hz2mult(MCF_BUSCLK, mcfslt_clk.shift);
140 clocksource_register(&mcfslt_clk);
141
142#ifdef CONFIG_HIGHPROFILE
143 mcfslt_profile_init();
144#endif
145}
diff --git a/arch/m68knommu/platform/coldfire/timers.c b/arch/m68knommu/platform/coldfire/timers.c
deleted file mode 100644
index 60242f65fea9..000000000000
--- a/arch/m68knommu/platform/coldfire/timers.c
+++ /dev/null
@@ -1,174 +0,0 @@
1/***************************************************************************/
2
3/*
4 * timers.c -- generic ColdFire hardware timer support.
5 *
6 * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/sched.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/profile.h>
17#include <linux/clocksource.h>
18#include <asm/io.h>
19#include <asm/traps.h>
20#include <asm/machdep.h>
21#include <asm/coldfire.h>
22#include <asm/mcftimer.h>
23#include <asm/mcfsim.h>
24
25/***************************************************************************/
26
27/*
28 * By default use timer1 as the system clock timer.
29 */
30#define FREQ (MCF_BUSCLK / 16)
31#define TA(a) (MCFTIMER_BASE1 + (a))
32
33/*
34 * These provide the underlying interrupt vector support.
35 * Unfortunately it is a little different on each ColdFire.
36 */
37void coldfire_profile_init(void);
38
39#if defined(CONFIG_M532x)
40#define __raw_readtrr __raw_readl
41#define __raw_writetrr __raw_writel
42#else
43#define __raw_readtrr __raw_readw
44#define __raw_writetrr __raw_writew
45#endif
46
47static u32 mcftmr_cycles_per_jiffy;
48static u32 mcftmr_cnt;
49
50/***************************************************************************/
51
52static irqreturn_t mcftmr_tick(int irq, void *dummy)
53{
54 /* Reset the ColdFire timer */
55 __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
56
57 mcftmr_cnt += mcftmr_cycles_per_jiffy;
58 return arch_timer_interrupt(irq, dummy);
59}
60
61/***************************************************************************/
62
63static struct irqaction mcftmr_timer_irq = {
64 .name = "timer",
65 .flags = IRQF_DISABLED | IRQF_TIMER,
66 .handler = mcftmr_tick,
67};
68
69/***************************************************************************/
70
71static cycle_t mcftmr_read_clk(struct clocksource *cs)
72{
73 unsigned long flags;
74 u32 cycles;
75 u16 tcn;
76
77 local_irq_save(flags);
78 tcn = __raw_readw(TA(MCFTIMER_TCN));
79 cycles = mcftmr_cnt;
80 local_irq_restore(flags);
81
82 return cycles + tcn;
83}
84
85/***************************************************************************/
86
87static struct clocksource mcftmr_clk = {
88 .name = "tmr",
89 .rating = 250,
90 .read = mcftmr_read_clk,
91 .shift = 20,
92 .mask = CLOCKSOURCE_MASK(32),
93 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
94};
95
96/***************************************************************************/
97
98void hw_timer_init(void)
99{
100 __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
101 mcftmr_cycles_per_jiffy = FREQ / HZ;
102 /*
103 * The coldfire timer runs from 0 to TRR included, then 0
104 * again and so on. It counts thus actually TRR + 1 steps
105 * for 1 tick, not TRR. So if you want n cycles,
106 * initialize TRR with n - 1.
107 */
108 __raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
109 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
110 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
111
112 mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
113 clocksource_register(&mcftmr_clk);
114
115 setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
116
117#ifdef CONFIG_HIGHPROFILE
118 coldfire_profile_init();
119#endif
120}
121
122/***************************************************************************/
123#ifdef CONFIG_HIGHPROFILE
124/***************************************************************************/
125
126/*
127 * By default use timer2 as the profiler clock timer.
128 */
129#define PA(a) (MCFTIMER_BASE2 + (a))
130
131/*
132 * Choose a reasonably fast profile timer. Make it an odd value to
133 * try and get good coverage of kernel operations.
134 */
135#define PROFILEHZ 1013
136
137/*
138 * Use the other timer to provide high accuracy profiling info.
139 */
140irqreturn_t coldfire_profile_tick(int irq, void *dummy)
141{
142 /* Reset ColdFire timer2 */
143 __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
144 if (current->pid)
145 profile_tick(CPU_PROFILING);
146 return IRQ_HANDLED;
147}
148
149/***************************************************************************/
150
151static struct irqaction coldfire_profile_irq = {
152 .name = "profile timer",
153 .flags = IRQF_DISABLED | IRQF_TIMER,
154 .handler = coldfire_profile_tick,
155};
156
157void coldfire_profile_init(void)
158{
159 printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
160 PROFILEHZ);
161
162 /* Set up TIMER 2 as high speed profile clock */
163 __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
164
165 __raw_writetrr(((MCF_BUSCLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
166 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
167 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
168
169 setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
170}
171
172/***************************************************************************/
173#endif /* CONFIG_HIGHPROFILE */
174/***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/vectors.c b/arch/m68knommu/platform/coldfire/vectors.c
deleted file mode 100644
index a21d3f870b7a..000000000000
--- a/arch/m68knommu/platform/coldfire/vectors.c
+++ /dev/null
@@ -1,80 +0,0 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/coldfire/vectors.c
5 *
6 * Copyright (C) 1999-2007, Greg Ungerer <gerg@snapgear.com>
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <asm/traps.h>
15#include <asm/machdep.h>
16#include <asm/coldfire.h>
17#include <asm/mcfsim.h>
18#include <asm/mcfwdebug.h>
19
20/***************************************************************************/
21
22#ifdef TRAP_DBG_INTERRUPT
23
24asmlinkage void dbginterrupt_c(struct frame *fp)
25{
26 extern void dump(struct pt_regs *fp);
27 printk(KERN_DEBUG "%s(%d): BUS ERROR TRAP\n", __FILE__, __LINE__);
28 dump((struct pt_regs *) fp);
29 asm("halt");
30}
31
32#endif
33
34/***************************************************************************/
35
36extern e_vector *_ramvec;
37
38void set_evector(int vecnum, void (*handler)(void))
39{
40 if (vecnum >= 0 && vecnum <= 255)
41 _ramvec[vecnum] = handler;
42}
43
44/***************************************************************************/
45
46/* Assembler routines */
47asmlinkage void buserr(void);
48asmlinkage void trap(void);
49asmlinkage void system_call(void);
50asmlinkage void inthandler(void);
51
52void __init init_vectors(void)
53{
54 int i;
55
56 /*
57 * There is a common trap handler and common interrupt
58 * handler that handle almost every vector. We treat
59 * the system call and bus error special, they get their
60 * own first level handlers.
61 */
62 for (i = 3; (i <= 23); i++)
63 _ramvec[i] = trap;
64 for (i = 33; (i <= 63); i++)
65 _ramvec[i] = trap;
66 for (i = 24; (i <= 31); i++)
67 _ramvec[i] = inthandler;
68 for (i = 64; (i < 255); i++)
69 _ramvec[i] = inthandler;
70 _ramvec[255] = 0;
71
72 _ramvec[2] = buserr;
73 _ramvec[32] = system_call;
74
75#ifdef TRAP_DBG_INTERRUPT
76 _ramvec[12] = dbginterrupt;
77#endif
78}
79
80/***************************************************************************/
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-21 09:16:41 -0500