diff options
author | Paul Mundt <lethal@linux-sh.org> | 2010-05-31 00:14:26 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-05-31 00:14:26 -0400 |
commit | d5b732b17ca2fc74f370bdba5aae6c804fac8c35 (patch) | |
tree | 4facc6d96116b032a3c1cb2ced9b2a3008e9216e /arch/m68knommu/platform/527x/config.c | |
parent | eb6e8605ee5f5b4e116451bf01b3f35eac446dde (diff) | |
parent | 67a3e12b05e055c0415c556a315a3d3eb637e29e (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/m68knommu/platform/527x/config.c')
-rw-r--r-- | arch/m68knommu/platform/527x/config.c | 182 |
1 files changed, 182 insertions, 0 deletions
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c index fa51be172830..3d9c35c98b98 100644 --- a/arch/m68knommu/platform/527x/config.c +++ b/arch/m68knommu/platform/527x/config.c | |||
@@ -16,10 +16,13 @@ | |||
16 | #include <linux/param.h> | 16 | #include <linux/param.h> |
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/spi/spi.h> | ||
20 | #include <linux/gpio.h> | ||
19 | #include <asm/machdep.h> | 21 | #include <asm/machdep.h> |
20 | #include <asm/coldfire.h> | 22 | #include <asm/coldfire.h> |
21 | #include <asm/mcfsim.h> | 23 | #include <asm/mcfsim.h> |
22 | #include <asm/mcfuart.h> | 24 | #include <asm/mcfuart.h> |
25 | #include <asm/mcfqspi.h> | ||
23 | 26 | ||
24 | /***************************************************************************/ | 27 | /***************************************************************************/ |
25 | 28 | ||
@@ -106,12 +109,188 @@ static struct platform_device m527x_fec[] = { | |||
106 | }, | 109 | }, |
107 | }; | 110 | }; |
108 | 111 | ||
112 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
113 | static struct resource m527x_qspi_resources[] = { | ||
114 | { | ||
115 | .start = MCFQSPI_IOBASE, | ||
116 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
117 | .flags = IORESOURCE_MEM, | ||
118 | }, | ||
119 | { | ||
120 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
121 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
122 | .flags = IORESOURCE_IRQ, | ||
123 | }, | ||
124 | }; | ||
125 | |||
126 | #if defined(CONFIG_M5271) | ||
127 | #define MCFQSPI_CS0 91 | ||
128 | #define MCFQSPI_CS1 92 | ||
129 | #define MCFQSPI_CS2 99 | ||
130 | #define MCFQSPI_CS3 103 | ||
131 | #elif defined(CONFIG_M5275) | ||
132 | #define MCFQSPI_CS0 59 | ||
133 | #define MCFQSPI_CS1 60 | ||
134 | #define MCFQSPI_CS2 61 | ||
135 | #define MCFQSPI_CS3 62 | ||
136 | #endif | ||
137 | |||
138 | static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
139 | { | ||
140 | int status; | ||
141 | |||
142 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
143 | if (status) { | ||
144 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
145 | goto fail0; | ||
146 | } | ||
147 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
148 | if (status) { | ||
149 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
150 | goto fail1; | ||
151 | } | ||
152 | |||
153 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
154 | if (status) { | ||
155 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
156 | goto fail1; | ||
157 | } | ||
158 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
159 | if (status) { | ||
160 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
161 | goto fail2; | ||
162 | } | ||
163 | |||
164 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
165 | if (status) { | ||
166 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
167 | goto fail2; | ||
168 | } | ||
169 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
170 | if (status) { | ||
171 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
172 | goto fail3; | ||
173 | } | ||
174 | |||
175 | status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); | ||
176 | if (status) { | ||
177 | pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); | ||
178 | goto fail3; | ||
179 | } | ||
180 | status = gpio_direction_output(MCFQSPI_CS3, 1); | ||
181 | if (status) { | ||
182 | pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); | ||
183 | goto fail4; | ||
184 | } | ||
185 | |||
186 | return 0; | ||
187 | |||
188 | fail4: | ||
189 | gpio_free(MCFQSPI_CS3); | ||
190 | fail3: | ||
191 | gpio_free(MCFQSPI_CS2); | ||
192 | fail2: | ||
193 | gpio_free(MCFQSPI_CS1); | ||
194 | fail1: | ||
195 | gpio_free(MCFQSPI_CS0); | ||
196 | fail0: | ||
197 | return status; | ||
198 | } | ||
199 | |||
200 | static void m527x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
201 | { | ||
202 | gpio_free(MCFQSPI_CS3); | ||
203 | gpio_free(MCFQSPI_CS2); | ||
204 | gpio_free(MCFQSPI_CS1); | ||
205 | gpio_free(MCFQSPI_CS0); | ||
206 | } | ||
207 | |||
208 | static void m527x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
209 | u8 chip_select, bool cs_high) | ||
210 | { | ||
211 | switch (chip_select) { | ||
212 | case 0: | ||
213 | gpio_set_value(MCFQSPI_CS0, cs_high); | ||
214 | break; | ||
215 | case 1: | ||
216 | gpio_set_value(MCFQSPI_CS1, cs_high); | ||
217 | break; | ||
218 | case 2: | ||
219 | gpio_set_value(MCFQSPI_CS2, cs_high); | ||
220 | break; | ||
221 | case 3: | ||
222 | gpio_set_value(MCFQSPI_CS3, cs_high); | ||
223 | break; | ||
224 | } | ||
225 | } | ||
226 | |||
227 | static void m527x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
228 | u8 chip_select, bool cs_high) | ||
229 | { | ||
230 | switch (chip_select) { | ||
231 | case 0: | ||
232 | gpio_set_value(MCFQSPI_CS0, !cs_high); | ||
233 | break; | ||
234 | case 1: | ||
235 | gpio_set_value(MCFQSPI_CS1, !cs_high); | ||
236 | break; | ||
237 | case 2: | ||
238 | gpio_set_value(MCFQSPI_CS2, !cs_high); | ||
239 | break; | ||
240 | case 3: | ||
241 | gpio_set_value(MCFQSPI_CS3, !cs_high); | ||
242 | break; | ||
243 | } | ||
244 | } | ||
245 | |||
246 | static struct mcfqspi_cs_control m527x_cs_control = { | ||
247 | .setup = m527x_cs_setup, | ||
248 | .teardown = m527x_cs_teardown, | ||
249 | .select = m527x_cs_select, | ||
250 | .deselect = m527x_cs_deselect, | ||
251 | }; | ||
252 | |||
253 | static struct mcfqspi_platform_data m527x_qspi_data = { | ||
254 | .bus_num = 0, | ||
255 | .num_chipselect = 4, | ||
256 | .cs_control = &m527x_cs_control, | ||
257 | }; | ||
258 | |||
259 | static struct platform_device m527x_qspi = { | ||
260 | .name = "mcfqspi", | ||
261 | .id = 0, | ||
262 | .num_resources = ARRAY_SIZE(m527x_qspi_resources), | ||
263 | .resource = m527x_qspi_resources, | ||
264 | .dev.platform_data = &m527x_qspi_data, | ||
265 | }; | ||
266 | |||
267 | static void __init m527x_qspi_init(void) | ||
268 | { | ||
269 | #if defined(CONFIG_M5271) | ||
270 | u16 par; | ||
271 | |||
272 | /* setup QSPS pins for QSPI with gpio CS control */ | ||
273 | writeb(0x1f, MCFGPIO_PAR_QSPI); | ||
274 | /* and CS2 & CS3 as gpio */ | ||
275 | par = readw(MCFGPIO_PAR_TIMER); | ||
276 | par &= 0x3f3f; | ||
277 | writew(par, MCFGPIO_PAR_TIMER); | ||
278 | #elif defined(CONFIG_M5275) | ||
279 | /* setup QSPS pins for QSPI with gpio CS control */ | ||
280 | writew(0x003e, MCFGPIO_PAR_QSPI); | ||
281 | #endif | ||
282 | } | ||
283 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
284 | |||
109 | static struct platform_device *m527x_devices[] __initdata = { | 285 | static struct platform_device *m527x_devices[] __initdata = { |
110 | &m527x_uart, | 286 | &m527x_uart, |
111 | &m527x_fec[0], | 287 | &m527x_fec[0], |
112 | #ifdef CONFIG_FEC2 | 288 | #ifdef CONFIG_FEC2 |
113 | &m527x_fec[1], | 289 | &m527x_fec[1], |
114 | #endif | 290 | #endif |
291 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
292 | &m527x_qspi, | ||
293 | #endif | ||
115 | }; | 294 | }; |
116 | 295 | ||
117 | /***************************************************************************/ | 296 | /***************************************************************************/ |
@@ -187,6 +366,9 @@ void __init config_BSP(char *commandp, int size) | |||
187 | mach_reset = m527x_cpu_reset; | 366 | mach_reset = m527x_cpu_reset; |
188 | m527x_uarts_init(); | 367 | m527x_uarts_init(); |
189 | m527x_fec_init(); | 368 | m527x_fec_init(); |
369 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
370 | m527x_qspi_init(); | ||
371 | #endif | ||
190 | } | 372 | } |
191 | 373 | ||
192 | /***************************************************************************/ | 374 | /***************************************************************************/ |