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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/m68knommu/platform/5206e
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/m68knommu/platform/5206e')
-rw-r--r--arch/m68knommu/platform/5206e/Makefile20
-rw-r--r--arch/m68knommu/platform/5206e/config.c120
2 files changed, 140 insertions, 0 deletions
diff --git a/arch/m68knommu/platform/5206e/Makefile b/arch/m68knommu/platform/5206e/Makefile
new file mode 100644
index 000000000000..701b7abe019d
--- /dev/null
+++ b/arch/m68knommu/platform/5206e/Makefile
@@ -0,0 +1,20 @@
1#
2# Makefile for the m68knommu linux kernel.
3#
4
5#
6# If you want to play with the HW breakpoints then you will
7# need to add define this, which will give you a stack backtrace
8# on the console port whenever a DBG interrupt occurs. You have to
9# set up you HW breakpoints to trigger a DBG interrupt:
10#
11# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT
12# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT
13#
14
15ifdef CONFIG_FULLDEBUG
16AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1
17endif
18
19obj-y := config.o
20
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c
new file mode 100644
index 000000000000..f35b8606c1ee
--- /dev/null
+++ b/arch/m68knommu/platform/5206e/config.c
@@ -0,0 +1,120 @@
1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/5206e/config.c
5 *
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 */
8
9/***************************************************************************/
10
11#include <linux/config.h>
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/param.h>
15#include <linux/interrupt.h>
16#include <asm/irq.h>
17#include <asm/dma.h>
18#include <asm/traps.h>
19#include <asm/machdep.h>
20#include <asm/coldfire.h>
21#include <asm/mcftimer.h>
22#include <asm/mcfsim.h>
23#include <asm/mcfdma.h>
24#include <asm/irq.h>
25
26/***************************************************************************/
27
28void coldfire_tick(void);
29void coldfire_timer_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
30unsigned long coldfire_timer_offset(void);
31void coldfire_trap_init(void);
32void coldfire_reset(void);
33
34/***************************************************************************/
35
36/*
37 * DMA channel base address table.
38 */
39unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
40 MCF_MBAR + MCFDMA_BASE0,
41 MCF_MBAR + MCFDMA_BASE1,
42};
43
44unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
45
46/***************************************************************************/
47
48void mcf_autovector(unsigned int vec)
49{
50 volatile unsigned char *mbar;
51 unsigned char icr;
52
53 if ((vec >= 25) && (vec <= 31)) {
54 vec -= 25;
55 mbar = (volatile unsigned char *) MCF_MBAR;
56 icr = MCFSIM_ICR_AUTOVEC | (vec << 3);
57 *(mbar + MCFSIM_ICR1 + vec) = icr;
58 vec = 0x1 << (vec + 1);
59 mcf_setimr(mcf_getimr() & ~vec);
60 }
61}
62
63/***************************************************************************/
64
65void mcf_settimericr(unsigned int timer, unsigned int level)
66{
67 volatile unsigned char *icrp;
68 unsigned int icr, imr;
69
70 if (timer <= 2) {
71 switch (timer) {
72 case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
73 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
74 }
75
76 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
77 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
78 mcf_setimr(mcf_getimr() & ~imr);
79 }
80}
81
82/***************************************************************************/
83
84int mcf_timerirqpending(int timer)
85{
86 unsigned int imr = 0;
87
88 switch (timer) {
89 case 1: imr = MCFSIM_IMR_TIMER1; break;
90 case 2: imr = MCFSIM_IMR_TIMER2; break;
91 default: break;
92 }
93 return (mcf_getipr() & imr);
94}
95
96/***************************************************************************/
97
98void config_BSP(char *commandp, int size)
99{
100 mcf_setimr(MCFSIM_IMR_MASKALL);
101
102#if defined(CONFIG_BOOTPARAM)
103 strncpy(commandp, CONFIG_BOOTPARAM_STRING, size);
104 commandp[size-1] = 0;
105#elif defined(CONFIG_NETtel)
106 /* Copy command line from FLASH to local buffer... */
107 memcpy(commandp, (char *) 0xf0004000, size);
108 commandp[size-1] = 0;
109#else
110 memset(commandp, 0, size);
111#endif /* CONFIG_NETtel */
112
113 mach_sched_init = coldfire_timer_init;
114 mach_tick = coldfire_tick;
115 mach_gettimeoffset = coldfire_timer_offset;
116 mach_trap_init = coldfire_trap_init;
117 mach_reset = coldfire_reset;
118}
119
120/***************************************************************************/