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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2012-03-09 13:55:17 -0500
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2012-03-09 13:55:17 -0500
commitb675b3667f6729dcd1036a2a129b35445947f905 (patch)
tree0d58791e9063d3ca2c352da6f3e7df2bdb876f9d /arch/m68k
parent104a5f3cad8f2f27cadbdf0029400ecd9e17ccc0 (diff)
parent192cfd58774b4d17b2fe8bdc77d89c2ef4e0591d (diff)
Merge commit 'v3.3-rc6' into next
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/Kconfig20
-rw-r--r--arch/m68k/Kconfig.cpu78
-rw-r--r--arch/m68k/Kconfig.debug27
-rw-r--r--arch/m68k/Kconfig.devices46
-rw-r--r--arch/m68k/Kconfig.machine4
-rw-r--r--arch/m68k/amiga/config.c3
-rw-r--r--arch/m68k/atari/ataints.c2
-rw-r--r--arch/m68k/atari/config.c8
-rw-r--r--arch/m68k/atari/debug.c1
-rw-r--r--arch/m68k/configs/amiga_defconfig1
-rw-r--r--arch/m68k/configs/apollo_defconfig2
-rw-r--r--arch/m68k/configs/atari_defconfig3
-rw-r--r--arch/m68k/configs/multi_defconfig5
-rw-r--r--arch/m68k/configs/mvme16x_defconfig2
-rw-r--r--arch/m68k/emu/nfeth.c2
-rw-r--r--arch/m68k/hp300/config.c3
-rw-r--r--arch/m68k/include/asm/anchor.h112
-rw-r--r--arch/m68k/include/asm/atarihw.h2
-rw-r--r--arch/m68k/include/asm/atomic.h10
-rw-r--r--arch/m68k/include/asm/blinken.h8
-rw-r--r--arch/m68k/include/asm/cacheflush_mm.h88
-rw-r--r--arch/m68k/include/asm/checksum.h31
-rw-r--r--arch/m68k/include/asm/div64.h8
-rw-r--r--arch/m68k/include/asm/elf.h6
-rw-r--r--arch/m68k/include/asm/entry.h10
-rw-r--r--arch/m68k/include/asm/fpu.h2
-rw-r--r--arch/m68k/include/asm/gpio.h3
-rw-r--r--arch/m68k/include/asm/ipcbuf.h30
-rw-r--r--arch/m68k/include/asm/irq.h18
-rw-r--r--arch/m68k/include/asm/m54xxacr.h32
-rw-r--r--arch/m68k/include/asm/mac_baboon.h6
-rw-r--r--arch/m68k/include/asm/mac_iop.h2
-rw-r--r--arch/m68k/include/asm/mac_oss.h23
-rw-r--r--arch/m68k/include/asm/mac_psc.h4
-rw-r--r--arch/m68k/include/asm/mac_via.h9
-rw-r--r--arch/m68k/include/asm/macintosh.h10
-rw-r--r--arch/m68k/include/asm/macints.h6
-rw-r--r--arch/m68k/include/asm/mcf_pgalloc.h102
-rw-r--r--arch/m68k/include/asm/mcf_pgtable.h426
-rw-r--r--arch/m68k/include/asm/mcfmmu.h112
-rw-r--r--arch/m68k/include/asm/mmu_context.h250
-rw-r--r--arch/m68k/include/asm/motorola_pgtable.h1
-rw-r--r--arch/m68k/include/asm/page.h10
-rw-r--r--arch/m68k/include/asm/page_no.h3
-rw-r--r--arch/m68k/include/asm/page_offset.h10
-rw-r--r--arch/m68k/include/asm/pgalloc.h4
-rw-r--r--arch/m68k/include/asm/pgtable_mm.h30
-rw-r--r--arch/m68k/include/asm/processor.h18
-rw-r--r--arch/m68k/include/asm/segment.h30
-rw-r--r--arch/m68k/include/asm/serial.h2
-rw-r--r--arch/m68k/include/asm/setup.h14
-rw-r--r--arch/m68k/include/asm/sigcontext.h4
-rw-r--r--arch/m68k/include/asm/socket.h3
-rw-r--r--arch/m68k/include/asm/thread_info.h34
-rw-r--r--arch/m68k/include/asm/tlbflush.h23
-rw-r--r--arch/m68k/include/asm/traps.h1
-rw-r--r--arch/m68k/include/asm/types.h6
-rw-r--r--arch/m68k/include/asm/uaccess_mm.h42
-rw-r--r--arch/m68k/include/asm/ucontext.h4
-rw-r--r--arch/m68k/include/asm/unistd.h14
-rw-r--r--arch/m68k/kernel/Makefile21
-rw-r--r--arch/m68k/kernel/asm-offsets.c3
-rw-r--r--arch/m68k/kernel/entry.S2
-rw-r--r--arch/m68k/kernel/entry_mm.S31
-rw-r--r--arch/m68k/kernel/entry_no.S9
-rw-r--r--arch/m68k/kernel/head.S117
-rw-r--r--arch/m68k/kernel/init_task.c3
-rw-r--r--arch/m68k/kernel/m68k_ksyms.c2
-rw-r--r--arch/m68k/kernel/process_mm.c75
-rw-r--r--arch/m68k/kernel/process_no.c4
-rw-r--r--arch/m68k/kernel/ptrace_mm.c18
-rw-r--r--arch/m68k/kernel/setup_mm.c22
-rw-r--r--arch/m68k/kernel/setup_no.c1
-rw-r--r--arch/m68k/kernel/signal_mm.c204
-rw-r--r--arch/m68k/kernel/syscalltable.S2
-rw-r--r--arch/m68k/kernel/time.c2
-rw-r--r--arch/m68k/kernel/time_no.c3
-rw-r--r--arch/m68k/kernel/traps.c140
-rw-r--r--arch/m68k/kernel/vmlinux-nommu.lds (renamed from arch/m68k/kernel/vmlinux.lds_no.S)8
-rw-r--r--arch/m68k/kernel/vmlinux-std.lds2
-rw-r--r--arch/m68k/kernel/vmlinux-sun3.lds2
-rw-r--r--arch/m68k/kernel/vmlinux.lds.S15
-rw-r--r--arch/m68k/kernel/vmlinux.lds_mm.S10
-rw-r--r--arch/m68k/lib/Makefile10
-rw-r--r--arch/m68k/lib/checksum.c (renamed from arch/m68k/lib/checksum_mm.c)0
-rw-r--r--arch/m68k/lib/checksum_no.c156
-rw-r--r--arch/m68k/lib/uaccess.c22
-rw-r--r--arch/m68k/mac/baboon.c41
-rw-r--r--arch/m68k/mac/config.c93
-rw-r--r--arch/m68k/mac/iop.c8
-rw-r--r--arch/m68k/mac/macints.c197
-rw-r--r--arch/m68k/mac/oss.c157
-rw-r--r--arch/m68k/mac/psc.c17
-rw-r--r--arch/m68k/mac/via.c255
-rw-r--r--arch/m68k/mm/Makefile8
-rw-r--r--arch/m68k/mm/cache.c30
-rw-r--r--arch/m68k/mm/init_mm.c36
-rw-r--r--arch/m68k/mm/kmap.c3
-rw-r--r--arch/m68k/mm/mcfmmu.c199
-rw-r--r--arch/m68k/mm/memory.c8
-rw-r--r--arch/m68k/mvme16x/config.c160
-rw-r--r--arch/m68k/platform/54xx/config.c47
-rw-r--r--arch/m68k/platform/68328/Makefile6
-rw-r--r--arch/m68k/platform/68328/bootlogo.h2
-rw-r--r--arch/m68k/platform/68328/bootlogo.pl10
-rw-r--r--arch/m68k/platform/68328/config.c3
-rw-r--r--arch/m68k/platform/68328/head-pilot.S19
-rw-r--r--arch/m68k/platform/68328/head-rom.S9
-rw-r--r--arch/m68k/platform/68328/timers.c4
-rw-r--r--arch/m68k/platform/coldfire/dma_timer.c5
-rw-r--r--arch/m68k/platform/coldfire/entry.S11
-rw-r--r--arch/m68k/platform/coldfire/gpio.c9
-rw-r--r--arch/m68k/platform/coldfire/head.S53
-rw-r--r--arch/m68k/platform/coldfire/pit.c4
-rw-r--r--arch/m68k/platform/coldfire/sltimers.c13
-rw-r--r--arch/m68k/platform/coldfire/timers.c4
116 files changed, 2631 insertions, 1434 deletions
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 361d54019bb0..ae413d4a8bb7 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -3,10 +3,10 @@ config M68K
3 default y 3 default y
4 select HAVE_IDE 4 select HAVE_IDE
5 select HAVE_AOUT if MMU 5 select HAVE_AOUT if MMU
6 select GENERIC_ATOMIC64 if MMU
7 select HAVE_GENERIC_HARDIRQS 6 select HAVE_GENERIC_HARDIRQS
8 select GENERIC_IRQ_SHOW 7 select GENERIC_IRQ_SHOW
9 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS 8 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
9 select GENERIC_CPU_DEVICES
10 10
11config RWSEM_GENERIC_SPINLOCK 11config RWSEM_GENERIC_SPINLOCK
12 bool 12 bool
@@ -38,15 +38,15 @@ config GENERIC_CALIBRATE_DELAY
38 bool 38 bool
39 default y 39 default y
40 40
41config GENERIC_IOMAP 41config GENERIC_CSUM
42 def_bool MMU 42 bool
43 43
44config TIME_LOW_RES 44config TIME_LOW_RES
45 bool 45 bool
46 default y 46 default y
47 47
48config ARCH_USES_GETTIMEOFFSET 48config ARCH_USES_GETTIMEOFFSET
49 def_bool MMU 49 def_bool MMU && !COLDFIRE
50 50
51config NO_IOPORT 51config NO_IOPORT
52 def_bool y 52 def_bool y
@@ -61,6 +61,12 @@ config ZONE_DMA
61config CPU_HAS_NO_BITFIELDS 61config CPU_HAS_NO_BITFIELDS
62 bool 62 bool
63 63
64config CPU_HAS_NO_MULDIV64
65 bool
66
67config CPU_HAS_ADDRESS_SPACES
68 bool
69
64config HZ 70config HZ
65 int 71 int
66 default 1000 if CLEOPATRA 72 default 1000 if CLEOPATRA
@@ -73,6 +79,7 @@ source "kernel/Kconfig.freezer"
73config MMU 79config MMU
74 bool "MMU-based Paged Memory Management Support" 80 bool "MMU-based Paged Memory Management Support"
75 default y 81 default y
82 select GENERIC_IOMAP
76 help 83 help
77 Select if you want MMU-based virtualised addressing space 84 Select if you want MMU-based virtualised addressing space
78 support by paged memory management. If unsure, say 'Y'. 85 support by paged memory management. If unsure, say 'Y'.
@@ -80,9 +87,12 @@ config MMU
80config MMU_MOTOROLA 87config MMU_MOTOROLA
81 bool 88 bool
82 89
90config MMU_COLDFIRE
91 bool
92
83config MMU_SUN3 93config MMU_SUN3
84 bool 94 bool
85 depends on MMU && !MMU_MOTOROLA 95 depends on MMU && !MMU_MOTOROLA && !MMU_COLDFIRE
86 96
87menu "Platform setup" 97menu "Platform setup"
88 98
diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
index e632b2d12106..8a9c767125a4 100644
--- a/arch/m68k/Kconfig.cpu
+++ b/arch/m68k/Kconfig.cpu
@@ -1,8 +1,42 @@
1comment "Processor Type" 1comment "Processor Type"
2 2
3choice
4 prompt "CPU family support"
5 default M68KCLASSIC if MMU
6 default COLDFIRE if !MMU
7 help
8 The Freescale (was Motorola) M68K family of processors implements
9 the full 68000 processor instruction set.
10 The Freescale ColdFire family of processors is a modern derivitive
11 of the 68000 processor family. They are mainly targeted at embedded
12 applications, and are all System-On-Chip (SOC) devices, as opposed
13 to stand alone CPUs. They implement a subset of the original 68000
14 processor instruction set.
15 If you anticipate running this kernel on a computer with a classic
16 MC68xxx processor, select M68KCLASSIC.
17 If you anticipate running this kernel on a computer with a ColdFire
18 processor, select COLDFIRE.
19
20config M68KCLASSIC
21 bool "Classic M68K CPU family support"
22
23config COLDFIRE
24 bool "Coldfire CPU family support"
25 select GENERIC_GPIO
26 select ARCH_REQUIRE_GPIOLIB
27 select CPU_HAS_NO_BITFIELDS
28 select CPU_HAS_NO_MULDIV64
29 select GENERIC_CSUM
30
31endchoice
32
33if M68KCLASSIC
34
3config M68000 35config M68000
4 bool 36 bool
5 select CPU_HAS_NO_BITFIELDS 37 select CPU_HAS_NO_BITFIELDS
38 select CPU_HAS_NO_MULDIV64
39 select GENERIC_CSUM
6 help 40 help
7 The Freescale (was Motorola) 68000 CPU is the first generation of 41 The Freescale (was Motorola) 68000 CPU is the first generation of
8 the well known M68K family of processors. The CPU core as well as 42 the well known M68K family of processors. The CPU core as well as
@@ -18,21 +52,11 @@ config MCPU32
18 based on the 68020 processor. For the most part it is used in 52 based on the 68020 processor. For the most part it is used in
19 System-On-Chip parts, and does not contain a paging MMU. 53 System-On-Chip parts, and does not contain a paging MMU.
20 54
21config COLDFIRE
22 bool
23 select GENERIC_GPIO
24 select ARCH_REQUIRE_GPIOLIB
25 select CPU_HAS_NO_BITFIELDS
26 help
27 The Freescale ColdFire family of processors is a modern derivitive
28 of the 68000 processor family. They are mainly targeted at embedded
29 applications, and are all System-On-Chip (SOC) devices, as opposed
30 to stand alone CPUs. They implement a subset of the original 68000
31 processor instruction set.
32
33config M68020 55config M68020
34 bool "68020 support" 56 bool "68020 support"
35 depends on MMU 57 depends on MMU
58 select GENERIC_ATOMIC64
59 select CPU_HAS_ADDRESS_SPACES
36 help 60 help
37 If you anticipate running this kernel on a computer with a MC68020 61 If you anticipate running this kernel on a computer with a MC68020
38 processor, say Y. Otherwise, say N. Note that the 68020 requires a 62 processor, say Y. Otherwise, say N. Note that the 68020 requires a
@@ -42,6 +66,8 @@ config M68020
42config M68030 66config M68030
43 bool "68030 support" 67 bool "68030 support"
44 depends on MMU && !MMU_SUN3 68 depends on MMU && !MMU_SUN3
69 select GENERIC_ATOMIC64
70 select CPU_HAS_ADDRESS_SPACES
45 help 71 help
46 If you anticipate running this kernel on a computer with a MC68030 72 If you anticipate running this kernel on a computer with a MC68030
47 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not 73 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
@@ -50,6 +76,8 @@ config M68030
50config M68040 76config M68040
51 bool "68040 support" 77 bool "68040 support"
52 depends on MMU && !MMU_SUN3 78 depends on MMU && !MMU_SUN3
79 select GENERIC_ATOMIC64
80 select CPU_HAS_ADDRESS_SPACES
53 help 81 help
54 If you anticipate running this kernel on a computer with a MC68LC040 82 If you anticipate running this kernel on a computer with a MC68LC040
55 or MC68040 processor, say Y. Otherwise, say N. Note that an 83 or MC68040 processor, say Y. Otherwise, say N. Note that an
@@ -59,6 +87,8 @@ config M68040
59config M68060 87config M68060
60 bool "68060 support" 88 bool "68060 support"
61 depends on MMU && !MMU_SUN3 89 depends on MMU && !MMU_SUN3
90 select GENERIC_ATOMIC64
91 select CPU_HAS_ADDRESS_SPACES
62 help 92 help
63 If you anticipate running this kernel on a computer with a MC68060 93 If you anticipate running this kernel on a computer with a MC68060
64 processor, say Y. Otherwise, say N. 94 processor, say Y. Otherwise, say N.
@@ -91,10 +121,13 @@ config M68360
91 help 121 help
92 Motorola 68360 processor support. 122 Motorola 68360 processor support.
93 123
124endif # M68KCLASSIC
125
126if COLDFIRE
127
94config M5206 128config M5206
95 bool "MCF5206" 129 bool "MCF5206"
96 depends on !MMU 130 depends on !MMU
97 select COLDFIRE
98 select COLDFIRE_SW_A7 131 select COLDFIRE_SW_A7
99 select HAVE_MBAR 132 select HAVE_MBAR
100 help 133 help
@@ -103,7 +136,6 @@ config M5206
103config M5206e 136config M5206e
104 bool "MCF5206e" 137 bool "MCF5206e"
105 depends on !MMU 138 depends on !MMU
106 select COLDFIRE
107 select COLDFIRE_SW_A7 139 select COLDFIRE_SW_A7
108 select HAVE_MBAR 140 select HAVE_MBAR
109 help 141 help
@@ -112,7 +144,6 @@ config M5206e
112config M520x 144config M520x
113 bool "MCF520x" 145 bool "MCF520x"
114 depends on !MMU 146 depends on !MMU
115 select COLDFIRE
116 select GENERIC_CLOCKEVENTS 147 select GENERIC_CLOCKEVENTS
117 select HAVE_CACHE_SPLIT 148 select HAVE_CACHE_SPLIT
118 help 149 help
@@ -121,7 +152,6 @@ config M520x
121config M523x 152config M523x
122 bool "MCF523x" 153 bool "MCF523x"
123 depends on !MMU 154 depends on !MMU
124 select COLDFIRE
125 select GENERIC_CLOCKEVENTS 155 select GENERIC_CLOCKEVENTS
126 select HAVE_CACHE_SPLIT 156 select HAVE_CACHE_SPLIT
127 select HAVE_IPSBAR 157 select HAVE_IPSBAR
@@ -131,7 +161,6 @@ config M523x
131config M5249 161config M5249
132 bool "MCF5249" 162 bool "MCF5249"
133 depends on !MMU 163 depends on !MMU
134 select COLDFIRE
135 select COLDFIRE_SW_A7 164 select COLDFIRE_SW_A7
136 select HAVE_MBAR 165 select HAVE_MBAR
137 help 166 help
@@ -143,7 +172,6 @@ config M527x
143config M5271 172config M5271
144 bool "MCF5271" 173 bool "MCF5271"
145 depends on !MMU 174 depends on !MMU
146 select COLDFIRE
147 select M527x 175 select M527x
148 select HAVE_CACHE_SPLIT 176 select HAVE_CACHE_SPLIT
149 select HAVE_IPSBAR 177 select HAVE_IPSBAR
@@ -154,7 +182,6 @@ config M5271
154config M5272 182config M5272
155 bool "MCF5272" 183 bool "MCF5272"
156 depends on !MMU 184 depends on !MMU
157 select COLDFIRE
158 select COLDFIRE_SW_A7 185 select COLDFIRE_SW_A7
159 select HAVE_MBAR 186 select HAVE_MBAR
160 help 187 help
@@ -163,7 +190,6 @@ config M5272
163config M5275 190config M5275
164 bool "MCF5275" 191 bool "MCF5275"
165 depends on !MMU 192 depends on !MMU
166 select COLDFIRE
167 select M527x 193 select M527x
168 select HAVE_CACHE_SPLIT 194 select HAVE_CACHE_SPLIT
169 select HAVE_IPSBAR 195 select HAVE_IPSBAR
@@ -174,7 +200,6 @@ config M5275
174config M528x 200config M528x
175 bool "MCF528x" 201 bool "MCF528x"
176 depends on !MMU 202 depends on !MMU
177 select COLDFIRE
178 select GENERIC_CLOCKEVENTS 203 select GENERIC_CLOCKEVENTS
179 select HAVE_CACHE_SPLIT 204 select HAVE_CACHE_SPLIT
180 select HAVE_IPSBAR 205 select HAVE_IPSBAR
@@ -184,7 +209,6 @@ config M528x
184config M5307 209config M5307
185 bool "MCF5307" 210 bool "MCF5307"
186 depends on !MMU 211 depends on !MMU
187 select COLDFIRE
188 select COLDFIRE_SW_A7 212 select COLDFIRE_SW_A7
189 select HAVE_CACHE_CB 213 select HAVE_CACHE_CB
190 select HAVE_MBAR 214 select HAVE_MBAR
@@ -194,7 +218,6 @@ config M5307
194config M532x 218config M532x
195 bool "MCF532x" 219 bool "MCF532x"
196 depends on !MMU 220 depends on !MMU
197 select COLDFIRE
198 select HAVE_CACHE_CB 221 select HAVE_CACHE_CB
199 help 222 help
200 Freescale (Motorola) ColdFire 532x processor support. 223 Freescale (Motorola) ColdFire 532x processor support.
@@ -202,7 +225,6 @@ config M532x
202config M5407 225config M5407
203 bool "MCF5407" 226 bool "MCF5407"
204 depends on !MMU 227 depends on !MMU
205 select COLDFIRE
206 select COLDFIRE_SW_A7 228 select COLDFIRE_SW_A7
207 select HAVE_CACHE_CB 229 select HAVE_CACHE_CB
208 select HAVE_MBAR 230 select HAVE_MBAR
@@ -214,9 +236,8 @@ config M54xx
214 236
215config M547x 237config M547x
216 bool "MCF547x" 238 bool "MCF547x"
217 depends on !MMU
218 select COLDFIRE
219 select M54xx 239 select M54xx
240 select MMU_COLDFIRE if MMU
220 select HAVE_CACHE_CB 241 select HAVE_CACHE_CB
221 select HAVE_MBAR 242 select HAVE_MBAR
222 help 243 help
@@ -224,14 +245,15 @@ config M547x
224 245
225config M548x 246config M548x
226 bool "MCF548x" 247 bool "MCF548x"
227 depends on !MMU 248 select MMU_COLDFIRE if MMU
228 select COLDFIRE
229 select M54xx 249 select M54xx
230 select HAVE_CACHE_CB 250 select HAVE_CACHE_CB
231 select HAVE_MBAR 251 select HAVE_MBAR
232 help 252 help
233 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. 253 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
234 254
255endif # COLDFIRE
256
235 257
236comment "Processor Specific Options" 258comment "Processor Specific Options"
237 259
diff --git a/arch/m68k/Kconfig.debug b/arch/m68k/Kconfig.debug
index 2bdb1b01115c..87233acef18b 100644
--- a/arch/m68k/Kconfig.debug
+++ b/arch/m68k/Kconfig.debug
@@ -2,6 +2,25 @@ menu "Kernel hacking"
2 2
3source "lib/Kconfig.debug" 3source "lib/Kconfig.debug"
4 4
5config BOOTPARAM
6 bool 'Compiled-in Kernel Boot Parameter'
7
8config BOOTPARAM_STRING
9 string 'Kernel Boot Parameter'
10 default 'console=ttyS0,19200'
11 depends on BOOTPARAM
12
13config EARLY_PRINTK
14 bool "Early printk" if EMBEDDED
15 depends on MVME16x || MAC
16 default y
17 help
18 Write kernel log output directly to a serial port.
19
20 This is useful for kernel debugging when your machine crashes very
21 early before the console code is initialized.
22 You should normally say N here, unless you want to debug such a crash.
23
5if !MMU 24if !MMU
6 25
7config FULLDEBUG 26config FULLDEBUG
@@ -15,14 +34,6 @@ config HIGHPROFILE
15 help 34 help
16 Use a fast secondary clock to produce profiling information. 35 Use a fast secondary clock to produce profiling information.
17 36
18config BOOTPARAM
19 bool 'Compiled-in Kernel Boot Parameter'
20
21config BOOTPARAM_STRING
22 string 'Kernel Boot Parameter'
23 default 'console=ttyS0,19200'
24 depends on BOOTPARAM
25
26config NO_KERNEL_MSG 37config NO_KERNEL_MSG
27 bool "Suppress Kernel BUG Messages" 38 bool "Suppress Kernel BUG Messages"
28 help 39 help
diff --git a/arch/m68k/Kconfig.devices b/arch/m68k/Kconfig.devices
index 6033f5d4e67e..04a3d9be90e9 100644
--- a/arch/m68k/Kconfig.devices
+++ b/arch/m68k/Kconfig.devices
@@ -8,8 +8,8 @@ config ARCH_MAY_HAVE_PC_FDC
8menu "Platform devices" 8menu "Platform devices"
9 9
10config HEARTBEAT 10config HEARTBEAT
11 bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || MAC ||Q40 11 bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || Q40
12 default y if !AMIGA && !APOLLO && !ATARI && !MAC && !Q40 && HP300 12 default y if !AMIGA && !APOLLO && !ATARI && !Q40 && HP300
13 help 13 help
14 Use the power-on LED on your machine as a load meter. The exact 14 Use the power-on LED on your machine as a load meter. The exact
15 behavior is platform-dependent, but normally the flash frequency is 15 behavior is platform-dependent, but normally the flash frequency is
@@ -59,27 +59,6 @@ endmenu
59 59
60menu "Character devices" 60menu "Character devices"
61 61
62config ATARI_MFPSER
63 tristate "Atari MFP serial support"
64 depends on ATARI
65 ---help---
66 If you like to use the MFP serial ports ("Modem1", "Serial1") under
67 Linux, say Y. The driver equally supports all kinds of MFP serial
68 ports and automatically detects whether Serial1 is available.
69
70 To compile this driver as a module, choose M here.
71
72 Note for Falcon users: You also have an MFP port, it's just not
73 wired to the outside... But you could use the port under Linux.
74
75config ATARI_MIDI
76 tristate "Atari MIDI serial support"
77 depends on ATARI
78 help
79 If you want to use your Atari's MIDI port in Linux, say Y.
80
81 To compile this driver as a module, choose M here.
82
83config ATARI_DSP56K 62config ATARI_DSP56K
84 tristate "Atari DSP56k support (EXPERIMENTAL)" 63 tristate "Atari DSP56k support (EXPERIMENTAL)"
85 depends on ATARI && EXPERIMENTAL 64 depends on ATARI && EXPERIMENTAL
@@ -99,15 +78,6 @@ config AMIGA_BUILTIN_SERIAL
99 78
100 To compile this driver as a module, choose M here. 79 To compile this driver as a module, choose M here.
101 80
102config MULTIFACE_III_TTY
103 tristate "Multiface Card III serial support"
104 depends on AMIGA
105 help
106 If you want to use a Multiface III card's serial port in Linux,
107 answer Y.
108
109 To compile this driver as a module, choose M here.
110
111config HPDCA 81config HPDCA
112 tristate "HP DCA serial support" 82 tristate "HP DCA serial support"
113 depends on DIO && SERIAL_8250 83 depends on DIO && SERIAL_8250
@@ -122,13 +92,9 @@ config HPAPCI
122 If you want to use the internal "APCI" serial ports on an HP400 92 If you want to use the internal "APCI" serial ports on an HP400
123 machine, say Y here. 93 machine, say Y here.
124 94
125config DN_SERIAL
126 bool "Support for DN serial port (dummy)"
127 depends on APOLLO
128
129config SERIAL_CONSOLE 95config SERIAL_CONSOLE
130 bool "Support for serial port console" 96 bool "Support for serial port console"
131 depends on (AMIGA || ATARI || SUN3 || SUN3X || VME || APOLLO) && (ATARI_MFPSER=y || ATARI_MIDI=y || AMIGA_BUILTIN_SERIAL=y || MULTIFACE_III_TTY=y || SERIAL=y || SERIAL167 || DN_SERIAL) 97 depends on AMIGA_BUILTIN_SERIAL=y
132 ---help--- 98 ---help---
133 If you say Y here, it will be possible to use a serial port as the 99 If you say Y here, it will be possible to use a serial port as the
134 system console (the system console is the device which receives all 100 system console (the system console is the device which receives all
@@ -140,10 +106,10 @@ config SERIAL_CONSOLE
140 (/dev/tty0) will still be used as the system console by default, but 106 (/dev/tty0) will still be used as the system console by default, but
141 you can alter that using a kernel command line option such as 107 you can alter that using a kernel command line option such as
142 "console=ttyS1". (Try "man bootparam" or see the documentation of 108 "console=ttyS1". (Try "man bootparam" or see the documentation of
143 your boot loader (lilo or loadlin) about how to pass options to the 109 your boot loader about how to pass options to the kernel at boot
144 kernel at boot time.) 110 time.)
145 111
146 If you don't have a VGA card installed and you say Y here, the 112 If you don't have a graphical console and you say Y here, the
147 kernel will automatically use the first serial line, /dev/ttyS0, as 113 kernel will automatically use the first serial line, /dev/ttyS0, as
148 system console. 114 system console.
149 115
diff --git a/arch/m68k/Kconfig.machine b/arch/m68k/Kconfig.machine
index ef4a26aff780..7cdf6b010381 100644
--- a/arch/m68k/Kconfig.machine
+++ b/arch/m68k/Kconfig.machine
@@ -1,5 +1,7 @@
1comment "Machine Types" 1comment "Machine Types"
2 2
3if M68KCLASSIC
4
3config AMIGA 5config AMIGA
4 bool "Amiga support" 6 bool "Amiga support"
5 depends on MMU 7 depends on MMU
@@ -130,6 +132,8 @@ config SUN3
130 132
131 If you don't want to compile a kernel exclusively for a Sun 3, say N. 133 If you don't want to compile a kernel exclusively for a Sun 3, say N.
132 134
135endif # M68KCLASSIC
136
133config PILOT 137config PILOT
134 bool 138 bool
135 139
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c
index 82a4bb51d5d8..b95a451b1c3a 100644
--- a/arch/m68k/amiga/config.c
+++ b/arch/m68k/amiga/config.c
@@ -511,8 +511,7 @@ static unsigned long amiga_gettimeoffset(void)
511 return ticks + offset; 511 return ticks + offset;
512} 512}
513 513
514static NORET_TYPE void amiga_reset(void) 514static void amiga_reset(void) __noreturn;
515 ATTRIB_NORET;
516 515
517static void amiga_reset(void) 516static void amiga_reset(void)
518{ 517{
diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c
index 6d196dadfdbc..8048e1b7e552 100644
--- a/arch/m68k/atari/ataints.c
+++ b/arch/m68k/atari/ataints.c
@@ -82,8 +82,6 @@ __ALIGN_STR "\n\t"
82 82
83extern void atari_microwire_cmd(int cmd); 83extern void atari_microwire_cmd(int cmd);
84 84
85extern int atari_SCC_reset_done;
86
87static unsigned int atari_irq_startup(struct irq_data *data) 85static unsigned int atari_irq_startup(struct irq_data *data)
88{ 86{
89 unsigned int irq = data->irq; 87 unsigned int irq = data->irq;
diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c
index 4203d101363c..c4ac15c4f065 100644
--- a/arch/m68k/atari/config.c
+++ b/arch/m68k/atari/config.c
@@ -414,9 +414,9 @@ void __init config_atari(void)
414 * FDC val = 4 -> Supervisor only */ 414 * FDC val = 4 -> Supervisor only */
415 asm volatile ("\n" 415 asm volatile ("\n"
416 " .chip 68030\n" 416 " .chip 68030\n"
417 " pmove %0@,%/tt1\n" 417 " pmove %0,%/tt1\n"
418 " .chip 68k" 418 " .chip 68k"
419 : : "a" (&tt1_val)); 419 : : "m" (tt1_val));
420 } else { 420 } else {
421 asm volatile ("\n" 421 asm volatile ("\n"
422 " .chip 68040\n" 422 " .chip 68040\n"
@@ -569,10 +569,10 @@ static void atari_reset(void)
569 : "d0"); 569 : "d0");
570 } else 570 } else
571 asm volatile ("\n" 571 asm volatile ("\n"
572 " pmove %0@,%%tc\n" 572 " pmove %0,%%tc\n"
573 " jmp %1@" 573 " jmp %1@"
574 : /* no outputs */ 574 : /* no outputs */
575 : "a" (&tc_val), "a" (reset_addr)); 575 : "m" (tc_val), "a" (reset_addr));
576} 576}
577 577
578 578
diff --git a/arch/m68k/atari/debug.c b/arch/m68k/atari/debug.c
index 5a484247e493..a547ba9683d1 100644
--- a/arch/m68k/atari/debug.c
+++ b/arch/m68k/atari/debug.c
@@ -202,7 +202,6 @@ static void __init atari_init_mfp_port(int cflag)
202 202
203static void __init atari_init_scc_port(int cflag) 203static void __init atari_init_scc_port(int cflag)
204{ 204{
205 extern int atari_SCC_reset_done;
206 static int clksrc_table[9] = 205 static int clksrc_table[9] =
207 /* reg 11: 0x50 = BRG, 0x00 = RTxC, 0x28 = TRxC */ 206 /* reg 11: 0x50 = BRG, 0x00 = RTxC, 0x28 = TRxC */
208 { 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x00, 0x00 }; 207 { 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x00, 0x00 };
diff --git a/arch/m68k/configs/amiga_defconfig b/arch/m68k/configs/amiga_defconfig
index dbb49fc6463b..e93fdae10b23 100644
--- a/arch/m68k/configs/amiga_defconfig
+++ b/arch/m68k/configs/amiga_defconfig
@@ -255,7 +255,6 @@ CONFIG_HID=m
255CONFIG_HIDRAW=y 255CONFIG_HIDRAW=y
256# CONFIG_USB_SUPPORT is not set 256# CONFIG_USB_SUPPORT is not set
257CONFIG_AMIGA_BUILTIN_SERIAL=y 257CONFIG_AMIGA_BUILTIN_SERIAL=y
258CONFIG_MULTIFACE_III_TTY=m
259CONFIG_SERIAL_CONSOLE=y 258CONFIG_SERIAL_CONSOLE=y
260CONFIG_EXT2_FS=y 259CONFIG_EXT2_FS=y
261CONFIG_EXT3_FS=y 260CONFIG_EXT3_FS=y
diff --git a/arch/m68k/configs/apollo_defconfig b/arch/m68k/configs/apollo_defconfig
index 562b221f6951..66b26c1e848c 100644
--- a/arch/m68k/configs/apollo_defconfig
+++ b/arch/m68k/configs/apollo_defconfig
@@ -223,8 +223,6 @@ CONFIG_LOGO=y
223CONFIG_HID=m 223CONFIG_HID=m
224CONFIG_HIDRAW=y 224CONFIG_HIDRAW=y
225# CONFIG_USB_SUPPORT is not set 225# CONFIG_USB_SUPPORT is not set
226CONFIG_DN_SERIAL=y
227CONFIG_SERIAL_CONSOLE=y
228CONFIG_EXT2_FS=y 226CONFIG_EXT2_FS=y
229CONFIG_EXT3_FS=y 227CONFIG_EXT3_FS=y
230# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 228# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/m68k/configs/atari_defconfig b/arch/m68k/configs/atari_defconfig
index 82978df637fa..151332515980 100644
--- a/arch/m68k/configs/atari_defconfig
+++ b/arch/m68k/configs/atari_defconfig
@@ -235,10 +235,7 @@ CONFIG_DMASOUND_ATARI=m
235CONFIG_HID=m 235CONFIG_HID=m
236CONFIG_HIDRAW=y 236CONFIG_HIDRAW=y
237# CONFIG_USB_SUPPORT is not set 237# CONFIG_USB_SUPPORT is not set
238CONFIG_ATARI_MFPSER=y
239CONFIG_ATARI_MIDI=y
240CONFIG_ATARI_DSP56K=m 238CONFIG_ATARI_DSP56K=m
241CONFIG_SERIAL_CONSOLE=y
242CONFIG_EXT2_FS=y 239CONFIG_EXT2_FS=y
243CONFIG_EXT3_FS=y 240CONFIG_EXT3_FS=y
244# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 241# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/m68k/configs/multi_defconfig b/arch/m68k/configs/multi_defconfig
index ad9e85760e34..55d394edf633 100644
--- a/arch/m68k/configs/multi_defconfig
+++ b/arch/m68k/configs/multi_defconfig
@@ -318,13 +318,8 @@ CONFIG_DMASOUND_Q40=m
318CONFIG_HID=m 318CONFIG_HID=m
319CONFIG_HIDRAW=y 319CONFIG_HIDRAW=y
320# CONFIG_USB_SUPPORT is not set 320# CONFIG_USB_SUPPORT is not set
321CONFIG_ATARI_MFPSER=y
322CONFIG_ATARI_MIDI=y
323CONFIG_ATARI_DSP56K=m 321CONFIG_ATARI_DSP56K=m
324CONFIG_AMIGA_BUILTIN_SERIAL=y 322CONFIG_AMIGA_BUILTIN_SERIAL=y
325CONFIG_MULTIFACE_III_TTY=m
326CONFIG_SERIAL167=y
327CONFIG_DN_SERIAL=y
328CONFIG_SERIAL_CONSOLE=y 323CONFIG_SERIAL_CONSOLE=y
329CONFIG_EXT2_FS=y 324CONFIG_EXT2_FS=y
330CONFIG_EXT3_FS=y 325CONFIG_EXT3_FS=y
diff --git a/arch/m68k/configs/mvme16x_defconfig b/arch/m68k/configs/mvme16x_defconfig
index c45aaf3b816f..cdb70d66e535 100644
--- a/arch/m68k/configs/mvme16x_defconfig
+++ b/arch/m68k/configs/mvme16x_defconfig
@@ -218,8 +218,6 @@ CONFIG_GEN_RTC_X=y
218CONFIG_HID=m 218CONFIG_HID=m
219CONFIG_HIDRAW=y 219CONFIG_HIDRAW=y
220# CONFIG_USB_SUPPORT is not set 220# CONFIG_USB_SUPPORT is not set
221CONFIG_SERIAL167=y
222CONFIG_SERIAL_CONSOLE=y
223CONFIG_EXT2_FS=y 221CONFIG_EXT2_FS=y
224CONFIG_EXT3_FS=y 222CONFIG_EXT3_FS=y
225# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 223# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/m68k/emu/nfeth.c b/arch/m68k/emu/nfeth.c
index c5748bb4ea71..a985a7e87d45 100644
--- a/arch/m68k/emu/nfeth.c
+++ b/arch/m68k/emu/nfeth.c
@@ -39,7 +39,7 @@ enum {
39#define MAX_UNIT 8 39#define MAX_UNIT 8
40 40
41/* These identify the driver base version and may not be removed. */ 41/* These identify the driver base version and may not be removed. */
42static const char version[] __devinitdata = 42static const char version[] __devinitconst =
43 KERN_INFO KBUILD_MODNAME ".c:v" DRV_VERSION " " DRV_RELDATE 43 KERN_INFO KBUILD_MODNAME ".c:v" DRV_VERSION " " DRV_RELDATE
44 " S.Opichal, M.Jurik, P.Stehlik\n" 44 " S.Opichal, M.Jurik, P.Stehlik\n"
45 KERN_INFO " http://aranym.org/\n"; 45 KERN_INFO " http://aranym.org/\n";
diff --git a/arch/m68k/hp300/config.c b/arch/m68k/hp300/config.c
index 1c05a6260546..bf16af1edacf 100644
--- a/arch/m68k/hp300/config.c
+++ b/arch/m68k/hp300/config.c
@@ -24,7 +24,8 @@
24 24
25unsigned long hp300_model; 25unsigned long hp300_model;
26unsigned long hp300_uart_scode = -1; 26unsigned long hp300_uart_scode = -1;
27unsigned char ledstate; 27unsigned char hp300_ledstate;
28EXPORT_SYMBOL(hp300_ledstate);
28 29
29static char s_hp330[] __initdata = "330"; 30static char s_hp330[] __initdata = "330";
30static char s_hp340[] __initdata = "340"; 31static char s_hp340[] __initdata = "340";
diff --git a/arch/m68k/include/asm/anchor.h b/arch/m68k/include/asm/anchor.h
deleted file mode 100644
index 871c0d5cfc3d..000000000000
--- a/arch/m68k/include/asm/anchor.h
+++ /dev/null
@@ -1,112 +0,0 @@
1/****************************************************************************/
2
3/*
4 * anchor.h -- Anchor CO-MEM Lite PCI host bridge part.
5 *
6 * (C) Copyright 2000, Moreton Bay (www.moreton.com.au)
7 */
8
9/****************************************************************************/
10#ifndef anchor_h
11#define anchor_h
12/****************************************************************************/
13
14/*
15 * Define basic addressing info.
16 */
17#if defined(CONFIG_M5407C3)
18#define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */
19#define COMEM_IRQ 25 /* IRQ of anchor part */
20#else
21#define COMEM_BASE 0x80000000 /* Base of CO-MEM address space */
22#define COMEM_IRQ 25 /* IRQ of anchor part */
23#endif
24
25/****************************************************************************/
26
27/*
28 * 4-byte registers of CO-MEM, so adjust register addresses for
29 * easy access. Handy macro for word access too.
30 */
31#define LREG(a) ((a) >> 2)
32#define WREG(a) ((a) >> 1)
33
34
35/*
36 * Define base addresses within CO-MEM Lite register address space.
37 */
38#define COMEM_I2O 0x0000 /* I2O registers */
39#define COMEM_OPREGS 0x0400 /* Operation registers */
40#define COMEM_PCIBUS 0x2000 /* Direct access to PCI bus */
41#define COMEM_SHMEM 0x4000 /* Shared memory region */
42
43#define COMEM_SHMEMSIZE 0x4000 /* Size of shared memory */
44
45
46/*
47 * Define CO-MEM Registers.
48 */
49#define COMEM_I2OHISR 0x0030 /* I2O host interrupt status */
50#define COMEM_I2OHIMR 0x0034 /* I2O host interrupt mask */
51#define COMEM_I2OLISR 0x0038 /* I2O local interrupt status */
52#define COMEM_I2OLIMR 0x003c /* I2O local interrupt mask */
53#define COMEM_IBFPFIFO 0x0040 /* I2O inbound free/post FIFO */
54#define COMEM_OBPFFIFO 0x0044 /* I2O outbound post/free FIFO */
55#define COMEM_IBPFFIFO 0x0048 /* I2O inbound post/free FIFO */
56#define COMEM_OBFPFIFO 0x004c /* I2O outbound free/post FIFO */
57
58#define COMEM_DAHBASE 0x0460 /* Direct access base address */
59
60#define COMEM_NVCMD 0x04a0 /* I2C serial command */
61#define COMEM_NVREAD 0x04a4 /* I2C serial read */
62#define COMEM_NVSTAT 0x04a8 /* I2C status */
63
64#define COMEM_DMALBASE 0x04b0 /* DMA local base address */
65#define COMEM_DMAHBASE 0x04b4 /* DMA host base address */
66#define COMEM_DMASIZE 0x04b8 /* DMA size */
67#define COMEM_DMACTL 0x04bc /* DMA control */
68
69#define COMEM_HCTL 0x04e0 /* Host control */
70#define COMEM_HINT 0x04e4 /* Host interrupt control/status */
71#define COMEM_HLDATA 0x04e8 /* Host to local data mailbox */
72#define COMEM_LINT 0x04f4 /* Local interrupt contole status */
73#define COMEM_LHDATA 0x04f8 /* Local to host data mailbox */
74
75#define COMEM_LBUSCFG 0x04fc /* Local bus configuration */
76
77
78/*
79 * Commands and flags for use with Direct Access Register.
80 */
81#define COMEM_DA_IACK 0x00000000 /* Interrupt acknowledge (read) */
82#define COMEM_DA_SPCL 0x00000010 /* Special cycle (write) */
83#define COMEM_DA_MEMRD 0x00000004 /* Memory read cycle */
84#define COMEM_DA_MEMWR 0x00000004 /* Memory write cycle */
85#define COMEM_DA_IORD 0x00000002 /* I/O read cycle */
86#define COMEM_DA_IOWR 0x00000002 /* I/O write cycle */
87#define COMEM_DA_CFGRD 0x00000006 /* Configuration read cycle */
88#define COMEM_DA_CFGWR 0x00000006 /* Configuration write cycle */
89
90#define COMEM_DA_ADDR(a) ((a) & 0xffffe000)
91
92#define COMEM_DA_OFFSET(a) ((a) & 0x00001fff)
93
94
95/*
96 * The PCI bus will be limited in what slots will actually be used.
97 * Define valid device numbers for different boards.
98 */
99#if defined(CONFIG_M5407C3)
100#define COMEM_MINDEV 14 /* Minimum valid DEVICE */
101#define COMEM_MAXDEV 14 /* Maximum valid DEVICE */
102#define COMEM_BRIDGEDEV 15 /* Slot bridge is in */
103#else
104#define COMEM_MINDEV 0 /* Minimum valid DEVICE */
105#define COMEM_MAXDEV 3 /* Maximum valid DEVICE */
106#endif
107
108#define COMEM_MAXPCI (COMEM_MAXDEV+1) /* Maximum PCI devices */
109
110
111/****************************************************************************/
112#endif /* anchor_h */
diff --git a/arch/m68k/include/asm/atarihw.h b/arch/m68k/include/asm/atarihw.h
index 0392b28656ab..c0cb36350775 100644
--- a/arch/m68k/include/asm/atarihw.h
+++ b/arch/m68k/include/asm/atarihw.h
@@ -30,6 +30,8 @@ extern u_long atari_switches;
30extern int atari_rtc_year_offset; 30extern int atari_rtc_year_offset;
31extern int atari_dont_touch_floppy_select; 31extern int atari_dont_touch_floppy_select;
32 32
33extern int atari_SCC_reset_done;
34
33/* convenience macros for testing machine type */ 35/* convenience macros for testing machine type */
34#define MACH_IS_ST ((atari_mch_cookie >> 16) == ATARI_MCH_ST) 36#define MACH_IS_ST ((atari_mch_cookie >> 16) == ATARI_MCH_ST)
35#define MACH_IS_STE ((atari_mch_cookie >> 16) == ATARI_MCH_STE && \ 37#define MACH_IS_STE ((atari_mch_cookie >> 16) == ATARI_MCH_STE && \
diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h
index 65c6be6c8180..4eba796c00d4 100644
--- a/arch/m68k/include/asm/atomic.h
+++ b/arch/m68k/include/asm/atomic.h
@@ -55,6 +55,16 @@ static inline int atomic_dec_and_test(atomic_t *v)
55 return c != 0; 55 return c != 0;
56} 56}
57 57
58static inline int atomic_dec_and_test_lt(atomic_t *v)
59{
60 char c;
61 __asm__ __volatile__(
62 "subql #1,%1; slt %0"
63 : "=d" (c), "=m" (*v)
64 : "m" (*v));
65 return c != 0;
66}
67
58static inline int atomic_inc_and_test(atomic_t *v) 68static inline int atomic_inc_and_test(atomic_t *v)
59{ 69{
60 char c; 70 char c;
diff --git a/arch/m68k/include/asm/blinken.h b/arch/m68k/include/asm/blinken.h
index 1a749cf7b06d..0626582a7db4 100644
--- a/arch/m68k/include/asm/blinken.h
+++ b/arch/m68k/include/asm/blinken.h
@@ -17,15 +17,15 @@
17 17
18#define HP300_LEDS 0xf001ffff 18#define HP300_LEDS 0xf001ffff
19 19
20extern unsigned char ledstate; 20extern unsigned char hp300_ledstate;
21 21
22static __inline__ void blinken_leds(int on, int off) 22static __inline__ void blinken_leds(int on, int off)
23{ 23{
24 if (MACH_IS_HP300) 24 if (MACH_IS_HP300)
25 { 25 {
26 ledstate |= on; 26 hp300_ledstate |= on;
27 ledstate &= ~off; 27 hp300_ledstate &= ~off;
28 out_8(HP300_LEDS, ~ledstate); 28 out_8(HP300_LEDS, ~hp300_ledstate);
29 } 29 }
30} 30}
31 31
diff --git a/arch/m68k/include/asm/cacheflush_mm.h b/arch/m68k/include/asm/cacheflush_mm.h
index 73de7c89d8e0..8104bd874649 100644
--- a/arch/m68k/include/asm/cacheflush_mm.h
+++ b/arch/m68k/include/asm/cacheflush_mm.h
@@ -2,23 +2,89 @@
2#define _M68K_CACHEFLUSH_H 2#define _M68K_CACHEFLUSH_H
3 3
4#include <linux/mm.h> 4#include <linux/mm.h>
5#ifdef CONFIG_COLDFIRE
6#include <asm/mcfsim.h>
7#endif
5 8
6/* cache code */ 9/* cache code */
7#define FLUSH_I_AND_D (0x00000808) 10#define FLUSH_I_AND_D (0x00000808)
8#define FLUSH_I (0x00000008) 11#define FLUSH_I (0x00000008)
9 12
13#ifndef ICACHE_MAX_ADDR
14#define ICACHE_MAX_ADDR 0
15#define ICACHE_SET_MASK 0
16#define DCACHE_MAX_ADDR 0
17#define DCACHE_SETMASK 0
18#endif
19
20static inline void flush_cf_icache(unsigned long start, unsigned long end)
21{
22 unsigned long set;
23
24 for (set = start; set <= end; set += (0x10 - 3)) {
25 __asm__ __volatile__ (
26 "cpushl %%ic,(%0)\n\t"
27 "addq%.l #1,%0\n\t"
28 "cpushl %%ic,(%0)\n\t"
29 "addq%.l #1,%0\n\t"
30 "cpushl %%ic,(%0)\n\t"
31 "addq%.l #1,%0\n\t"
32 "cpushl %%ic,(%0)"
33 : "=a" (set)
34 : "a" (set));
35 }
36}
37
38static inline void flush_cf_dcache(unsigned long start, unsigned long end)
39{
40 unsigned long set;
41
42 for (set = start; set <= end; set += (0x10 - 3)) {
43 __asm__ __volatile__ (
44 "cpushl %%dc,(%0)\n\t"
45 "addq%.l #1,%0\n\t"
46 "cpushl %%dc,(%0)\n\t"
47 "addq%.l #1,%0\n\t"
48 "cpushl %%dc,(%0)\n\t"
49 "addq%.l #1,%0\n\t"
50 "cpushl %%dc,(%0)"
51 : "=a" (set)
52 : "a" (set));
53 }
54}
55
56static inline void flush_cf_bcache(unsigned long start, unsigned long end)
57{
58 unsigned long set;
59
60 for (set = start; set <= end; set += (0x10 - 3)) {
61 __asm__ __volatile__ (
62 "cpushl %%bc,(%0)\n\t"
63 "addq%.l #1,%0\n\t"
64 "cpushl %%bc,(%0)\n\t"
65 "addq%.l #1,%0\n\t"
66 "cpushl %%bc,(%0)\n\t"
67 "addq%.l #1,%0\n\t"
68 "cpushl %%bc,(%0)"
69 : "=a" (set)
70 : "a" (set));
71 }
72}
73
10/* 74/*
11 * Cache handling functions 75 * Cache handling functions
12 */ 76 */
13 77
14static inline void flush_icache(void) 78static inline void flush_icache(void)
15{ 79{
16 if (CPU_IS_040_OR_060) 80 if (CPU_IS_COLDFIRE) {
81 flush_cf_icache(0, ICACHE_MAX_ADDR);
82 } else if (CPU_IS_040_OR_060) {
17 asm volatile ( "nop\n" 83 asm volatile ( "nop\n"
18 " .chip 68040\n" 84 " .chip 68040\n"
19 " cpusha %bc\n" 85 " cpusha %bc\n"
20 " .chip 68k"); 86 " .chip 68k");
21 else { 87 } else {
22 unsigned long tmp; 88 unsigned long tmp;
23 asm volatile ( "movec %%cacr,%0\n" 89 asm volatile ( "movec %%cacr,%0\n"
24 " or.w %1,%0\n" 90 " or.w %1,%0\n"
@@ -51,12 +117,14 @@ extern void cache_push_v(unsigned long vaddr, int len);
51 process changes. */ 117 process changes. */
52#define __flush_cache_all() \ 118#define __flush_cache_all() \
53({ \ 119({ \
54 if (CPU_IS_040_OR_060) \ 120 if (CPU_IS_COLDFIRE) { \
121 flush_cf_dcache(0, DCACHE_MAX_ADDR); \
122 } else if (CPU_IS_040_OR_060) { \
55 __asm__ __volatile__("nop\n\t" \ 123 __asm__ __volatile__("nop\n\t" \
56 ".chip 68040\n\t" \ 124 ".chip 68040\n\t" \
57 "cpusha %dc\n\t" \ 125 "cpusha %dc\n\t" \
58 ".chip 68k"); \ 126 ".chip 68k"); \
59 else { \ 127 } else { \
60 unsigned long _tmp; \ 128 unsigned long _tmp; \
61 __asm__ __volatile__("movec %%cacr,%0\n\t" \ 129 __asm__ __volatile__("movec %%cacr,%0\n\t" \
62 "orw %1,%0\n\t" \ 130 "orw %1,%0\n\t" \
@@ -112,7 +180,17 @@ static inline void flush_cache_page(struct vm_area_struct *vma, unsigned long vm
112/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */ 180/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
113static inline void __flush_page_to_ram(void *vaddr) 181static inline void __flush_page_to_ram(void *vaddr)
114{ 182{
115 if (CPU_IS_040_OR_060) { 183 if (CPU_IS_COLDFIRE) {
184 unsigned long addr, start, end;
185 addr = ((unsigned long) vaddr) & ~(PAGE_SIZE - 1);
186 start = addr & ICACHE_SET_MASK;
187 end = (addr + PAGE_SIZE - 1) & ICACHE_SET_MASK;
188 if (start > end) {
189 flush_cf_bcache(0, end);
190 end = ICACHE_MAX_ADDR;
191 }
192 flush_cf_bcache(start, end);
193 } else if (CPU_IS_040_OR_060) {
116 __asm__ __volatile__("nop\n\t" 194 __asm__ __volatile__("nop\n\t"
117 ".chip 68040\n\t" 195 ".chip 68040\n\t"
118 "cpushp %%bc,(%0)\n\t" 196 "cpushp %%bc,(%0)\n\t"
diff --git a/arch/m68k/include/asm/checksum.h b/arch/m68k/include/asm/checksum.h
index ec514485c8b6..2f88d867c711 100644
--- a/arch/m68k/include/asm/checksum.h
+++ b/arch/m68k/include/asm/checksum.h
@@ -3,6 +3,10 @@
3 3
4#include <linux/in6.h> 4#include <linux/in6.h>
5 5
6#ifdef CONFIG_GENERIC_CSUM
7#include <asm-generic/checksum.h>
8#else
9
6/* 10/*
7 * computes the checksum of a memory block at buff, length len, 11 * computes the checksum of a memory block at buff, length len,
8 * and adds in "sum" (32-bit) 12 * and adds in "sum" (32-bit)
@@ -34,30 +38,6 @@ extern __wsum csum_partial_copy_nocheck(const void *src,
34 void *dst, int len, 38 void *dst, int len,
35 __wsum sum); 39 __wsum sum);
36 40
37
38#ifdef CONFIG_COLDFIRE
39
40/*
41 * The ColdFire cores don't support all the 68k instructions used
42 * in the optimized checksum code below. So it reverts back to using
43 * more standard C coded checksums. The fast checksum code is
44 * significantly larger than the optimized version, so it is not
45 * inlined here.
46 */
47__sum16 ip_fast_csum(const void *iph, unsigned int ihl);
48
49static inline __sum16 csum_fold(__wsum sum)
50{
51 unsigned int tmp = (__force u32)sum;
52
53 tmp = (tmp & 0xffff) + (tmp >> 16);
54 tmp = (tmp & 0xffff) + (tmp >> 16);
55
56 return (__force __sum16)~tmp;
57}
58
59#else
60
61/* 41/*
62 * This is a version of ip_fast_csum() optimized for IP headers, 42 * This is a version of ip_fast_csum() optimized for IP headers,
63 * which always checksum on 4 octet boundaries. 43 * which always checksum on 4 octet boundaries.
@@ -97,8 +77,6 @@ static inline __sum16 csum_fold(__wsum sum)
97 return (__force __sum16)~sum; 77 return (__force __sum16)~sum;
98} 78}
99 79
100#endif /* CONFIG_COLDFIRE */
101
102static inline __wsum 80static inline __wsum
103csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, 81csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
104 unsigned short proto, __wsum sum) 82 unsigned short proto, __wsum sum)
@@ -167,4 +145,5 @@ csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr,
167 return csum_fold(sum); 145 return csum_fold(sum);
168} 146}
169 147
148#endif /* CONFIG_GENERIC_CSUM */
170#endif /* _M68K_CHECKSUM_H */ 149#endif /* _M68K_CHECKSUM_H */
diff --git a/arch/m68k/include/asm/div64.h b/arch/m68k/include/asm/div64.h
index edb66148a71d..444ea8a09e9f 100644
--- a/arch/m68k/include/asm/div64.h
+++ b/arch/m68k/include/asm/div64.h
@@ -1,7 +1,9 @@
1#ifndef _M68K_DIV64_H 1#ifndef _M68K_DIV64_H
2#define _M68K_DIV64_H 2#define _M68K_DIV64_H
3 3
4#ifdef CONFIG_MMU 4#ifdef CONFIG_CPU_HAS_NO_MULDIV64
5#include <asm-generic/div64.h>
6#else
5 7
6#include <linux/types.h> 8#include <linux/types.h>
7 9
@@ -27,8 +29,6 @@
27 __rem; \ 29 __rem; \
28}) 30})
29 31
30#else 32#endif /* CONFIG_CPU_HAS_NO_MULDIV64 */
31#include <asm-generic/div64.h>
32#endif /* CONFIG_MMU */
33 33
34#endif /* _M68K_DIV64_H */ 34#endif /* _M68K_DIV64_H */
diff --git a/arch/m68k/include/asm/elf.h b/arch/m68k/include/asm/elf.h
index 01c193d91412..e9b7cda59744 100644
--- a/arch/m68k/include/asm/elf.h
+++ b/arch/m68k/include/asm/elf.h
@@ -59,10 +59,10 @@ typedef struct user_m68kfp_struct elf_fpregset_t;
59 is actually used on ASV. */ 59 is actually used on ASV. */
60#define ELF_PLAT_INIT(_r, load_addr) _r->a1 = 0 60#define ELF_PLAT_INIT(_r, load_addr) _r->a1 = 0
61 61
62#ifndef CONFIG_SUN3 62#if defined(CONFIG_SUN3) || defined(CONFIG_COLDFIRE)
63#define ELF_EXEC_PAGESIZE 4096
64#else
65#define ELF_EXEC_PAGESIZE 8192 63#define ELF_EXEC_PAGESIZE 8192
64#else
65#define ELF_EXEC_PAGESIZE 4096
66#endif 66#endif
67 67
68/* This is the location that an ET_DYN program is loaded if exec'ed. Typical 68/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
diff --git a/arch/m68k/include/asm/entry.h b/arch/m68k/include/asm/entry.h
index c3c5a8643e15..622138dc7288 100644
--- a/arch/m68k/include/asm/entry.h
+++ b/arch/m68k/include/asm/entry.h
@@ -222,16 +222,24 @@
222 * Non-MMU systems do not reserve %a2 in this way, and this definition is 222 * Non-MMU systems do not reserve %a2 in this way, and this definition is
223 * not used for them. 223 * not used for them.
224 */ 224 */
225#ifdef CONFIG_MMU
226
225#define curptr a2 227#define curptr a2
226 228
227#define GET_CURRENT(tmp) get_current tmp 229#define GET_CURRENT(tmp) get_current tmp
228.macro get_current reg=%d0 230.macro get_current reg=%d0
229 movel %sp,\reg 231 movel %sp,\reg
230 andw #-THREAD_SIZE,\reg 232 andl #-THREAD_SIZE,\reg
231 movel \reg,%curptr 233 movel \reg,%curptr
232 movel %curptr@,%curptr 234 movel %curptr@,%curptr
233.endm 235.endm
234 236
237#else
238
239#define GET_CURRENT(tmp)
240
241#endif /* CONFIG_MMU */
242
235#else /* C source */ 243#else /* C source */
236 244
237#define STR(X) STR1(X) 245#define STR(X) STR1(X)
diff --git a/arch/m68k/include/asm/fpu.h b/arch/m68k/include/asm/fpu.h
index ffb6b8cfc6d5..526db9da9e43 100644
--- a/arch/m68k/include/asm/fpu.h
+++ b/arch/m68k/include/asm/fpu.h
@@ -12,6 +12,8 @@
12#define FPSTATESIZE (96) 12#define FPSTATESIZE (96)
13#elif defined(CONFIG_M68KFPU_EMU) 13#elif defined(CONFIG_M68KFPU_EMU)
14#define FPSTATESIZE (28) 14#define FPSTATESIZE (28)
15#elif defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
16#define FPSTATESIZE (16)
15#elif defined(CONFIG_M68060) 17#elif defined(CONFIG_M68060)
16#define FPSTATESIZE (12) 18#define FPSTATESIZE (12)
17#else 19#else
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h
index b2046839f4b2..00d0071de4c3 100644
--- a/arch/m68k/include/asm/gpio.h
+++ b/arch/m68k/include/asm/gpio.h
@@ -225,7 +225,8 @@ static inline void gpio_set_value(unsigned gpio, int value)
225 225
226static inline int gpio_to_irq(unsigned gpio) 226static inline int gpio_to_irq(unsigned gpio)
227{ 227{
228 return (gpio < MCFGPIO_IRQ_MAX) ? gpio + MCFGPIO_IRQ_VECBASE : -EINVAL; 228 return (gpio < MCFGPIO_IRQ_MAX) ? gpio + MCFGPIO_IRQ_VECBASE
229 : __gpio_to_irq(gpio);
229} 230}
230 231
231static inline int irq_to_gpio(unsigned irq) 232static inline int irq_to_gpio(unsigned irq)
diff --git a/arch/m68k/include/asm/ipcbuf.h b/arch/m68k/include/asm/ipcbuf.h
index a623ea3f0955..84c7e51cb6d0 100644
--- a/arch/m68k/include/asm/ipcbuf.h
+++ b/arch/m68k/include/asm/ipcbuf.h
@@ -1,29 +1 @@
1#ifndef __m68k_IPCBUF_H__ #include <asm-generic/ipcbuf.h>
2#define __m68k_IPCBUF_H__
3
4/*
5 * The user_ipc_perm structure for m68k architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* __m68k_IPCBUF_H__ */
diff --git a/arch/m68k/include/asm/irq.h b/arch/m68k/include/asm/irq.h
index 6198df5ff245..c1155f0e22cc 100644
--- a/arch/m68k/include/asm/irq.h
+++ b/arch/m68k/include/asm/irq.h
@@ -25,7 +25,8 @@
25#define NR_IRQS 0 25#define NR_IRQS 0
26#endif 26#endif
27 27
28#ifdef CONFIG_MMU 28#if defined(CONFIG_M68020) || defined(CONFIG_M68030) || \
29 defined(CONFIG_M68040) || defined(CONFIG_M68060)
29 30
30/* 31/*
31 * Interrupt source definitions 32 * Interrupt source definitions
@@ -49,19 +50,6 @@
49 50
50#define IRQ_USER 8 51#define IRQ_USER 8
51 52
52/*
53 * various flags for request_irq() - the Amiga now uses the standard
54 * mechanism like all other architectures - IRQF_DISABLED and
55 * IRQF_SHARED are your friends.
56 */
57#ifndef MACH_AMIGA_ONLY
58#define IRQ_FLG_LOCK (0x0001) /* handler is not replaceable */
59#define IRQ_FLG_REPLACE (0x0002) /* replace existing handler */
60#define IRQ_FLG_FAST (0x0004)
61#define IRQ_FLG_SLOW (0x0008)
62#define IRQ_FLG_STD (0x8000) /* internally used */
63#endif
64
65struct irq_data; 53struct irq_data;
66struct irq_chip; 54struct irq_chip;
67struct irq_desc; 55struct irq_desc;
@@ -80,7 +68,7 @@ extern unsigned int irq_canonicalize(unsigned int irq);
80 68
81#else 69#else
82#define irq_canonicalize(irq) (irq) 70#define irq_canonicalize(irq) (irq)
83#endif /* CONFIG_MMU */ 71#endif /* !(CONFIG_M68020 || CONFIG_M68030 || CONFIG_M68040 || CONFIG_M68060) */
84 72
85asmlinkage void do_IRQ(int irq, struct pt_regs *regs); 73asmlinkage void do_IRQ(int irq, struct pt_regs *regs);
86extern atomic_t irq_err_count; 74extern atomic_t irq_err_count;
diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h
index 16a1835f9b2a..47906aafbf67 100644
--- a/arch/m68k/include/asm/m54xxacr.h
+++ b/arch/m68k/include/asm/m54xxacr.h
@@ -39,8 +39,12 @@
39#define ACR_CM_OFF_PRE 0x00000040 /* No cache, precise */ 39#define ACR_CM_OFF_PRE 0x00000040 /* No cache, precise */
40#define ACR_CM_OFF_IMP 0x00000060 /* No cache, imprecise */ 40#define ACR_CM_OFF_IMP 0x00000060 /* No cache, imprecise */
41#define ACR_CM 0x00000060 /* Cache mode mask */ 41#define ACR_CM 0x00000060 /* Cache mode mask */
42#define ACR_SP 0x00000008 /* Supervisor protect */
42#define ACR_WPROTECT 0x00000004 /* Write protect */ 43#define ACR_WPROTECT 0x00000004 /* Write protect */
43 44
45#define ACR_BA(x) ((x) & 0xff000000)
46#define ACR_ADMSK(x) ((((x) - 1) & 0xff000000) >> 8)
47
44#if defined(CONFIG_M5407) 48#if defined(CONFIG_M5407)
45 49
46#define ICACHE_SIZE 0x4000 /* instruction - 16k */ 50#define ICACHE_SIZE 0x4000 /* instruction - 16k */
@@ -56,6 +60,11 @@
56#define CACHE_LINE_SIZE 0x0010 /* 16 bytes */ 60#define CACHE_LINE_SIZE 0x0010 /* 16 bytes */
57#define CACHE_WAYS 4 /* 4 ways */ 61#define CACHE_WAYS 4 /* 4 ways */
58 62
63#define ICACHE_SET_MASK ((ICACHE_SIZE / 64 - 1) << CACHE_WAYS)
64#define DCACHE_SET_MASK ((DCACHE_SIZE / 64 - 1) << CACHE_WAYS)
65#define ICACHE_MAX_ADDR ICACHE_SET_MASK
66#define DCACHE_MAX_ADDR DCACHE_SET_MASK
67
59/* 68/*
60 * Version 4 cores have a true harvard style separate instruction 69 * Version 4 cores have a true harvard style separate instruction
61 * and data cache. Enable data and instruction caches, also enable write 70 * and data cache. Enable data and instruction caches, also enable write
@@ -73,6 +82,27 @@
73#else 82#else
74#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP) 83#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP)
75#endif 84#endif
85#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
86
87#if defined(CONFIG_MMU)
88/*
89 * If running with the MMU enabled then we need to map the internal
90 * register region as non-cacheable. And then we map all our RAM as
91 * cacheable and supervisor access only.
92 */
93#define ACR0_MODE (ACR_BA(CONFIG_MBAR)+ACR_ADMSK(0x1000000)+ \
94 ACR_ENABLE+ACR_SUPER+ACR_CM_OFF_PRE+ACR_SP)
95#define ACR1_MODE (ACR_BA(CONFIG_RAMBASE)+ACR_ADMSK(CONFIG_RAMSIZE)+ \
96 ACR_ENABLE+ACR_SUPER+ACR_SP)
97#define ACR2_MODE 0
98#define ACR3_MODE (ACR_BA(CONFIG_RAMBASE)+ACR_ADMSK(CONFIG_RAMSIZE)+ \
99 ACR_ENABLE+ACR_SUPER+ACR_SP)
100
101#else
102
103/*
104 * For the non-MMU enabled case we map all of RAM as cacheable.
105 */
76#if defined(CONFIG_CACHE_COPYBACK) 106#if defined(CONFIG_CACHE_COPYBACK)
77#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP) 107#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP)
78#else 108#else
@@ -80,7 +110,6 @@
80#endif 110#endif
81#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY) 111#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY)
82 112
83#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
84#define CACHE_INVALIDATE (CACHE_MODE+CACR_DCINVA+CACR_BCINVA+CACR_ICINVA) 113#define CACHE_INVALIDATE (CACHE_MODE+CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
85#define CACHE_INVALIDATEI (CACHE_MODE+CACR_BCINVA+CACR_ICINVA) 114#define CACHE_INVALIDATEI (CACHE_MODE+CACR_BCINVA+CACR_ICINVA)
86#define CACHE_INVALIDATED (CACHE_MODE+CACR_DCINVA) 115#define CACHE_INVALIDATED (CACHE_MODE+CACR_DCINVA)
@@ -94,4 +123,5 @@
94#define CACHE_PUSH 123#define CACHE_PUSH
95#endif 124#endif
96 125
126#endif /* CONFIG_MMU */
97#endif /* m54xxacr_h */ 127#endif /* m54xxacr_h */
diff --git a/arch/m68k/include/asm/mac_baboon.h b/arch/m68k/include/asm/mac_baboon.h
index c2a042b8c349..a2d32f6589f9 100644
--- a/arch/m68k/include/asm/mac_baboon.h
+++ b/arch/m68k/include/asm/mac_baboon.h
@@ -29,4 +29,10 @@ struct baboon {
29 */ 29 */
30}; 30};
31 31
32extern int baboon_present;
33
34extern void baboon_register_interrupts(void);
35extern void baboon_irq_enable(int);
36extern void baboon_irq_disable(int);
37
32#endif /* __ASSEMBLY **/ 38#endif /* __ASSEMBLY **/
diff --git a/arch/m68k/include/asm/mac_iop.h b/arch/m68k/include/asm/mac_iop.h
index a2c7e6fcca38..fde874a01e20 100644
--- a/arch/m68k/include/asm/mac_iop.h
+++ b/arch/m68k/include/asm/mac_iop.h
@@ -159,4 +159,6 @@ extern void iop_upload_code(uint, __u8 *, uint, __u16);
159extern void iop_download_code(uint, __u8 *, uint, __u16); 159extern void iop_download_code(uint, __u8 *, uint, __u16);
160extern __u8 *iop_compare_code(uint, __u8 *, uint, __u16); 160extern __u8 *iop_compare_code(uint, __u8 *, uint, __u16);
161 161
162extern void iop_register_interrupts(void);
163
162#endif /* __ASSEMBLY__ */ 164#endif /* __ASSEMBLY__ */
diff --git a/arch/m68k/include/asm/mac_oss.h b/arch/m68k/include/asm/mac_oss.h
index 3cf2b6ed685a..425fbff4f4d8 100644
--- a/arch/m68k/include/asm/mac_oss.h
+++ b/arch/m68k/include/asm/mac_oss.h
@@ -58,25 +58,6 @@
58 58
59#define OSS_POWEROFF 0x80 59#define OSS_POWEROFF 0x80
60 60
61/*
62 * OSS Interrupt levels for various sub-systems
63 *
64 * This mapping is laid out with two things in mind: first, we try to keep
65 * things on their own levels to avoid having to do double-dispatches. Second,
66 * the levels match as closely as possible the alternate IRQ mapping mode (aka
67 * "A/UX mode") available on some VIA machines.
68 */
69
70#define OSS_IRQLEV_DISABLED 0
71#define OSS_IRQLEV_IOPISM 1 /* ADB? */
72#define OSS_IRQLEV_SCSI IRQ_AUTO_2
73#define OSS_IRQLEV_NUBUS IRQ_AUTO_3 /* keep this on its own level */
74#define OSS_IRQLEV_IOPSCC IRQ_AUTO_4 /* matches VIA alternate mapping */
75#define OSS_IRQLEV_SOUND IRQ_AUTO_5 /* matches VIA alternate mapping */
76#define OSS_IRQLEV_60HZ 6 /* matches VIA alternate mapping */
77#define OSS_IRQLEV_VIA1 IRQ_AUTO_6 /* matches VIA alternate mapping */
78#define OSS_IRQLEV_PARITY 7 /* matches VIA alternate mapping */
79
80#ifndef __ASSEMBLY__ 61#ifndef __ASSEMBLY__
81 62
82struct mac_oss { 63struct mac_oss {
@@ -91,4 +72,8 @@ struct mac_oss {
91extern volatile struct mac_oss *oss; 72extern volatile struct mac_oss *oss;
92extern int oss_present; 73extern int oss_present;
93 74
75extern void oss_register_interrupts(void);
76extern void oss_irq_enable(int);
77extern void oss_irq_disable(int);
78
94#endif /* __ASSEMBLY__ */ 79#endif /* __ASSEMBLY__ */
diff --git a/arch/m68k/include/asm/mac_psc.h b/arch/m68k/include/asm/mac_psc.h
index 7808bb0b2323..e5c0d71d1543 100644
--- a/arch/m68k/include/asm/mac_psc.h
+++ b/arch/m68k/include/asm/mac_psc.h
@@ -211,6 +211,10 @@
211extern volatile __u8 *psc; 211extern volatile __u8 *psc;
212extern int psc_present; 212extern int psc_present;
213 213
214extern void psc_register_interrupts(void);
215extern void psc_irq_enable(int);
216extern void psc_irq_disable(int);
217
214/* 218/*
215 * Access functions 219 * Access functions
216 */ 220 */
diff --git a/arch/m68k/include/asm/mac_via.h b/arch/m68k/include/asm/mac_via.h
index a59665e1d41b..aeeedf8b2d25 100644
--- a/arch/m68k/include/asm/mac_via.h
+++ b/arch/m68k/include/asm/mac_via.h
@@ -254,6 +254,15 @@
254extern volatile __u8 *via1,*via2; 254extern volatile __u8 *via1,*via2;
255extern int rbv_present,via_alt_mapping; 255extern int rbv_present,via_alt_mapping;
256 256
257extern void via_register_interrupts(void);
258extern void via_irq_enable(int);
259extern void via_irq_disable(int);
260extern void via_nubus_irq_startup(int irq);
261extern void via_nubus_irq_shutdown(int irq);
262extern void via1_irq(unsigned int irq, struct irq_desc *desc);
263extern void via1_set_head(int);
264extern int via2_scsi_drq_pending(void);
265
257static inline int rbv_set_video_bpp(int bpp) 266static inline int rbv_set_video_bpp(int bpp)
258{ 267{
259 char val = (bpp==1)?0:(bpp==2)?1:(bpp==4)?2:(bpp==8)?3:-1; 268 char val = (bpp==1)?0:(bpp==2)?1:(bpp==4)?2:(bpp==8)?3:-1;
diff --git a/arch/m68k/include/asm/macintosh.h b/arch/m68k/include/asm/macintosh.h
index 12ebe43b008b..682a1a2ff55f 100644
--- a/arch/m68k/include/asm/macintosh.h
+++ b/arch/m68k/include/asm/macintosh.h
@@ -11,17 +11,11 @@
11extern void mac_reset(void); 11extern void mac_reset(void);
12extern void mac_poweroff(void); 12extern void mac_poweroff(void);
13extern void mac_init_IRQ(void); 13extern void mac_init_IRQ(void);
14extern int mac_irq_pending(unsigned int); 14
15extern void mac_irq_enable(struct irq_data *data); 15extern void mac_irq_enable(struct irq_data *data);
16extern void mac_irq_disable(struct irq_data *data); 16extern void mac_irq_disable(struct irq_data *data);
17 17
18/* 18/*
19 * Floppy driver magic hook - probably shouldn't be here
20 */
21
22extern void via1_set_head(int);
23
24/*
25 * Macintosh Table 19 * Macintosh Table
26 */ 20 */
27 21
@@ -48,7 +42,7 @@ struct mac_model
48#define MAC_ADB_IOP 6 42#define MAC_ADB_IOP 6
49 43
50#define MAC_VIA_II 1 44#define MAC_VIA_II 1
51#define MAC_VIA_IIci 2 45#define MAC_VIA_IICI 2
52#define MAC_VIA_QUADRA 3 46#define MAC_VIA_QUADRA 3
53 47
54#define MAC_SCSI_NONE 0 48#define MAC_SCSI_NONE 0
diff --git a/arch/m68k/include/asm/macints.h b/arch/m68k/include/asm/macints.h
index ebe1b70fe90c..92aa8a4c2d03 100644
--- a/arch/m68k/include/asm/macints.h
+++ b/arch/m68k/include/asm/macints.h
@@ -104,6 +104,9 @@
104#define IRQ_PSC4_3 (35) 104#define IRQ_PSC4_3 (35)
105#define IRQ_MAC_MACE_DMA IRQ_PSC4_3 105#define IRQ_MAC_MACE_DMA IRQ_PSC4_3
106 106
107/* OSS Level 4 interrupts */
108#define IRQ_MAC_SCC (33)
109
107/* Level 5 (PSC, AV Macs only) interrupts */ 110/* Level 5 (PSC, AV Macs only) interrupts */
108#define IRQ_PSC5_0 (40) 111#define IRQ_PSC5_0 (40)
109#define IRQ_PSC5_1 (41) 112#define IRQ_PSC5_1 (41)
@@ -131,9 +134,6 @@
131#define IRQ_BABOON_2 (66) 134#define IRQ_BABOON_2 (66)
132#define IRQ_BABOON_3 (67) 135#define IRQ_BABOON_3 (67)
133 136
134/* On non-PSC machines, the serial ports share an IRQ */
135#define IRQ_MAC_SCC IRQ_AUTO_4
136
137#define SLOT2IRQ(x) (x + 47) 137#define SLOT2IRQ(x) (x + 47)
138#define IRQ2SLOT(x) (x - 47) 138#define IRQ2SLOT(x) (x - 47)
139 139
diff --git a/arch/m68k/include/asm/mcf_pgalloc.h b/arch/m68k/include/asm/mcf_pgalloc.h
new file mode 100644
index 000000000000..313f3dd23cdc
--- /dev/null
+++ b/arch/m68k/include/asm/mcf_pgalloc.h
@@ -0,0 +1,102 @@
1#ifndef M68K_MCF_PGALLOC_H
2#define M68K_MCF_PGALLOC_H
3
4#include <asm/tlb.h>
5#include <asm/tlbflush.h>
6
7extern inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
8{
9 free_page((unsigned long) pte);
10}
11
12extern const char bad_pmd_string[];
13
14extern inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
15 unsigned long address)
16{
17 unsigned long page = __get_free_page(GFP_DMA|__GFP_REPEAT);
18
19 if (!page)
20 return NULL;
21
22 memset((void *)page, 0, PAGE_SIZE);
23 return (pte_t *) (page);
24}
25
26extern inline pmd_t *pmd_alloc_kernel(pgd_t *pgd, unsigned long address)
27{
28 return (pmd_t *) pgd;
29}
30
31#define pmd_alloc_one_fast(mm, address) ({ BUG(); ((pmd_t *)1); })
32#define pmd_alloc_one(mm, address) ({ BUG(); ((pmd_t *)2); })
33
34#define pte_alloc_one_fast(mm, addr) pte_alloc_one(mm, addr)
35
36#define pmd_populate(mm, pmd, page) (pmd_val(*pmd) = \
37 (unsigned long)(page_address(page)))
38
39#define pmd_populate_kernel(mm, pmd, pte) (pmd_val(*pmd) = (unsigned long)(pte))
40
41#define pmd_pgtable(pmd) pmd_page(pmd)
42
43static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t page,
44 unsigned long address)
45{
46 __free_page(page);
47}
48
49#define __pmd_free_tlb(tlb, pmd, address) do { } while (0)
50
51static inline struct page *pte_alloc_one(struct mm_struct *mm,
52 unsigned long address)
53{
54 struct page *page = alloc_pages(GFP_DMA|__GFP_REPEAT, 0);
55 pte_t *pte;
56
57 if (!page)
58 return NULL;
59
60 pte = kmap(page);
61 if (pte) {
62 clear_page(pte);
63 __flush_page_to_ram(pte);
64 flush_tlb_kernel_page(pte);
65 nocache_page(pte);
66 }
67 kunmap(page);
68
69 return page;
70}
71
72extern inline void pte_free(struct mm_struct *mm, struct page *page)
73{
74 __free_page(page);
75}
76
77/*
78 * In our implementation, each pgd entry contains 1 pmd that is never allocated
79 * or freed. pgd_present is always 1, so this should never be called. -NL
80 */
81#define pmd_free(mm, pmd) BUG()
82
83static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
84{
85 free_page((unsigned long) pgd);
86}
87
88static inline pgd_t *pgd_alloc(struct mm_struct *mm)
89{
90 pgd_t *new_pgd;
91
92 new_pgd = (pgd_t *)__get_free_page(GFP_DMA | __GFP_NOWARN);
93 if (!new_pgd)
94 return NULL;
95 memcpy(new_pgd, swapper_pg_dir, PAGE_SIZE);
96 memset(new_pgd, 0, PAGE_OFFSET >> PGDIR_SHIFT);
97 return new_pgd;
98}
99
100#define pgd_populate(mm, pmd, pte) BUG()
101
102#endif /* M68K_MCF_PGALLOC_H */
diff --git a/arch/m68k/include/asm/mcf_pgtable.h b/arch/m68k/include/asm/mcf_pgtable.h
new file mode 100644
index 000000000000..3c793682e5d9
--- /dev/null
+++ b/arch/m68k/include/asm/mcf_pgtable.h
@@ -0,0 +1,426 @@
1#ifndef _MCF_PGTABLE_H
2#define _MCF_PGTABLE_H
3
4#include <asm/mcfmmu.h>
5#include <asm/page.h>
6
7/*
8 * MMUDR bits, in proper place. We write these directly into the MMUDR
9 * after masking from the pte.
10 */
11#define CF_PAGE_LOCKED MMUDR_LK /* 0x00000002 */
12#define CF_PAGE_EXEC MMUDR_X /* 0x00000004 */
13#define CF_PAGE_WRITABLE MMUDR_W /* 0x00000008 */
14#define CF_PAGE_READABLE MMUDR_R /* 0x00000010 */
15#define CF_PAGE_SYSTEM MMUDR_SP /* 0x00000020 */
16#define CF_PAGE_COPYBACK MMUDR_CM_CCB /* 0x00000040 */
17#define CF_PAGE_NOCACHE MMUDR_CM_NCP /* 0x00000080 */
18
19#define CF_CACHEMASK (~MMUDR_CM_CCB)
20#define CF_PAGE_MMUDR_MASK 0x000000fe
21
22#define _PAGE_NOCACHE030 CF_PAGE_NOCACHE
23
24/*
25 * MMUTR bits, need shifting down.
26 */
27#define CF_PAGE_MMUTR_MASK 0x00000c00
28#define CF_PAGE_MMUTR_SHIFT 10
29
30#define CF_PAGE_VALID (MMUTR_V << CF_PAGE_MMUTR_SHIFT)
31#define CF_PAGE_SHARED (MMUTR_SG << CF_PAGE_MMUTR_SHIFT)
32
33/*
34 * Fake bits, not implemented in CF, will get masked out before
35 * hitting hardware.
36 */
37#define CF_PAGE_DIRTY 0x00000001
38#define CF_PAGE_FILE 0x00000200
39#define CF_PAGE_ACCESSED 0x00001000
40
41#define _PAGE_CACHE040 0x020 /* 68040 cache mode, cachable, copyback */
42#define _PAGE_NOCACHE_S 0x040 /* 68040 no-cache mode, serialized */
43#define _PAGE_NOCACHE 0x060 /* 68040 cache mode, non-serialized */
44#define _PAGE_CACHE040W 0x000 /* 68040 cache mode, cachable, write-through */
45#define _DESCTYPE_MASK 0x003
46#define _CACHEMASK040 (~0x060)
47#define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */
48
49/*
50 * Externally used page protection values.
51 */
52#define _PAGE_PRESENT (CF_PAGE_VALID)
53#define _PAGE_ACCESSED (CF_PAGE_ACCESSED)
54#define _PAGE_DIRTY (CF_PAGE_DIRTY)
55#define _PAGE_READWRITE (CF_PAGE_READABLE \
56 | CF_PAGE_WRITABLE \
57 | CF_PAGE_SYSTEM \
58 | CF_PAGE_SHARED)
59
60/*
61 * Compound page protection values.
62 */
63#define PAGE_NONE __pgprot(CF_PAGE_VALID \
64 | CF_PAGE_ACCESSED)
65
66#define PAGE_SHARED __pgprot(CF_PAGE_VALID \
67 | CF_PAGE_ACCESSED \
68 | CF_PAGE_SHARED)
69
70#define PAGE_INIT __pgprot(CF_PAGE_VALID \
71 | CF_PAGE_READABLE \
72 | CF_PAGE_WRITABLE \
73 | CF_PAGE_EXEC \
74 | CF_PAGE_SYSTEM)
75
76#define PAGE_KERNEL __pgprot(CF_PAGE_VALID \
77 | CF_PAGE_ACCESSED \
78 | CF_PAGE_READABLE \
79 | CF_PAGE_WRITABLE \
80 | CF_PAGE_EXEC \
81 | CF_PAGE_SYSTEM \
82 | CF_PAGE_SHARED)
83
84#define PAGE_COPY __pgprot(CF_PAGE_VALID \
85 | CF_PAGE_ACCESSED \
86 | CF_PAGE_READABLE \
87 | CF_PAGE_DIRTY)
88
89/*
90 * Page protections for initialising protection_map. See mm/mmap.c
91 * for use. In general, the bit positions are xwr, and P-items are
92 * private, the S-items are shared.
93 */
94#define __P000 PAGE_NONE
95#define __P001 __pgprot(CF_PAGE_VALID \
96 | CF_PAGE_ACCESSED \
97 | CF_PAGE_READABLE)
98#define __P010 __pgprot(CF_PAGE_VALID \
99 | CF_PAGE_ACCESSED \
100 | CF_PAGE_WRITABLE)
101#define __P011 __pgprot(CF_PAGE_VALID \
102 | CF_PAGE_ACCESSED \
103 | CF_PAGE_READABLE \
104 | CF_PAGE_WRITABLE)
105#define __P100 __pgprot(CF_PAGE_VALID \
106 | CF_PAGE_ACCESSED \
107 | CF_PAGE_EXEC)
108#define __P101 __pgprot(CF_PAGE_VALID \
109 | CF_PAGE_ACCESSED \
110 | CF_PAGE_READABLE \
111 | CF_PAGE_EXEC)
112#define __P110 __pgprot(CF_PAGE_VALID \
113 | CF_PAGE_ACCESSED \
114 | CF_PAGE_WRITABLE \
115 | CF_PAGE_EXEC)
116#define __P111 __pgprot(CF_PAGE_VALID \
117 | CF_PAGE_ACCESSED \
118 | CF_PAGE_READABLE \
119 | CF_PAGE_WRITABLE \
120 | CF_PAGE_EXEC)
121
122#define __S000 PAGE_NONE
123#define __S001 __pgprot(CF_PAGE_VALID \
124 | CF_PAGE_ACCESSED \
125 | CF_PAGE_READABLE)
126#define __S010 PAGE_SHARED
127#define __S011 __pgprot(CF_PAGE_VALID \
128 | CF_PAGE_ACCESSED \
129 | CF_PAGE_SHARED \
130 | CF_PAGE_READABLE)
131#define __S100 __pgprot(CF_PAGE_VALID \
132 | CF_PAGE_ACCESSED \
133 | CF_PAGE_EXEC)
134#define __S101 __pgprot(CF_PAGE_VALID \
135 | CF_PAGE_ACCESSED \
136 | CF_PAGE_READABLE \
137 | CF_PAGE_EXEC)
138#define __S110 __pgprot(CF_PAGE_VALID \
139 | CF_PAGE_ACCESSED \
140 | CF_PAGE_SHARED \
141 | CF_PAGE_EXEC)
142#define __S111 __pgprot(CF_PAGE_VALID \
143 | CF_PAGE_ACCESSED \
144 | CF_PAGE_SHARED \
145 | CF_PAGE_READABLE \
146 | CF_PAGE_EXEC)
147
148#define PTE_MASK PAGE_MASK
149#define CF_PAGE_CHG_MASK (PTE_MASK | CF_PAGE_ACCESSED | CF_PAGE_DIRTY)
150
151#ifndef __ASSEMBLY__
152
153/*
154 * Conversion functions: convert a page and protection to a page entry,
155 * and a page entry and page directory to the page they refer to.
156 */
157#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
158
159static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
160{
161 pte_val(pte) = (pte_val(pte) & CF_PAGE_CHG_MASK) | pgprot_val(newprot);
162 return pte;
163}
164
165#define pmd_set(pmdp, ptep) do {} while (0)
166
167static inline void pgd_set(pgd_t *pgdp, pmd_t *pmdp)
168{
169 pgd_val(*pgdp) = virt_to_phys(pmdp);
170}
171
172#define __pte_page(pte) ((unsigned long) (pte_val(pte) & PAGE_MASK))
173#define __pmd_page(pmd) ((unsigned long) (pmd_val(pmd)))
174
175static inline int pte_none(pte_t pte)
176{
177 return !pte_val(pte);
178}
179
180static inline int pte_present(pte_t pte)
181{
182 return pte_val(pte) & CF_PAGE_VALID;
183}
184
185static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
186 pte_t *ptep)
187{
188 pte_val(*ptep) = 0;
189}
190
191#define pte_pagenr(pte) ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT)
192#define pte_page(pte) virt_to_page(__pte_page(pte))
193
194static inline int pmd_none2(pmd_t *pmd) { return !pmd_val(*pmd); }
195#define pmd_none(pmd) pmd_none2(&(pmd))
196static inline int pmd_bad2(pmd_t *pmd) { return 0; }
197#define pmd_bad(pmd) pmd_bad2(&(pmd))
198#define pmd_present(pmd) (!pmd_none2(&(pmd)))
199static inline void pmd_clear(pmd_t *pmdp) { pmd_val(*pmdp) = 0; }
200
201static inline int pgd_none(pgd_t pgd) { return 0; }
202static inline int pgd_bad(pgd_t pgd) { return 0; }
203static inline int pgd_present(pgd_t pgd) { return 1; }
204static inline void pgd_clear(pgd_t *pgdp) {}
205
206#define pte_ERROR(e) \
207 printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
208 __FILE__, __LINE__, pte_val(e))
209#define pmd_ERROR(e) \
210 printk(KERN_ERR "%s:%d: bad pmd %08lx.\n", \
211 __FILE__, __LINE__, pmd_val(e))
212#define pgd_ERROR(e) \
213 printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
214 __FILE__, __LINE__, pgd_val(e))
215
216/*
217 * The following only work if pte_present() is true.
218 * Undefined behaviour if not...
219 * [we have the full set here even if they don't change from m68k]
220 */
221static inline int pte_read(pte_t pte)
222{
223 return pte_val(pte) & CF_PAGE_READABLE;
224}
225
226static inline int pte_write(pte_t pte)
227{
228 return pte_val(pte) & CF_PAGE_WRITABLE;
229}
230
231static inline int pte_exec(pte_t pte)
232{
233 return pte_val(pte) & CF_PAGE_EXEC;
234}
235
236static inline int pte_dirty(pte_t pte)
237{
238 return pte_val(pte) & CF_PAGE_DIRTY;
239}
240
241static inline int pte_young(pte_t pte)
242{
243 return pte_val(pte) & CF_PAGE_ACCESSED;
244}
245
246static inline int pte_file(pte_t pte)
247{
248 return pte_val(pte) & CF_PAGE_FILE;
249}
250
251static inline int pte_special(pte_t pte)
252{
253 return 0;
254}
255
256static inline pte_t pte_wrprotect(pte_t pte)
257{
258 pte_val(pte) &= ~CF_PAGE_WRITABLE;
259 return pte;
260}
261
262static inline pte_t pte_rdprotect(pte_t pte)
263{
264 pte_val(pte) &= ~CF_PAGE_READABLE;
265 return pte;
266}
267
268static inline pte_t pte_exprotect(pte_t pte)
269{
270 pte_val(pte) &= ~CF_PAGE_EXEC;
271 return pte;
272}
273
274static inline pte_t pte_mkclean(pte_t pte)
275{
276 pte_val(pte) &= ~CF_PAGE_DIRTY;
277 return pte;
278}
279
280static inline pte_t pte_mkold(pte_t pte)
281{
282 pte_val(pte) &= ~CF_PAGE_ACCESSED;
283 return pte;
284}
285
286static inline pte_t pte_mkwrite(pte_t pte)
287{
288 pte_val(pte) |= CF_PAGE_WRITABLE;
289 return pte;
290}
291
292static inline pte_t pte_mkread(pte_t pte)
293{
294 pte_val(pte) |= CF_PAGE_READABLE;
295 return pte;
296}
297
298static inline pte_t pte_mkexec(pte_t pte)
299{
300 pte_val(pte) |= CF_PAGE_EXEC;
301 return pte;
302}
303
304static inline pte_t pte_mkdirty(pte_t pte)
305{
306 pte_val(pte) |= CF_PAGE_DIRTY;
307 return pte;
308}
309
310static inline pte_t pte_mkyoung(pte_t pte)
311{
312 pte_val(pte) |= CF_PAGE_ACCESSED;
313 return pte;
314}
315
316static inline pte_t pte_mknocache(pte_t pte)
317{
318 pte_val(pte) |= 0x80 | (pte_val(pte) & ~0x40);
319 return pte;
320}
321
322static inline pte_t pte_mkcache(pte_t pte)
323{
324 pte_val(pte) &= ~CF_PAGE_NOCACHE;
325 return pte;
326}
327
328static inline pte_t pte_mkspecial(pte_t pte)
329{
330 return pte;
331}
332
333#define swapper_pg_dir kernel_pg_dir
334extern pgd_t kernel_pg_dir[PTRS_PER_PGD];
335
336/*
337 * Find an entry in a pagetable directory.
338 */
339#define pgd_index(address) ((address) >> PGDIR_SHIFT)
340#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
341
342/*
343 * Find an entry in a kernel pagetable directory.
344 */
345#define pgd_offset_k(address) pgd_offset(&init_mm, address)
346
347/*
348 * Find an entry in the second-level pagetable.
349 */
350static inline pmd_t *pmd_offset(pgd_t *pgd, unsigned long address)
351{
352 return (pmd_t *) pgd;
353}
354
355/*
356 * Find an entry in the third-level pagetable.
357 */
358#define __pte_offset(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
359#define pte_offset_kernel(dir, address) \
360 ((pte_t *) __pmd_page(*(dir)) + __pte_offset(address))
361
362/*
363 * Disable caching for page at given kernel virtual address.
364 */
365static inline void nocache_page(void *vaddr)
366{
367 pgd_t *dir;
368 pmd_t *pmdp;
369 pte_t *ptep;
370 unsigned long addr = (unsigned long) vaddr;
371
372 dir = pgd_offset_k(addr);
373 pmdp = pmd_offset(dir, addr);
374 ptep = pte_offset_kernel(pmdp, addr);
375 *ptep = pte_mknocache(*ptep);
376}
377
378/*
379 * Enable caching for page at given kernel virtual address.
380 */
381static inline void cache_page(void *vaddr)
382{
383 pgd_t *dir;
384 pmd_t *pmdp;
385 pte_t *ptep;
386 unsigned long addr = (unsigned long) vaddr;
387
388 dir = pgd_offset_k(addr);
389 pmdp = pmd_offset(dir, addr);
390 ptep = pte_offset_kernel(pmdp, addr);
391 *ptep = pte_mkcache(*ptep);
392}
393
394#define PTE_FILE_MAX_BITS 21
395#define PTE_FILE_SHIFT 11
396
397static inline unsigned long pte_to_pgoff(pte_t pte)
398{
399 return pte_val(pte) >> PTE_FILE_SHIFT;
400}
401
402static inline pte_t pgoff_to_pte(unsigned pgoff)
403{
404 return __pte((pgoff << PTE_FILE_SHIFT) + CF_PAGE_FILE);
405}
406
407/*
408 * Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e))
409 */
410#define __swp_type(x) ((x).val & 0xFF)
411#define __swp_offset(x) ((x).val >> PTE_FILE_SHIFT)
412#define __swp_entry(typ, off) ((swp_entry_t) { (typ) | \
413 (off << PTE_FILE_SHIFT) })
414#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
415#define __swp_entry_to_pte(x) (__pte((x).val))
416
417#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
418
419#define pte_offset_map(pmdp, addr) ((pte_t *)__pmd_page(*pmdp) + \
420 __pte_offset(addr))
421#define pte_unmap(pte) ((void) 0)
422#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
423#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
424
425#endif /* !__ASSEMBLY__ */
426#endif /* _MCF_PGTABLE_H */
diff --git a/arch/m68k/include/asm/mcfmmu.h b/arch/m68k/include/asm/mcfmmu.h
new file mode 100644
index 000000000000..26cc3d5a63f8
--- /dev/null
+++ b/arch/m68k/include/asm/mcfmmu.h
@@ -0,0 +1,112 @@
1/*
2 * mcfmmu.h -- definitions for the ColdFire v4e MMU
3 *
4 * (C) Copyright 2011, Greg Ungerer <gerg@uclinux.org>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef MCFMMU_H
12#define MCFMMU_H
13
14/*
15 * The MMU support registers are mapped into the address space using
16 * the processor MMUBASE register. We used a fixed address for mapping,
17 * there doesn't seem any need to make this configurable yet.
18 */
19#define MMUBASE 0xfe000000
20
21/*
22 * The support registers of the MMU. Names are the sames as those
23 * used in the Freescale v4e documentation.
24 */
25#define MMUCR (MMUBASE + 0x00) /* Control register */
26#define MMUOR (MMUBASE + 0x04) /* Operation register */
27#define MMUSR (MMUBASE + 0x08) /* Status register */
28#define MMUAR (MMUBASE + 0x10) /* TLB Address register */
29#define MMUTR (MMUBASE + 0x14) /* TLB Tag register */
30#define MMUDR (MMUBASE + 0x18) /* TLB Data register */
31
32/*
33 * MMU Control register bit flags
34 */
35#define MMUCR_EN 0x00000001 /* Virtual mode enable */
36#define MMUCR_ASM 0x00000002 /* Address space mode */
37
38/*
39 * MMU Operation register.
40 */
41#define MMUOR_UAA 0x00000001 /* Update allocatiom address */
42#define MMUOR_ACC 0x00000002 /* TLB access */
43#define MMUOR_RD 0x00000004 /* TLB access read */
44#define MMUOR_WR 0x00000000 /* TLB access write */
45#define MMUOR_ADR 0x00000008 /* TLB address select */
46#define MMUOR_ITLB 0x00000010 /* ITLB operation */
47#define MMUOR_CAS 0x00000020 /* Clear non-locked ASID TLBs */
48#define MMUOR_CNL 0x00000040 /* Clear non-locked TLBs */
49#define MMUOR_CA 0x00000080 /* Clear all TLBs */
50#define MMUOR_STLB 0x00000100 /* Search TLBs */
51#define MMUOR_AAN 16 /* TLB allocation address */
52#define MMUOR_AAMASK 0xffff0000 /* AA mask */
53
54/*
55 * MMU Status register.
56 */
57#define MMUSR_HIT 0x00000002 /* Search TLB hit */
58#define MMUSR_WF 0x00000008 /* Write access fault */
59#define MMUSR_RF 0x00000010 /* Read access fault */
60#define MMUSR_SPF 0x00000020 /* Supervisor protect fault */
61
62/*
63 * MMU Read/Write Tag register.
64 */
65#define MMUTR_V 0x00000001 /* Valid */
66#define MMUTR_SG 0x00000002 /* Shared global */
67#define MMUTR_IDN 2 /* Address Space ID */
68#define MMUTR_IDMASK 0x000003fc /* ASID mask */
69#define MMUTR_VAN 10 /* Virtual Address */
70#define MMUTR_VAMASK 0xfffffc00 /* VA mask */
71
72/*
73 * MMU Read/Write Data register.
74 */
75#define MMUDR_LK 0x00000002 /* Lock entry */
76#define MMUDR_X 0x00000004 /* Execute access enable */
77#define MMUDR_W 0x00000008 /* Write access enable */
78#define MMUDR_R 0x00000010 /* Read access enable */
79#define MMUDR_SP 0x00000020 /* Supervisor access enable */
80#define MMUDR_CM_CWT 0x00000000 /* Cachable write thru */
81#define MMUDR_CM_CCB 0x00000040 /* Cachable copy back */
82#define MMUDR_CM_NCP 0x00000080 /* Non-cachable precise */
83#define MMUDR_CM_NCI 0x000000c0 /* Non-cachable imprecise */
84#define MMUDR_SZ_1MB 0x00000000 /* 1MB page size */
85#define MMUDR_SZ_4KB 0x00000100 /* 4kB page size */
86#define MMUDR_SZ_8KB 0x00000200 /* 8kB page size */
87#define MMUDR_SZ_1KB 0x00000300 /* 1kB page size */
88#define MMUDR_PAN 10 /* Physical address */
89#define MMUDR_PAMASK 0xfffffc00 /* PA mask */
90
91#ifndef __ASSEMBLY__
92
93/*
94 * Simple access functions for the MMU registers. Nothing fancy
95 * currently required, just simple 32bit access.
96 */
97static inline u32 mmu_read(u32 a)
98{
99 return *((volatile u32 *) a);
100}
101
102static inline void mmu_write(u32 a, u32 v)
103{
104 *((volatile u32 *) a) = v;
105 __asm__ __volatile__ ("nop");
106}
107
108int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word);
109
110#endif
111
112#endif /* MCFMMU_H */
diff --git a/arch/m68k/include/asm/mmu_context.h b/arch/m68k/include/asm/mmu_context.h
index 7d4341e55a99..dc3be991d634 100644
--- a/arch/m68k/include/asm/mmu_context.h
+++ b/arch/m68k/include/asm/mmu_context.h
@@ -8,7 +8,206 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
8} 8}
9 9
10#ifdef CONFIG_MMU 10#ifdef CONFIG_MMU
11#ifndef CONFIG_SUN3 11
12#if defined(CONFIG_COLDFIRE)
13
14#include <asm/atomic.h>
15#include <asm/bitops.h>
16#include <asm/mcfmmu.h>
17#include <asm/mmu.h>
18
19#define NO_CONTEXT 256
20#define LAST_CONTEXT 255
21#define FIRST_CONTEXT 1
22
23extern unsigned long context_map[];
24extern mm_context_t next_mmu_context;
25
26extern atomic_t nr_free_contexts;
27extern struct mm_struct *context_mm[LAST_CONTEXT+1];
28extern void steal_context(void);
29
30static inline void get_mmu_context(struct mm_struct *mm)
31{
32 mm_context_t ctx;
33
34 if (mm->context != NO_CONTEXT)
35 return;
36 while (atomic_dec_and_test_lt(&nr_free_contexts)) {
37 atomic_inc(&nr_free_contexts);
38 steal_context();
39 }
40 ctx = next_mmu_context;
41 while (test_and_set_bit(ctx, context_map)) {
42 ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
43 if (ctx > LAST_CONTEXT)
44 ctx = 0;
45 }
46 next_mmu_context = (ctx + 1) & LAST_CONTEXT;
47 mm->context = ctx;
48 context_mm[ctx] = mm;
49}
50
51/*
52 * Set up the context for a new address space.
53 */
54#define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0)
55
56/*
57 * We're finished using the context for an address space.
58 */
59static inline void destroy_context(struct mm_struct *mm)
60{
61 if (mm->context != NO_CONTEXT) {
62 clear_bit(mm->context, context_map);
63 mm->context = NO_CONTEXT;
64 atomic_inc(&nr_free_contexts);
65 }
66}
67
68static inline void set_context(mm_context_t context, pgd_t *pgd)
69{
70 __asm__ __volatile__ ("movec %0,%%asid" : : "d" (context));
71}
72
73static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
74 struct task_struct *tsk)
75{
76 get_mmu_context(tsk->mm);
77 set_context(tsk->mm->context, next->pgd);
78}
79
80/*
81 * After we have set current->mm to a new value, this activates
82 * the context for the new mm so we see the new mappings.
83 */
84static inline void activate_mm(struct mm_struct *active_mm,
85 struct mm_struct *mm)
86{
87 get_mmu_context(mm);
88 set_context(mm->context, mm->pgd);
89}
90
91#define deactivate_mm(tsk, mm) do { } while (0)
92
93extern void mmu_context_init(void);
94#define prepare_arch_switch(next) load_ksp_mmu(next)
95
96static inline void load_ksp_mmu(struct task_struct *task)
97{
98 unsigned long flags;
99 struct mm_struct *mm;
100 int asid;
101 pgd_t *pgd;
102 pmd_t *pmd;
103 pte_t *pte;
104 unsigned long mmuar;
105
106 local_irq_save(flags);
107 mmuar = task->thread.ksp;
108
109 /* Search for a valid TLB entry, if one is found, don't remap */
110 mmu_write(MMUAR, mmuar);
111 mmu_write(MMUOR, MMUOR_STLB | MMUOR_ADR);
112 if (mmu_read(MMUSR) & MMUSR_HIT)
113 goto end;
114
115 if (mmuar >= PAGE_OFFSET) {
116 mm = &init_mm;
117 } else {
118 pr_info("load_ksp_mmu: non-kernel mm found: 0x%p\n", task->mm);
119 mm = task->mm;
120 }
121
122 if (!mm)
123 goto bug;
124
125 pgd = pgd_offset(mm, mmuar);
126 if (pgd_none(*pgd))
127 goto bug;
128
129 pmd = pmd_offset(pgd, mmuar);
130 if (pmd_none(*pmd))
131 goto bug;
132
133 pte = (mmuar >= PAGE_OFFSET) ? pte_offset_kernel(pmd, mmuar)
134 : pte_offset_map(pmd, mmuar);
135 if (pte_none(*pte) || !pte_present(*pte))
136 goto bug;
137
138 set_pte(pte, pte_mkyoung(*pte));
139 asid = mm->context & 0xff;
140 if (!pte_dirty(*pte) && mmuar <= PAGE_OFFSET)
141 set_pte(pte, pte_wrprotect(*pte));
142
143 mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) |
144 (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
145 >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V);
146
147 mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
148 ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
149
150 mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA);
151
152 goto end;
153
154bug:
155 pr_info("ksp load failed: mm=0x%p ksp=0x08%lx\n", mm, mmuar);
156end:
157 local_irq_restore(flags);
158}
159
160#elif defined(CONFIG_SUN3)
161#include <asm/sun3mmu.h>
162#include <linux/sched.h>
163
164extern unsigned long get_free_context(struct mm_struct *mm);
165extern void clear_context(unsigned long context);
166
167/* set the context for a new task to unmapped */
168static inline int init_new_context(struct task_struct *tsk,
169 struct mm_struct *mm)
170{
171 mm->context = SUN3_INVALID_CONTEXT;
172 return 0;
173}
174
175/* find the context given to this process, and if it hasn't already
176 got one, go get one for it. */
177static inline void get_mmu_context(struct mm_struct *mm)
178{
179 if (mm->context == SUN3_INVALID_CONTEXT)
180 mm->context = get_free_context(mm);
181}
182
183/* flush context if allocated... */
184static inline void destroy_context(struct mm_struct *mm)
185{
186 if (mm->context != SUN3_INVALID_CONTEXT)
187 clear_context(mm->context);
188}
189
190static inline void activate_context(struct mm_struct *mm)
191{
192 get_mmu_context(mm);
193 sun3_put_context(mm->context);
194}
195
196static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
197 struct task_struct *tsk)
198{
199 activate_context(tsk->mm);
200}
201
202#define deactivate_mm(tsk, mm) do { } while (0)
203
204static inline void activate_mm(struct mm_struct *prev_mm,
205 struct mm_struct *next_mm)
206{
207 activate_context(next_mm);
208}
209
210#else
12 211
13#include <asm/setup.h> 212#include <asm/setup.h>
14#include <asm/page.h> 213#include <asm/page.h>
@@ -103,55 +302,8 @@ static inline void activate_mm(struct mm_struct *prev_mm,
103 switch_mm_0460(next_mm); 302 switch_mm_0460(next_mm);
104} 303}
105 304
106#else /* CONFIG_SUN3 */
107#include <asm/sun3mmu.h>
108#include <linux/sched.h>
109
110extern unsigned long get_free_context(struct mm_struct *mm);
111extern void clear_context(unsigned long context);
112
113/* set the context for a new task to unmapped */
114static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
115{
116 mm->context = SUN3_INVALID_CONTEXT;
117 return 0;
118}
119
120/* find the context given to this process, and if it hasn't already
121 got one, go get one for it. */
122static inline void get_mmu_context(struct mm_struct *mm)
123{
124 if(mm->context == SUN3_INVALID_CONTEXT)
125 mm->context = get_free_context(mm);
126}
127
128/* flush context if allocated... */
129static inline void destroy_context(struct mm_struct *mm)
130{
131 if(mm->context != SUN3_INVALID_CONTEXT)
132 clear_context(mm->context);
133}
134
135static inline void activate_context(struct mm_struct *mm)
136{
137 get_mmu_context(mm);
138 sun3_put_context(mm->context);
139}
140
141static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
142{
143 activate_context(tsk->mm);
144}
145
146#define deactivate_mm(tsk,mm) do { } while (0)
147
148static inline void activate_mm(struct mm_struct *prev_mm,
149 struct mm_struct *next_mm)
150{
151 activate_context(next_mm);
152}
153
154#endif 305#endif
306
155#else /* !CONFIG_MMU */ 307#else /* !CONFIG_MMU */
156 308
157static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) 309static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
diff --git a/arch/m68k/include/asm/motorola_pgtable.h b/arch/m68k/include/asm/motorola_pgtable.h
index 45bd3f589bf0..e0fdd4d08075 100644
--- a/arch/m68k/include/asm/motorola_pgtable.h
+++ b/arch/m68k/include/asm/motorola_pgtable.h
@@ -8,6 +8,7 @@
8#define _PAGE_PRESENT 0x001 8#define _PAGE_PRESENT 0x001
9#define _PAGE_SHORT 0x002 9#define _PAGE_SHORT 0x002
10#define _PAGE_RONLY 0x004 10#define _PAGE_RONLY 0x004
11#define _PAGE_READWRITE 0x000
11#define _PAGE_ACCESSED 0x008 12#define _PAGE_ACCESSED 0x008
12#define _PAGE_DIRTY 0x010 13#define _PAGE_DIRTY 0x010
13#define _PAGE_SUPER 0x080 /* 68040 supervisor only */ 14#define _PAGE_SUPER 0x080 /* 68040 supervisor only */
diff --git a/arch/m68k/include/asm/page.h b/arch/m68k/include/asm/page.h
index dfebb7c1e379..98baa82a8615 100644
--- a/arch/m68k/include/asm/page.h
+++ b/arch/m68k/include/asm/page.h
@@ -6,10 +6,10 @@
6#include <asm/page_offset.h> 6#include <asm/page_offset.h>
7 7
8/* PAGE_SHIFT determines the page size */ 8/* PAGE_SHIFT determines the page size */
9#ifndef CONFIG_SUN3 9#if defined(CONFIG_SUN3) || defined(CONFIG_COLDFIRE)
10#define PAGE_SHIFT (12) 10#define PAGE_SHIFT 13
11#else 11#else
12#define PAGE_SHIFT (13) 12#define PAGE_SHIFT 12
13#endif 13#endif
14#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) 14#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
15#define PAGE_MASK (~(PAGE_SIZE-1)) 15#define PAGE_MASK (~(PAGE_SIZE-1))
@@ -36,6 +36,10 @@ typedef struct page *pgtable_t;
36#define __pgd(x) ((pgd_t) { (x) } ) 36#define __pgd(x) ((pgd_t) { (x) } )
37#define __pgprot(x) ((pgprot_t) { (x) } ) 37#define __pgprot(x) ((pgprot_t) { (x) } )
38 38
39extern unsigned long _rambase;
40extern unsigned long _ramstart;
41extern unsigned long _ramend;
42
39#endif /* !__ASSEMBLY__ */ 43#endif /* !__ASSEMBLY__ */
40 44
41#ifdef CONFIG_MMU 45#ifdef CONFIG_MMU
diff --git a/arch/m68k/include/asm/page_no.h b/arch/m68k/include/asm/page_no.h
index a8d1c60eb9ce..90595721185f 100644
--- a/arch/m68k/include/asm/page_no.h
+++ b/arch/m68k/include/asm/page_no.h
@@ -5,9 +5,6 @@
5 5
6extern unsigned long memory_start; 6extern unsigned long memory_start;
7extern unsigned long memory_end; 7extern unsigned long memory_end;
8extern unsigned long _rambase;
9extern unsigned long _ramstart;
10extern unsigned long _ramend;
11 8
12#define get_user_page(vaddr) __get_free_page(GFP_KERNEL) 9#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
13#define free_user_page(page, addr) free_page(addr) 10#define free_user_page(page, addr) free_page(addr)
diff --git a/arch/m68k/include/asm/page_offset.h b/arch/m68k/include/asm/page_offset.h
index 1780152d81da..82626a8f1d0a 100644
--- a/arch/m68k/include/asm/page_offset.h
+++ b/arch/m68k/include/asm/page_offset.h
@@ -1,11 +1,9 @@
1/* This handles the memory map.. */ 1/* This handles the memory map.. */
2 2
3#ifdef CONFIG_MMU 3#if defined(CONFIG_RAMBASE)
4#ifndef CONFIG_SUN3 4#define PAGE_OFFSET_RAW CONFIG_RAMBASE
5#define PAGE_OFFSET_RAW 0x00000000 5#elif defined(CONFIG_SUN3)
6#else
7#define PAGE_OFFSET_RAW 0x0E000000 6#define PAGE_OFFSET_RAW 0x0E000000
8#endif
9#else 7#else
10#define PAGE_OFFSET_RAW CONFIG_RAMBASE 8#define PAGE_OFFSET_RAW 0x00000000
11#endif 9#endif
diff --git a/arch/m68k/include/asm/pgalloc.h b/arch/m68k/include/asm/pgalloc.h
index c294aad8a900..37bee7e3223d 100644
--- a/arch/m68k/include/asm/pgalloc.h
+++ b/arch/m68k/include/asm/pgalloc.h
@@ -7,7 +7,9 @@
7 7
8#ifdef CONFIG_MMU 8#ifdef CONFIG_MMU
9#include <asm/virtconvert.h> 9#include <asm/virtconvert.h>
10#ifdef CONFIG_SUN3 10#if defined(CONFIG_COLDFIRE)
11#include <asm/mcf_pgalloc.h>
12#elif defined(CONFIG_SUN3)
11#include <asm/sun3_pgalloc.h> 13#include <asm/sun3_pgalloc.h>
12#else 14#else
13#include <asm/motorola_pgalloc.h> 15#include <asm/motorola_pgalloc.h>
diff --git a/arch/m68k/include/asm/pgtable_mm.h b/arch/m68k/include/asm/pgtable_mm.h
index 87174c904d2b..dc35e0e106e4 100644
--- a/arch/m68k/include/asm/pgtable_mm.h
+++ b/arch/m68k/include/asm/pgtable_mm.h
@@ -40,6 +40,8 @@
40/* PGDIR_SHIFT determines what a third-level page table entry can map */ 40/* PGDIR_SHIFT determines what a third-level page table entry can map */
41#ifdef CONFIG_SUN3 41#ifdef CONFIG_SUN3
42#define PGDIR_SHIFT 17 42#define PGDIR_SHIFT 17
43#elif defined(CONFIG_COLDFIRE)
44#define PGDIR_SHIFT 22
43#else 45#else
44#define PGDIR_SHIFT 25 46#define PGDIR_SHIFT 25
45#endif 47#endif
@@ -54,6 +56,10 @@
54#define PTRS_PER_PTE 16 56#define PTRS_PER_PTE 16
55#define PTRS_PER_PMD 1 57#define PTRS_PER_PMD 1
56#define PTRS_PER_PGD 2048 58#define PTRS_PER_PGD 2048
59#elif defined(CONFIG_COLDFIRE)
60#define PTRS_PER_PTE 512
61#define PTRS_PER_PMD 1
62#define PTRS_PER_PGD 1024
57#else 63#else
58#define PTRS_PER_PTE 1024 64#define PTRS_PER_PTE 1024
59#define PTRS_PER_PMD 8 65#define PTRS_PER_PMD 8
@@ -66,12 +72,22 @@
66#ifdef CONFIG_SUN3 72#ifdef CONFIG_SUN3
67#define KMAP_START 0x0DC00000 73#define KMAP_START 0x0DC00000
68#define KMAP_END 0x0E000000 74#define KMAP_END 0x0E000000
75#elif defined(CONFIG_COLDFIRE)
76#define KMAP_START 0xe0000000
77#define KMAP_END 0xf0000000
69#else 78#else
70#define KMAP_START 0xd0000000 79#define KMAP_START 0xd0000000
71#define KMAP_END 0xf0000000 80#define KMAP_END 0xf0000000
72#endif 81#endif
73 82
74#ifndef CONFIG_SUN3 83#ifdef CONFIG_SUN3
84extern unsigned long m68k_vmalloc_end;
85#define VMALLOC_START 0x0f800000
86#define VMALLOC_END m68k_vmalloc_end
87#elif defined(CONFIG_COLDFIRE)
88#define VMALLOC_START 0xd0000000
89#define VMALLOC_END 0xe0000000
90#else
75/* Just any arbitrary offset to the start of the vmalloc VM area: the 91/* Just any arbitrary offset to the start of the vmalloc VM area: the
76 * current 8MB value just means that there will be a 8MB "hole" after the 92 * current 8MB value just means that there will be a 8MB "hole" after the
77 * physical memory until the kernel virtual memory starts. That means that 93 * physical memory until the kernel virtual memory starts. That means that
@@ -82,11 +98,7 @@
82#define VMALLOC_OFFSET (8*1024*1024) 98#define VMALLOC_OFFSET (8*1024*1024)
83#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) 99#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
84#define VMALLOC_END KMAP_START 100#define VMALLOC_END KMAP_START
85#else 101#endif
86extern unsigned long m68k_vmalloc_end;
87#define VMALLOC_START 0x0f800000
88#define VMALLOC_END m68k_vmalloc_end
89#endif /* CONFIG_SUN3 */
90 102
91/* zero page used for uninitialized stuff */ 103/* zero page used for uninitialized stuff */
92extern void *empty_zero_page; 104extern void *empty_zero_page;
@@ -130,6 +142,8 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
130 142
131#ifdef CONFIG_SUN3 143#ifdef CONFIG_SUN3
132#include <asm/sun3_pgtable.h> 144#include <asm/sun3_pgtable.h>
145#elif defined(CONFIG_COLDFIRE)
146#include <asm/mcf_pgtable.h>
133#else 147#else
134#include <asm/motorola_pgtable.h> 148#include <asm/motorola_pgtable.h>
135#endif 149#endif
@@ -138,6 +152,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
138/* 152/*
139 * Macro to mark a page protection value as "uncacheable". 153 * Macro to mark a page protection value as "uncacheable".
140 */ 154 */
155#ifdef CONFIG_COLDFIRE
156# define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | CF_PAGE_NOCACHE))
157#else
141#ifdef SUN3_PAGE_NOCACHE 158#ifdef SUN3_PAGE_NOCACHE
142# define __SUN3_PAGE_NOCACHE SUN3_PAGE_NOCACHE 159# define __SUN3_PAGE_NOCACHE SUN3_PAGE_NOCACHE
143#else 160#else
@@ -152,6 +169,7 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
152 ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S)) \ 169 ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S)) \
153 : (prot))) 170 : (prot)))
154 171
172#endif /* CONFIG_COLDFIRE */
155#include <asm-generic/pgtable.h> 173#include <asm-generic/pgtable.h>
156#endif /* !__ASSEMBLY__ */ 174#endif /* !__ASSEMBLY__ */
157 175
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h
index 568facf30276..46460fa15d5c 100644
--- a/arch/m68k/include/asm/processor.h
+++ b/arch/m68k/include/asm/processor.h
@@ -48,10 +48,12 @@ static inline void wrusp(unsigned long usp)
48 * so don't change it unless you know what you are doing. 48 * so don't change it unless you know what you are doing.
49 */ 49 */
50#ifdef CONFIG_MMU 50#ifdef CONFIG_MMU
51#ifndef CONFIG_SUN3 51#if defined(CONFIG_COLDFIRE)
52#define TASK_SIZE (0xF0000000UL) 52#define TASK_SIZE (0xC0000000UL)
53#else 53#elif defined(CONFIG_SUN3)
54#define TASK_SIZE (0x0E000000UL) 54#define TASK_SIZE (0x0E000000UL)
55#else
56#define TASK_SIZE (0xF0000000UL)
55#endif 57#endif
56#else 58#else
57#define TASK_SIZE (0xFFFFFFFFUL) 59#define TASK_SIZE (0xFFFFFFFFUL)
@@ -66,10 +68,12 @@ static inline void wrusp(unsigned long usp)
66 * space during mmap's. 68 * space during mmap's.
67 */ 69 */
68#ifdef CONFIG_MMU 70#ifdef CONFIG_MMU
69#ifndef CONFIG_SUN3 71#if defined(CONFIG_COLDFIRE)
70#define TASK_UNMAPPED_BASE 0xC0000000UL 72#define TASK_UNMAPPED_BASE 0x60000000UL
71#else 73#elif defined(CONFIG_SUN3)
72#define TASK_UNMAPPED_BASE 0x0A000000UL 74#define TASK_UNMAPPED_BASE 0x0A000000UL
75#else
76#define TASK_UNMAPPED_BASE 0xC0000000UL
73#endif 77#endif
74#define TASK_UNMAPPED_ALIGN(addr, off) PAGE_ALIGN(addr) 78#define TASK_UNMAPPED_ALIGN(addr, off) PAGE_ALIGN(addr)
75#else 79#else
@@ -88,14 +92,12 @@ struct thread_struct {
88 unsigned long fp[8*3]; 92 unsigned long fp[8*3];
89 unsigned long fpcntl[3]; /* fp control regs */ 93 unsigned long fpcntl[3]; /* fp control regs */
90 unsigned char fpstate[FPSTATESIZE]; /* floating point state */ 94 unsigned char fpstate[FPSTATESIZE]; /* floating point state */
91 struct thread_info info;
92}; 95};
93 96
94#define INIT_THREAD { \ 97#define INIT_THREAD { \
95 .ksp = sizeof(init_stack) + (unsigned long) init_stack, \ 98 .ksp = sizeof(init_stack) + (unsigned long) init_stack, \
96 .sr = PS_S, \ 99 .sr = PS_S, \
97 .fs = __KERNEL_DS, \ 100 .fs = __KERNEL_DS, \
98 .info = INIT_THREAD_INFO(init_task), \
99} 101}
100 102
101#ifdef CONFIG_MMU 103#ifdef CONFIG_MMU
diff --git a/arch/m68k/include/asm/segment.h b/arch/m68k/include/asm/segment.h
index ee959219fdfe..0fa80e97ed2d 100644
--- a/arch/m68k/include/asm/segment.h
+++ b/arch/m68k/include/asm/segment.h
@@ -22,23 +22,26 @@ typedef struct {
22} mm_segment_t; 22} mm_segment_t;
23 23
24#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) 24#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
25#define USER_DS MAKE_MM_SEG(__USER_DS)
26#define KERNEL_DS MAKE_MM_SEG(__KERNEL_DS)
27 25
26#ifdef CONFIG_CPU_HAS_ADDRESS_SPACES
28/* 27/*
29 * Get/set the SFC/DFC registers for MOVES instructions 28 * Get/set the SFC/DFC registers for MOVES instructions
30 */ 29 */
30#define USER_DS MAKE_MM_SEG(__USER_DS)
31#define KERNEL_DS MAKE_MM_SEG(__KERNEL_DS)
31 32
32static inline mm_segment_t get_fs(void) 33static inline mm_segment_t get_fs(void)
33{ 34{
34#ifdef CONFIG_MMU
35 mm_segment_t _v; 35 mm_segment_t _v;
36 __asm__ ("movec %/dfc,%0":"=r" (_v.seg):); 36 __asm__ ("movec %/dfc,%0":"=r" (_v.seg):);
37
38 return _v; 37 return _v;
39#else 38}
40 return USER_DS; 39
41#endif 40static inline void set_fs(mm_segment_t val)
41{
42 __asm__ __volatile__ ("movec %0,%/sfc\n\t"
43 "movec %0,%/dfc\n\t"
44 : /* no outputs */ : "r" (val.seg) : "memory");
42} 45}
43 46
44static inline mm_segment_t get_ds(void) 47static inline mm_segment_t get_ds(void)
@@ -47,14 +50,13 @@ static inline mm_segment_t get_ds(void)
47 return KERNEL_DS; 50 return KERNEL_DS;
48} 51}
49 52
50static inline void set_fs(mm_segment_t val) 53#else
51{ 54#define USER_DS MAKE_MM_SEG(TASK_SIZE)
52#ifdef CONFIG_MMU 55#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF)
53 __asm__ __volatile__ ("movec %0,%/sfc\n\t" 56#define get_ds() (KERNEL_DS)
54 "movec %0,%/dfc\n\t" 57#define get_fs() (current_thread_info()->addr_limit)
55 : /* no outputs */ : "r" (val.seg) : "memory"); 58#define set_fs(x) (current_thread_info()->addr_limit = (x))
56#endif 59#endif
57}
58 60
59#define segment_eq(a,b) ((a).seg == (b).seg) 61#define segment_eq(a,b) ((a).seg == (b).seg)
60 62
diff --git a/arch/m68k/include/asm/serial.h b/arch/m68k/include/asm/serial.h
index 2b90d6e69070..7267536adbcc 100644
--- a/arch/m68k/include/asm/serial.h
+++ b/arch/m68k/include/asm/serial.h
@@ -25,9 +25,11 @@
25#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF 25#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
26#endif 26#endif
27 27
28#ifdef CONFIG_ISA
28#define SERIAL_PORT_DFNS \ 29#define SERIAL_PORT_DFNS \
29 /* UART CLK PORT IRQ FLAGS */ \ 30 /* UART CLK PORT IRQ FLAGS */ \
30 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ 31 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
31 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \ 32 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
32 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ 33 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
33 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ 34 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
35#endif
diff --git a/arch/m68k/include/asm/setup.h b/arch/m68k/include/asm/setup.h
index 4dfb3952b375..00c2c5397d37 100644
--- a/arch/m68k/include/asm/setup.h
+++ b/arch/m68k/include/asm/setup.h
@@ -40,6 +40,7 @@
40#define MACH_HP300 9 40#define MACH_HP300 9
41#define MACH_Q40 10 41#define MACH_Q40 10
42#define MACH_SUN3X 11 42#define MACH_SUN3X 11
43#define MACH_M54XX 12
43 44
44#define COMMAND_LINE_SIZE 256 45#define COMMAND_LINE_SIZE 256
45 46
@@ -211,23 +212,27 @@ extern unsigned long m68k_machtype;
211#define CPUB_68030 1 212#define CPUB_68030 1
212#define CPUB_68040 2 213#define CPUB_68040 2
213#define CPUB_68060 3 214#define CPUB_68060 3
215#define CPUB_COLDFIRE 4
214 216
215#define CPU_68020 (1<<CPUB_68020) 217#define CPU_68020 (1<<CPUB_68020)
216#define CPU_68030 (1<<CPUB_68030) 218#define CPU_68030 (1<<CPUB_68030)
217#define CPU_68040 (1<<CPUB_68040) 219#define CPU_68040 (1<<CPUB_68040)
218#define CPU_68060 (1<<CPUB_68060) 220#define CPU_68060 (1<<CPUB_68060)
221#define CPU_COLDFIRE (1<<CPUB_COLDFIRE)
219 222
220#define FPUB_68881 0 223#define FPUB_68881 0
221#define FPUB_68882 1 224#define FPUB_68882 1
222#define FPUB_68040 2 /* Internal FPU */ 225#define FPUB_68040 2 /* Internal FPU */
223#define FPUB_68060 3 /* Internal FPU */ 226#define FPUB_68060 3 /* Internal FPU */
224#define FPUB_SUNFPA 4 /* Sun-3 FPA */ 227#define FPUB_SUNFPA 4 /* Sun-3 FPA */
228#define FPUB_COLDFIRE 5 /* ColdFire FPU */
225 229
226#define FPU_68881 (1<<FPUB_68881) 230#define FPU_68881 (1<<FPUB_68881)
227#define FPU_68882 (1<<FPUB_68882) 231#define FPU_68882 (1<<FPUB_68882)
228#define FPU_68040 (1<<FPUB_68040) 232#define FPU_68040 (1<<FPUB_68040)
229#define FPU_68060 (1<<FPUB_68060) 233#define FPU_68060 (1<<FPUB_68060)
230#define FPU_SUNFPA (1<<FPUB_SUNFPA) 234#define FPU_SUNFPA (1<<FPUB_SUNFPA)
235#define FPU_COLDFIRE (1<<FPUB_COLDFIRE)
231 236
232#define MMUB_68851 0 237#define MMUB_68851 0
233#define MMUB_68030 1 /* Internal MMU */ 238#define MMUB_68030 1 /* Internal MMU */
@@ -235,6 +240,7 @@ extern unsigned long m68k_machtype;
235#define MMUB_68060 3 /* Internal MMU */ 240#define MMUB_68060 3 /* Internal MMU */
236#define MMUB_APOLLO 4 /* Custom Apollo */ 241#define MMUB_APOLLO 4 /* Custom Apollo */
237#define MMUB_SUN3 5 /* Custom Sun-3 */ 242#define MMUB_SUN3 5 /* Custom Sun-3 */
243#define MMUB_COLDFIRE 6 /* Internal MMU */
238 244
239#define MMU_68851 (1<<MMUB_68851) 245#define MMU_68851 (1<<MMUB_68851)
240#define MMU_68030 (1<<MMUB_68030) 246#define MMU_68030 (1<<MMUB_68030)
@@ -242,6 +248,7 @@ extern unsigned long m68k_machtype;
242#define MMU_68060 (1<<MMUB_68060) 248#define MMU_68060 (1<<MMUB_68060)
243#define MMU_SUN3 (1<<MMUB_SUN3) 249#define MMU_SUN3 (1<<MMUB_SUN3)
244#define MMU_APOLLO (1<<MMUB_APOLLO) 250#define MMU_APOLLO (1<<MMUB_APOLLO)
251#define MMU_COLDFIRE (1<<MMUB_COLDFIRE)
245 252
246#ifdef __KERNEL__ 253#ifdef __KERNEL__
247 254
@@ -341,6 +348,13 @@ extern int m68k_is040or060;
341# endif 348# endif
342#endif 349#endif
343 350
351#if !defined(CONFIG_COLDFIRE)
352# define CPU_IS_COLDFIRE (0)
353#else
354# define CPU_IS_COLDFIRE (1)
355# define MMU_IS_COLDFIRE (1)
356#endif
357
344#define CPU_TYPE (m68k_cputype) 358#define CPU_TYPE (m68k_cputype)
345 359
346#ifdef CONFIG_M68KFPU_EMU 360#ifdef CONFIG_M68KFPU_EMU
diff --git a/arch/m68k/include/asm/sigcontext.h b/arch/m68k/include/asm/sigcontext.h
index a29dd74a17cb..523db2a51cf3 100644
--- a/arch/m68k/include/asm/sigcontext.h
+++ b/arch/m68k/include/asm/sigcontext.h
@@ -15,11 +15,7 @@ struct sigcontext {
15 unsigned long sc_pc; 15 unsigned long sc_pc;
16 unsigned short sc_formatvec; 16 unsigned short sc_formatvec;
17#ifndef __uClinux__ 17#ifndef __uClinux__
18# ifdef __mcoldfire__
19 unsigned long sc_fpregs[2][2]; /* room for two fp registers */
20# else
21 unsigned long sc_fpregs[2*3]; /* room for two fp registers */ 18 unsigned long sc_fpregs[2*3]; /* room for two fp registers */
22# endif
23 unsigned long sc_fpcntl[3]; 19 unsigned long sc_fpcntl[3];
24 unsigned char sc_fpstate[216]; 20 unsigned char sc_fpstate[216];
25#endif 21#endif
diff --git a/arch/m68k/include/asm/socket.h b/arch/m68k/include/asm/socket.h
index 9bf49c87d954..d4708ce466e0 100644
--- a/arch/m68k/include/asm/socket.h
+++ b/arch/m68k/include/asm/socket.h
@@ -62,4 +62,7 @@
62 62
63#define SO_RXQ_OVFL 40 63#define SO_RXQ_OVFL 40
64 64
65#define SO_WIFI_STATUS 41
66#define SCM_WIFI_STATUS SO_WIFI_STATUS
67
65#endif /* _ASM_SOCKET_H */ 68#endif /* _ASM_SOCKET_H */
diff --git a/arch/m68k/include/asm/thread_info.h b/arch/m68k/include/asm/thread_info.h
index 790988967ba7..e8665e6f9464 100644
--- a/arch/m68k/include/asm/thread_info.h
+++ b/arch/m68k/include/asm/thread_info.h
@@ -3,6 +3,7 @@
3 3
4#include <asm/types.h> 4#include <asm/types.h>
5#include <asm/page.h> 5#include <asm/page.h>
6#include <asm/segment.h>
6 7
7/* 8/*
8 * On machines with 4k pages we default to an 8k thread size, though we 9 * On machines with 4k pages we default to an 8k thread size, though we
@@ -26,6 +27,7 @@ struct thread_info {
26 struct task_struct *task; /* main task structure */ 27 struct task_struct *task; /* main task structure */
27 unsigned long flags; 28 unsigned long flags;
28 struct exec_domain *exec_domain; /* execution domain */ 29 struct exec_domain *exec_domain; /* execution domain */
30 mm_segment_t addr_limit; /* thread address space */
29 int preempt_count; /* 0 => preemptable, <0 => BUG */ 31 int preempt_count; /* 0 => preemptable, <0 => BUG */
30 __u32 cpu; /* should always be 0 on m68k */ 32 __u32 cpu; /* should always be 0 on m68k */
31 unsigned long tp_value; /* thread pointer */ 33 unsigned long tp_value; /* thread pointer */
@@ -39,6 +41,7 @@ struct thread_info {
39{ \ 41{ \
40 .task = &tsk, \ 42 .task = &tsk, \
41 .exec_domain = &default_exec_domain, \ 43 .exec_domain = &default_exec_domain, \
44 .addr_limit = KERNEL_DS, \
42 .preempt_count = INIT_PREEMPT_COUNT, \ 45 .preempt_count = INIT_PREEMPT_COUNT, \
43 .restart_block = { \ 46 .restart_block = { \
44 .fn = do_no_restart_syscall, \ 47 .fn = do_no_restart_syscall, \
@@ -47,34 +50,6 @@ struct thread_info {
47 50
48#define init_stack (init_thread_union.stack) 51#define init_stack (init_thread_union.stack)
49 52
50#ifdef CONFIG_MMU
51
52#ifndef __ASSEMBLY__
53#include <asm/current.h>
54#endif
55
56#ifdef ASM_OFFSETS_C
57#define task_thread_info(tsk) ((struct thread_info *) NULL)
58#else
59#include <asm/asm-offsets.h>
60#define task_thread_info(tsk) ((struct thread_info *)((char *)tsk+TASK_TINFO))
61#endif
62
63#define init_thread_info (init_task.thread.info)
64#define task_stack_page(tsk) ((tsk)->stack)
65#define current_thread_info() task_thread_info(current)
66
67#define __HAVE_THREAD_FUNCTIONS
68
69#define setup_thread_stack(p, org) ({ \
70 *(struct task_struct **)(p)->stack = (p); \
71 task_thread_info(p)->task = (p); \
72})
73
74#define end_of_stack(p) ((unsigned long *)(p)->stack + 1)
75
76#else /* !CONFIG_MMU */
77
78#ifndef __ASSEMBLY__ 53#ifndef __ASSEMBLY__
79/* how to get the thread information struct from C */ 54/* how to get the thread information struct from C */
80static inline struct thread_info *current_thread_info(void) 55static inline struct thread_info *current_thread_info(void)
@@ -92,8 +67,6 @@ static inline struct thread_info *current_thread_info(void)
92 67
93#define init_thread_info (init_thread_union.thread_info) 68#define init_thread_info (init_thread_union.thread_info)
94 69
95#endif /* CONFIG_MMU */
96
97/* entry.S relies on these definitions! 70/* entry.S relies on these definitions!
98 * bits 0-7 are tested at every exception exit 71 * bits 0-7 are tested at every exception exit
99 * bits 8-15 are also tested at syscall exit 72 * bits 8-15 are also tested at syscall exit
@@ -103,7 +76,6 @@ static inline struct thread_info *current_thread_info(void)
103#define TIF_DELAYED_TRACE 14 /* single step a syscall */ 76#define TIF_DELAYED_TRACE 14 /* single step a syscall */
104#define TIF_SYSCALL_TRACE 15 /* syscall trace active */ 77#define TIF_SYSCALL_TRACE 15 /* syscall trace active */
105#define TIF_MEMDIE 16 /* is terminating due to OOM killer */ 78#define TIF_MEMDIE 16 /* is terminating due to OOM killer */
106#define TIF_FREEZE 17 /* thread is freezing for suspend */
107#define TIF_RESTORE_SIGMASK 18 /* restore signal mask in do_signal */ 79#define TIF_RESTORE_SIGMASK 18 /* restore signal mask in do_signal */
108 80
109#endif /* _ASM_M68K_THREAD_INFO_H */ 81#endif /* _ASM_M68K_THREAD_INFO_H */
diff --git a/arch/m68k/include/asm/tlbflush.h b/arch/m68k/include/asm/tlbflush.h
index a6b4ed4fc90f..965ea35c9a40 100644
--- a/arch/m68k/include/asm/tlbflush.h
+++ b/arch/m68k/include/asm/tlbflush.h
@@ -5,10 +5,13 @@
5#ifndef CONFIG_SUN3 5#ifndef CONFIG_SUN3
6 6
7#include <asm/current.h> 7#include <asm/current.h>
8#include <asm/mcfmmu.h>
8 9
9static inline void flush_tlb_kernel_page(void *addr) 10static inline void flush_tlb_kernel_page(void *addr)
10{ 11{
11 if (CPU_IS_040_OR_060) { 12 if (CPU_IS_COLDFIRE) {
13 mmu_write(MMUOR, MMUOR_CNL);
14 } else if (CPU_IS_040_OR_060) {
12 mm_segment_t old_fs = get_fs(); 15 mm_segment_t old_fs = get_fs();
13 set_fs(KERNEL_DS); 16 set_fs(KERNEL_DS);
14 __asm__ __volatile__(".chip 68040\n\t" 17 __asm__ __volatile__(".chip 68040\n\t"
@@ -25,12 +28,15 @@ static inline void flush_tlb_kernel_page(void *addr)
25 */ 28 */
26static inline void __flush_tlb(void) 29static inline void __flush_tlb(void)
27{ 30{
28 if (CPU_IS_040_OR_060) 31 if (CPU_IS_COLDFIRE) {
32 mmu_write(MMUOR, MMUOR_CNL);
33 } else if (CPU_IS_040_OR_060) {
29 __asm__ __volatile__(".chip 68040\n\t" 34 __asm__ __volatile__(".chip 68040\n\t"
30 "pflushan\n\t" 35 "pflushan\n\t"
31 ".chip 68k"); 36 ".chip 68k");
32 else if (CPU_IS_020_OR_030) 37 } else if (CPU_IS_020_OR_030) {
33 __asm__ __volatile__("pflush #0,#4"); 38 __asm__ __volatile__("pflush #0,#4");
39 }
34} 40}
35 41
36static inline void __flush_tlb040_one(unsigned long addr) 42static inline void __flush_tlb040_one(unsigned long addr)
@@ -43,7 +49,9 @@ static inline void __flush_tlb040_one(unsigned long addr)
43 49
44static inline void __flush_tlb_one(unsigned long addr) 50static inline void __flush_tlb_one(unsigned long addr)
45{ 51{
46 if (CPU_IS_040_OR_060) 52 if (CPU_IS_COLDFIRE)
53 mmu_write(MMUOR, MMUOR_CNL);
54 else if (CPU_IS_040_OR_060)
47 __flush_tlb040_one(addr); 55 __flush_tlb040_one(addr);
48 else if (CPU_IS_020_OR_030) 56 else if (CPU_IS_020_OR_030)
49 __asm__ __volatile__("pflush #0,#4,(%0)" : : "a" (addr)); 57 __asm__ __volatile__("pflush #0,#4,(%0)" : : "a" (addr));
@@ -56,12 +64,15 @@ static inline void __flush_tlb_one(unsigned long addr)
56 */ 64 */
57static inline void flush_tlb_all(void) 65static inline void flush_tlb_all(void)
58{ 66{
59 if (CPU_IS_040_OR_060) 67 if (CPU_IS_COLDFIRE) {
68 mmu_write(MMUOR, MMUOR_CNL);
69 } else if (CPU_IS_040_OR_060) {
60 __asm__ __volatile__(".chip 68040\n\t" 70 __asm__ __volatile__(".chip 68040\n\t"
61 "pflusha\n\t" 71 "pflusha\n\t"
62 ".chip 68k"); 72 ".chip 68k");
63 else if (CPU_IS_020_OR_030) 73 } else if (CPU_IS_020_OR_030) {
64 __asm__ __volatile__("pflusha"); 74 __asm__ __volatile__("pflusha");
75 }
65} 76}
66 77
67static inline void flush_tlb_mm(struct mm_struct *mm) 78static inline void flush_tlb_mm(struct mm_struct *mm)
diff --git a/arch/m68k/include/asm/traps.h b/arch/m68k/include/asm/traps.h
index 151068f64f44..4aff3358fbaf 100644
--- a/arch/m68k/include/asm/traps.h
+++ b/arch/m68k/include/asm/traps.h
@@ -18,6 +18,7 @@
18 18
19typedef void (*e_vector)(void); 19typedef void (*e_vector)(void);
20extern e_vector vectors[]; 20extern e_vector vectors[];
21extern e_vector *_ramvec;
21 22
22asmlinkage void auto_inthandler(void); 23asmlinkage void auto_inthandler(void);
23asmlinkage void user_inthandler(void); 24asmlinkage void user_inthandler(void);
diff --git a/arch/m68k/include/asm/types.h b/arch/m68k/include/asm/types.h
index b17fd115a4e7..89705adcbd52 100644
--- a/arch/m68k/include/asm/types.h
+++ b/arch/m68k/include/asm/types.h
@@ -10,12 +10,6 @@
10 */ 10 */
11#include <asm-generic/int-ll64.h> 11#include <asm-generic/int-ll64.h>
12 12
13#ifndef __ASSEMBLY__
14
15typedef unsigned short umode_t;
16
17#endif /* __ASSEMBLY__ */
18
19/* 13/*
20 * These aren't exported outside the kernel to avoid name space clashes 14 * These aren't exported outside the kernel to avoid name space clashes
21 */ 15 */
diff --git a/arch/m68k/include/asm/uaccess_mm.h b/arch/m68k/include/asm/uaccess_mm.h
index 7107f3fbdbb6..9c80cd515b20 100644
--- a/arch/m68k/include/asm/uaccess_mm.h
+++ b/arch/m68k/include/asm/uaccess_mm.h
@@ -21,6 +21,22 @@ static inline int access_ok(int type, const void __user *addr,
21} 21}
22 22
23/* 23/*
24 * Not all varients of the 68k family support the notion of address spaces.
25 * The traditional 680x0 parts do, and they use the sfc/dfc registers and
26 * the "moves" instruction to access user space from kernel space. Other
27 * family members like ColdFire don't support this, and only have a single
28 * address space, and use the usual "move" instruction for user space access.
29 *
30 * Outside of this difference the user space access functions are the same.
31 * So lets keep the code simple and just define in what we need to use.
32 */
33#ifdef CONFIG_CPU_HAS_ADDRESS_SPACES
34#define MOVES "moves"
35#else
36#define MOVES "move"
37#endif
38
39/*
24 * The exception table consists of pairs of addresses: the first is the 40 * The exception table consists of pairs of addresses: the first is the
25 * address of an instruction that is allowed to fault, and the second is 41 * address of an instruction that is allowed to fault, and the second is
26 * the address at which the program should continue. No registers are 42 * the address at which the program should continue. No registers are
@@ -43,7 +59,7 @@ extern int __get_user_bad(void);
43 59
44#define __put_user_asm(res, x, ptr, bwl, reg, err) \ 60#define __put_user_asm(res, x, ptr, bwl, reg, err) \
45asm volatile ("\n" \ 61asm volatile ("\n" \
46 "1: moves."#bwl" %2,%1\n" \ 62 "1: "MOVES"."#bwl" %2,%1\n" \
47 "2:\n" \ 63 "2:\n" \
48 " .section .fixup,\"ax\"\n" \ 64 " .section .fixup,\"ax\"\n" \
49 " .even\n" \ 65 " .even\n" \
@@ -83,8 +99,8 @@ asm volatile ("\n" \
83 { \ 99 { \
84 const void __user *__pu_ptr = (ptr); \ 100 const void __user *__pu_ptr = (ptr); \
85 asm volatile ("\n" \ 101 asm volatile ("\n" \
86 "1: moves.l %2,(%1)+\n" \ 102 "1: "MOVES".l %2,(%1)+\n" \
87 "2: moves.l %R2,(%1)\n" \ 103 "2: "MOVES".l %R2,(%1)\n" \
88 "3:\n" \ 104 "3:\n" \
89 " .section .fixup,\"ax\"\n" \ 105 " .section .fixup,\"ax\"\n" \
90 " .even\n" \ 106 " .even\n" \
@@ -115,12 +131,12 @@ asm volatile ("\n" \
115#define __get_user_asm(res, x, ptr, type, bwl, reg, err) ({ \ 131#define __get_user_asm(res, x, ptr, type, bwl, reg, err) ({ \
116 type __gu_val; \ 132 type __gu_val; \
117 asm volatile ("\n" \ 133 asm volatile ("\n" \
118 "1: moves."#bwl" %2,%1\n" \ 134 "1: "MOVES"."#bwl" %2,%1\n" \
119 "2:\n" \ 135 "2:\n" \
120 " .section .fixup,\"ax\"\n" \ 136 " .section .fixup,\"ax\"\n" \
121 " .even\n" \ 137 " .even\n" \
122 "10: move.l %3,%0\n" \ 138 "10: move.l %3,%0\n" \
123 " sub."#bwl" %1,%1\n" \ 139 " sub.l %1,%1\n" \
124 " jra 2b\n" \ 140 " jra 2b\n" \
125 " .previous\n" \ 141 " .previous\n" \
126 "\n" \ 142 "\n" \
@@ -152,8 +168,8 @@ asm volatile ("\n" \
152 const void *__gu_ptr = (ptr); \ 168 const void *__gu_ptr = (ptr); \
153 u64 __gu_val; \ 169 u64 __gu_val; \
154 asm volatile ("\n" \ 170 asm volatile ("\n" \
155 "1: moves.l (%2)+,%1\n" \ 171 "1: "MOVES".l (%2)+,%1\n" \
156 "2: moves.l (%2),%R1\n" \ 172 "2: "MOVES".l (%2),%R1\n" \
157 "3:\n" \ 173 "3:\n" \
158 " .section .fixup,\"ax\"\n" \ 174 " .section .fixup,\"ax\"\n" \
159 " .even\n" \ 175 " .even\n" \
@@ -188,12 +204,12 @@ unsigned long __generic_copy_to_user(void __user *to, const void *from, unsigned
188 204
189#define __constant_copy_from_user_asm(res, to, from, tmp, n, s1, s2, s3)\ 205#define __constant_copy_from_user_asm(res, to, from, tmp, n, s1, s2, s3)\
190 asm volatile ("\n" \ 206 asm volatile ("\n" \
191 "1: moves."#s1" (%2)+,%3\n" \ 207 "1: "MOVES"."#s1" (%2)+,%3\n" \
192 " move."#s1" %3,(%1)+\n" \ 208 " move."#s1" %3,(%1)+\n" \
193 "2: moves."#s2" (%2)+,%3\n" \ 209 "2: "MOVES"."#s2" (%2)+,%3\n" \
194 " move."#s2" %3,(%1)+\n" \ 210 " move."#s2" %3,(%1)+\n" \
195 " .ifnc \""#s3"\",\"\"\n" \ 211 " .ifnc \""#s3"\",\"\"\n" \
196 "3: moves."#s3" (%2)+,%3\n" \ 212 "3: "MOVES"."#s3" (%2)+,%3\n" \
197 " move."#s3" %3,(%1)+\n" \ 213 " move."#s3" %3,(%1)+\n" \
198 " .endif\n" \ 214 " .endif\n" \
199 "4:\n" \ 215 "4:\n" \
@@ -269,13 +285,13 @@ __constant_copy_from_user(void *to, const void __user *from, unsigned long n)
269#define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3) \ 285#define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3) \
270 asm volatile ("\n" \ 286 asm volatile ("\n" \
271 " move."#s1" (%2)+,%3\n" \ 287 " move."#s1" (%2)+,%3\n" \
272 "11: moves."#s1" %3,(%1)+\n" \ 288 "11: "MOVES"."#s1" %3,(%1)+\n" \
273 "12: move."#s2" (%2)+,%3\n" \ 289 "12: move."#s2" (%2)+,%3\n" \
274 "21: moves."#s2" %3,(%1)+\n" \ 290 "21: "MOVES"."#s2" %3,(%1)+\n" \
275 "22:\n" \ 291 "22:\n" \
276 " .ifnc \""#s3"\",\"\"\n" \ 292 " .ifnc \""#s3"\",\"\"\n" \
277 " move."#s3" (%2)+,%3\n" \ 293 " move."#s3" (%2)+,%3\n" \
278 "31: moves."#s3" %3,(%1)+\n" \ 294 "31: "MOVES"."#s3" %3,(%1)+\n" \
279 "32:\n" \ 295 "32:\n" \
280 " .endif\n" \ 296 " .endif\n" \
281 "4:\n" \ 297 "4:\n" \
diff --git a/arch/m68k/include/asm/ucontext.h b/arch/m68k/include/asm/ucontext.h
index 00dcc5176c57..e4e22669edc0 100644
--- a/arch/m68k/include/asm/ucontext.h
+++ b/arch/m68k/include/asm/ucontext.h
@@ -7,11 +7,7 @@ typedef greg_t gregset_t[NGREG];
7 7
8typedef struct fpregset { 8typedef struct fpregset {
9 int f_fpcntl[3]; 9 int f_fpcntl[3];
10#ifdef __mcoldfire__
11 int f_fpregs[8][2];
12#else
13 int f_fpregs[8*3]; 10 int f_fpregs[8*3];
14#endif
15} fpregset_t; 11} fpregset_t;
16 12
17struct mcontext { 13struct mcontext {
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 43f984e93970..ea0b502f845e 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -132,10 +132,10 @@
132#define __NR_adjtimex 124 132#define __NR_adjtimex 124
133#define __NR_mprotect 125 133#define __NR_mprotect 125
134#define __NR_sigprocmask 126 134#define __NR_sigprocmask 126
135/*#define __NR_create_module 127*/ 135#define __NR_create_module 127
136#define __NR_init_module 128 136#define __NR_init_module 128
137#define __NR_delete_module 129 137#define __NR_delete_module 129
138/*#define __NR_get_kernel_syms 130*/ 138#define __NR_get_kernel_syms 130
139#define __NR_quotactl 131 139#define __NR_quotactl 131
140#define __NR_getpgid 132 140#define __NR_getpgid 132
141#define __NR_fchdir 133 141#define __NR_fchdir 133
@@ -172,7 +172,7 @@
172#define __NR_setresuid 164 172#define __NR_setresuid 164
173#define __NR_getresuid 165 173#define __NR_getresuid 165
174#define __NR_getpagesize 166 174#define __NR_getpagesize 166
175/*#define __NR_query_module 167*/ 175#define __NR_query_module 167
176#define __NR_poll 168 176#define __NR_poll 168
177#define __NR_nfsservctl 169 177#define __NR_nfsservctl 169
178#define __NR_setresgid 170 178#define __NR_setresgid 170
@@ -193,8 +193,8 @@
193#define __NR_capset 185 193#define __NR_capset 185
194#define __NR_sigaltstack 186 194#define __NR_sigaltstack 186
195#define __NR_sendfile 187 195#define __NR_sendfile 187
196/*#define __NR_getpmsg 188*/ /* some people actually want streams */ 196#define __NR_getpmsg 188 /* some people actually want streams */
197/*#define __NR_putpmsg 189*/ /* some people actually want streams */ 197#define __NR_putpmsg 189 /* some people actually want streams */
198#define __NR_vfork 190 198#define __NR_vfork 190
199#define __NR_ugetrlimit 191 199#define __NR_ugetrlimit 191
200#define __NR_mmap2 192 200#define __NR_mmap2 192
@@ -350,10 +350,12 @@
350#define __NR_clock_adjtime 342 350#define __NR_clock_adjtime 342
351#define __NR_syncfs 343 351#define __NR_syncfs 343
352#define __NR_setns 344 352#define __NR_setns 344
353#define __NR_process_vm_readv 345
354#define __NR_process_vm_writev 346
353 355
354#ifdef __KERNEL__ 356#ifdef __KERNEL__
355 357
356#define NR_syscalls 345 358#define NR_syscalls 347
357 359
358#define __ARCH_WANT_IPC_PARSE_VERSION 360#define __ARCH_WANT_IPC_PARSE_VERSION
359#define __ARCH_WANT_OLD_READDIR 361#define __ARCH_WANT_OLD_READDIR
diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile
index c5696193281a..40d29a788b05 100644
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -2,19 +2,24 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5extra-$(CONFIG_MMU) := head.o 5extra-$(CONFIG_AMIGA) := head.o
6extra-$(CONFIG_ATARI) := head.o
7extra-$(CONFIG_MAC) := head.o
8extra-$(CONFIG_APOLLO) := head.o
9extra-$(CONFIG_VME) := head.o
10extra-$(CONFIG_HP300) := head.o
11extra-$(CONFIG_Q40) := head.o
12extra-$(CONFIG_SUN3X) := head.o
6extra-$(CONFIG_SUN3) := sun3-head.o 13extra-$(CONFIG_SUN3) := sun3-head.o
7extra-y += vmlinux.lds 14extra-y += vmlinux.lds
8 15
9obj-y := entry.o irq.o m68k_ksyms.o module.o process.o ptrace.o setup.o \ 16obj-y := entry.o init_task.o irq.o m68k_ksyms.o module.o process.o ptrace.o
10 signal.o sys_m68k.o syscalltable.o time.o traps.o 17obj-y += setup.o signal.o sys_m68k.o syscalltable.o time.o traps.o
11 18
12obj-$(CONFIG_MMU) += ints.o vectors.o 19obj-$(CONFIG_MMU_MOTOROLA) += ints.o vectors.o
20obj-$(CONFIG_MMU_SUN3) += ints.o vectors.o
13 21
14ifndef CONFIG_MMU_SUN3 22ifndef CONFIG_MMU_SUN3
15obj-y += dma.o 23obj-y += dma.o
16endif
17ifndef CONFIG_MMU
18obj-y += init_task.o
19endif 24endif
20 25
diff --git a/arch/m68k/kernel/asm-offsets.c b/arch/m68k/kernel/asm-offsets.c
index 983fed9d469b..a972b00cd77d 100644
--- a/arch/m68k/kernel/asm-offsets.c
+++ b/arch/m68k/kernel/asm-offsets.c
@@ -24,8 +24,7 @@ int main(void)
24 /* offsets into the task struct */ 24 /* offsets into the task struct */
25 DEFINE(TASK_THREAD, offsetof(struct task_struct, thread)); 25 DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
26 DEFINE(TASK_MM, offsetof(struct task_struct, mm)); 26 DEFINE(TASK_MM, offsetof(struct task_struct, mm));
27 DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info)); 27 DEFINE(TASK_STACK, offsetof(struct task_struct, stack));
28 DEFINE(TASK_TINFO, offsetof(struct task_struct, thread.info));
29 28
30 /* offsets into the thread struct */ 29 /* offsets into the thread struct */
31 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); 30 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S
index 081cf96f243b..b8daf64e347d 100644
--- a/arch/m68k/kernel/entry.S
+++ b/arch/m68k/kernel/entry.S
@@ -1,4 +1,4 @@
1#ifdef CONFIG_MMU 1#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
2#include "entry_mm.S" 2#include "entry_mm.S"
3#else 3#else
4#include "entry_no.S" 4#include "entry_no.S"
diff --git a/arch/m68k/kernel/entry_mm.S b/arch/m68k/kernel/entry_mm.S
index c713f514843d..675a854966a6 100644
--- a/arch/m68k/kernel/entry_mm.S
+++ b/arch/m68k/kernel/entry_mm.S
@@ -99,7 +99,8 @@ do_trace_exit:
99 jra .Lret_from_exception 99 jra .Lret_from_exception
100 100
101ENTRY(ret_from_signal) 101ENTRY(ret_from_signal)
102 tstb %curptr@(TASK_INFO+TINFO_FLAGS+2) 102 movel %curptr@(TASK_STACK),%a1
103 tstb %a1@(TINFO_FLAGS+2)
103 jge 1f 104 jge 1f
104 jbsr syscall_trace 105 jbsr syscall_trace
1051: RESTORE_SWITCH_STACK 1061: RESTORE_SWITCH_STACK
@@ -120,11 +121,13 @@ ENTRY(system_call)
120 SAVE_ALL_SYS 121 SAVE_ALL_SYS
121 122
122 GET_CURRENT(%d1) 123 GET_CURRENT(%d1)
124 movel %d1,%a1
125
123 | save top of frame 126 | save top of frame
124 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0) 127 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
125 128
126 | syscall trace? 129 | syscall trace?
127 tstb %curptr@(TASK_INFO+TINFO_FLAGS+2) 130 tstb %a1@(TINFO_FLAGS+2)
128 jmi do_trace_entry 131 jmi do_trace_entry
129 cmpl #NR_syscalls,%d0 132 cmpl #NR_syscalls,%d0
130 jcc badsys 133 jcc badsys
@@ -133,7 +136,8 @@ syscall:
133 movel %d0,%sp@(PT_OFF_D0) | save the return value 136 movel %d0,%sp@(PT_OFF_D0) | save the return value
134ret_from_syscall: 137ret_from_syscall:
135 |oriw #0x0700,%sr 138 |oriw #0x0700,%sr
136 movew %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0 139 movel %curptr@(TASK_STACK),%a1
140 movew %a1@(TINFO_FLAGS+2),%d0
137 jne syscall_exit_work 141 jne syscall_exit_work
1381: RESTORE_ALL 1421: RESTORE_ALL
139 143
@@ -159,7 +163,8 @@ ENTRY(ret_from_exception)
159 andw #ALLOWINT,%sr 163 andw #ALLOWINT,%sr
160 164
161resume_userspace: 165resume_userspace:
162 moveb %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0 166 movel %curptr@(TASK_STACK),%a1
167 moveb %a1@(TINFO_FLAGS+3),%d0
163 jne exit_work 168 jne exit_work
1641: RESTORE_ALL 1691: RESTORE_ALL
165 170
@@ -199,7 +204,8 @@ do_delayed_trace:
199ENTRY(auto_inthandler) 204ENTRY(auto_inthandler)
200 SAVE_ALL_INT 205 SAVE_ALL_INT
201 GET_CURRENT(%d0) 206 GET_CURRENT(%d0)
202 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) 207 movel %d0,%a1
208 addqb #1,%a1@(TINFO_PREEMPT+1)
203 | put exception # in d0 209 | put exception # in d0
204 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0 210 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
205 subw #VEC_SPUR,%d0 211 subw #VEC_SPUR,%d0
@@ -211,7 +217,8 @@ auto_irqhandler_fixup = . + 2
211 addql #8,%sp | pop parameters off stack 217 addql #8,%sp | pop parameters off stack
212 218
213ret_from_interrupt: 219ret_from_interrupt:
214 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) 220 movel %curptr@(TASK_STACK),%a1
221 subqb #1,%a1@(TINFO_PREEMPT+1)
215 jeq ret_from_last_interrupt 222 jeq ret_from_last_interrupt
2162: RESTORE_ALL 2232: RESTORE_ALL
217 224
@@ -232,7 +239,8 @@ ret_from_last_interrupt:
232ENTRY(user_inthandler) 239ENTRY(user_inthandler)
233 SAVE_ALL_INT 240 SAVE_ALL_INT
234 GET_CURRENT(%d0) 241 GET_CURRENT(%d0)
235 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) 242 movel %d0,%a1
243 addqb #1,%a1@(TINFO_PREEMPT+1)
236 | put exception # in d0 244 | put exception # in d0
237 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0 245 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
238user_irqvec_fixup = . + 2 246user_irqvec_fixup = . + 2
@@ -243,7 +251,8 @@ user_irqvec_fixup = . + 2
243 jsr do_IRQ | process the IRQ 251 jsr do_IRQ | process the IRQ
244 addql #8,%sp | pop parameters off stack 252 addql #8,%sp | pop parameters off stack
245 253
246 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) 254 movel %curptr@(TASK_STACK),%a1
255 subqb #1,%a1@(TINFO_PREEMPT+1)
247 jeq ret_from_last_interrupt 256 jeq ret_from_last_interrupt
248 RESTORE_ALL 257 RESTORE_ALL
249 258
@@ -252,13 +261,15 @@ user_irqvec_fixup = . + 2
252ENTRY(bad_inthandler) 261ENTRY(bad_inthandler)
253 SAVE_ALL_INT 262 SAVE_ALL_INT
254 GET_CURRENT(%d0) 263 GET_CURRENT(%d0)
255 addqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) 264 movel %d0,%a1
265 addqb #1,%a1@(TINFO_PREEMPT+1)
256 266
257 movel %sp,%sp@- 267 movel %sp,%sp@-
258 jsr handle_badint 268 jsr handle_badint
259 addql #4,%sp 269 addql #4,%sp
260 270
261 subqb #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1) 271 movel %curptr@(TASK_STACK),%a1
272 subqb #1,%a1@(TINFO_PREEMPT+1)
262 jeq ret_from_last_interrupt 273 jeq ret_from_last_interrupt
263 RESTORE_ALL 274 RESTORE_ALL
264 275
diff --git a/arch/m68k/kernel/entry_no.S b/arch/m68k/kernel/entry_no.S
index 1b4289061a64..d80cba45589f 100644
--- a/arch/m68k/kernel/entry_no.S
+++ b/arch/m68k/kernel/entry_no.S
@@ -44,8 +44,7 @@
44 44
45ENTRY(buserr) 45ENTRY(buserr)
46 SAVE_ALL_INT 46 SAVE_ALL_INT
47 moveq #-1,%d0 47 GET_CURRENT(%d0)
48 movel %d0,%sp@(PT_OFF_ORIG_D0)
49 movel %sp,%sp@- /* stack frame pointer argument */ 48 movel %sp,%sp@- /* stack frame pointer argument */
50 jsr buserr_c 49 jsr buserr_c
51 addql #4,%sp 50 addql #4,%sp
@@ -53,8 +52,7 @@ ENTRY(buserr)
53 52
54ENTRY(trap) 53ENTRY(trap)
55 SAVE_ALL_INT 54 SAVE_ALL_INT
56 moveq #-1,%d0 55 GET_CURRENT(%d0)
57 movel %d0,%sp@(PT_OFF_ORIG_D0)
58 movel %sp,%sp@- /* stack frame pointer argument */ 56 movel %sp,%sp@- /* stack frame pointer argument */
59 jsr trap_c 57 jsr trap_c
60 addql #4,%sp 58 addql #4,%sp
@@ -65,8 +63,7 @@ ENTRY(trap)
65.globl dbginterrupt 63.globl dbginterrupt
66ENTRY(dbginterrupt) 64ENTRY(dbginterrupt)
67 SAVE_ALL_INT 65 SAVE_ALL_INT
68 moveq #-1,%d0 66 GET_CURRENT(%d0)
69 movel %d0,%sp@(PT_OFF_ORIG_D0)
70 movel %sp,%sp@- /* stack frame pointer argument */ 67 movel %sp,%sp@- /* stack frame pointer argument */
71 jsr dbginterrupt_c 68 jsr dbginterrupt_c
72 addql #4,%sp 69 addql #4,%sp
diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S
index 27622b3273c1..d197e7ff62c5 100644
--- a/arch/m68k/kernel/head.S
+++ b/arch/m68k/kernel/head.S
@@ -250,9 +250,8 @@
250 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug. 250 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
251 * 251 *
252 * Macintosh constants: 252 * Macintosh constants:
253 * MAC_SERIAL_DEBUG: Turns on serial debug output for the Macintosh. 253 * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug and early console.
254 * MAC_USE_SCC_A: Use the SCC port A (modem) for serial debug. 254 * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug and early console.
255 * MAC_USE_SCC_B: Use the SCC port B (printer) for serial debug (default).
256 */ 255 */
257 256
258#include <linux/linkage.h> 257#include <linux/linkage.h>
@@ -268,33 +267,25 @@
268 267
269#include <asm/machw.h> 268#include <asm/machw.h>
270 269
271/*
272 * Macintosh console support
273 */
274
275#ifdef CONFIG_FRAMEBUFFER_CONSOLE 270#ifdef CONFIG_FRAMEBUFFER_CONSOLE
276#define CONSOLE 271#define CONSOLE
277#define CONSOLE_PENGUIN 272#define CONSOLE_PENGUIN
278#endif 273#endif
279 274
280/* 275#ifdef CONFIG_EARLY_PRINTK
281 * Macintosh serial debug support; outputs boot info to the printer 276#define SERIAL_DEBUG
282 * and/or modem serial ports 277#else
283 */ 278#undef SERIAL_DEBUG
284#undef MAC_SERIAL_DEBUG 279#endif
285 280
286/* 281#else /* !CONFIG_MAC */
287 * Macintosh serial debug port selection; define one or both;
288 * requires MAC_SERIAL_DEBUG to be defined
289 */
290#define MAC_USE_SCC_A /* Macintosh modem serial port */
291#define MAC_USE_SCC_B /* Macintosh printer serial port */
292 282
293#endif /* CONFIG_MAC */ 283#define SERIAL_DEBUG
284
285#endif /* !CONFIG_MAC */
294 286
295#undef MMU_PRINT 287#undef MMU_PRINT
296#undef MMU_NOCACHE_KERNEL 288#undef MMU_NOCACHE_KERNEL
297#define SERIAL_DEBUG
298#undef DEBUG 289#undef DEBUG
299 290
300/* 291/*
@@ -655,11 +646,11 @@ ENTRY(__start)
655 lea %pc@(L(mac_rowbytes)),%a1 646 lea %pc@(L(mac_rowbytes)),%a1
656 movel %a0@,%a1@ 647 movel %a0@,%a1@
657 648
658#ifdef MAC_SERIAL_DEBUG 649#ifdef SERIAL_DEBUG
659 get_bi_record BI_MAC_SCCBASE 650 get_bi_record BI_MAC_SCCBASE
660 lea %pc@(L(mac_sccbase)),%a1 651 lea %pc@(L(mac_sccbase)),%a1
661 movel %a0@,%a1@ 652 movel %a0@,%a1@
662#endif /* MAC_SERIAL_DEBUG */ 653#endif
663 654
664#if 0 655#if 0
665 /* 656 /*
@@ -1427,7 +1418,7 @@ L(mmu_fixup_done):
1427 subl %d0,L(console_font) 1418 subl %d0,L(console_font)
1428 subl %d0,L(console_font_data) 1419 subl %d0,L(console_font_data)
1429#endif 1420#endif
1430#ifdef MAC_SERIAL_DEBUG 1421#ifdef SERIAL_DEBUG
1431 orl #0x50000000,L(mac_sccbase) 1422 orl #0x50000000,L(mac_sccbase)
1432#endif 1423#endif
14331: 14241:
@@ -1917,7 +1908,7 @@ mmu_030_print:
1917 jbne 30b 1908 jbne 30b
1918 1909
1919mmu_print_done: 1910mmu_print_done:
1920 puts "\n\n" 1911 puts "\n"
1921 1912
1922func_return mmu_print 1913func_return mmu_print
1923 1914
@@ -2768,7 +2759,7 @@ L(scc_initable_mac):
2768 .byte 9,0 /* no interrupts */ 2759 .byte 9,0 /* no interrupts */
2769 .byte 10,0 /* NRZ */ 2760 .byte 10,0 /* NRZ */
2770 .byte 11,0x50 /* use baud rate generator */ 2761 .byte 11,0x50 /* use baud rate generator */
2771 .byte 12,10,13,0 /* 9600 baud */ 2762 .byte 12,1,13,0 /* 38400 baud */
2772 .byte 14,1 /* Baud rate generator enable */ 2763 .byte 14,1 /* Baud rate generator enable */
2773 .byte 3,0xc1 /* enable receiver */ 2764 .byte 3,0xc1 /* enable receiver */
2774 .byte 5,0xea /* enable transmitter */ 2765 .byte 5,0xea /* enable transmitter */
@@ -2906,10 +2897,12 @@ func_start serial_init,%d0/%d1/%a0/%a1
2906#endif 2897#endif
2907#ifdef CONFIG_MAC 2898#ifdef CONFIG_MAC
2908 is_not_mac(L(serial_init_not_mac)) 2899 is_not_mac(L(serial_init_not_mac))
2909#ifdef MAC_SERIAL_DEBUG 2900
2910#if !defined(MAC_USE_SCC_A) && !defined(MAC_USE_SCC_B) 2901#ifdef SERIAL_DEBUG
2911#define MAC_USE_SCC_B 2902/* You may define either or both of these. */
2912#endif 2903#define MAC_USE_SCC_A /* Modem port */
2904#define MAC_USE_SCC_B /* Printer port */
2905
2913#define mac_scc_cha_b_ctrl_offset 0x0 2906#define mac_scc_cha_b_ctrl_offset 0x0
2914#define mac_scc_cha_a_ctrl_offset 0x2 2907#define mac_scc_cha_a_ctrl_offset 0x2
2915#define mac_scc_cha_b_data_offset 0x4 2908#define mac_scc_cha_b_data_offset 0x4
@@ -2940,7 +2933,7 @@ func_start serial_init,%d0/%d1/%a0/%a1
2940 jra 7b 2933 jra 7b
29418: 29348:
2942#endif /* MAC_USE_SCC_B */ 2935#endif /* MAC_USE_SCC_B */
2943#endif /* MAC_SERIAL_DEBUG */ 2936#endif /* SERIAL_DEBUG */
2944 2937
2945 jra L(serial_init_done) 2938 jra L(serial_init_done)
2946L(serial_init_not_mac): 2939L(serial_init_not_mac):
@@ -3011,7 +3004,7 @@ func_start serial_putc,%d0/%d1/%a0/%a1
3011#ifdef CONFIG_MAC 3004#ifdef CONFIG_MAC
3012 is_not_mac(5f) 3005 is_not_mac(5f)
3013 3006
3014#ifdef MAC_SERIAL_DEBUG 3007#ifdef SERIAL_DEBUG
3015 3008
3016#ifdef MAC_USE_SCC_A 3009#ifdef MAC_USE_SCC_A
3017 movel %pc@(L(mac_sccbase)),%a1 3010 movel %pc@(L(mac_sccbase)),%a1
@@ -3029,7 +3022,7 @@ func_start serial_putc,%d0/%d1/%a0/%a1
3029 moveb %d0,%a1@(mac_scc_cha_b_data_offset) 3022 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
3030#endif /* MAC_USE_SCC_B */ 3023#endif /* MAC_USE_SCC_B */
3031 3024
3032#endif /* MAC_SERIAL_DEBUG */ 3025#endif /* SERIAL_DEBUG */
3033 3026
3034 jra L(serial_putc_done) 3027 jra L(serial_putc_done)
30355: 30285:
@@ -3248,33 +3241,39 @@ func_return putn
3248 3241
3249#ifdef CONFIG_MAC 3242#ifdef CONFIG_MAC
3250/* 3243/*
3251 * mac_serial_print 3244 * mac_early_print
3252 * 3245 *
3253 * This routine takes its parameters on the stack. It then 3246 * This routine takes its parameters on the stack. It then
3254 * turns around and calls the internal routine. This routine 3247 * turns around and calls the internal routines. This routine
3255 * is used until the Linux console driver initializes itself. 3248 * is used by the boot console.
3256 * 3249 *
3257 * The calling parameters are: 3250 * The calling parameters are:
3258 * void mac_serial_print(const char *str); 3251 * void mac_early_print(const char *str, unsigned length);
3259 * 3252 *
3260 * This routine does NOT understand variable arguments only 3253 * This routine does NOT understand variable arguments only
3261 * simple strings! 3254 * simple strings!
3262 */ 3255 */
3263ENTRY(mac_serial_print) 3256ENTRY(mac_early_print)
3264 moveml %d0/%a0,%sp@- 3257 moveml %d0/%d1/%a0,%sp@-
3265#if 1 3258 movew %sr,%sp@-
3266 move %sr,%sp@-
3267 ori #0x0700,%sr 3259 ori #0x0700,%sr
3268#endif 3260 movel %sp@(18),%a0 /* fetch parameter */
3269 movel %sp@(10),%a0 /* fetch parameter */ 3261 movel %sp@(22),%d1 /* fetch parameter */
3270 jra 2f 3262 jra 2f
32711: serial_putc %d0 32631:
32722: moveb %a0@+,%d0 3264#ifdef CONSOLE
3273 jne 1b 3265 console_putc %d0
3274#if 1
3275 move %sp@+,%sr
3276#endif 3266#endif
3277 moveml %sp@+,%d0/%a0 3267#ifdef SERIAL_DEBUG
3268 serial_putc %d0
3269#endif
3270 subq #1,%d1
32712: jeq 3f
3272 moveb %a0@+,%d0
3273 jne 1b
32743:
3275 movew %sp@+,%sr
3276 moveml %sp@+,%d0/%d1/%a0
3278 rts 3277 rts
3279#endif /* CONFIG_MAC */ 3278#endif /* CONFIG_MAC */
3280 3279
@@ -3409,10 +3408,10 @@ func_start console_put_stats,%a0/%d7
3409 * a0 = pointer to boot_info 3408 * a0 = pointer to boot_info
3410 * d7 = value of boot_info fields 3409 * d7 = value of boot_info fields
3411 */ 3410 */
3412 puts "\nMacLinux\n\n" 3411 puts "\nMacLinux\n"
3413 3412
3414#ifdef SERIAL_DEBUG 3413#ifdef SERIAL_DEBUG
3415 puts " vidaddr:" 3414 puts "\n vidaddr:"
3416 putn %pc@(L(mac_videobase)) /* video addr. */ 3415 putn %pc@(L(mac_videobase)) /* video addr. */
3417 3416
3418 puts "\n _stext:" 3417 puts "\n _stext:"
@@ -3423,19 +3422,21 @@ func_start console_put_stats,%a0/%d7
3423 lea %pc@(_end),%a0 3422 lea %pc@(_end),%a0
3424 putn %a0 3423 putn %a0
3425 3424
3426 puts "\ncpuid:" 3425 puts "\n cpuid:"
3427 putn %pc@(L(cputype)) 3426 putn %pc@(L(cputype))
3428 putc '\n'
3429 3427
3430#ifdef MAC_SERIAL_DEBUG 3428# ifdef CONFIG_MAC
3429 puts "\n sccbase:"
3431 putn %pc@(L(mac_sccbase)) 3430 putn %pc@(L(mac_sccbase))
3431# endif
3432# ifdef MMU_PRINT
3432 putc '\n' 3433 putc '\n'
3433#endif
3434# if defined(MMU_PRINT)
3435 jbsr mmu_print_machine_cpu_types 3434 jbsr mmu_print_machine_cpu_types
3436# endif /* MMU_PRINT */ 3435# endif
3437#endif /* SERIAL_DEBUG */ 3436#endif /* SERIAL_DEBUG */
3438 3437
3438 putc '\n'
3439
3439func_return console_put_stats 3440func_return console_put_stats
3440 3441
3441#ifdef CONSOLE_PENGUIN 3442#ifdef CONSOLE_PENGUIN
@@ -3896,11 +3897,11 @@ L(mac_dimensions):
3896 .long 0 3897 .long 0
3897L(mac_rowbytes): 3898L(mac_rowbytes):
3898 .long 0 3899 .long 0
3899#ifdef MAC_SERIAL_DEBUG 3900#ifdef SERIAL_DEBUG
3900L(mac_sccbase): 3901L(mac_sccbase):
3901 .long 0 3902 .long 0
3902#endif /* MAC_SERIAL_DEBUG */
3903#endif 3903#endif
3904#endif /* CONFIG_MAC */
3904 3905
3905#if defined (CONFIG_APOLLO) 3906#if defined (CONFIG_APOLLO)
3906LSRB0 = 0x10412 3907LSRB0 = 0x10412
diff --git a/arch/m68k/kernel/init_task.c b/arch/m68k/kernel/init_task.c
index cbf9dc3cc51d..c744cfc6bfa1 100644
--- a/arch/m68k/kernel/init_task.c
+++ b/arch/m68k/kernel/init_task.c
@@ -19,7 +19,6 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
19 * 19 *
20 * All other task structs will be allocated on slabs in fork.c 20 * All other task structs will be allocated on slabs in fork.c
21 */ 21 */
22__asm__(".align 4");
23struct task_struct init_task = INIT_TASK(init_task); 22struct task_struct init_task = INIT_TASK(init_task);
24 23
25EXPORT_SYMBOL(init_task); 24EXPORT_SYMBOL(init_task);
@@ -27,7 +26,7 @@ EXPORT_SYMBOL(init_task);
27/* 26/*
28 * Initial thread structure. 27 * Initial thread structure.
29 * 28 *
30 * We need to make sure that this is 8192-byte aligned due to the 29 * We need to make sure that this is THREAD size aligned due to the
31 * way process stacks are handled. This is done by having a special 30 * way process stacks are handled. This is done by having a special
32 * "init_task" linker map entry.. 31 * "init_task" linker map entry..
33 */ 32 */
diff --git a/arch/m68k/kernel/m68k_ksyms.c b/arch/m68k/kernel/m68k_ksyms.c
index 1b7a14d1a000..774c1bd59c36 100644
--- a/arch/m68k/kernel/m68k_ksyms.c
+++ b/arch/m68k/kernel/m68k_ksyms.c
@@ -14,7 +14,7 @@ EXPORT_SYMBOL(__ashrdi3);
14EXPORT_SYMBOL(__lshrdi3); 14EXPORT_SYMBOL(__lshrdi3);
15EXPORT_SYMBOL(__muldi3); 15EXPORT_SYMBOL(__muldi3);
16 16
17#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE) 17#if defined(CONFIG_CPU_HAS_NO_MULDIV64)
18/* 18/*
19 * Simpler 68k and ColdFire parts also need a few other gcc functions. 19 * Simpler 68k and ColdFire parts also need a few other gcc functions.
20 */ 20 */
diff --git a/arch/m68k/kernel/process_mm.c b/arch/m68k/kernel/process_mm.c
index 1bc223aa07ec..099283ee1a8f 100644
--- a/arch/m68k/kernel/process_mm.c
+++ b/arch/m68k/kernel/process_mm.c
@@ -33,22 +33,6 @@
33#include <asm/setup.h> 33#include <asm/setup.h>
34#include <asm/pgtable.h> 34#include <asm/pgtable.h>
35 35
36/*
37 * Initial task/thread structure. Make this a per-architecture thing,
38 * because different architectures tend to have different
39 * alignment requirements and potentially different initial
40 * setup.
41 */
42static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
43static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
44union thread_union init_thread_union __init_task_data
45 __attribute__((aligned(THREAD_SIZE))) =
46 { INIT_THREAD_INFO(init_task) };
47
48/* initial task structure */
49struct task_struct init_task = INIT_TASK(init_task);
50
51EXPORT_SYMBOL(init_task);
52 36
53asmlinkage void ret_from_fork(void); 37asmlinkage void ret_from_fork(void);
54 38
@@ -188,9 +172,7 @@ void flush_thread(void)
188 172
189 current->thread.fs = __USER_DS; 173 current->thread.fs = __USER_DS;
190 if (!FPU_IS_EMU) 174 if (!FPU_IS_EMU)
191 asm volatile (".chip 68k/68881\n\t" 175 asm volatile("frestore %0": :"m" (zero));
192 "frestore %0@\n\t"
193 ".chip 68k" : : "a" (&zero));
194} 176}
195 177
196/* 178/*
@@ -264,11 +246,28 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
264 /* Copy the current fpu state */ 246 /* Copy the current fpu state */
265 asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory"); 247 asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
266 248
267 if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2]) 249 if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2]) {
268 asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t" 250 if (CPU_IS_COLDFIRE) {
269 "fmoveml %/fpiar/%/fpcr/%/fpsr,%1" 251 asm volatile ("fmovemd %/fp0-%/fp7,%0\n\t"
270 : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0]) 252 "fmovel %/fpiar,%1\n\t"
271 : "memory"); 253 "fmovel %/fpcr,%2\n\t"
254 "fmovel %/fpsr,%3"
255 :
256 : "m" (p->thread.fp[0]),
257 "m" (p->thread.fpcntl[0]),
258 "m" (p->thread.fpcntl[1]),
259 "m" (p->thread.fpcntl[2])
260 : "memory");
261 } else {
262 asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
263 "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
264 :
265 : "m" (p->thread.fp[0]),
266 "m" (p->thread.fpcntl[0])
267 : "memory");
268 }
269 }
270
272 /* Restore the state in case the fpu was busy */ 271 /* Restore the state in case the fpu was busy */
273 asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0])); 272 asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
274 } 273 }
@@ -301,12 +300,28 @@ int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
301 if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2]) 300 if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
302 return 0; 301 return 0;
303 302
304 asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0" 303 if (CPU_IS_COLDFIRE) {
305 :: "m" (fpu->fpcntl[0]) 304 asm volatile ("fmovel %/fpiar,%0\n\t"
306 : "memory"); 305 "fmovel %/fpcr,%1\n\t"
307 asm volatile ("fmovemx %/fp0-%/fp7,%0" 306 "fmovel %/fpsr,%2\n\t"
308 :: "m" (fpu->fpregs[0]) 307 "fmovemd %/fp0-%/fp7,%3"
309 : "memory"); 308 :
309 : "m" (fpu->fpcntl[0]),
310 "m" (fpu->fpcntl[1]),
311 "m" (fpu->fpcntl[2]),
312 "m" (fpu->fpregs[0])
313 : "memory");
314 } else {
315 asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
316 :
317 : "m" (fpu->fpcntl[0])
318 : "memory");
319 asm volatile ("fmovemx %/fp0-%/fp7,%0"
320 :
321 : "m" (fpu->fpregs[0])
322 : "memory");
323 }
324
310 return 1; 325 return 1;
311} 326}
312EXPORT_SYMBOL(dump_fpu); 327EXPORT_SYMBOL(dump_fpu);
diff --git a/arch/m68k/kernel/process_no.c b/arch/m68k/kernel/process_no.c
index 69c1803fcf1b..5e1078cabe0e 100644
--- a/arch/m68k/kernel/process_no.c
+++ b/arch/m68k/kernel/process_no.c
@@ -163,8 +163,8 @@ void flush_thread(void)
163#ifdef CONFIG_FPU 163#ifdef CONFIG_FPU
164 if (!FPU_IS_EMU) 164 if (!FPU_IS_EMU)
165 asm volatile (".chip 68k/68881\n\t" 165 asm volatile (".chip 68k/68881\n\t"
166 "frestore %0@\n\t" 166 "frestore %0\n\t"
167 ".chip 68k" : : "a" (&zero)); 167 ".chip 68k" : : "m" (zero));
168#endif 168#endif
169} 169}
170 170
diff --git a/arch/m68k/kernel/ptrace_mm.c b/arch/m68k/kernel/ptrace_mm.c
index 0b252683cefb..7bc999b73529 100644
--- a/arch/m68k/kernel/ptrace_mm.c
+++ b/arch/m68k/kernel/ptrace_mm.c
@@ -18,6 +18,7 @@
18#include <linux/ptrace.h> 18#include <linux/ptrace.h>
19#include <linux/user.h> 19#include <linux/user.h>
20#include <linux/signal.h> 20#include <linux/signal.h>
21#include <linux/tracehook.h>
21 22
22#include <asm/uaccess.h> 23#include <asm/uaccess.h>
23#include <asm/page.h> 24#include <asm/page.h>
@@ -275,3 +276,20 @@ asmlinkage void syscall_trace(void)
275 current->exit_code = 0; 276 current->exit_code = 0;
276 } 277 }
277} 278}
279
280#ifdef CONFIG_COLDFIRE
281asmlinkage int syscall_trace_enter(void)
282{
283 int ret = 0;
284
285 if (test_thread_flag(TIF_SYSCALL_TRACE))
286 ret = tracehook_report_syscall_entry(task_pt_regs(current));
287 return ret;
288}
289
290asmlinkage void syscall_trace_leave(void)
291{
292 if (test_thread_flag(TIF_SYSCALL_TRACE))
293 tracehook_report_syscall_exit(task_pt_regs(current), 0);
294}
295#endif /* CONFIG_COLDFIRE */
diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c
index c3b45061dd08..d872ce4807c9 100644
--- a/arch/m68k/kernel/setup_mm.c
+++ b/arch/m68k/kernel/setup_mm.c
@@ -221,7 +221,8 @@ void __init setup_arch(char **cmdline_p)
221#endif 221#endif
222 222
223 /* The bootinfo is located right after the kernel bss */ 223 /* The bootinfo is located right after the kernel bss */
224 m68k_parse_bootinfo((const struct bi_record *)_end); 224 if (!CPU_IS_COLDFIRE)
225 m68k_parse_bootinfo((const struct bi_record *)_end);
225 226
226 if (CPU_IS_040) 227 if (CPU_IS_040)
227 m68k_is040or060 = 4; 228 m68k_is040or060 = 4;
@@ -235,7 +236,7 @@ void __init setup_arch(char **cmdline_p)
235 * with them, we should add a test to check_bugs() below] */ 236 * with them, we should add a test to check_bugs() below] */
236#ifndef CONFIG_M68KFPU_EMU_ONLY 237#ifndef CONFIG_M68KFPU_EMU_ONLY
237 /* clear the fpu if we have one */ 238 /* clear the fpu if we have one */
238 if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) { 239 if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060|FPU_COLDFIRE)) {
239 volatile int zero = 0; 240 volatile int zero = 0;
240 asm volatile ("frestore %0" : : "m" (zero)); 241 asm volatile ("frestore %0" : : "m" (zero));
241 } 242 }
@@ -258,6 +259,10 @@ void __init setup_arch(char **cmdline_p)
258 init_mm.end_data = (unsigned long)_edata; 259 init_mm.end_data = (unsigned long)_edata;
259 init_mm.brk = (unsigned long)_end; 260 init_mm.brk = (unsigned long)_end;
260 261
262#if defined(CONFIG_BOOTPARAM)
263 strncpy(m68k_command_line, CONFIG_BOOTPARAM_STRING, CL_SIZE);
264 m68k_command_line[CL_SIZE - 1] = 0;
265#endif /* CONFIG_BOOTPARAM */
261 *cmdline_p = m68k_command_line; 266 *cmdline_p = m68k_command_line;
262 memcpy(boot_command_line, *cmdline_p, CL_SIZE); 267 memcpy(boot_command_line, *cmdline_p, CL_SIZE);
263 268
@@ -323,6 +328,11 @@ void __init setup_arch(char **cmdline_p)
323 config_sun3x(); 328 config_sun3x();
324 break; 329 break;
325#endif 330#endif
331#ifdef CONFIG_COLDFIRE
332 case MACH_M54XX:
333 config_BSP(NULL, 0);
334 break;
335#endif
326 default: 336 default:
327 panic("No configuration setup"); 337 panic("No configuration setup");
328 } 338 }
@@ -384,6 +394,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
384#define LOOP_CYCLES_68030 (8) 394#define LOOP_CYCLES_68030 (8)
385#define LOOP_CYCLES_68040 (3) 395#define LOOP_CYCLES_68040 (3)
386#define LOOP_CYCLES_68060 (1) 396#define LOOP_CYCLES_68060 (1)
397#define LOOP_CYCLES_COLDFIRE (2)
387 398
388 if (CPU_IS_020) { 399 if (CPU_IS_020) {
389 cpu = "68020"; 400 cpu = "68020";
@@ -397,6 +408,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
397 } else if (CPU_IS_060) { 408 } else if (CPU_IS_060) {
398 cpu = "68060"; 409 cpu = "68060";
399 clockfactor = LOOP_CYCLES_68060; 410 clockfactor = LOOP_CYCLES_68060;
411 } else if (CPU_IS_COLDFIRE) {
412 cpu = "ColdFire";
413 clockfactor = LOOP_CYCLES_COLDFIRE;
400 } else { 414 } else {
401 cpu = "680x0"; 415 cpu = "680x0";
402 clockfactor = 0; 416 clockfactor = 0;
@@ -415,6 +429,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
415 fpu = "68060"; 429 fpu = "68060";
416 else if (m68k_fputype & FPU_SUNFPA) 430 else if (m68k_fputype & FPU_SUNFPA)
417 fpu = "Sun FPA"; 431 fpu = "Sun FPA";
432 else if (m68k_fputype & FPU_COLDFIRE)
433 fpu = "ColdFire";
418 else 434 else
419 fpu = "none"; 435 fpu = "none";
420#endif 436#endif
@@ -431,6 +447,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
431 mmu = "Sun-3"; 447 mmu = "Sun-3";
432 else if (m68k_mmutype & MMU_APOLLO) 448 else if (m68k_mmutype & MMU_APOLLO)
433 mmu = "Apollo"; 449 mmu = "Apollo";
450 else if (m68k_mmutype & MMU_COLDFIRE)
451 mmu = "ColdFire";
434 else 452 else
435 mmu = "unknown"; 453 mmu = "unknown";
436 454
diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c
index 2ed8c0fb1517..ca3df0dc7e88 100644
--- a/arch/m68k/kernel/setup_no.c
+++ b/arch/m68k/kernel/setup_no.c
@@ -47,7 +47,6 @@ EXPORT_SYMBOL(memory_end);
47char __initdata command_line[COMMAND_LINE_SIZE]; 47char __initdata command_line[COMMAND_LINE_SIZE];
48 48
49/* machine dependent timer functions */ 49/* machine dependent timer functions */
50void (*mach_gettod)(int*, int*, int*, int*, int*, int*);
51int (*mach_set_clock_mmss)(unsigned long); 50int (*mach_set_clock_mmss)(unsigned long);
52 51
53/* machine dependent reboot functions */ 52/* machine dependent reboot functions */
diff --git a/arch/m68k/kernel/signal_mm.c b/arch/m68k/kernel/signal_mm.c
index a0afc239304e..cb856f9da655 100644
--- a/arch/m68k/kernel/signal_mm.c
+++ b/arch/m68k/kernel/signal_mm.c
@@ -56,7 +56,11 @@ static const int frame_extra_sizes[16] = {
56 [1] = -1, /* sizeof(((struct frame *)0)->un.fmt1), */ 56 [1] = -1, /* sizeof(((struct frame *)0)->un.fmt1), */
57 [2] = sizeof(((struct frame *)0)->un.fmt2), 57 [2] = sizeof(((struct frame *)0)->un.fmt2),
58 [3] = sizeof(((struct frame *)0)->un.fmt3), 58 [3] = sizeof(((struct frame *)0)->un.fmt3),
59#ifdef CONFIG_COLDFIRE
60 [4] = 0,
61#else
59 [4] = sizeof(((struct frame *)0)->un.fmt4), 62 [4] = sizeof(((struct frame *)0)->un.fmt4),
63#endif
60 [5] = -1, /* sizeof(((struct frame *)0)->un.fmt5), */ 64 [5] = -1, /* sizeof(((struct frame *)0)->un.fmt5), */
61 [6] = -1, /* sizeof(((struct frame *)0)->un.fmt6), */ 65 [6] = -1, /* sizeof(((struct frame *)0)->un.fmt6), */
62 [7] = sizeof(((struct frame *)0)->un.fmt7), 66 [7] = sizeof(((struct frame *)0)->un.fmt7),
@@ -84,7 +88,11 @@ int handle_kernel_fault(struct pt_regs *regs)
84 regs->stkadj = frame_extra_sizes[regs->format]; 88 regs->stkadj = frame_extra_sizes[regs->format];
85 tregs = (struct pt_regs *)((long)regs + regs->stkadj); 89 tregs = (struct pt_regs *)((long)regs + regs->stkadj);
86 tregs->vector = regs->vector; 90 tregs->vector = regs->vector;
91#ifdef CONFIG_COLDFIRE
92 tregs->format = 4;
93#else
87 tregs->format = 0; 94 tregs->format = 0;
95#endif
88 tregs->pc = fixup->fixup; 96 tregs->pc = fixup->fixup;
89 tregs->sr = regs->sr; 97 tregs->sr = regs->sr;
90 98
@@ -195,7 +203,8 @@ static inline int restore_fpu_state(struct sigcontext *sc)
195 203
196 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) { 204 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
197 /* Verify the frame format. */ 205 /* Verify the frame format. */
198 if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version)) 206 if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &&
207 (sc->sc_fpstate[0] != fpu_version))
199 goto out; 208 goto out;
200 if (CPU_IS_020_OR_030) { 209 if (CPU_IS_020_OR_030) {
201 if (m68k_fputype & FPU_68881 && 210 if (m68k_fputype & FPU_68881 &&
@@ -214,19 +223,43 @@ static inline int restore_fpu_state(struct sigcontext *sc)
214 sc->sc_fpstate[3] == 0x60 || 223 sc->sc_fpstate[3] == 0x60 ||
215 sc->sc_fpstate[3] == 0xe0)) 224 sc->sc_fpstate[3] == 0xe0))
216 goto out; 225 goto out;
226 } else if (CPU_IS_COLDFIRE) {
227 if (!(sc->sc_fpstate[0] == 0x00 ||
228 sc->sc_fpstate[0] == 0x05 ||
229 sc->sc_fpstate[0] == 0xe5))
230 goto out;
217 } else 231 } else
218 goto out; 232 goto out;
219 233
220 __asm__ volatile (".chip 68k/68881\n\t" 234 if (CPU_IS_COLDFIRE) {
221 "fmovemx %0,%%fp0-%%fp1\n\t" 235 __asm__ volatile ("fmovemd %0,%%fp0-%%fp1\n\t"
222 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t" 236 "fmovel %1,%%fpcr\n\t"
223 ".chip 68k" 237 "fmovel %2,%%fpsr\n\t"
224 : /* no outputs */ 238 "fmovel %3,%%fpiar"
225 : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl)); 239 : /* no outputs */
240 : "m" (sc->sc_fpregs[0]),
241 "m" (sc->sc_fpcntl[0]),
242 "m" (sc->sc_fpcntl[1]),
243 "m" (sc->sc_fpcntl[2]));
244 } else {
245 __asm__ volatile (".chip 68k/68881\n\t"
246 "fmovemx %0,%%fp0-%%fp1\n\t"
247 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
248 ".chip 68k"
249 : /* no outputs */
250 : "m" (*sc->sc_fpregs),
251 "m" (*sc->sc_fpcntl));
252 }
253 }
254
255 if (CPU_IS_COLDFIRE) {
256 __asm__ volatile ("frestore %0" : : "m" (*sc->sc_fpstate));
257 } else {
258 __asm__ volatile (".chip 68k/68881\n\t"
259 "frestore %0\n\t"
260 ".chip 68k"
261 : : "m" (*sc->sc_fpstate));
226 } 262 }
227 __asm__ volatile (".chip 68k/68881\n\t"
228 "frestore %0\n\t"
229 ".chip 68k" : : "m" (*sc->sc_fpstate));
230 err = 0; 263 err = 0;
231 264
232out: 265out:
@@ -241,7 +274,7 @@ out:
241static inline int rt_restore_fpu_state(struct ucontext __user *uc) 274static inline int rt_restore_fpu_state(struct ucontext __user *uc)
242{ 275{
243 unsigned char fpstate[FPCONTEXT_SIZE]; 276 unsigned char fpstate[FPCONTEXT_SIZE];
244 int context_size = CPU_IS_060 ? 8 : 0; 277 int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);
245 fpregset_t fpregs; 278 fpregset_t fpregs;
246 int err = 1; 279 int err = 1;
247 280
@@ -260,10 +293,11 @@ static inline int rt_restore_fpu_state(struct ucontext __user *uc)
260 if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate)) 293 if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
261 goto out; 294 goto out;
262 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) { 295 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
263 if (!CPU_IS_060) 296 if (!(CPU_IS_060 || CPU_IS_COLDFIRE))
264 context_size = fpstate[1]; 297 context_size = fpstate[1];
265 /* Verify the frame format. */ 298 /* Verify the frame format. */
266 if (!CPU_IS_060 && (fpstate[0] != fpu_version)) 299 if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &&
300 (fpstate[0] != fpu_version))
267 goto out; 301 goto out;
268 if (CPU_IS_020_OR_030) { 302 if (CPU_IS_020_OR_030) {
269 if (m68k_fputype & FPU_68881 && 303 if (m68k_fputype & FPU_68881 &&
@@ -282,26 +316,50 @@ static inline int rt_restore_fpu_state(struct ucontext __user *uc)
282 fpstate[3] == 0x60 || 316 fpstate[3] == 0x60 ||
283 fpstate[3] == 0xe0)) 317 fpstate[3] == 0xe0))
284 goto out; 318 goto out;
319 } else if (CPU_IS_COLDFIRE) {
320 if (!(fpstate[3] == 0x00 ||
321 fpstate[3] == 0x05 ||
322 fpstate[3] == 0xe5))
323 goto out;
285 } else 324 } else
286 goto out; 325 goto out;
287 if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs, 326 if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
288 sizeof(fpregs))) 327 sizeof(fpregs)))
289 goto out; 328 goto out;
290 __asm__ volatile (".chip 68k/68881\n\t" 329
291 "fmovemx %0,%%fp0-%%fp7\n\t" 330 if (CPU_IS_COLDFIRE) {
292 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t" 331 __asm__ volatile ("fmovemd %0,%%fp0-%%fp7\n\t"
293 ".chip 68k" 332 "fmovel %1,%%fpcr\n\t"
294 : /* no outputs */ 333 "fmovel %2,%%fpsr\n\t"
295 : "m" (*fpregs.f_fpregs), 334 "fmovel %3,%%fpiar"
296 "m" (*fpregs.f_fpcntl)); 335 : /* no outputs */
336 : "m" (fpregs.f_fpregs[0]),
337 "m" (fpregs.f_fpcntl[0]),
338 "m" (fpregs.f_fpcntl[1]),
339 "m" (fpregs.f_fpcntl[2]));
340 } else {
341 __asm__ volatile (".chip 68k/68881\n\t"
342 "fmovemx %0,%%fp0-%%fp7\n\t"
343 "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
344 ".chip 68k"
345 : /* no outputs */
346 : "m" (*fpregs.f_fpregs),
347 "m" (*fpregs.f_fpcntl));
348 }
297 } 349 }
298 if (context_size && 350 if (context_size &&
299 __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1, 351 __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
300 context_size)) 352 context_size))
301 goto out; 353 goto out;
302 __asm__ volatile (".chip 68k/68881\n\t" 354
303 "frestore %0\n\t" 355 if (CPU_IS_COLDFIRE) {
304 ".chip 68k" : : "m" (*fpstate)); 356 __asm__ volatile ("frestore %0" : : "m" (*fpstate));
357 } else {
358 __asm__ volatile (".chip 68k/68881\n\t"
359 "frestore %0\n\t"
360 ".chip 68k"
361 : : "m" (*fpstate));
362 }
305 err = 0; 363 err = 0;
306 364
307out: 365out:
@@ -336,8 +394,12 @@ static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
336 regs->format = formatvec >> 12; 394 regs->format = formatvec >> 12;
337 regs->vector = formatvec & 0xfff; 395 regs->vector = formatvec & 0xfff;
338#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack)) 396#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
339 __asm__ __volatile__ 397 __asm__ __volatile__ (
340 (" movel %0,%/a0\n\t" 398#ifdef CONFIG_COLDFIRE
399 " movel %0,%/sp\n\t"
400 " bra ret_from_signal\n"
401#else
402 " movel %0,%/a0\n\t"
341 " subl %1,%/a0\n\t" /* make room on stack */ 403 " subl %1,%/a0\n\t" /* make room on stack */
342 " movel %/a0,%/sp\n\t" /* set stack pointer */ 404 " movel %/a0,%/sp\n\t" /* set stack pointer */
343 /* move switch_stack and pt_regs */ 405 /* move switch_stack and pt_regs */
@@ -350,6 +412,7 @@ static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
350 "2: movel %4@+,%/a0@+\n\t" 412 "2: movel %4@+,%/a0@+\n\t"
351 " dbra %1,2b\n\t" 413 " dbra %1,2b\n\t"
352 " bral ret_from_signal\n" 414 " bral ret_from_signal\n"
415#endif
353 : /* no outputs, it doesn't ever return */ 416 : /* no outputs, it doesn't ever return */
354 : "a" (sw), "d" (fsize), "d" (frame_offset/4-1), 417 : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
355 "n" (frame_offset), "a" (buf + fsize/4) 418 "n" (frame_offset), "a" (buf + fsize/4)
@@ -516,10 +579,15 @@ static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
516 return; 579 return;
517 } 580 }
518 581
519 __asm__ volatile (".chip 68k/68881\n\t" 582 if (CPU_IS_COLDFIRE) {
520 "fsave %0\n\t" 583 __asm__ volatile ("fsave %0"
521 ".chip 68k" 584 : : "m" (*sc->sc_fpstate) : "memory");
522 : : "m" (*sc->sc_fpstate) : "memory"); 585 } else {
586 __asm__ volatile (".chip 68k/68881\n\t"
587 "fsave %0\n\t"
588 ".chip 68k"
589 : : "m" (*sc->sc_fpstate) : "memory");
590 }
523 591
524 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) { 592 if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
525 fpu_version = sc->sc_fpstate[0]; 593 fpu_version = sc->sc_fpstate[0];
@@ -530,21 +598,35 @@ static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
530 if (*(unsigned short *) sc->sc_fpstate == 0x1f38) 598 if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
531 sc->sc_fpstate[0x38] |= 1 << 3; 599 sc->sc_fpstate[0x38] |= 1 << 3;
532 } 600 }
533 __asm__ volatile (".chip 68k/68881\n\t" 601
534 "fmovemx %%fp0-%%fp1,%0\n\t" 602 if (CPU_IS_COLDFIRE) {
535 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t" 603 __asm__ volatile ("fmovemd %%fp0-%%fp1,%0\n\t"
536 ".chip 68k" 604 "fmovel %%fpcr,%1\n\t"
537 : "=m" (*sc->sc_fpregs), 605 "fmovel %%fpsr,%2\n\t"
538 "=m" (*sc->sc_fpcntl) 606 "fmovel %%fpiar,%3"
539 : /* no inputs */ 607 : "=m" (sc->sc_fpregs[0]),
540 : "memory"); 608 "=m" (sc->sc_fpcntl[0]),
609 "=m" (sc->sc_fpcntl[1]),
610 "=m" (sc->sc_fpcntl[2])
611 : /* no inputs */
612 : "memory");
613 } else {
614 __asm__ volatile (".chip 68k/68881\n\t"
615 "fmovemx %%fp0-%%fp1,%0\n\t"
616 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
617 ".chip 68k"
618 : "=m" (*sc->sc_fpregs),
619 "=m" (*sc->sc_fpcntl)
620 : /* no inputs */
621 : "memory");
622 }
541 } 623 }
542} 624}
543 625
544static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs) 626static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
545{ 627{
546 unsigned char fpstate[FPCONTEXT_SIZE]; 628 unsigned char fpstate[FPCONTEXT_SIZE];
547 int context_size = CPU_IS_060 ? 8 : 0; 629 int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);
548 int err = 0; 630 int err = 0;
549 631
550 if (FPU_IS_EMU) { 632 if (FPU_IS_EMU) {
@@ -557,15 +639,19 @@ static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *
557 return err; 639 return err;
558 } 640 }
559 641
560 __asm__ volatile (".chip 68k/68881\n\t" 642 if (CPU_IS_COLDFIRE) {
561 "fsave %0\n\t" 643 __asm__ volatile ("fsave %0" : : "m" (*fpstate) : "memory");
562 ".chip 68k" 644 } else {
563 : : "m" (*fpstate) : "memory"); 645 __asm__ volatile (".chip 68k/68881\n\t"
646 "fsave %0\n\t"
647 ".chip 68k"
648 : : "m" (*fpstate) : "memory");
649 }
564 650
565 err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate); 651 err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
566 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) { 652 if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
567 fpregset_t fpregs; 653 fpregset_t fpregs;
568 if (!CPU_IS_060) 654 if (!(CPU_IS_060 || CPU_IS_COLDFIRE))
569 context_size = fpstate[1]; 655 context_size = fpstate[1];
570 fpu_version = fpstate[0]; 656 fpu_version = fpstate[0];
571 if (CPU_IS_020_OR_030 && 657 if (CPU_IS_020_OR_030 &&
@@ -575,14 +661,27 @@ static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *
575 if (*(unsigned short *) fpstate == 0x1f38) 661 if (*(unsigned short *) fpstate == 0x1f38)
576 fpstate[0x38] |= 1 << 3; 662 fpstate[0x38] |= 1 << 3;
577 } 663 }
578 __asm__ volatile (".chip 68k/68881\n\t" 664 if (CPU_IS_COLDFIRE) {
579 "fmovemx %%fp0-%%fp7,%0\n\t" 665 __asm__ volatile ("fmovemd %%fp0-%%fp7,%0\n\t"
580 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t" 666 "fmovel %%fpcr,%1\n\t"
581 ".chip 68k" 667 "fmovel %%fpsr,%2\n\t"
582 : "=m" (*fpregs.f_fpregs), 668 "fmovel %%fpiar,%3"
583 "=m" (*fpregs.f_fpcntl) 669 : "=m" (fpregs.f_fpregs[0]),
584 : /* no inputs */ 670 "=m" (fpregs.f_fpcntl[0]),
585 : "memory"); 671 "=m" (fpregs.f_fpcntl[1]),
672 "=m" (fpregs.f_fpcntl[2])
673 : /* no inputs */
674 : "memory");
675 } else {
676 __asm__ volatile (".chip 68k/68881\n\t"
677 "fmovemx %%fp0-%%fp7,%0\n\t"
678 "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
679 ".chip 68k"
680 : "=m" (*fpregs.f_fpregs),
681 "=m" (*fpregs.f_fpcntl)
682 : /* no inputs */
683 : "memory");
684 }
586 err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs, 685 err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
587 sizeof(fpregs)); 686 sizeof(fpregs));
588 } 687 }
@@ -679,8 +778,7 @@ static inline void push_cache (unsigned long vaddr)
679 "cpushl %%bc,(%0)\n\t" 778 "cpushl %%bc,(%0)\n\t"
680 ".chip 68k" 779 ".chip 68k"
681 : : "a" (temp)); 780 : : "a" (temp));
682 } 781 } else if (!CPU_IS_COLDFIRE) {
683 else {
684 /* 782 /*
685 * 68030/68020 have no writeback cache; 783 * 68030/68020 have no writeback cache;
686 * still need to clear icache. 784 * still need to clear icache.
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index c468f2edaa85..ce827b376110 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -365,4 +365,6 @@ ENTRY(sys_call_table)
365 .long sys_clock_adjtime 365 .long sys_clock_adjtime
366 .long sys_syncfs 366 .long sys_syncfs
367 .long sys_setns 367 .long sys_setns
368 .long sys_process_vm_readv /* 345 */
369 .long sys_process_vm_writev
368 370
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index a5cf40c26de5..75ab79b3bdeb 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -1,4 +1,4 @@
1#ifdef CONFIG_MMU 1#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
2#include "time_mm.c" 2#include "time_mm.c"
3#else 3#else
4#include "time_no.c" 4#include "time_no.c"
diff --git a/arch/m68k/kernel/time_no.c b/arch/m68k/kernel/time_no.c
index 6623909f70e6..3ef0f7768dcd 100644
--- a/arch/m68k/kernel/time_no.c
+++ b/arch/m68k/kernel/time_no.c
@@ -26,6 +26,9 @@
26 26
27#define TICK_SIZE (tick_nsec / 1000) 27#define TICK_SIZE (tick_nsec / 1000)
28 28
29/* machine dependent timer functions */
30void (*mach_gettod)(int*, int*, int*, int*, int*, int*);
31
29static inline int set_rtc_mmss(unsigned long nowtime) 32static inline int set_rtc_mmss(unsigned long nowtime)
30{ 33{
31 if (mach_set_clock_mmss) 34 if (mach_set_clock_mmss)
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index 89362f2bb56a..daaa9187654c 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -552,13 +552,13 @@ static inline void bus_error030 (struct frame *fp)
552 552
553#ifdef DEBUG 553#ifdef DEBUG
554 asm volatile ("ptestr %3,%2@,#7,%0\n\t" 554 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
555 "pmove %%psr,%1@" 555 "pmove %%psr,%1"
556 : "=a&" (desc) 556 : "=a&" (desc), "=m" (temp)
557 : "a" (&temp), "a" (addr), "d" (ssw)); 557 : "a" (addr), "d" (ssw));
558#else 558#else
559 asm volatile ("ptestr %2,%1@,#7\n\t" 559 asm volatile ("ptestr %2,%1@,#7\n\t"
560 "pmove %%psr,%0@" 560 "pmove %%psr,%0"
561 : : "a" (&temp), "a" (addr), "d" (ssw)); 561 : "=m" (temp) : "a" (addr), "d" (ssw));
562#endif 562#endif
563 mmusr = temp; 563 mmusr = temp;
564 564
@@ -605,20 +605,18 @@ static inline void bus_error030 (struct frame *fp)
605 !(ssw & RW) ? "write" : "read", addr, 605 !(ssw & RW) ? "write" : "read", addr,
606 fp->ptregs.pc, ssw); 606 fp->ptregs.pc, ssw);
607 asm volatile ("ptestr #1,%1@,#0\n\t" 607 asm volatile ("ptestr #1,%1@,#0\n\t"
608 "pmove %%psr,%0@" 608 "pmove %%psr,%0"
609 : /* no outputs */ 609 : "=m" (temp)
610 : "a" (&temp), "a" (addr)); 610 : "a" (addr));
611 mmusr = temp; 611 mmusr = temp;
612 612
613 printk ("level 0 mmusr is %#x\n", mmusr); 613 printk ("level 0 mmusr is %#x\n", mmusr);
614#if 0 614#if 0
615 asm volatile ("pmove %%tt0,%0@" 615 asm volatile ("pmove %%tt0,%0"
616 : /* no outputs */ 616 : "=m" (tlong));
617 : "a" (&tlong));
618 printk("tt0 is %#lx, ", tlong); 617 printk("tt0 is %#lx, ", tlong);
619 asm volatile ("pmove %%tt1,%0@" 618 asm volatile ("pmove %%tt1,%0"
620 : /* no outputs */ 619 : "=m" (tlong));
621 : "a" (&tlong));
622 printk("tt1 is %#lx\n", tlong); 620 printk("tt1 is %#lx\n", tlong);
623#endif 621#endif
624#ifdef DEBUG 622#ifdef DEBUG
@@ -668,13 +666,13 @@ static inline void bus_error030 (struct frame *fp)
668 666
669#ifdef DEBUG 667#ifdef DEBUG
670 asm volatile ("ptestr #1,%2@,#7,%0\n\t" 668 asm volatile ("ptestr #1,%2@,#7,%0\n\t"
671 "pmove %%psr,%1@" 669 "pmove %%psr,%1"
672 : "=a&" (desc) 670 : "=a&" (desc), "=m" (temp)
673 : "a" (&temp), "a" (addr)); 671 : "a" (addr));
674#else 672#else
675 asm volatile ("ptestr #1,%1@,#7\n\t" 673 asm volatile ("ptestr #1,%1@,#7\n\t"
676 "pmove %%psr,%0@" 674 "pmove %%psr,%0"
677 : : "a" (&temp), "a" (addr)); 675 : "=m" (temp) : "a" (addr));
678#endif 676#endif
679 mmusr = temp; 677 mmusr = temp;
680 678
@@ -706,6 +704,88 @@ create_atc_entry:
706#endif /* CPU_M68020_OR_M68030 */ 704#endif /* CPU_M68020_OR_M68030 */
707#endif /* !CONFIG_SUN3 */ 705#endif /* !CONFIG_SUN3 */
708 706
707#if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
708#include <asm/mcfmmu.h>
709
710/*
711 * The following table converts the FS encoding of a ColdFire
712 * exception stack frame into the error_code value needed by
713 * do_fault.
714*/
715static const unsigned char fs_err_code[] = {
716 0, /* 0000 */
717 0, /* 0001 */
718 0, /* 0010 */
719 0, /* 0011 */
720 1, /* 0100 */
721 0, /* 0101 */
722 0, /* 0110 */
723 0, /* 0111 */
724 2, /* 1000 */
725 3, /* 1001 */
726 2, /* 1010 */
727 0, /* 1011 */
728 1, /* 1100 */
729 1, /* 1101 */
730 0, /* 1110 */
731 0 /* 1111 */
732};
733
734static inline void access_errorcf(unsigned int fs, struct frame *fp)
735{
736 unsigned long mmusr, addr;
737 unsigned int err_code;
738 int need_page_fault;
739
740 mmusr = mmu_read(MMUSR);
741 addr = mmu_read(MMUAR);
742
743 /*
744 * error_code:
745 * bit 0 == 0 means no page found, 1 means protection fault
746 * bit 1 == 0 means read, 1 means write
747 */
748 switch (fs) {
749 case 5: /* 0101 TLB opword X miss */
750 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0);
751 addr = fp->ptregs.pc;
752 break;
753 case 6: /* 0110 TLB extension word X miss */
754 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1);
755 addr = fp->ptregs.pc + sizeof(long);
756 break;
757 case 10: /* 1010 TLB W miss */
758 need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0);
759 break;
760 case 14: /* 1110 TLB R miss */
761 need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0);
762 break;
763 default:
764 /* 0000 Normal */
765 /* 0001 Reserved */
766 /* 0010 Interrupt during debug service routine */
767 /* 0011 Reserved */
768 /* 0100 X Protection */
769 /* 0111 IFP in emulator mode */
770 /* 1000 W Protection*/
771 /* 1001 Write error*/
772 /* 1011 Reserved*/
773 /* 1100 R Protection*/
774 /* 1101 R Protection*/
775 /* 1111 OEP in emulator mode*/
776 need_page_fault = 1;
777 break;
778 }
779
780 if (need_page_fault) {
781 err_code = fs_err_code[fs];
782 if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */
783 err_code |= 2; /* bit1 - write, bit0 - protection */
784 do_page_fault(&fp->ptregs, addr, err_code);
785 }
786}
787#endif /* CONFIG_COLDFIRE CONFIG_MMU */
788
709asmlinkage void buserr_c(struct frame *fp) 789asmlinkage void buserr_c(struct frame *fp)
710{ 790{
711 /* Only set esp0 if coming from user mode */ 791 /* Only set esp0 if coming from user mode */
@@ -716,6 +796,28 @@ asmlinkage void buserr_c(struct frame *fp)
716 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format); 796 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
717#endif 797#endif
718 798
799#if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
800 if (CPU_IS_COLDFIRE) {
801 unsigned int fs;
802 fs = (fp->ptregs.vector & 0x3) |
803 ((fp->ptregs.vector & 0xc00) >> 8);
804 switch (fs) {
805 case 0x5:
806 case 0x6:
807 case 0x7:
808 case 0x9:
809 case 0xa:
810 case 0xd:
811 case 0xe:
812 case 0xf:
813 access_errorcf(fs, fp);
814 return;
815 default:
816 break;
817 }
818 }
819#endif /* CONFIG_COLDFIRE && CONFIG_MMU */
820
719 switch (fp->ptregs.format) { 821 switch (fp->ptregs.format) {
720#if defined (CONFIG_M68060) 822#if defined (CONFIG_M68060)
721 case 4: /* 68060 access error */ 823 case 4: /* 68060 access error */
diff --git a/arch/m68k/kernel/vmlinux.lds_no.S b/arch/m68k/kernel/vmlinux-nommu.lds
index 4e2389340837..8e66ccb0935e 100644
--- a/arch/m68k/kernel/vmlinux.lds_no.S
+++ b/arch/m68k/kernel/vmlinux-nommu.lds
@@ -69,6 +69,7 @@ SECTIONS {
69 SCHED_TEXT 69 SCHED_TEXT
70 LOCK_TEXT 70 LOCK_TEXT
71 *(.text..lock) 71 *(.text..lock)
72 *(.fixup)
72 73
73 . = ALIGN(16); /* Exception table */ 74 . = ALIGN(16); /* Exception table */
74 __start___ex_table = .; 75 __start___ex_table = .;
@@ -161,6 +162,13 @@ SECTIONS {
161 _edata = . ; 162 _edata = . ;
162 } > DATA 163 } > DATA
163 164
165 .m68k_fixup : {
166 __start_fixup = .;
167 *(.m68k_fixup)
168 __stop_fixup = .;
169 } > DATA
170 NOTES > DATA
171
164 .init.text : { 172 .init.text : {
165 . = ALIGN(PAGE_SIZE); 173 . = ALIGN(PAGE_SIZE);
166 __init_begin = .; 174 __init_begin = .;
diff --git a/arch/m68k/kernel/vmlinux-std.lds b/arch/m68k/kernel/vmlinux-std.lds
index d0993594f558..63407c836826 100644
--- a/arch/m68k/kernel/vmlinux-std.lds
+++ b/arch/m68k/kernel/vmlinux-std.lds
@@ -31,7 +31,9 @@ SECTIONS
31 31
32 RW_DATA_SECTION(16, PAGE_SIZE, THREAD_SIZE) 32 RW_DATA_SECTION(16, PAGE_SIZE, THREAD_SIZE)
33 33
34 _sbss = .;
34 BSS_SECTION(0, 0, 0) 35 BSS_SECTION(0, 0, 0)
36 _ebss = .;
35 37
36 _edata = .; /* End of data section */ 38 _edata = .; /* End of data section */
37 39
diff --git a/arch/m68k/kernel/vmlinux-sun3.lds b/arch/m68k/kernel/vmlinux-sun3.lds
index 8080469ee6c1..ad0f46d64c0b 100644
--- a/arch/m68k/kernel/vmlinux-sun3.lds
+++ b/arch/m68k/kernel/vmlinux-sun3.lds
@@ -44,7 +44,9 @@ __init_begin = .;
44 . = ALIGN(PAGE_SIZE); 44 . = ALIGN(PAGE_SIZE);
45 __init_end = .; 45 __init_end = .;
46 46
47 _sbss = .;
47 BSS_SECTION(0, 0, 0) 48 BSS_SECTION(0, 0, 0)
49 _ebss = .;
48 50
49 _end = . ; 51 _end = . ;
50 52
diff --git a/arch/m68k/kernel/vmlinux.lds.S b/arch/m68k/kernel/vmlinux.lds.S
index 030dabf0bc53..69ec79638870 100644
--- a/arch/m68k/kernel/vmlinux.lds.S
+++ b/arch/m68k/kernel/vmlinux.lds.S
@@ -1,5 +1,14 @@
1#ifdef CONFIG_MMU 1#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
2#include "vmlinux.lds_mm.S" 2PHDRS
3{
4 text PT_LOAD FILEHDR PHDRS FLAGS (7);
5 data PT_LOAD FLAGS (7);
6}
7#ifdef CONFIG_SUN3
8#include "vmlinux-sun3.lds"
3#else 9#else
4#include "vmlinux.lds_no.S" 10#include "vmlinux-std.lds"
11#endif
12#else
13#include "vmlinux-nommu.lds"
5#endif 14#endif
diff --git a/arch/m68k/kernel/vmlinux.lds_mm.S b/arch/m68k/kernel/vmlinux.lds_mm.S
deleted file mode 100644
index 99ba315bd0a8..000000000000
--- a/arch/m68k/kernel/vmlinux.lds_mm.S
+++ /dev/null
@@ -1,10 +0,0 @@
1PHDRS
2{
3 text PT_LOAD FILEHDR PHDRS FLAGS (7);
4 data PT_LOAD FLAGS (7);
5}
6#ifdef CONFIG_SUN3
7#include "vmlinux-sun3.lds"
8#else
9#include "vmlinux-std.lds"
10#endif
diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile
index 1a1bd9067e90..a9d782d34276 100644
--- a/arch/m68k/lib/Makefile
+++ b/arch/m68k/lib/Makefile
@@ -6,9 +6,11 @@
6lib-y := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ 6lib-y := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
7 memcpy.o memset.o memmove.o 7 memcpy.o memset.o memmove.o
8 8
9ifdef CONFIG_MMU 9lib-$(CONFIG_MMU) += string.o uaccess.o
10lib-y += string.o uaccess.o checksum_mm.o 10lib-$(CONFIG_CPU_HAS_NO_MULDIV64) += mulsi3.o divsi3.o udivsi3.o
11else 11lib-$(CONFIG_CPU_HAS_NO_MULDIV64) += modsi3.o umodsi3.o
12lib-y += mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o checksum_no.o 12
13ifndef CONFIG_GENERIC_CSUM
14lib-y += checksum.o
13endif 15endif
14 16
diff --git a/arch/m68k/lib/checksum_mm.c b/arch/m68k/lib/checksum.c
index 6216f12a756b..6216f12a756b 100644
--- a/arch/m68k/lib/checksum_mm.c
+++ b/arch/m68k/lib/checksum.c
diff --git a/arch/m68k/lib/checksum_no.c b/arch/m68k/lib/checksum_no.c
deleted file mode 100644
index e4c6354da765..000000000000
--- a/arch/m68k/lib/checksum_no.c
+++ /dev/null
@@ -1,156 +0,0 @@
1/*
2 * INET An implementation of the TCP/IP protocol suite for the LINUX
3 * operating system. INET is implemented using the BSD Socket
4 * interface as the means of communication with the user level.
5 *
6 * IP/TCP/UDP checksumming routines
7 *
8 * Authors: Jorge Cwik, <jorge@laser.satlink.net>
9 * Arnt Gulbrandsen, <agulbra@nvg.unit.no>
10 * Tom May, <ftom@netcom.com>
11 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
12 * Lots of code moved from tcp.c and ip.c; see those files
13 * for more names.
14 *
15 * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek:
16 * Fixed some nasty bugs, causing some horrible crashes.
17 * A: At some points, the sum (%0) was used as
18 * length-counter instead of the length counter
19 * (%1). Thanks to Roman Hodek for pointing this out.
20 * B: GCC seems to mess up if one uses too many
21 * data-registers to hold input values and one tries to
22 * specify d0 and d1 as scratch registers. Letting gcc choose these
23 * registers itself solves the problem.
24 *
25 * This program is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU General Public License
27 * as published by the Free Software Foundation; either version
28 * 2 of the License, or (at your option) any later version.
29 */
30
31/* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access kills, so most
32 of the assembly has to go. */
33
34#include <linux/module.h>
35#include <net/checksum.h>
36
37static inline unsigned short from32to16(unsigned long x)
38{
39 /* add up 16-bit and 16-bit for 16+c bit */
40 x = (x & 0xffff) + (x >> 16);
41 /* add up carry.. */
42 x = (x & 0xffff) + (x >> 16);
43 return x;
44}
45
46static unsigned long do_csum(const unsigned char * buff, int len)
47{
48 int odd, count;
49 unsigned long result = 0;
50
51 if (len <= 0)
52 goto out;
53 odd = 1 & (unsigned long) buff;
54 if (odd) {
55 result = *buff;
56 len--;
57 buff++;
58 }
59 count = len >> 1; /* nr of 16-bit words.. */
60 if (count) {
61 if (2 & (unsigned long) buff) {
62 result += *(unsigned short *) buff;
63 count--;
64 len -= 2;
65 buff += 2;
66 }
67 count >>= 1; /* nr of 32-bit words.. */
68 if (count) {
69 unsigned long carry = 0;
70 do {
71 unsigned long w = *(unsigned long *) buff;
72 count--;
73 buff += 4;
74 result += carry;
75 result += w;
76 carry = (w > result);
77 } while (count);
78 result += carry;
79 result = (result & 0xffff) + (result >> 16);
80 }
81 if (len & 2) {
82 result += *(unsigned short *) buff;
83 buff += 2;
84 }
85 }
86 if (len & 1)
87 result += (*buff << 8);
88 result = from32to16(result);
89 if (odd)
90 result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
91out:
92 return result;
93}
94
95#ifdef CONFIG_COLDFIRE
96/*
97 * This is a version of ip_compute_csum() optimized for IP headers,
98 * which always checksum on 4 octet boundaries.
99 */
100__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
101{
102 return (__force __sum16)~do_csum(iph,ihl*4);
103}
104EXPORT_SYMBOL(ip_fast_csum);
105#endif
106
107/*
108 * computes the checksum of a memory block at buff, length len,
109 * and adds in "sum" (32-bit)
110 *
111 * returns a 32-bit number suitable for feeding into itself
112 * or csum_tcpudp_magic
113 *
114 * this function must be called with even lengths, except
115 * for the last fragment, which may be odd
116 *
117 * it's best to have buff aligned on a 32-bit boundary
118 */
119__wsum csum_partial(const void *buff, int len, __wsum sum)
120{
121 unsigned int result = do_csum(buff, len);
122
123 /* add in old sum, and carry.. */
124 result += (__force u32)sum;
125 if ((__force u32)sum > result)
126 result += 1;
127 return (__force __wsum)result;
128}
129
130EXPORT_SYMBOL(csum_partial);
131
132/*
133 * copy from fs while checksumming, otherwise like csum_partial
134 */
135
136__wsum
137csum_partial_copy_from_user(const void __user *src, void *dst,
138 int len, __wsum sum, int *csum_err)
139{
140 if (csum_err) *csum_err = 0;
141 memcpy(dst, (__force const void *)src, len);
142 return csum_partial(dst, len, sum);
143}
144EXPORT_SYMBOL(csum_partial_copy_from_user);
145
146/*
147 * copy from ds while checksumming, otherwise like csum_partial
148 */
149
150__wsum
151csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
152{
153 memcpy(dst, src, len);
154 return csum_partial(dst, len, sum);
155}
156EXPORT_SYMBOL(csum_partial_copy_nocheck);
diff --git a/arch/m68k/lib/uaccess.c b/arch/m68k/lib/uaccess.c
index 13854ed8cd9a..5664386338da 100644
--- a/arch/m68k/lib/uaccess.c
+++ b/arch/m68k/lib/uaccess.c
@@ -15,17 +15,17 @@ unsigned long __generic_copy_from_user(void *to, const void __user *from,
15 asm volatile ("\n" 15 asm volatile ("\n"
16 " tst.l %0\n" 16 " tst.l %0\n"
17 " jeq 2f\n" 17 " jeq 2f\n"
18 "1: moves.l (%1)+,%3\n" 18 "1: "MOVES".l (%1)+,%3\n"
19 " move.l %3,(%2)+\n" 19 " move.l %3,(%2)+\n"
20 " subq.l #1,%0\n" 20 " subq.l #1,%0\n"
21 " jne 1b\n" 21 " jne 1b\n"
22 "2: btst #1,%5\n" 22 "2: btst #1,%5\n"
23 " jeq 4f\n" 23 " jeq 4f\n"
24 "3: moves.w (%1)+,%3\n" 24 "3: "MOVES".w (%1)+,%3\n"
25 " move.w %3,(%2)+\n" 25 " move.w %3,(%2)+\n"
26 "4: btst #0,%5\n" 26 "4: btst #0,%5\n"
27 " jeq 6f\n" 27 " jeq 6f\n"
28 "5: moves.b (%1)+,%3\n" 28 "5: "MOVES".b (%1)+,%3\n"
29 " move.b %3,(%2)+\n" 29 " move.b %3,(%2)+\n"
30 "6:\n" 30 "6:\n"
31 " .section .fixup,\"ax\"\n" 31 " .section .fixup,\"ax\"\n"
@@ -68,17 +68,17 @@ unsigned long __generic_copy_to_user(void __user *to, const void *from,
68 " tst.l %0\n" 68 " tst.l %0\n"
69 " jeq 4f\n" 69 " jeq 4f\n"
70 "1: move.l (%1)+,%3\n" 70 "1: move.l (%1)+,%3\n"
71 "2: moves.l %3,(%2)+\n" 71 "2: "MOVES".l %3,(%2)+\n"
72 "3: subq.l #1,%0\n" 72 "3: subq.l #1,%0\n"
73 " jne 1b\n" 73 " jne 1b\n"
74 "4: btst #1,%5\n" 74 "4: btst #1,%5\n"
75 " jeq 6f\n" 75 " jeq 6f\n"
76 " move.w (%1)+,%3\n" 76 " move.w (%1)+,%3\n"
77 "5: moves.w %3,(%2)+\n" 77 "5: "MOVES".w %3,(%2)+\n"
78 "6: btst #0,%5\n" 78 "6: btst #0,%5\n"
79 " jeq 8f\n" 79 " jeq 8f\n"
80 " move.b (%1)+,%3\n" 80 " move.b (%1)+,%3\n"
81 "7: moves.b %3,(%2)+\n" 81 "7: "MOVES".b %3,(%2)+\n"
82 "8:\n" 82 "8:\n"
83 " .section .fixup,\"ax\"\n" 83 " .section .fixup,\"ax\"\n"
84 " .even\n" 84 " .even\n"
@@ -115,7 +115,7 @@ long strncpy_from_user(char *dst, const char __user *src, long count)
115 return count; 115 return count;
116 116
117 asm volatile ("\n" 117 asm volatile ("\n"
118 "1: moves.b (%2)+,%4\n" 118 "1: "MOVES".b (%2)+,%4\n"
119 " move.b %4,(%1)+\n" 119 " move.b %4,(%1)+\n"
120 " jeq 2f\n" 120 " jeq 2f\n"
121 " subq.l #1,%3\n" 121 " subq.l #1,%3\n"
@@ -152,7 +152,7 @@ long strnlen_user(const char __user *src, long n)
152 asm volatile ("\n" 152 asm volatile ("\n"
153 "1: subq.l #1,%1\n" 153 "1: subq.l #1,%1\n"
154 " jmi 3f\n" 154 " jmi 3f\n"
155 "2: moves.b (%0)+,%2\n" 155 "2: "MOVES".b (%0)+,%2\n"
156 " tst.b %2\n" 156 " tst.b %2\n"
157 " jne 1b\n" 157 " jne 1b\n"
158 " jra 4f\n" 158 " jra 4f\n"
@@ -188,15 +188,15 @@ unsigned long __clear_user(void __user *to, unsigned long n)
188 asm volatile ("\n" 188 asm volatile ("\n"
189 " tst.l %0\n" 189 " tst.l %0\n"
190 " jeq 3f\n" 190 " jeq 3f\n"
191 "1: moves.l %2,(%1)+\n" 191 "1: "MOVES".l %2,(%1)+\n"
192 "2: subq.l #1,%0\n" 192 "2: subq.l #1,%0\n"
193 " jne 1b\n" 193 " jne 1b\n"
194 "3: btst #1,%4\n" 194 "3: btst #1,%4\n"
195 " jeq 5f\n" 195 " jeq 5f\n"
196 "4: moves.w %2,(%1)+\n" 196 "4: "MOVES".w %2,(%1)+\n"
197 "5: btst #0,%4\n" 197 "5: btst #0,%4\n"
198 " jeq 7f\n" 198 " jeq 7f\n"
199 "6: moves.b %2,(%1)\n" 199 "6: "MOVES".b %2,(%1)\n"
200 "7:\n" 200 "7:\n"
201 " .section .fixup,\"ax\"\n" 201 " .section .fixup,\"ax\"\n"
202 " .even\n" 202 " .even\n"
diff --git a/arch/m68k/mac/baboon.c b/arch/m68k/mac/baboon.c
index b403924a1cad..3fe0e43d44f6 100644
--- a/arch/m68k/mac/baboon.c
+++ b/arch/m68k/mac/baboon.c
@@ -8,13 +8,8 @@
8 8
9#include <linux/types.h> 9#include <linux/types.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/mm.h>
12#include <linux/delay.h>
13#include <linux/init.h>
14#include <linux/irq.h> 11#include <linux/irq.h>
15 12
16#include <asm/traps.h>
17#include <asm/bootinfo.h>
18#include <asm/macintosh.h> 13#include <asm/macintosh.h>
19#include <asm/macints.h> 14#include <asm/macints.h>
20#include <asm/mac_baboon.h> 15#include <asm/mac_baboon.h>
@@ -23,7 +18,6 @@
23 18
24int baboon_present; 19int baboon_present;
25static volatile struct baboon *baboon; 20static volatile struct baboon *baboon;
26static unsigned char baboon_disabled;
27 21
28#if 0 22#if 0
29extern int macide_ack_intr(struct ata_channel *); 23extern int macide_ack_intr(struct ata_channel *);
@@ -89,51 +83,32 @@ static void baboon_irq(unsigned int irq, struct irq_desc *desc)
89 83
90void __init baboon_register_interrupts(void) 84void __init baboon_register_interrupts(void)
91{ 85{
92 baboon_disabled = 0;
93 irq_set_chained_handler(IRQ_NUBUS_C, baboon_irq); 86 irq_set_chained_handler(IRQ_NUBUS_C, baboon_irq);
94} 87}
95 88
96/* 89/*
97 * The means for masking individual baboon interrupts remains a mystery, so 90 * The means for masking individual Baboon interrupts remains a mystery.
98 * enable the umbrella interrupt only when no baboon interrupt is disabled. 91 * However, since we only use the IDE IRQ, we can just enable/disable all
92 * Baboon interrupts. If/when we handle more than one Baboon IRQ, we must
93 * either figure out how to mask them individually or else implement the
94 * same workaround that's used for NuBus slots (see nubus_disabled and
95 * via_nubus_irq_shutdown).
99 */ 96 */
100 97
101void baboon_irq_enable(int irq) 98void baboon_irq_enable(int irq)
102{ 99{
103 int irq_idx = IRQ_IDX(irq);
104
105#ifdef DEBUG_IRQUSE 100#ifdef DEBUG_IRQUSE
106 printk("baboon_irq_enable(%d)\n", irq); 101 printk("baboon_irq_enable(%d)\n", irq);
107#endif 102#endif
108 103
109 baboon_disabled &= ~(1 << irq_idx); 104 mac_irq_enable(irq_get_irq_data(IRQ_NUBUS_C));
110 if (!baboon_disabled)
111 mac_irq_enable(irq_get_irq_data(IRQ_NUBUS_C));
112} 105}
113 106
114void baboon_irq_disable(int irq) 107void baboon_irq_disable(int irq)
115{ 108{
116 int irq_idx = IRQ_IDX(irq);
117
118#ifdef DEBUG_IRQUSE 109#ifdef DEBUG_IRQUSE
119 printk("baboon_irq_disable(%d)\n", irq); 110 printk("baboon_irq_disable(%d)\n", irq);
120#endif 111#endif
121 112
122 baboon_disabled |= 1 << irq_idx; 113 mac_irq_disable(irq_get_irq_data(IRQ_NUBUS_C));
123 if (baboon_disabled)
124 mac_irq_disable(irq_get_irq_data(IRQ_NUBUS_C));
125}
126
127void baboon_irq_clear(int irq)
128{
129 int irq_idx = IRQ_IDX(irq);
130
131 baboon->mb_ifr &= ~(1 << irq_idx);
132}
133
134int baboon_irq_pending(int irq)
135{
136 int irq_idx = IRQ_IDX(irq);
137
138 return baboon->mb_ifr & (1 << irq_idx);
139} 114}
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index c247de02bc7e..f60ff5f59205 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -71,6 +71,31 @@ static void mac_get_model(char *str);
71static void mac_identify(void); 71static void mac_identify(void);
72static void mac_report_hardware(void); 72static void mac_report_hardware(void);
73 73
74#ifdef CONFIG_EARLY_PRINTK
75asmlinkage void __init mac_early_print(const char *s, unsigned n);
76
77static void __init mac_early_cons_write(struct console *con,
78 const char *s, unsigned n)
79{
80 mac_early_print(s, n);
81}
82
83static struct console __initdata mac_early_cons = {
84 .name = "early",
85 .write = mac_early_cons_write,
86 .flags = CON_PRINTBUFFER | CON_BOOT,
87 .index = -1
88};
89
90int __init mac_unregister_early_cons(void)
91{
92 /* mac_early_print can't be used after init sections are discarded */
93 return unregister_console(&mac_early_cons);
94}
95
96late_initcall(mac_unregister_early_cons);
97#endif
98
74static void __init mac_sched_init(irq_handler_t vector) 99static void __init mac_sched_init(irq_handler_t vector)
75{ 100{
76 via_init_clock(vector); 101 via_init_clock(vector);
@@ -164,6 +189,10 @@ void __init config_mac(void)
164 mach_beep = mac_mksound; 189 mach_beep = mac_mksound;
165#endif 190#endif
166 191
192#ifdef CONFIG_EARLY_PRINTK
193 register_console(&mac_early_cons);
194#endif
195
167 /* 196 /*
168 * Determine hardware present 197 * Determine hardware present
169 */ 198 */
@@ -192,7 +221,7 @@ void __init config_mac(void)
192 * inaccurate, so look here if a new Mac model won't run. Example: if 221 * inaccurate, so look here if a new Mac model won't run. Example: if
193 * a Mac crashes immediately after the VIA1 registers have been dumped 222 * a Mac crashes immediately after the VIA1 registers have been dumped
194 * to the screen, it probably died attempting to read DirB on a RBV. 223 * to the screen, it probably died attempting to read DirB on a RBV.
195 * Meaning it should have MAC_VIA_IIci here :-) 224 * Meaning it should have MAC_VIA_IICI here :-)
196 */ 225 */
197 226
198struct mac_model *macintosh_config; 227struct mac_model *macintosh_config;
@@ -267,7 +296,7 @@ static struct mac_model mac_data_table[] = {
267 .ident = MAC_MODEL_IICI, 296 .ident = MAC_MODEL_IICI,
268 .name = "IIci", 297 .name = "IIci",
269 .adb_type = MAC_ADB_II, 298 .adb_type = MAC_ADB_II,
270 .via_type = MAC_VIA_IIci, 299 .via_type = MAC_VIA_IICI,
271 .scsi_type = MAC_SCSI_OLD, 300 .scsi_type = MAC_SCSI_OLD,
272 .scc_type = MAC_SCC_II, 301 .scc_type = MAC_SCC_II,
273 .nubus_type = MAC_NUBUS, 302 .nubus_type = MAC_NUBUS,
@@ -276,7 +305,7 @@ static struct mac_model mac_data_table[] = {
276 .ident = MAC_MODEL_IIFX, 305 .ident = MAC_MODEL_IIFX,
277 .name = "IIfx", 306 .name = "IIfx",
278 .adb_type = MAC_ADB_IOP, 307 .adb_type = MAC_ADB_IOP,
279 .via_type = MAC_VIA_IIci, 308 .via_type = MAC_VIA_IICI,
280 .scsi_type = MAC_SCSI_OLD, 309 .scsi_type = MAC_SCSI_OLD,
281 .scc_type = MAC_SCC_IOP, 310 .scc_type = MAC_SCC_IOP,
282 .nubus_type = MAC_NUBUS, 311 .nubus_type = MAC_NUBUS,
@@ -285,7 +314,7 @@ static struct mac_model mac_data_table[] = {
285 .ident = MAC_MODEL_IISI, 314 .ident = MAC_MODEL_IISI,
286 .name = "IIsi", 315 .name = "IIsi",
287 .adb_type = MAC_ADB_IISI, 316 .adb_type = MAC_ADB_IISI,
288 .via_type = MAC_VIA_IIci, 317 .via_type = MAC_VIA_IICI,
289 .scsi_type = MAC_SCSI_OLD, 318 .scsi_type = MAC_SCSI_OLD,
290 .scc_type = MAC_SCC_II, 319 .scc_type = MAC_SCC_II,
291 .nubus_type = MAC_NUBUS, 320 .nubus_type = MAC_NUBUS,
@@ -294,7 +323,7 @@ static struct mac_model mac_data_table[] = {
294 .ident = MAC_MODEL_IIVI, 323 .ident = MAC_MODEL_IIVI,
295 .name = "IIvi", 324 .name = "IIvi",
296 .adb_type = MAC_ADB_IISI, 325 .adb_type = MAC_ADB_IISI,
297 .via_type = MAC_VIA_IIci, 326 .via_type = MAC_VIA_IICI,
298 .scsi_type = MAC_SCSI_OLD, 327 .scsi_type = MAC_SCSI_OLD,
299 .scc_type = MAC_SCC_II, 328 .scc_type = MAC_SCC_II,
300 .nubus_type = MAC_NUBUS, 329 .nubus_type = MAC_NUBUS,
@@ -303,7 +332,7 @@ static struct mac_model mac_data_table[] = {
303 .ident = MAC_MODEL_IIVX, 332 .ident = MAC_MODEL_IIVX,
304 .name = "IIvx", 333 .name = "IIvx",
305 .adb_type = MAC_ADB_IISI, 334 .adb_type = MAC_ADB_IISI,
306 .via_type = MAC_VIA_IIci, 335 .via_type = MAC_VIA_IICI,
307 .scsi_type = MAC_SCSI_OLD, 336 .scsi_type = MAC_SCSI_OLD,
308 .scc_type = MAC_SCC_II, 337 .scc_type = MAC_SCC_II,
309 .nubus_type = MAC_NUBUS, 338 .nubus_type = MAC_NUBUS,
@@ -318,7 +347,7 @@ static struct mac_model mac_data_table[] = {
318 .ident = MAC_MODEL_CLII, 347 .ident = MAC_MODEL_CLII,
319 .name = "Classic II", 348 .name = "Classic II",
320 .adb_type = MAC_ADB_IISI, 349 .adb_type = MAC_ADB_IISI,
321 .via_type = MAC_VIA_IIci, 350 .via_type = MAC_VIA_IICI,
322 .scsi_type = MAC_SCSI_OLD, 351 .scsi_type = MAC_SCSI_OLD,
323 .scc_type = MAC_SCC_II, 352 .scc_type = MAC_SCC_II,
324 .nubus_type = MAC_NUBUS, 353 .nubus_type = MAC_NUBUS,
@@ -327,7 +356,7 @@ static struct mac_model mac_data_table[] = {
327 .ident = MAC_MODEL_CCL, 356 .ident = MAC_MODEL_CCL,
328 .name = "Color Classic", 357 .name = "Color Classic",
329 .adb_type = MAC_ADB_CUDA, 358 .adb_type = MAC_ADB_CUDA,
330 .via_type = MAC_VIA_IIci, 359 .via_type = MAC_VIA_IICI,
331 .scsi_type = MAC_SCSI_OLD, 360 .scsi_type = MAC_SCSI_OLD,
332 .scc_type = MAC_SCC_II, 361 .scc_type = MAC_SCC_II,
333 .nubus_type = MAC_NUBUS, 362 .nubus_type = MAC_NUBUS,
@@ -336,7 +365,7 @@ static struct mac_model mac_data_table[] = {
336 .ident = MAC_MODEL_CCLII, 365 .ident = MAC_MODEL_CCLII,
337 .name = "Color Classic II", 366 .name = "Color Classic II",
338 .adb_type = MAC_ADB_CUDA, 367 .adb_type = MAC_ADB_CUDA,
339 .via_type = MAC_VIA_IIci, 368 .via_type = MAC_VIA_IICI,
340 .scsi_type = MAC_SCSI_OLD, 369 .scsi_type = MAC_SCSI_OLD,
341 .scc_type = MAC_SCC_II, 370 .scc_type = MAC_SCC_II,
342 .nubus_type = MAC_NUBUS, 371 .nubus_type = MAC_NUBUS,
@@ -351,7 +380,7 @@ static struct mac_model mac_data_table[] = {
351 .ident = MAC_MODEL_LC, 380 .ident = MAC_MODEL_LC,
352 .name = "LC", 381 .name = "LC",
353 .adb_type = MAC_ADB_IISI, 382 .adb_type = MAC_ADB_IISI,
354 .via_type = MAC_VIA_IIci, 383 .via_type = MAC_VIA_IICI,
355 .scsi_type = MAC_SCSI_OLD, 384 .scsi_type = MAC_SCSI_OLD,
356 .scc_type = MAC_SCC_II, 385 .scc_type = MAC_SCC_II,
357 .nubus_type = MAC_NUBUS, 386 .nubus_type = MAC_NUBUS,
@@ -360,7 +389,7 @@ static struct mac_model mac_data_table[] = {
360 .ident = MAC_MODEL_LCII, 389 .ident = MAC_MODEL_LCII,
361 .name = "LC II", 390 .name = "LC II",
362 .adb_type = MAC_ADB_IISI, 391 .adb_type = MAC_ADB_IISI,
363 .via_type = MAC_VIA_IIci, 392 .via_type = MAC_VIA_IICI,
364 .scsi_type = MAC_SCSI_OLD, 393 .scsi_type = MAC_SCSI_OLD,
365 .scc_type = MAC_SCC_II, 394 .scc_type = MAC_SCC_II,
366 .nubus_type = MAC_NUBUS, 395 .nubus_type = MAC_NUBUS,
@@ -369,7 +398,7 @@ static struct mac_model mac_data_table[] = {
369 .ident = MAC_MODEL_LCIII, 398 .ident = MAC_MODEL_LCIII,
370 .name = "LC III", 399 .name = "LC III",
371 .adb_type = MAC_ADB_IISI, 400 .adb_type = MAC_ADB_IISI,
372 .via_type = MAC_VIA_IIci, 401 .via_type = MAC_VIA_IICI,
373 .scsi_type = MAC_SCSI_OLD, 402 .scsi_type = MAC_SCSI_OLD,
374 .scc_type = MAC_SCC_II, 403 .scc_type = MAC_SCC_II,
375 .nubus_type = MAC_NUBUS, 404 .nubus_type = MAC_NUBUS,
@@ -497,7 +526,7 @@ static struct mac_model mac_data_table[] = {
497 .ident = MAC_MODEL_P460, 526 .ident = MAC_MODEL_P460,
498 .name = "Performa 460", 527 .name = "Performa 460",
499 .adb_type = MAC_ADB_IISI, 528 .adb_type = MAC_ADB_IISI,
500 .via_type = MAC_VIA_IIci, 529 .via_type = MAC_VIA_IICI,
501 .scsi_type = MAC_SCSI_OLD, 530 .scsi_type = MAC_SCSI_OLD,
502 .scc_type = MAC_SCC_II, 531 .scc_type = MAC_SCC_II,
503 .nubus_type = MAC_NUBUS, 532 .nubus_type = MAC_NUBUS,
@@ -524,7 +553,7 @@ static struct mac_model mac_data_table[] = {
524 .ident = MAC_MODEL_P520, 553 .ident = MAC_MODEL_P520,
525 .name = "Performa 520", 554 .name = "Performa 520",
526 .adb_type = MAC_ADB_CUDA, 555 .adb_type = MAC_ADB_CUDA,
527 .via_type = MAC_VIA_IIci, 556 .via_type = MAC_VIA_IICI,
528 .scsi_type = MAC_SCSI_OLD, 557 .scsi_type = MAC_SCSI_OLD,
529 .scc_type = MAC_SCC_II, 558 .scc_type = MAC_SCC_II,
530 .nubus_type = MAC_NUBUS, 559 .nubus_type = MAC_NUBUS,
@@ -533,7 +562,7 @@ static struct mac_model mac_data_table[] = {
533 .ident = MAC_MODEL_P550, 562 .ident = MAC_MODEL_P550,
534 .name = "Performa 550", 563 .name = "Performa 550",
535 .adb_type = MAC_ADB_CUDA, 564 .adb_type = MAC_ADB_CUDA,
536 .via_type = MAC_VIA_IIci, 565 .via_type = MAC_VIA_IICI,
537 .scsi_type = MAC_SCSI_OLD, 566 .scsi_type = MAC_SCSI_OLD,
538 .scc_type = MAC_SCC_II, 567 .scc_type = MAC_SCC_II,
539 .nubus_type = MAC_NUBUS, 568 .nubus_type = MAC_NUBUS,
@@ -565,7 +594,7 @@ static struct mac_model mac_data_table[] = {
565 .ident = MAC_MODEL_TV, 594 .ident = MAC_MODEL_TV,
566 .name = "TV", 595 .name = "TV",
567 .adb_type = MAC_ADB_CUDA, 596 .adb_type = MAC_ADB_CUDA,
568 .via_type = MAC_VIA_QUADRA, 597 .via_type = MAC_VIA_IICI,
569 .scsi_type = MAC_SCSI_OLD, 598 .scsi_type = MAC_SCSI_OLD,
570 .scc_type = MAC_SCC_II, 599 .scc_type = MAC_SCC_II,
571 .nubus_type = MAC_NUBUS, 600 .nubus_type = MAC_NUBUS,
@@ -574,7 +603,7 @@ static struct mac_model mac_data_table[] = {
574 .ident = MAC_MODEL_P600, 603 .ident = MAC_MODEL_P600,
575 .name = "Performa 600", 604 .name = "Performa 600",
576 .adb_type = MAC_ADB_IISI, 605 .adb_type = MAC_ADB_IISI,
577 .via_type = MAC_VIA_IIci, 606 .via_type = MAC_VIA_IICI,
578 .scsi_type = MAC_SCSI_OLD, 607 .scsi_type = MAC_SCSI_OLD,
579 .scc_type = MAC_SCC_II, 608 .scc_type = MAC_SCC_II,
580 .nubus_type = MAC_NUBUS, 609 .nubus_type = MAC_NUBUS,
@@ -645,8 +674,8 @@ static struct mac_model mac_data_table[] = {
645 }, { 674 }, {
646 .ident = MAC_MODEL_PB150, 675 .ident = MAC_MODEL_PB150,
647 .name = "PowerBook 150", 676 .name = "PowerBook 150",
648 .adb_type = MAC_ADB_PB1, 677 .adb_type = MAC_ADB_PB2,
649 .via_type = MAC_VIA_IIci, 678 .via_type = MAC_VIA_IICI,
650 .scsi_type = MAC_SCSI_OLD, 679 .scsi_type = MAC_SCSI_OLD,
651 .ide_type = MAC_IDE_PB, 680 .ide_type = MAC_IDE_PB,
652 .scc_type = MAC_SCC_QUADRA, 681 .scc_type = MAC_SCC_QUADRA,
@@ -732,17 +761,13 @@ static struct mac_model mac_data_table[] = {
732 * PowerBook Duos are pretty much like normal PowerBooks 761 * PowerBook Duos are pretty much like normal PowerBooks
733 * All of these probably have onboard SONIC in the Dock which 762 * All of these probably have onboard SONIC in the Dock which
734 * means we'll have to probe for it eventually. 763 * means we'll have to probe for it eventually.
735 *
736 * Are these really MAC_VIA_IIci? The developer notes for the
737 * Duos show pretty much the same custom parts as in most of
738 * the other PowerBooks which would imply MAC_VIA_QUADRA.
739 */ 764 */
740 765
741 { 766 {
742 .ident = MAC_MODEL_PB210, 767 .ident = MAC_MODEL_PB210,
743 .name = "PowerBook Duo 210", 768 .name = "PowerBook Duo 210",
744 .adb_type = MAC_ADB_PB2, 769 .adb_type = MAC_ADB_PB2,
745 .via_type = MAC_VIA_IIci, 770 .via_type = MAC_VIA_IICI,
746 .scsi_type = MAC_SCSI_OLD, 771 .scsi_type = MAC_SCSI_OLD,
747 .scc_type = MAC_SCC_QUADRA, 772 .scc_type = MAC_SCC_QUADRA,
748 .nubus_type = MAC_NUBUS, 773 .nubus_type = MAC_NUBUS,
@@ -751,7 +776,7 @@ static struct mac_model mac_data_table[] = {
751 .ident = MAC_MODEL_PB230, 776 .ident = MAC_MODEL_PB230,
752 .name = "PowerBook Duo 230", 777 .name = "PowerBook Duo 230",
753 .adb_type = MAC_ADB_PB2, 778 .adb_type = MAC_ADB_PB2,
754 .via_type = MAC_VIA_IIci, 779 .via_type = MAC_VIA_IICI,
755 .scsi_type = MAC_SCSI_OLD, 780 .scsi_type = MAC_SCSI_OLD,
756 .scc_type = MAC_SCC_QUADRA, 781 .scc_type = MAC_SCC_QUADRA,
757 .nubus_type = MAC_NUBUS, 782 .nubus_type = MAC_NUBUS,
@@ -760,7 +785,7 @@ static struct mac_model mac_data_table[] = {
760 .ident = MAC_MODEL_PB250, 785 .ident = MAC_MODEL_PB250,
761 .name = "PowerBook Duo 250", 786 .name = "PowerBook Duo 250",
762 .adb_type = MAC_ADB_PB2, 787 .adb_type = MAC_ADB_PB2,
763 .via_type = MAC_VIA_IIci, 788 .via_type = MAC_VIA_IICI,
764 .scsi_type = MAC_SCSI_OLD, 789 .scsi_type = MAC_SCSI_OLD,
765 .scc_type = MAC_SCC_QUADRA, 790 .scc_type = MAC_SCC_QUADRA,
766 .nubus_type = MAC_NUBUS, 791 .nubus_type = MAC_NUBUS,
@@ -769,7 +794,7 @@ static struct mac_model mac_data_table[] = {
769 .ident = MAC_MODEL_PB270C, 794 .ident = MAC_MODEL_PB270C,
770 .name = "PowerBook Duo 270c", 795 .name = "PowerBook Duo 270c",
771 .adb_type = MAC_ADB_PB2, 796 .adb_type = MAC_ADB_PB2,
772 .via_type = MAC_VIA_IIci, 797 .via_type = MAC_VIA_IICI,
773 .scsi_type = MAC_SCSI_OLD, 798 .scsi_type = MAC_SCSI_OLD,
774 .scc_type = MAC_SCC_QUADRA, 799 .scc_type = MAC_SCC_QUADRA,
775 .nubus_type = MAC_NUBUS, 800 .nubus_type = MAC_NUBUS,
@@ -778,7 +803,7 @@ static struct mac_model mac_data_table[] = {
778 .ident = MAC_MODEL_PB280, 803 .ident = MAC_MODEL_PB280,
779 .name = "PowerBook Duo 280", 804 .name = "PowerBook Duo 280",
780 .adb_type = MAC_ADB_PB2, 805 .adb_type = MAC_ADB_PB2,
781 .via_type = MAC_VIA_IIci, 806 .via_type = MAC_VIA_IICI,
782 .scsi_type = MAC_SCSI_OLD, 807 .scsi_type = MAC_SCSI_OLD,
783 .scc_type = MAC_SCC_QUADRA, 808 .scc_type = MAC_SCC_QUADRA,
784 .nubus_type = MAC_NUBUS, 809 .nubus_type = MAC_NUBUS,
@@ -787,7 +812,7 @@ static struct mac_model mac_data_table[] = {
787 .ident = MAC_MODEL_PB280C, 812 .ident = MAC_MODEL_PB280C,
788 .name = "PowerBook Duo 280c", 813 .name = "PowerBook Duo 280c",
789 .adb_type = MAC_ADB_PB2, 814 .adb_type = MAC_ADB_PB2,
790 .via_type = MAC_VIA_IIci, 815 .via_type = MAC_VIA_IICI,
791 .scsi_type = MAC_SCSI_OLD, 816 .scsi_type = MAC_SCSI_OLD,
792 .scc_type = MAC_SCC_QUADRA, 817 .scc_type = MAC_SCC_QUADRA,
793 .nubus_type = MAC_NUBUS, 818 .nubus_type = MAC_NUBUS,
@@ -864,8 +889,14 @@ static void __init mac_identify(void)
864 scc_b_rsrcs[1].start = scc_b_rsrcs[1].end = IRQ_MAC_SCC_B; 889 scc_b_rsrcs[1].start = scc_b_rsrcs[1].end = IRQ_MAC_SCC_B;
865 break; 890 break;
866 default: 891 default:
867 scc_a_rsrcs[1].start = scc_a_rsrcs[1].end = IRQ_MAC_SCC; 892 /* On non-PSC machines, the serial ports share an IRQ. */
868 scc_b_rsrcs[1].start = scc_b_rsrcs[1].end = IRQ_MAC_SCC; 893 if (macintosh_config->ident == MAC_MODEL_IIFX) {
894 scc_a_rsrcs[1].start = scc_a_rsrcs[1].end = IRQ_MAC_SCC;
895 scc_b_rsrcs[1].start = scc_b_rsrcs[1].end = IRQ_MAC_SCC;
896 } else {
897 scc_a_rsrcs[1].start = scc_a_rsrcs[1].end = IRQ_AUTO_4;
898 scc_b_rsrcs[1].start = scc_b_rsrcs[1].end = IRQ_AUTO_4;
899 }
869 break; 900 break;
870 } 901 }
871 902
diff --git a/arch/m68k/mac/iop.c b/arch/m68k/mac/iop.c
index a5462cc0bfd6..7d8d46127ad9 100644
--- a/arch/m68k/mac/iop.c
+++ b/arch/m68k/mac/iop.c
@@ -115,7 +115,6 @@
115#include <asm/macintosh.h> 115#include <asm/macintosh.h>
116#include <asm/macints.h> 116#include <asm/macints.h>
117#include <asm/mac_iop.h> 117#include <asm/mac_iop.h>
118#include <asm/mac_oss.h>
119 118
120/*#define DEBUG_IOP*/ 119/*#define DEBUG_IOP*/
121 120
@@ -149,8 +148,6 @@ static struct listener iop_listeners[NUM_IOPS][NUM_IOP_CHAN];
149 148
150irqreturn_t iop_ism_irq(int, void *); 149irqreturn_t iop_ism_irq(int, void *);
151 150
152extern void oss_irq_enable(int);
153
154/* 151/*
155 * Private access functions 152 * Private access functions
156 */ 153 */
@@ -304,11 +301,10 @@ void __init iop_init(void)
304void __init iop_register_interrupts(void) 301void __init iop_register_interrupts(void)
305{ 302{
306 if (iop_ism_present) { 303 if (iop_ism_present) {
307 if (oss_present) { 304 if (macintosh_config->ident == MAC_MODEL_IIFX) {
308 if (request_irq(OSS_IRQLEV_IOPISM, iop_ism_irq, 0, 305 if (request_irq(IRQ_MAC_ADB, iop_ism_irq, 0,
309 "ISM IOP", (void *)IOP_NUM_ISM)) 306 "ISM IOP", (void *)IOP_NUM_ISM))
310 pr_err("Couldn't register ISM IOP interrupt\n"); 307 pr_err("Couldn't register ISM IOP interrupt\n");
311 oss_irq_enable(IRQ_MAC_ADB);
312 } else { 308 } else {
313 if (request_irq(IRQ_VIA2_0, iop_ism_irq, 0, "ISM IOP", 309 if (request_irq(IRQ_VIA2_0, iop_ism_irq, 0, "ISM IOP",
314 (void *)IOP_NUM_ISM)) 310 (void *)IOP_NUM_ISM))
diff --git a/arch/m68k/mac/macints.c b/arch/m68k/mac/macints.c
index ba220b70ab8c..5c1a6b2ff0af 100644
--- a/arch/m68k/mac/macints.c
+++ b/arch/m68k/mac/macints.c
@@ -26,10 +26,6 @@
26 * - slot 6: timer 1 (not on IIci) 26 * - slot 6: timer 1 (not on IIci)
27 * - slot 7: status of IRQ; signals 'any enabled int.' 27 * - slot 7: status of IRQ; signals 'any enabled int.'
28 * 28 *
29 * 2 - OSS (IIfx only?)
30 * - slot 0: SCSI interrupt
31 * - slot 1: Sound interrupt
32 *
33 * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes: 29 * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
34 * 30 *
35 * 3 - unused (?) 31 * 3 - unused (?)
@@ -42,21 +38,30 @@
42 * 38 *
43 * 6 - off switch (?) 39 * 6 - off switch (?)
44 * 40 *
45 * For OSS Macintoshes (IIfx only at this point): 41 * Machines with Quadra-like VIA hardware, except PSC and PMU machines, support
42 * an alternate interrupt mapping, as used by A/UX. It spreads ethernet and
43 * sound out to their own autovector IRQs and gives VIA1 a higher priority:
46 * 44 *
47 * 3 - Nubus interrupt 45 * 1 - unused (?)
48 * - slot 0: Slot $9
49 * - slot 1: Slot $A
50 * - slot 2: Slot $B
51 * - slot 3: Slot $C
52 * - slot 4: Slot $D
53 * - slot 5: Slot $E
54 * 46 *
55 * 4 - SCC IOP 47 * 3 - on-board SONIC
48 *
49 * 5 - Apple Sound Chip (ASC)
50 *
51 * 6 - VIA1
52 *
53 * For OSS Macintoshes (IIfx only), we apply an interrupt mapping similar to
54 * the Quadra (A/UX) mapping:
55 *
56 * 1 - ISM IOP (ADB)
56 * 57 *
57 * 5 - ISM IOP (ADB?) 58 * 2 - SCSI
58 * 59 *
59 * 6 - unused 60 * 3 - NuBus
61 *
62 * 4 - SCC IOP
63 *
64 * 6 - VIA1
60 * 65 *
61 * For PSC Macintoshes (660AV, 840AV): 66 * For PSC Macintoshes (660AV, 840AV):
62 * 67 *
@@ -100,88 +105,29 @@
100 * case. They're hidden behind the Nubus slot $C interrupt thus adding a 105 * case. They're hidden behind the Nubus slot $C interrupt thus adding a
101 * third layer of indirection. Why oh why did the Apple engineers do that? 106 * third layer of indirection. Why oh why did the Apple engineers do that?
102 * 107 *
103 * - We support "fast" and "slow" handlers, just like the Amiga port. The
104 * fast handlers are called first and with all interrupts disabled. They
105 * are expected to execute quickly (hence the name). The slow handlers are
106 * called last with interrupts enabled and the interrupt level restored.
107 * They must therefore be reentrant.
108 *
109 * TODO:
110 *
111 */ 108 */
112 109
113#include <linux/module.h>
114#include <linux/types.h> 110#include <linux/types.h>
115#include <linux/kernel.h> 111#include <linux/kernel.h>
116#include <linux/sched.h> 112#include <linux/sched.h>
117#include <linux/kernel_stat.h> 113#include <linux/interrupt.h>
118#include <linux/interrupt.h> /* for intr_count */ 114#include <linux/irq.h>
119#include <linux/delay.h> 115#include <linux/delay.h>
120#include <linux/seq_file.h>
121 116
122#include <asm/system.h>
123#include <asm/irq.h> 117#include <asm/irq.h>
124#include <asm/traps.h>
125#include <asm/bootinfo.h>
126#include <asm/macintosh.h> 118#include <asm/macintosh.h>
119#include <asm/macints.h>
127#include <asm/mac_via.h> 120#include <asm/mac_via.h>
128#include <asm/mac_psc.h> 121#include <asm/mac_psc.h>
122#include <asm/mac_oss.h>
123#include <asm/mac_iop.h>
124#include <asm/mac_baboon.h>
129#include <asm/hwtest.h> 125#include <asm/hwtest.h>
130#include <asm/errno.h>
131#include <asm/macints.h>
132#include <asm/irq_regs.h> 126#include <asm/irq_regs.h>
133#include <asm/mac_oss.h>
134 127
135#define SHUTUP_SONIC 128#define SHUTUP_SONIC
136 129
137/* 130/*
138 * VIA/RBV hooks
139 */
140
141extern void via_register_interrupts(void);
142extern void via_irq_enable(int);
143extern void via_irq_disable(int);
144extern void via_irq_clear(int);
145extern int via_irq_pending(int);
146
147/*
148 * OSS hooks
149 */
150
151extern void oss_register_interrupts(void);
152extern void oss_irq_enable(int);
153extern void oss_irq_disable(int);
154extern void oss_irq_clear(int);
155extern int oss_irq_pending(int);
156
157/*
158 * PSC hooks
159 */
160
161extern void psc_register_interrupts(void);
162extern void psc_irq_enable(int);
163extern void psc_irq_disable(int);
164extern void psc_irq_clear(int);
165extern int psc_irq_pending(int);
166
167/*
168 * IOP hooks
169 */
170
171extern void iop_register_interrupts(void);
172
173/*
174 * Baboon hooks
175 */
176
177extern int baboon_present;
178
179extern void baboon_register_interrupts(void);
180extern void baboon_irq_enable(int);
181extern void baboon_irq_disable(int);
182extern void baboon_irq_clear(int);
183
184/*
185 * console_loglevel determines NMI handler function 131 * console_loglevel determines NMI handler function
186 */ 132 */
187 133
@@ -190,10 +136,15 @@ irqreturn_t mac_debug_handler(int, void *);
190 136
191/* #define DEBUG_MACINTS */ 137/* #define DEBUG_MACINTS */
192 138
139static unsigned int mac_irq_startup(struct irq_data *);
140static void mac_irq_shutdown(struct irq_data *);
141
193static struct irq_chip mac_irq_chip = { 142static struct irq_chip mac_irq_chip = {
194 .name = "mac", 143 .name = "mac",
195 .irq_enable = mac_irq_enable, 144 .irq_enable = mac_irq_enable,
196 .irq_disable = mac_irq_disable, 145 .irq_disable = mac_irq_disable,
146 .irq_startup = mac_irq_startup,
147 .irq_shutdown = mac_irq_shutdown,
197}; 148};
198 149
199void __init mac_init_IRQ(void) 150void __init mac_init_IRQ(void)
@@ -239,8 +190,6 @@ void __init mac_init_IRQ(void)
239/* 190/*
240 * mac_irq_enable - enable an interrupt source 191 * mac_irq_enable - enable an interrupt source
241 * mac_irq_disable - disable an interrupt source 192 * mac_irq_disable - disable an interrupt source
242 * mac_clear_irq - clears a pending interrupt
243 * mac_irq_pending - returns the pending status of an IRQ (nonzero = pending)
244 * 193 *
245 * These routines are just dispatchers to the VIA/OSS/PSC routines. 194 * These routines are just dispatchers to the VIA/OSS/PSC routines.
246 */ 195 */
@@ -252,8 +201,6 @@ void mac_irq_enable(struct irq_data *data)
252 201
253 switch(irq_src) { 202 switch(irq_src) {
254 case 1: 203 case 1:
255 via_irq_enable(irq);
256 break;
257 case 2: 204 case 2:
258 case 7: 205 case 7:
259 if (oss_present) 206 if (oss_present)
@@ -262,6 +209,7 @@ void mac_irq_enable(struct irq_data *data)
262 via_irq_enable(irq); 209 via_irq_enable(irq);
263 break; 210 break;
264 case 3: 211 case 3:
212 case 4:
265 case 5: 213 case 5:
266 case 6: 214 case 6:
267 if (psc_present) 215 if (psc_present)
@@ -269,10 +217,6 @@ void mac_irq_enable(struct irq_data *data)
269 else if (oss_present) 217 else if (oss_present)
270 oss_irq_enable(irq); 218 oss_irq_enable(irq);
271 break; 219 break;
272 case 4:
273 if (psc_present)
274 psc_irq_enable(irq);
275 break;
276 case 8: 220 case 8:
277 if (baboon_present) 221 if (baboon_present)
278 baboon_irq_enable(irq); 222 baboon_irq_enable(irq);
@@ -287,8 +231,6 @@ void mac_irq_disable(struct irq_data *data)
287 231
288 switch(irq_src) { 232 switch(irq_src) {
289 case 1: 233 case 1:
290 via_irq_disable(irq);
291 break;
292 case 2: 234 case 2:
293 case 7: 235 case 7:
294 if (oss_present) 236 if (oss_present)
@@ -297,6 +239,7 @@ void mac_irq_disable(struct irq_data *data)
297 via_irq_disable(irq); 239 via_irq_disable(irq);
298 break; 240 break;
299 case 3: 241 case 3:
242 case 4:
300 case 5: 243 case 5:
301 case 6: 244 case 6:
302 if (psc_present) 245 if (psc_present)
@@ -304,10 +247,6 @@ void mac_irq_disable(struct irq_data *data)
304 else if (oss_present) 247 else if (oss_present)
305 oss_irq_disable(irq); 248 oss_irq_disable(irq);
306 break; 249 break;
307 case 4:
308 if (psc_present)
309 psc_irq_disable(irq);
310 break;
311 case 8: 250 case 8:
312 if (baboon_present) 251 if (baboon_present)
313 baboon_irq_disable(irq); 252 baboon_irq_disable(irq);
@@ -315,65 +254,27 @@ void mac_irq_disable(struct irq_data *data)
315 } 254 }
316} 255}
317 256
318void mac_clear_irq(unsigned int irq) 257static unsigned int mac_irq_startup(struct irq_data *data)
319{ 258{
320 switch(IRQ_SRC(irq)) { 259 int irq = data->irq;
321 case 1: 260
322 via_irq_clear(irq); 261 if (IRQ_SRC(irq) == 7 && !oss_present)
323 break; 262 via_nubus_irq_startup(irq);
324 case 2: 263 else
325 case 7: 264 mac_irq_enable(data);
326 if (oss_present) 265
327 oss_irq_clear(irq); 266 return 0;
328 else
329 via_irq_clear(irq);
330 break;
331 case 3:
332 case 5:
333 case 6:
334 if (psc_present)
335 psc_irq_clear(irq);
336 else if (oss_present)
337 oss_irq_clear(irq);
338 break;
339 case 4:
340 if (psc_present)
341 psc_irq_clear(irq);
342 break;
343 case 8:
344 if (baboon_present)
345 baboon_irq_clear(irq);
346 break;
347 }
348} 267}
349 268
350int mac_irq_pending(unsigned int irq) 269static void mac_irq_shutdown(struct irq_data *data)
351{ 270{
352 switch(IRQ_SRC(irq)) { 271 int irq = data->irq;
353 case 1: 272
354 return via_irq_pending(irq); 273 if (IRQ_SRC(irq) == 7 && !oss_present)
355 case 2: 274 via_nubus_irq_shutdown(irq);
356 case 7: 275 else
357 if (oss_present) 276 mac_irq_disable(data);
358 return oss_irq_pending(irq);
359 else
360 return via_irq_pending(irq);
361 case 3:
362 case 5:
363 case 6:
364 if (psc_present)
365 return psc_irq_pending(irq);
366 else if (oss_present)
367 return oss_irq_pending(irq);
368 break;
369 case 4:
370 if (psc_present)
371 return psc_irq_pending(irq);
372 break;
373 }
374 return 0;
375} 277}
376EXPORT_SYMBOL(mac_irq_pending);
377 278
378static int num_debug[8]; 279static int num_debug[8];
379 280
diff --git a/arch/m68k/mac/oss.c b/arch/m68k/mac/oss.c
index a4c82dab9ff1..6c4c882c126e 100644
--- a/arch/m68k/mac/oss.c
+++ b/arch/m68k/mac/oss.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * OSS handling 2 * Operating System Services (OSS) chip handling
3 * Written by Joshua M. Thompson (funaho@jurai.org) 3 * Written by Joshua M. Thompson (funaho@jurai.org)
4 * 4 *
5 * 5 *
@@ -30,8 +30,6 @@
30int oss_present; 30int oss_present;
31volatile struct mac_oss *oss; 31volatile struct mac_oss *oss;
32 32
33extern void via1_irq(unsigned int irq, struct irq_desc *desc);
34
35/* 33/*
36 * Initialize the OSS 34 * Initialize the OSS
37 * 35 *
@@ -51,10 +49,8 @@ void __init oss_init(void)
51 /* do this by setting the source's interrupt level to zero. */ 49 /* do this by setting the source's interrupt level to zero. */
52 50
53 for (i = 0; i <= OSS_NUM_SOURCES; i++) { 51 for (i = 0; i <= OSS_NUM_SOURCES; i++) {
54 oss->irq_level[i] = OSS_IRQLEV_DISABLED; 52 oss->irq_level[i] = 0;
55 } 53 }
56 /* If we disable VIA1 here, we never really handle it... */
57 oss->irq_level[OSS_VIA1] = OSS_IRQLEV_VIA1;
58} 54}
59 55
60/* 56/*
@@ -66,17 +62,13 @@ void __init oss_nubus_init(void)
66} 62}
67 63
68/* 64/*
69 * Handle miscellaneous OSS interrupts. Right now that's just sound 65 * Handle miscellaneous OSS interrupts.
70 * and SCSI; everything else is routed to its own autovector IRQ.
71 */ 66 */
72 67
73static void oss_irq(unsigned int irq, struct irq_desc *desc) 68static void oss_irq(unsigned int irq, struct irq_desc *desc)
74{ 69{
75 int events; 70 int events = oss->irq_pending &
76 71 (OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM);
77 events = oss->irq_pending & (OSS_IP_SOUND|OSS_IP_SCSI);
78 if (!events)
79 return;
80 72
81#ifdef DEBUG_IRQS 73#ifdef DEBUG_IRQS
82 if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) { 74 if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) {
@@ -84,16 +76,20 @@ static void oss_irq(unsigned int irq, struct irq_desc *desc)
84 (int) oss->irq_pending); 76 (int) oss->irq_pending);
85 } 77 }
86#endif 78#endif
87 /* FIXME: how do you clear a pending IRQ? */
88 79
89 if (events & OSS_IP_SOUND) { 80 if (events & OSS_IP_IOPSCC) {
90 oss->irq_pending &= ~OSS_IP_SOUND; 81 oss->irq_pending &= ~OSS_IP_IOPSCC;
91 /* FIXME: call sound handler */ 82 generic_handle_irq(IRQ_MAC_SCC);
92 } else if (events & OSS_IP_SCSI) { 83 }
84
85 if (events & OSS_IP_SCSI) {
93 oss->irq_pending &= ~OSS_IP_SCSI; 86 oss->irq_pending &= ~OSS_IP_SCSI;
94 generic_handle_irq(IRQ_MAC_SCSI); 87 generic_handle_irq(IRQ_MAC_SCSI);
95 } else { 88 }
96 /* FIXME: error check here? */ 89
90 if (events & OSS_IP_IOPISM) {
91 oss->irq_pending &= ~OSS_IP_IOPISM;
92 generic_handle_irq(IRQ_MAC_ADB);
97 } 93 }
98} 94}
99 95
@@ -132,14 +128,29 @@ static void oss_nubus_irq(unsigned int irq, struct irq_desc *desc)
132 128
133/* 129/*
134 * Register the OSS and NuBus interrupt dispatchers. 130 * Register the OSS and NuBus interrupt dispatchers.
131 *
132 * This IRQ mapping is laid out with two things in mind: first, we try to keep
133 * things on their own levels to avoid having to do double-dispatches. Second,
134 * the levels match as closely as possible the alternate IRQ mapping mode (aka
135 * "A/UX mode") available on some VIA machines.
135 */ 136 */
136 137
138#define OSS_IRQLEV_IOPISM IRQ_AUTO_1
139#define OSS_IRQLEV_SCSI IRQ_AUTO_2
140#define OSS_IRQLEV_NUBUS IRQ_AUTO_3
141#define OSS_IRQLEV_IOPSCC IRQ_AUTO_4
142#define OSS_IRQLEV_VIA1 IRQ_AUTO_6
143
137void __init oss_register_interrupts(void) 144void __init oss_register_interrupts(void)
138{ 145{
139 irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq); 146 irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_irq);
140 irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq); 147 irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq);
141 irq_set_chained_handler(OSS_IRQLEV_SOUND, oss_irq); 148 irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq);
142 irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq); 149 irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_irq);
150 irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq);
151
152 /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */
153 oss->irq_level[OSS_VIA1] = IRQ_AUTO_6;
143} 154}
144 155
145/* 156/*
@@ -158,13 +169,13 @@ void oss_irq_enable(int irq) {
158 switch(irq) { 169 switch(irq) {
159 case IRQ_MAC_SCC: 170 case IRQ_MAC_SCC:
160 oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC; 171 oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC;
161 break; 172 return;
162 case IRQ_MAC_ADB: 173 case IRQ_MAC_ADB:
163 oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM; 174 oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM;
164 break; 175 return;
165 case IRQ_MAC_SCSI: 176 case IRQ_MAC_SCSI:
166 oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI; 177 oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
167 break; 178 return;
168 case IRQ_NUBUS_9: 179 case IRQ_NUBUS_9:
169 case IRQ_NUBUS_A: 180 case IRQ_NUBUS_A:
170 case IRQ_NUBUS_B: 181 case IRQ_NUBUS_B:
@@ -173,13 +184,11 @@ void oss_irq_enable(int irq) {
173 case IRQ_NUBUS_E: 184 case IRQ_NUBUS_E:
174 irq -= NUBUS_SOURCE_BASE; 185 irq -= NUBUS_SOURCE_BASE;
175 oss->irq_level[irq] = OSS_IRQLEV_NUBUS; 186 oss->irq_level[irq] = OSS_IRQLEV_NUBUS;
176 break; 187 return;
177#ifdef DEBUG_IRQUSE
178 default:
179 printk("%s unknown irq %d\n", __func__, irq);
180 break;
181#endif
182 } 188 }
189
190 if (IRQ_SRC(irq) == 1)
191 via_irq_enable(irq);
183} 192}
184 193
185/* 194/*
@@ -195,50 +204,14 @@ void oss_irq_disable(int irq) {
195#endif 204#endif
196 switch(irq) { 205 switch(irq) {
197 case IRQ_MAC_SCC: 206 case IRQ_MAC_SCC:
198 oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_DISABLED; 207 oss->irq_level[OSS_IOPSCC] = 0;
199 break; 208 return;
200 case IRQ_MAC_ADB:
201 oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_DISABLED;
202 break;
203 case IRQ_MAC_SCSI:
204 oss->irq_level[OSS_SCSI] = OSS_IRQLEV_DISABLED;
205 break;
206 case IRQ_NUBUS_9:
207 case IRQ_NUBUS_A:
208 case IRQ_NUBUS_B:
209 case IRQ_NUBUS_C:
210 case IRQ_NUBUS_D:
211 case IRQ_NUBUS_E:
212 irq -= NUBUS_SOURCE_BASE;
213 oss->irq_level[irq] = OSS_IRQLEV_DISABLED;
214 break;
215#ifdef DEBUG_IRQUSE
216 default:
217 printk("%s unknown irq %d\n", __func__, irq);
218 break;
219#endif
220 }
221}
222
223/*
224 * Clear an OSS interrupt
225 *
226 * Not sure if this works or not but it's the only method I could
227 * think of based on the contents of the mac_oss structure.
228 */
229
230void oss_irq_clear(int irq) {
231 /* FIXME: how to do this on OSS? */
232 switch(irq) {
233 case IRQ_MAC_SCC:
234 oss->irq_pending &= ~OSS_IP_IOPSCC;
235 break;
236 case IRQ_MAC_ADB: 209 case IRQ_MAC_ADB:
237 oss->irq_pending &= ~OSS_IP_IOPISM; 210 oss->irq_level[OSS_IOPISM] = 0;
238 break; 211 return;
239 case IRQ_MAC_SCSI: 212 case IRQ_MAC_SCSI:
240 oss->irq_pending &= ~OSS_IP_SCSI; 213 oss->irq_level[OSS_SCSI] = 0;
241 break; 214 return;
242 case IRQ_NUBUS_9: 215 case IRQ_NUBUS_9:
243 case IRQ_NUBUS_A: 216 case IRQ_NUBUS_A:
244 case IRQ_NUBUS_B: 217 case IRQ_NUBUS_B:
@@ -246,36 +219,10 @@ void oss_irq_clear(int irq) {
246 case IRQ_NUBUS_D: 219 case IRQ_NUBUS_D:
247 case IRQ_NUBUS_E: 220 case IRQ_NUBUS_E:
248 irq -= NUBUS_SOURCE_BASE; 221 irq -= NUBUS_SOURCE_BASE;
249 oss->irq_pending &= ~(1 << irq); 222 oss->irq_level[irq] = 0;
250 break; 223 return;
251 } 224 }
252}
253
254/*
255 * Check to see if a specific OSS interrupt is pending
256 */
257 225
258int oss_irq_pending(int irq) 226 if (IRQ_SRC(irq) == 1)
259{ 227 via_irq_disable(irq);
260 switch(irq) {
261 case IRQ_MAC_SCC:
262 return oss->irq_pending & OSS_IP_IOPSCC;
263 break;
264 case IRQ_MAC_ADB:
265 return oss->irq_pending & OSS_IP_IOPISM;
266 break;
267 case IRQ_MAC_SCSI:
268 return oss->irq_pending & OSS_IP_SCSI;
269 break;
270 case IRQ_NUBUS_9:
271 case IRQ_NUBUS_A:
272 case IRQ_NUBUS_B:
273 case IRQ_NUBUS_C:
274 case IRQ_NUBUS_D:
275 case IRQ_NUBUS_E:
276 irq -= NUBUS_SOURCE_BASE;
277 return oss->irq_pending & (1 << irq);
278 break;
279 }
280 return 0;
281} 228}
diff --git a/arch/m68k/mac/psc.c b/arch/m68k/mac/psc.c
index e6c2d20f328d..6f026fc302fa 100644
--- a/arch/m68k/mac/psc.c
+++ b/arch/m68k/mac/psc.c
@@ -180,20 +180,3 @@ void psc_irq_disable(int irq) {
180#endif 180#endif
181 psc_write_byte(pIER, 1 << irq_idx); 181 psc_write_byte(pIER, 1 << irq_idx);
182} 182}
183
184void psc_irq_clear(int irq) {
185 int irq_src = IRQ_SRC(irq);
186 int irq_idx = IRQ_IDX(irq);
187 int pIFR = pIERbase + (irq_src << 4);
188
189 psc_write_byte(pIFR, 1 << irq_idx);
190}
191
192int psc_irq_pending(int irq)
193{
194 int irq_src = IRQ_SRC(irq);
195 int irq_idx = IRQ_IDX(irq);
196 int pIFR = pIERbase + (irq_src << 4);
197
198 return psc_read_byte(pIFR) & (1 << irq_idx);
199}
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
index f1600ad26621..2d85662715fb 100644
--- a/arch/m68k/mac/via.c
+++ b/arch/m68k/mac/via.c
@@ -63,24 +63,50 @@ static int gIER,gIFR,gBufA,gBufB;
63#define MAC_CLOCK_LOW (MAC_CLOCK_TICK&0xFF) 63#define MAC_CLOCK_LOW (MAC_CLOCK_TICK&0xFF)
64#define MAC_CLOCK_HIGH (MAC_CLOCK_TICK>>8) 64#define MAC_CLOCK_HIGH (MAC_CLOCK_TICK>>8)
65 65
66/* To disable a NuBus slot on Quadras we make that slot IRQ line an output set 66
67 * high. On RBV we just use the slot interrupt enable register. On Macs with 67/*
68 * genuine VIA chips we must use nubus_disabled to keep track of disabled slot 68 * On Macs with a genuine VIA chip there is no way to mask an individual slot
69 * interrupts. When any slot IRQ is disabled we mask the (edge triggered) CA1 69 * interrupt. This limitation also seems to apply to VIA clone logic cores in
70 * or "SLOTS" interrupt. When no slot is disabled, we unmask the CA1 interrupt. 70 * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.)
71 * So, on genuine VIAs, having more than one NuBus IRQ can mean trouble, 71 *
72 * because closing one of those drivers can mask all of the NuBus interrupts. 72 * We used to fake it by configuring the relevent VIA pin as an output
73 * Also, since we can't mask the unregistered slot IRQs on genuine VIAs, it's 73 * (to mask the interrupt) or input (to unmask). That scheme did not work on
74 * possible to get interrupts from cards that MacOS or the ROM has configured 74 * (at least) the Quadra 700. A NuBus card's /NMRQ signal is an open-collector
75 * but we have not. FWIW, "Designing Cards and Drivers for Macintosh II and 75 * circuit (see Designing Cards and Drivers for Macintosh II and Macintosh SE,
76 * Macintosh SE", page 9-8, says, a slot IRQ with no driver would crash MacOS. 76 * p. 10-11 etc) but VIA outputs are not (see datasheet).
77 *
78 * Driving these outputs high must cause the VIA to source current and the
79 * card to sink current when it asserts /NMRQ. Current will flow but the pin
80 * voltage is uncertain and so the /NMRQ condition may still cause a transition
81 * at the VIA2 CA1 input (which explains the lost interrupts). A side effect
82 * is that a disabled slot IRQ can never be tested as pending or not.
83 *
84 * Driving these outputs low doesn't work either. All the slot /NMRQ lines are
85 * (active low) OR'd together to generate the CA1 (aka "SLOTS") interrupt (see
86 * The Guide To Macintosh Family Hardware, 2nd edition p. 167). If we drive a
87 * disabled /NMRQ line low, the falling edge immediately triggers a CA1
88 * interrupt and all slot interrupts after that will generate no transition
89 * and therefore no interrupt, even after being re-enabled.
90 *
91 * So we make the VIA port A I/O lines inputs and use nubus_disabled to keep
92 * track of their states. When any slot IRQ becomes disabled we mask the CA1
93 * umbrella interrupt. Only when all slot IRQs become enabled do we unmask
94 * the CA1 interrupt. It must remain enabled even when cards have no interrupt
95 * handler registered. Drivers must therefore disable a slot interrupt at the
96 * device before they call free_irq (like shared and autovector interrupts).
97 *
98 * There is also a related problem when MacOS is used to boot Linux. A network
99 * card brought up by a MacOS driver may raise an interrupt while Linux boots.
100 * This can be fatal since it can't be handled until the right driver loads
101 * (if such a driver exists at all). Apparently related to this hardware
102 * limitation, "Designing Cards and Drivers", p. 9-8, says that a slot
103 * interrupt with no driver would crash MacOS (the book was written before
104 * the appearance of Macs with RBV or OSS).
77 */ 105 */
106
78static u8 nubus_disabled; 107static u8 nubus_disabled;
79 108
80void via_debug_dump(void); 109void via_debug_dump(void);
81void via_irq_enable(int irq);
82void via_irq_disable(int irq);
83void via_irq_clear(int irq);
84 110
85/* 111/*
86 * Initialize the VIAs 112 * Initialize the VIAs
@@ -100,7 +126,7 @@ void __init via_init(void)
100 126
101 /* IIci, IIsi, IIvx, IIvi (P6xx), LC series */ 127 /* IIci, IIsi, IIvx, IIvi (P6xx), LC series */
102 128
103 case MAC_VIA_IIci: 129 case MAC_VIA_IICI:
104 via1 = (void *) VIA1_BASE; 130 via1 = (void *) VIA1_BASE;
105 if (macintosh_config->ident == MAC_MODEL_IIFX) { 131 if (macintosh_config->ident == MAC_MODEL_IIFX) {
106 via2 = NULL; 132 via2 = NULL;
@@ -197,38 +223,17 @@ void __init via_init(void)
197 if (oss_present) 223 if (oss_present)
198 return; 224 return;
199 225
200 /* Some machines support an alternate IRQ mapping that spreads */ 226 if ((macintosh_config->via_type == MAC_VIA_QUADRA) &&
201 /* Ethernet and Sound out to their own autolevel IRQs and moves */ 227 (macintosh_config->adb_type != MAC_ADB_PB1) &&
202 /* VIA1 to level 6. A/UX uses this mapping and we do too. Note */ 228 (macintosh_config->adb_type != MAC_ADB_PB2) &&
203 /* that the IIfx emulates this alternate mapping using the OSS. */ 229 (macintosh_config->ident != MAC_MODEL_C660) &&
204 230 (macintosh_config->ident != MAC_MODEL_Q840)) {
205 via_alt_mapping = 0; 231 via_alt_mapping = 1;
206 if (macintosh_config->via_type == MAC_VIA_QUADRA) 232 via1[vDirB] |= 0x40;
207 switch (macintosh_config->ident) { 233 via1[vBufB] &= ~0x40;
208 case MAC_MODEL_C660: 234 } else {
209 case MAC_MODEL_Q840: 235 via_alt_mapping = 0;
210 /* not applicable */ 236 }
211 break;
212 case MAC_MODEL_P588:
213 case MAC_MODEL_TV:
214 case MAC_MODEL_PB140:
215 case MAC_MODEL_PB145:
216 case MAC_MODEL_PB160:
217 case MAC_MODEL_PB165:
218 case MAC_MODEL_PB165C:
219 case MAC_MODEL_PB170:
220 case MAC_MODEL_PB180:
221 case MAC_MODEL_PB180C:
222 case MAC_MODEL_PB190:
223 case MAC_MODEL_PB520:
224 /* not yet tested */
225 break;
226 default:
227 via_alt_mapping = 1;
228 via1[vDirB] |= 0x40;
229 via1[vBufB] &= ~0x40;
230 break;
231 }
232 237
233 /* 238 /*
234 * Now initialize VIA2. For RBV we just kill all interrupts; 239 * Now initialize VIA2. For RBV we just kill all interrupts;
@@ -248,22 +253,28 @@ void __init via_init(void)
248 via2[vACR] &= ~0x03; /* disable port A & B latches */ 253 via2[vACR] &= ~0x03; /* disable port A & B latches */
249 } 254 }
250 255
256 /* Everything below this point is VIA2 only... */
257
258 if (rbv_present)
259 return;
260
251 /* 261 /*
252 * Set vPCR for control line interrupts (but not on RBV) 262 * Set vPCR for control line interrupts.
263 *
264 * CA1 (SLOTS IRQ), CB1 (ASC IRQ): negative edge trigger.
265 *
266 * Macs with ESP SCSI have a negative edge triggered SCSI interrupt.
267 * Testing reveals that PowerBooks do too. However, the SE/30
268 * schematic diagram shows an active high NCR5380 IRQ line.
253 */ 269 */
254 if (!rbv_present) { 270
255 /* For all VIA types, CA1 (SLOTS IRQ) and CB1 (ASC IRQ) 271 pr_debug("VIA2 vPCR is 0x%02X\n", via2[vPCR]);
256 * are made negative edge triggered here. 272 if (macintosh_config->via_type == MAC_VIA_II) {
257 */ 273 /* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, pos. edge */
258 if (macintosh_config->scsi_type == MAC_SCSI_OLD) { 274 via2[vPCR] = 0x66;
259 /* CB2 (IRQ) indep. input, positive edge */ 275 } else {
260 /* CA2 (DRQ) indep. input, positive edge */ 276 /* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, neg. edge */
261 via2[vPCR] = 0x66; 277 via2[vPCR] = 0x22;
262 } else {
263 /* CB2 (IRQ) indep. input, negative edge */
264 /* CA2 (DRQ) indep. input, negative edge */
265 via2[vPCR] = 0x22;
266 }
267 } 278 }
268} 279}
269 280
@@ -378,34 +389,55 @@ void __init via_nubus_init(void)
378 via2[gBufB] |= 0x02; 389 via2[gBufB] |= 0x02;
379 } 390 }
380 391
381 /* Disable all the slot interrupts (where possible). */ 392 /*
393 * Disable the slot interrupts. On some hardware that's not possible.
394 * On some hardware it's unclear what all of these I/O lines do.
395 */
382 396
383 switch (macintosh_config->via_type) { 397 switch (macintosh_config->via_type) {
384 case MAC_VIA_II: 398 case MAC_VIA_II:
385 /* Just make the port A lines inputs. */ 399 case MAC_VIA_QUADRA:
386 switch(macintosh_config->ident) { 400 pr_debug("VIA2 vDirA is 0x%02X\n", via2[vDirA]);
387 case MAC_MODEL_II:
388 case MAC_MODEL_IIX:
389 case MAC_MODEL_IICX:
390 case MAC_MODEL_SE30:
391 /* The top two bits are RAM size outputs. */
392 via2[vDirA] &= 0xC0;
393 break;
394 default:
395 via2[vDirA] &= 0x80;
396 }
397 break; 401 break;
398 case MAC_VIA_IIci: 402 case MAC_VIA_IICI:
399 /* RBV. Disable all the slot interrupts. SIER works like IER. */ 403 /* RBV. Disable all the slot interrupts. SIER works like IER. */
400 via2[rSIER] = 0x7F; 404 via2[rSIER] = 0x7F;
401 break; 405 break;
406 }
407}
408
409void via_nubus_irq_startup(int irq)
410{
411 int irq_idx = IRQ_IDX(irq);
412
413 switch (macintosh_config->via_type) {
414 case MAC_VIA_II:
402 case MAC_VIA_QUADRA: 415 case MAC_VIA_QUADRA:
403 /* Disable the inactive slot interrupts by making those lines outputs. */ 416 /* Make the port A line an input. Probably redundant. */
404 if ((macintosh_config->adb_type != MAC_ADB_PB1) && 417 if (macintosh_config->via_type == MAC_VIA_II) {
405 (macintosh_config->adb_type != MAC_ADB_PB2)) { 418 /* The top two bits are RAM size outputs. */
406 via2[vBufA] |= 0x7F; 419 via2[vDirA] &= 0xC0 | ~(1 << irq_idx);
407 via2[vDirA] |= 0x7F; 420 } else {
421 /* Allow NuBus slots 9 through F. */
422 via2[vDirA] &= 0x80 | ~(1 << irq_idx);
408 } 423 }
424 /* fall through */
425 case MAC_VIA_IICI:
426 via_irq_enable(irq);
427 break;
428 }
429}
430
431void via_nubus_irq_shutdown(int irq)
432{
433 switch (macintosh_config->via_type) {
434 case MAC_VIA_II:
435 case MAC_VIA_QUADRA:
436 /* Ensure that the umbrella CA1 interrupt remains enabled. */
437 via_irq_enable(irq);
438 break;
439 case MAC_VIA_IICI:
440 via_irq_disable(irq);
409 break; 441 break;
410 } 442 }
411} 443}
@@ -531,25 +563,18 @@ void via_irq_enable(int irq) {
531 } else if (irq_src == 7) { 563 } else if (irq_src == 7) {
532 switch (macintosh_config->via_type) { 564 switch (macintosh_config->via_type) {
533 case MAC_VIA_II: 565 case MAC_VIA_II:
566 case MAC_VIA_QUADRA:
534 nubus_disabled &= ~(1 << irq_idx); 567 nubus_disabled &= ~(1 << irq_idx);
535 /* Enable the CA1 interrupt when no slot is disabled. */ 568 /* Enable the CA1 interrupt when no slot is disabled. */
536 if (!nubus_disabled) 569 if (!nubus_disabled)
537 via2[gIER] = IER_SET_BIT(1); 570 via2[gIER] = IER_SET_BIT(1);
538 break; 571 break;
539 case MAC_VIA_IIci: 572 case MAC_VIA_IICI:
540 /* On RBV, enable the slot interrupt. 573 /* On RBV, enable the slot interrupt.
541 * SIER works like IER. 574 * SIER works like IER.
542 */ 575 */
543 via2[rSIER] = IER_SET_BIT(irq_idx); 576 via2[rSIER] = IER_SET_BIT(irq_idx);
544 break; 577 break;
545 case MAC_VIA_QUADRA:
546 /* Make the port A line an input to enable the slot irq.
547 * But not on PowerBooks, that's ADB.
548 */
549 if ((macintosh_config->adb_type != MAC_ADB_PB1) &&
550 (macintosh_config->adb_type != MAC_ADB_PB2))
551 via2[vDirA] &= ~(1 << irq_idx);
552 break;
553 } 578 }
554 } 579 }
555} 580}
@@ -569,60 +594,18 @@ void via_irq_disable(int irq) {
569 } else if (irq_src == 7) { 594 } else if (irq_src == 7) {
570 switch (macintosh_config->via_type) { 595 switch (macintosh_config->via_type) {
571 case MAC_VIA_II: 596 case MAC_VIA_II:
597 case MAC_VIA_QUADRA:
572 nubus_disabled |= 1 << irq_idx; 598 nubus_disabled |= 1 << irq_idx;
573 if (nubus_disabled) 599 if (nubus_disabled)
574 via2[gIER] = IER_CLR_BIT(1); 600 via2[gIER] = IER_CLR_BIT(1);
575 break; 601 break;
576 case MAC_VIA_IIci: 602 case MAC_VIA_IICI:
577 via2[rSIER] = IER_CLR_BIT(irq_idx); 603 via2[rSIER] = IER_CLR_BIT(irq_idx);
578 break; 604 break;
579 case MAC_VIA_QUADRA:
580 if ((macintosh_config->adb_type != MAC_ADB_PB1) &&
581 (macintosh_config->adb_type != MAC_ADB_PB2))
582 via2[vDirA] |= 1 << irq_idx;
583 break;
584 } 605 }
585 } 606 }
586} 607}
587 608
588void via_irq_clear(int irq) {
589 int irq_src = IRQ_SRC(irq);
590 int irq_idx = IRQ_IDX(irq);
591 int irq_bit = 1 << irq_idx;
592
593 if (irq_src == 1) {
594 via1[vIFR] = irq_bit;
595 } else if (irq_src == 2) {
596 via2[gIFR] = irq_bit | rbv_clear;
597 } else if (irq_src == 7) {
598 /* FIXME: There is no way to clear an individual nubus slot
599 * IRQ flag, other than getting the device to do it.
600 */
601 }
602}
603
604/*
605 * Returns nonzero if an interrupt is pending on the given
606 * VIA/IRQ combination.
607 */
608
609int via_irq_pending(int irq)
610{
611 int irq_src = IRQ_SRC(irq);
612 int irq_idx = IRQ_IDX(irq);
613 int irq_bit = 1 << irq_idx;
614
615 if (irq_src == 1) {
616 return via1[vIFR] & irq_bit;
617 } else if (irq_src == 2) {
618 return via2[gIFR] & irq_bit;
619 } else if (irq_src == 7) {
620 /* Always 0 for MAC_VIA_QUADRA if the slot irq is disabled. */
621 return ~via2[gBufA] & irq_bit;
622 }
623 return 0;
624}
625
626void via1_set_head(int head) 609void via1_set_head(int head)
627{ 610{
628 if (head == 0) 611 if (head == 0)
@@ -631,3 +614,9 @@ void via1_set_head(int head)
631 via1[vBufA] |= VIA1A_vHeadSel; 614 via1[vBufA] |= VIA1A_vHeadSel;
632} 615}
633EXPORT_SYMBOL(via1_set_head); 616EXPORT_SYMBOL(via1_set_head);
617
618int via2_scsi_drq_pending(void)
619{
620 return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ));
621}
622EXPORT_SYMBOL(via2_scsi_drq_pending);
diff --git a/arch/m68k/mm/Makefile b/arch/m68k/mm/Makefile
index 09cadf1058d5..cfbf3205724a 100644
--- a/arch/m68k/mm/Makefile
+++ b/arch/m68k/mm/Makefile
@@ -4,6 +4,8 @@
4 4
5obj-y := init.o 5obj-y := init.o
6 6
7obj-$(CONFIG_MMU) += cache.o fault.o hwtest.o 7obj-$(CONFIG_MMU) += cache.o fault.o
8obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o 8obj-$(CONFIG_MMU_MOTOROLA) += kmap.o memory.o motorola.o hwtest.o
9obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o 9obj-$(CONFIG_MMU_SUN3) += sun3kmap.o sun3mmu.o hwtest.o
10obj-$(CONFIG_MMU_COLDFIRE) += kmap.o memory.o mcfmmu.o
11
diff --git a/arch/m68k/mm/cache.c b/arch/m68k/mm/cache.c
index 5437fff5fe07..3d84c1f2ffb2 100644
--- a/arch/m68k/mm/cache.c
+++ b/arch/m68k/mm/cache.c
@@ -52,9 +52,9 @@ static unsigned long virt_to_phys_slow(unsigned long vaddr)
52 unsigned long *descaddr; 52 unsigned long *descaddr;
53 53
54 asm volatile ("ptestr %3,%2@,#7,%0\n\t" 54 asm volatile ("ptestr %3,%2@,#7,%0\n\t"
55 "pmove %%psr,%1@" 55 "pmove %%psr,%1"
56 : "=a&" (descaddr) 56 : "=a&" (descaddr), "=m" (mmusr)
57 : "a" (&mmusr), "a" (vaddr), "d" (get_fs().seg)); 57 : "a" (vaddr), "d" (get_fs().seg));
58 if (mmusr & (MMU_I|MMU_B|MMU_L)) 58 if (mmusr & (MMU_I|MMU_B|MMU_L))
59 return 0; 59 return 0;
60 descaddr = phys_to_virt((unsigned long)descaddr); 60 descaddr = phys_to_virt((unsigned long)descaddr);
@@ -74,8 +74,16 @@ static unsigned long virt_to_phys_slow(unsigned long vaddr)
74/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */ 74/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
75void flush_icache_range(unsigned long address, unsigned long endaddr) 75void flush_icache_range(unsigned long address, unsigned long endaddr)
76{ 76{
77 77 if (CPU_IS_COLDFIRE) {
78 if (CPU_IS_040_OR_060) { 78 unsigned long start, end;
79 start = address & ICACHE_SET_MASK;
80 end = endaddr & ICACHE_SET_MASK;
81 if (start > end) {
82 flush_cf_icache(0, end);
83 end = ICACHE_MAX_ADDR;
84 }
85 flush_cf_icache(start, end);
86 } else if (CPU_IS_040_OR_060) {
79 address &= PAGE_MASK; 87 address &= PAGE_MASK;
80 88
81 do { 89 do {
@@ -100,7 +108,17 @@ EXPORT_SYMBOL(flush_icache_range);
100void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, 108void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
101 unsigned long addr, int len) 109 unsigned long addr, int len)
102{ 110{
103 if (CPU_IS_040_OR_060) { 111 if (CPU_IS_COLDFIRE) {
112 unsigned long start, end;
113 start = addr & ICACHE_SET_MASK;
114 end = (addr + len) & ICACHE_SET_MASK;
115 if (start > end) {
116 flush_cf_icache(0, end);
117 end = ICACHE_MAX_ADDR;
118 }
119 flush_cf_icache(start, end);
120
121 } else if (CPU_IS_040_OR_060) {
104 asm volatile ("nop\n\t" 122 asm volatile ("nop\n\t"
105 ".chip 68040\n\t" 123 ".chip 68040\n\t"
106 "cpushp %%bc,(%0)\n\t" 124 "cpushp %%bc,(%0)\n\t"
diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c
index bbe525434ccb..89f3b203814b 100644
--- a/arch/m68k/mm/init_mm.c
+++ b/arch/m68k/mm/init_mm.c
@@ -24,6 +24,7 @@
24#include <asm/page.h> 24#include <asm/page.h>
25#include <asm/pgalloc.h> 25#include <asm/pgalloc.h>
26#include <asm/system.h> 26#include <asm/system.h>
27#include <asm/traps.h>
27#include <asm/machdep.h> 28#include <asm/machdep.h>
28#include <asm/io.h> 29#include <asm/io.h>
29#ifdef CONFIG_ATARI 30#ifdef CONFIG_ATARI
@@ -75,6 +76,38 @@ extern void init_pointer_table(unsigned long ptable);
75 76
76extern pmd_t *zero_pgtable; 77extern pmd_t *zero_pgtable;
77 78
79#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
80#define VECTORS &vectors[0]
81#else
82#define VECTORS _ramvec
83#endif
84
85void __init print_memmap(void)
86{
87#define UL(x) ((unsigned long) (x))
88#define MLK(b, t) UL(b), UL(t), (UL(t) - UL(b)) >> 10
89#define MLM(b, t) UL(b), UL(t), (UL(t) - UL(b)) >> 20
90#define MLK_ROUNDUP(b, t) b, t, DIV_ROUND_UP(((t) - (b)), 1024)
91
92 pr_notice("Virtual kernel memory layout:\n"
93 " vector : 0x%08lx - 0x%08lx (%4ld KiB)\n"
94 " kmap : 0x%08lx - 0x%08lx (%4ld MiB)\n"
95 " vmalloc : 0x%08lx - 0x%08lx (%4ld MiB)\n"
96 " lowmem : 0x%08lx - 0x%08lx (%4ld MiB)\n"
97 " .init : 0x%p" " - 0x%p" " (%4d KiB)\n"
98 " .text : 0x%p" " - 0x%p" " (%4d KiB)\n"
99 " .data : 0x%p" " - 0x%p" " (%4d KiB)\n"
100 " .bss : 0x%p" " - 0x%p" " (%4d KiB)\n",
101 MLK(VECTORS, VECTORS + 256),
102 MLM(KMAP_START, KMAP_END),
103 MLM(VMALLOC_START, VMALLOC_END),
104 MLM(PAGE_OFFSET, (unsigned long)high_memory),
105 MLK_ROUNDUP(__init_begin, __init_end),
106 MLK_ROUNDUP(_stext, _etext),
107 MLK_ROUNDUP(_sdata, _edata),
108 MLK_ROUNDUP(_sbss, _ebss));
109}
110
78void __init mem_init(void) 111void __init mem_init(void)
79{ 112{
80 pg_data_t *pgdat; 113 pg_data_t *pgdat;
@@ -106,7 +139,7 @@ void __init mem_init(void)
106 } 139 }
107 } 140 }
108 141
109#ifndef CONFIG_SUN3 142#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
110 /* insert pointer tables allocated so far into the tablelist */ 143 /* insert pointer tables allocated so far into the tablelist */
111 init_pointer_table((unsigned long)kernel_pg_dir); 144 init_pointer_table((unsigned long)kernel_pg_dir);
112 for (i = 0; i < PTRS_PER_PGD; i++) { 145 for (i = 0; i < PTRS_PER_PGD; i++) {
@@ -125,6 +158,7 @@ void __init mem_init(void)
125 codepages << (PAGE_SHIFT-10), 158 codepages << (PAGE_SHIFT-10),
126 datapages << (PAGE_SHIFT-10), 159 datapages << (PAGE_SHIFT-10),
127 initpages << (PAGE_SHIFT-10)); 160 initpages << (PAGE_SHIFT-10));
161 print_memmap();
128} 162}
129 163
130#ifdef CONFIG_BLK_DEV_INITRD 164#ifdef CONFIG_BLK_DEV_INITRD
diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index 69345849454b..1cc2bed4c3dd 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -171,7 +171,8 @@ void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cachefla
171 break; 171 break;
172 } 172 }
173 } else { 173 } else {
174 physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY); 174 physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED |
175 _PAGE_DIRTY | _PAGE_READWRITE);
175 switch (cacheflag) { 176 switch (cacheflag) {
176 case IOMAP_NOCACHE_SER: 177 case IOMAP_NOCACHE_SER:
177 case IOMAP_NOCACHE_NONSER: 178 case IOMAP_NOCACHE_NONSER:
diff --git a/arch/m68k/mm/mcfmmu.c b/arch/m68k/mm/mcfmmu.c
new file mode 100644
index 000000000000..875b800ef0dd
--- /dev/null
+++ b/arch/m68k/mm/mcfmmu.c
@@ -0,0 +1,199 @@
1/*
2 * Based upon linux/arch/m68k/mm/sun3mmu.c
3 * Based upon linux/arch/ppc/mm/mmu_context.c
4 *
5 * Implementations of mm routines specific to the Coldfire MMU.
6 *
7 * Copyright (c) 2008 Freescale Semiconductor, Inc.
8 */
9
10#include <linux/kernel.h>
11#include <linux/types.h>
12#include <linux/mm.h>
13#include <linux/init.h>
14#include <linux/string.h>
15#include <linux/bootmem.h>
16
17#include <asm/setup.h>
18#include <asm/page.h>
19#include <asm/pgtable.h>
20#include <asm/mmu_context.h>
21#include <asm/mcf_pgalloc.h>
22#include <asm/tlbflush.h>
23
24#define KMAPAREA(x) ((x >= VMALLOC_START) && (x < KMAP_END))
25
26mm_context_t next_mmu_context;
27unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
28atomic_t nr_free_contexts;
29struct mm_struct *context_mm[LAST_CONTEXT+1];
30extern unsigned long num_pages;
31
32void free_initmem(void)
33{
34}
35
36/*
37 * ColdFire paging_init derived from sun3.
38 */
39void __init paging_init(void)
40{
41 pgd_t *pg_dir;
42 pte_t *pg_table;
43 unsigned long address, size;
44 unsigned long next_pgtable, bootmem_end;
45 unsigned long zones_size[MAX_NR_ZONES];
46 enum zone_type zone;
47 int i;
48
49 empty_zero_page = (void *) alloc_bootmem_pages(PAGE_SIZE);
50 memset((void *) empty_zero_page, 0, PAGE_SIZE);
51
52 pg_dir = swapper_pg_dir;
53 memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir));
54
55 size = num_pages * sizeof(pte_t);
56 size = (size + PAGE_SIZE) & ~(PAGE_SIZE-1);
57 next_pgtable = (unsigned long) alloc_bootmem_pages(size);
58
59 bootmem_end = (next_pgtable + size + PAGE_SIZE) & PAGE_MASK;
60 pg_dir += PAGE_OFFSET >> PGDIR_SHIFT;
61
62 address = PAGE_OFFSET;
63 while (address < (unsigned long)high_memory) {
64 pg_table = (pte_t *) next_pgtable;
65 next_pgtable += PTRS_PER_PTE * sizeof(pte_t);
66 pgd_val(*pg_dir) = (unsigned long) pg_table;
67 pg_dir++;
68
69 /* now change pg_table to kernel virtual addresses */
70 for (i = 0; i < PTRS_PER_PTE; ++i, ++pg_table) {
71 pte_t pte = pfn_pte(virt_to_pfn(address), PAGE_INIT);
72 if (address >= (unsigned long) high_memory)
73 pte_val(pte) = 0;
74
75 set_pte(pg_table, pte);
76 address += PAGE_SIZE;
77 }
78 }
79
80 current->mm = NULL;
81
82 for (zone = 0; zone < MAX_NR_ZONES; zone++)
83 zones_size[zone] = 0x0;
84 zones_size[ZONE_DMA] = num_pages;
85 free_area_init(zones_size);
86}
87
88int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word)
89{
90 unsigned long flags, mmuar, mmutr;
91 struct mm_struct *mm;
92 pgd_t *pgd;
93 pmd_t *pmd;
94 pte_t *pte;
95 int asid;
96
97 local_irq_save(flags);
98
99 mmuar = (dtlb) ? mmu_read(MMUAR) :
100 regs->pc + (extension_word * sizeof(long));
101
102 mm = (!user_mode(regs) && KMAPAREA(mmuar)) ? &init_mm : current->mm;
103 if (!mm) {
104 local_irq_restore(flags);
105 return -1;
106 }
107
108 pgd = pgd_offset(mm, mmuar);
109 if (pgd_none(*pgd)) {
110 local_irq_restore(flags);
111 return -1;
112 }
113
114 pmd = pmd_offset(pgd, mmuar);
115 if (pmd_none(*pmd)) {
116 local_irq_restore(flags);
117 return -1;
118 }
119
120 pte = (KMAPAREA(mmuar)) ? pte_offset_kernel(pmd, mmuar)
121 : pte_offset_map(pmd, mmuar);
122 if (pte_none(*pte) || !pte_present(*pte)) {
123 local_irq_restore(flags);
124 return -1;
125 }
126
127 if (write) {
128 if (!pte_write(*pte)) {
129 local_irq_restore(flags);
130 return -1;
131 }
132 set_pte(pte, pte_mkdirty(*pte));
133 }
134
135 set_pte(pte, pte_mkyoung(*pte));
136 asid = mm->context & 0xff;
137 if (!pte_dirty(*pte) && !KMAPAREA(mmuar))
138 set_pte(pte, pte_wrprotect(*pte));
139
140 mmutr = (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | MMUTR_V;
141 if ((mmuar < TASK_UNMAPPED_BASE) || (mmuar >= TASK_SIZE))
142 mmutr |= (pte->pte & CF_PAGE_MMUTR_MASK) >> CF_PAGE_MMUTR_SHIFT;
143 mmu_write(MMUTR, mmutr);
144
145 mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
146 ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
147
148 if (dtlb)
149 mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA);
150 else
151 mmu_write(MMUOR, MMUOR_ITLB | MMUOR_ACC | MMUOR_UAA);
152
153 local_irq_restore(flags);
154 return 0;
155}
156
157/*
158 * Initialize the context management stuff.
159 * The following was taken from arch/ppc/mmu_context.c
160 */
161void __init mmu_context_init(void)
162{
163 /*
164 * Some processors have too few contexts to reserve one for
165 * init_mm, and require using context 0 for a normal task.
166 * Other processors reserve the use of context zero for the kernel.
167 * This code assumes FIRST_CONTEXT < 32.
168 */
169 context_map[0] = (1 << FIRST_CONTEXT) - 1;
170 next_mmu_context = FIRST_CONTEXT;
171 atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1);
172}
173
174/*
175 * Steal a context from a task that has one at the moment.
176 * This is only used on 8xx and 4xx and we presently assume that
177 * they don't do SMP. If they do then thicfpgalloc.hs will have to check
178 * whether the MM we steal is in use.
179 * We also assume that this is only used on systems that don't
180 * use an MMU hash table - this is true for 8xx and 4xx.
181 * This isn't an LRU system, it just frees up each context in
182 * turn (sort-of pseudo-random replacement :). This would be the
183 * place to implement an LRU scheme if anyone was motivated to do it.
184 * -- paulus
185 */
186void steal_context(void)
187{
188 struct mm_struct *mm;
189 /*
190 * free up context `next_mmu_context'
191 * if we shouldn't free context 0, don't...
192 */
193 if (next_mmu_context < FIRST_CONTEXT)
194 next_mmu_context = FIRST_CONTEXT;
195 mm = context_mm[next_mmu_context];
196 flush_tlb_mm(mm);
197 destroy_context(mm);
198}
199
diff --git a/arch/m68k/mm/memory.c b/arch/m68k/mm/memory.c
index 34c77ce24fba..a5dbb74fe1de 100644
--- a/arch/m68k/mm/memory.c
+++ b/arch/m68k/mm/memory.c
@@ -203,7 +203,9 @@ static inline void pushcl040(unsigned long paddr)
203 203
204void cache_clear (unsigned long paddr, int len) 204void cache_clear (unsigned long paddr, int len)
205{ 205{
206 if (CPU_IS_040_OR_060) { 206 if (CPU_IS_COLDFIRE) {
207 flush_cf_bcache(0, DCACHE_MAX_ADDR);
208 } else if (CPU_IS_040_OR_060) {
207 int tmp; 209 int tmp;
208 210
209 /* 211 /*
@@ -250,7 +252,9 @@ EXPORT_SYMBOL(cache_clear);
250 252
251void cache_push (unsigned long paddr, int len) 253void cache_push (unsigned long paddr, int len)
252{ 254{
253 if (CPU_IS_040_OR_060) { 255 if (CPU_IS_COLDFIRE) {
256 flush_cf_bcache(0, DCACHE_MAX_ADDR);
257 } else if (CPU_IS_040_OR_060) {
254 int tmp = PAGE_SIZE; 258 int tmp = PAGE_SIZE;
255 259
256 /* 260 /*
diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c
index 31a66d99cbca..c3fb3bdd7ed9 100644
--- a/arch/m68k/mvme16x/config.c
+++ b/arch/m68k/mvme16x/config.c
@@ -124,6 +124,163 @@ static void __init mvme16x_init_IRQ (void)
124#define PccSCCMICR 0x1d 124#define PccSCCMICR 0x1d
125#define PccSCCTICR 0x1e 125#define PccSCCTICR 0x1e
126#define PccSCCRICR 0x1f 126#define PccSCCRICR 0x1f
127#define PccTPIACKR 0x25
128
129#ifdef CONFIG_EARLY_PRINTK
130
131/**** cd2401 registers ****/
132#define CD2401_ADDR (0xfff45000)
133
134#define CyGFRCR (0x81)
135#define CyCCR (0x13)
136#define CyCLR_CHAN (0x40)
137#define CyINIT_CHAN (0x20)
138#define CyCHIP_RESET (0x10)
139#define CyENB_XMTR (0x08)
140#define CyDIS_XMTR (0x04)
141#define CyENB_RCVR (0x02)
142#define CyDIS_RCVR (0x01)
143#define CyCAR (0xee)
144#define CyIER (0x11)
145#define CyMdmCh (0x80)
146#define CyRxExc (0x20)
147#define CyRxData (0x08)
148#define CyTxMpty (0x02)
149#define CyTxRdy (0x01)
150#define CyLICR (0x26)
151#define CyRISR (0x89)
152#define CyTIMEOUT (0x80)
153#define CySPECHAR (0x70)
154#define CyOVERRUN (0x08)
155#define CyPARITY (0x04)
156#define CyFRAME (0x02)
157#define CyBREAK (0x01)
158#define CyREOIR (0x84)
159#define CyTEOIR (0x85)
160#define CyMEOIR (0x86)
161#define CyNOTRANS (0x08)
162#define CyRFOC (0x30)
163#define CyRDR (0xf8)
164#define CyTDR (0xf8)
165#define CyMISR (0x8b)
166#define CyRISR (0x89)
167#define CyTISR (0x8a)
168#define CyMSVR1 (0xde)
169#define CyMSVR2 (0xdf)
170#define CyDSR (0x80)
171#define CyDCD (0x40)
172#define CyCTS (0x20)
173#define CyDTR (0x02)
174#define CyRTS (0x01)
175#define CyRTPRL (0x25)
176#define CyRTPRH (0x24)
177#define CyCOR1 (0x10)
178#define CyPARITY_NONE (0x00)
179#define CyPARITY_E (0x40)
180#define CyPARITY_O (0xC0)
181#define Cy_5_BITS (0x04)
182#define Cy_6_BITS (0x05)
183#define Cy_7_BITS (0x06)
184#define Cy_8_BITS (0x07)
185#define CyCOR2 (0x17)
186#define CyETC (0x20)
187#define CyCtsAE (0x02)
188#define CyCOR3 (0x16)
189#define Cy_1_STOP (0x02)
190#define Cy_2_STOP (0x04)
191#define CyCOR4 (0x15)
192#define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
193#define CyCOR5 (0x14)
194#define CyCOR6 (0x18)
195#define CyCOR7 (0x07)
196#define CyRBPR (0xcb)
197#define CyRCOR (0xc8)
198#define CyTBPR (0xc3)
199#define CyTCOR (0xc0)
200#define CySCHR1 (0x1f)
201#define CySCHR2 (0x1e)
202#define CyTPR (0xda)
203#define CyPILR1 (0xe3)
204#define CyPILR2 (0xe0)
205#define CyPILR3 (0xe1)
206#define CyCMR (0x1b)
207#define CyASYNC (0x02)
208#define CyLICR (0x26)
209#define CyLIVR (0x09)
210#define CySCRL (0x23)
211#define CySCRH (0x22)
212#define CyTFTC (0x80)
213
214static void cons_write(struct console *co, const char *str, unsigned count)
215{
216 volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
217 volatile u_char sink;
218 u_char ier;
219 int port;
220 u_char do_lf = 0;
221 int i = 0;
222
223 /* Ensure transmitter is enabled! */
224
225 port = 0;
226 base_addr[CyCAR] = (u_char)port;
227 while (base_addr[CyCCR])
228 ;
229 base_addr[CyCCR] = CyENB_XMTR;
230
231 ier = base_addr[CyIER];
232 base_addr[CyIER] = CyTxMpty;
233
234 while (1) {
235 if (pcc2chip[PccSCCTICR] & 0x20)
236 {
237 /* We have a Tx int. Acknowledge it */
238 sink = pcc2chip[PccTPIACKR];
239 if ((base_addr[CyLICR] >> 2) == port) {
240 if (i == count) {
241 /* Last char of string is now output */
242 base_addr[CyTEOIR] = CyNOTRANS;
243 break;
244 }
245 if (do_lf) {
246 base_addr[CyTDR] = '\n';
247 str++;
248 i++;
249 do_lf = 0;
250 }
251 else if (*str == '\n') {
252 base_addr[CyTDR] = '\r';
253 do_lf = 1;
254 }
255 else {
256 base_addr[CyTDR] = *str++;
257 i++;
258 }
259 base_addr[CyTEOIR] = 0;
260 }
261 else
262 base_addr[CyTEOIR] = CyNOTRANS;
263 }
264 }
265
266 base_addr[CyIER] = ier;
267}
268
269static struct console cons_info =
270{
271 .name = "sercon",
272 .write = cons_write,
273 .flags = CON_PRINTBUFFER | CON_BOOT,
274 .index = -1,
275};
276
277static void __init mvme16x_early_console(void)
278{
279 register_console(&cons_info);
280
281 printk(KERN_INFO "MVME16x: early console registered\n");
282}
283#endif
127 284
128void __init config_mvme16x(void) 285void __init config_mvme16x(void)
129{ 286{
@@ -183,6 +340,9 @@ void __init config_mvme16x(void)
183 pcc2chip[PccSCCMICR] = 0x10; 340 pcc2chip[PccSCCMICR] = 0x10;
184 pcc2chip[PccSCCTICR] = 0x10; 341 pcc2chip[PccSCCTICR] = 0x10;
185 pcc2chip[PccSCCRICR] = 0x10; 342 pcc2chip[PccSCCRICR] = 0x10;
343#ifdef CONFIG_EARLY_PRINTK
344 mvme16x_early_console();
345#endif
186 } 346 }
187} 347}
188 348
diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c
index 78130984db95..ee043540bfa2 100644
--- a/arch/m68k/platform/54xx/config.c
+++ b/arch/m68k/platform/54xx/config.c
@@ -13,11 +13,17 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/mm.h>
17#include <linux/bootmem.h>
18#include <asm/pgalloc.h>
16#include <asm/machdep.h> 19#include <asm/machdep.h>
17#include <asm/coldfire.h> 20#include <asm/coldfire.h>
18#include <asm/m54xxsim.h> 21#include <asm/m54xxsim.h>
19#include <asm/mcfuart.h> 22#include <asm/mcfuart.h>
20#include <asm/m54xxgpt.h> 23#include <asm/m54xxgpt.h>
24#ifdef CONFIG_MMU
25#include <asm/mmu_context.h>
26#endif
21 27
22/***************************************************************************/ 28/***************************************************************************/
23 29
@@ -95,8 +101,49 @@ static void mcf54xx_reset(void)
95 101
96/***************************************************************************/ 102/***************************************************************************/
97 103
104#ifdef CONFIG_MMU
105
106unsigned long num_pages;
107
108static void __init mcf54xx_bootmem_alloc(void)
109{
110 unsigned long start_pfn;
111 unsigned long memstart;
112
113 /* _rambase and _ramend will be naturally page aligned */
114 m68k_memory[0].addr = _rambase;
115 m68k_memory[0].size = _ramend - _rambase;
116
117 /* compute total pages in system */
118 num_pages = (_ramend - _rambase) >> PAGE_SHIFT;
119
120 /* page numbers */
121 memstart = PAGE_ALIGN(_ramstart);
122 min_low_pfn = _rambase >> PAGE_SHIFT;
123 start_pfn = memstart >> PAGE_SHIFT;
124 max_low_pfn = _ramend >> PAGE_SHIFT;
125 high_memory = (void *)_ramend;
126
127 m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6;
128 module_fixup(NULL, __start_fixup, __stop_fixup);
129
130 /* setup bootmem data */
131 m68k_setup_node(0);
132 memstart += init_bootmem_node(NODE_DATA(0), start_pfn,
133 min_low_pfn, max_low_pfn);
134 free_bootmem_node(NODE_DATA(0), memstart, _ramend - memstart);
135}
136
137#endif /* CONFIG_MMU */
138
139/***************************************************************************/
140
98void __init config_BSP(char *commandp, int size) 141void __init config_BSP(char *commandp, int size)
99{ 142{
143#ifdef CONFIG_MMU
144 mcf54xx_bootmem_alloc();
145 mmu_context_init();
146#endif
100 mach_reset = mcf54xx_reset; 147 mach_reset = mcf54xx_reset;
101 m54xx_uarts_init(); 148 m54xx_uarts_init();
102} 149}
diff --git a/arch/m68k/platform/68328/Makefile b/arch/m68k/platform/68328/Makefile
index e4dfd8fde068..ee61bf84d4a0 100644
--- a/arch/m68k/platform/68328/Makefile
+++ b/arch/m68k/platform/68328/Makefile
@@ -14,12 +14,8 @@ obj-$(CONFIG_M68328) += config.o
14obj-$(CONFIG_ROM) += romvec.o 14obj-$(CONFIG_ROM) += romvec.o
15 15
16extra-y := head.o 16extra-y := head.o
17extra-$(CONFIG_M68328) += bootlogo.rh head.o
18
19$(obj)/bootlogo.rh: $(src)/bootlogo.h
20 perl $(src)/bootlogo.pl < $(src)/bootlogo.h > $(obj)/bootlogo.rh
21 17
22$(obj)/head.o: $(obj)/$(head-y) 18$(obj)/head.o: $(obj)/$(head-y)
23 ln -sf $(head-y) $(obj)/head.o 19 ln -sf $(head-y) $(obj)/head.o
24 20
25clean-files := $(obj)/bootlogo.rh $(obj)/head.o $(head-y) 21clean-files := $(obj)/head.o $(head-y)
diff --git a/arch/m68k/platform/68328/bootlogo.h b/arch/m68k/platform/68328/bootlogo.h
index 67bc2c17386e..b896c933fafc 100644
--- a/arch/m68k/platform/68328/bootlogo.h
+++ b/arch/m68k/platform/68328/bootlogo.h
@@ -1,6 +1,6 @@
1#define bootlogo_width 160 1#define bootlogo_width 160
2#define bootlogo_height 160 2#define bootlogo_height 160
3static unsigned char bootlogo_bits[] = { 3unsigned char __attribute__ ((aligned(16))) bootlogo_bits[] = {
4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x01, 0x00, 0x00, 0x00, 4 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x01, 0x00, 0x00, 0x00,
5 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 5 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
6 0x00, 0x00, 0x40, 0x55, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 6 0x00, 0x00, 0x40, 0x55, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
diff --git a/arch/m68k/platform/68328/bootlogo.pl b/arch/m68k/platform/68328/bootlogo.pl
deleted file mode 100644
index b04ae3f50da5..000000000000
--- a/arch/m68k/platform/68328/bootlogo.pl
+++ /dev/null
@@ -1,10 +0,0 @@
1
2$_ = join("", <>);
3
4s/(0x[0-9a-f]{2})/sprintf("0x%.2x",ord(pack("b8",unpack("B8",chr(hex($1))))))/gei;
5
6s/^ / .byte /gm;
7s/[,};]+$//gm;
8s/^static.*//gm;
9
10print $_;
diff --git a/arch/m68k/platform/68328/config.c b/arch/m68k/platform/68328/config.c
index a7bd21deb00f..d70bf2623db1 100644
--- a/arch/m68k/platform/68328/config.c
+++ b/arch/m68k/platform/68328/config.c
@@ -20,6 +20,9 @@
20#include <asm/system.h> 20#include <asm/system.h>
21#include <asm/machdep.h> 21#include <asm/machdep.h>
22#include <asm/MC68328.h> 22#include <asm/MC68328.h>
23#if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD)
24#include "bootlogo.h"
25#endif
23 26
24/***************************************************************************/ 27/***************************************************************************/
25 28
diff --git a/arch/m68k/platform/68328/head-pilot.S b/arch/m68k/platform/68328/head-pilot.S
index aecff532b343..2ebfd6420818 100644
--- a/arch/m68k/platform/68328/head-pilot.S
+++ b/arch/m68k/platform/68328/head-pilot.S
@@ -24,19 +24,7 @@
24.global _ramstart 24.global _ramstart
25.global _ramend 25.global _ramend
26 26
27.global penguin_bits 27.global bootlogo_bits
28
29#ifdef CONFIG_PILOT
30
31#define IMR 0xFFFFF304
32
33 .data
34 .align 16
35
36penguin_bits:
37#include "bootlogo.rh"
38
39#endif
40 28
41/*****************************************************************************/ 29/*****************************************************************************/
42 30
@@ -185,9 +173,6 @@ L3:
185 moveq #79, %d7 173 moveq #79, %d7
186 movel %d0, _ramend 174 movel %d0, _ramend
187 175
188 movel %a3, %d0
189 movel %d0, rom_length
190
191 pea 0 176 pea 0
192 pea env 177 pea env
193 pea %sp@(4) 178 pea %sp@(4)
@@ -196,7 +181,7 @@ L3:
196 DBG_PUTC('H') 181 DBG_PUTC('H')
197 182
198#ifdef CONFIG_PILOT 183#ifdef CONFIG_PILOT
199 movel #penguin_bits, 0xFFFFFA00 184 movel #bootlogo_bits, 0xFFFFFA00
200 moveb #10, 0xFFFFFA05 185 moveb #10, 0xFFFFFA05
201 movew #160, 0xFFFFFA08 186 movew #160, 0xFFFFFA08
202 movew #160, 0xFFFFFA0A 187 movew #160, 0xFFFFFA0A
diff --git a/arch/m68k/platform/68328/head-rom.S b/arch/m68k/platform/68328/head-rom.S
index 6ec77d3ea0b3..a5ff96d0295f 100644
--- a/arch/m68k/platform/68328/head-rom.S
+++ b/arch/m68k/platform/68328/head-rom.S
@@ -8,7 +8,7 @@
8 .global _ramend 8 .global _ramend
9 9
10#ifdef CONFIG_INIT_LCD 10#ifdef CONFIG_INIT_LCD
11 .global splash_bits 11 .global bootlogo_bits
12#endif 12#endif
13 13
14 .data 14 .data
@@ -29,16 +29,11 @@ _ramend:
29 29
30#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE) 30#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)
31 31
32#ifdef CONFIG_INIT_LCD
33splash_bits:
34#include "bootlogo.rh"
35#endif
36
37 .text 32 .text
38_start: 33_start:
39_stext: movew #0x2700,%sr 34_stext: movew #0x2700,%sr
40#ifdef CONFIG_INIT_LCD 35#ifdef CONFIG_INIT_LCD
41 movel #splash_bits, 0xfffffA00 /* LSSA */ 36 movel #bootlogo_bits, 0xfffffA00 /* LSSA */
42 moveb #0x28, 0xfffffA05 /* LVPW */ 37 moveb #0x28, 0xfffffA05 /* LVPW */
43 movew #0x280, 0xFFFFFa08 /* LXMAX */ 38 movew #0x280, 0xFFFFFa08 /* LXMAX */
44 movew #0x1df, 0xFFFFFa0a /* LYMAX */ 39 movew #0x1df, 0xFFFFFa0a /* LYMAX */
diff --git a/arch/m68k/platform/68328/timers.c b/arch/m68k/platform/68328/timers.c
index 309f725995bf..f2678866067b 100644
--- a/arch/m68k/platform/68328/timers.c
+++ b/arch/m68k/platform/68328/timers.c
@@ -93,7 +93,6 @@ static struct clocksource m68328_clk = {
93 .name = "timer", 93 .name = "timer",
94 .rating = 250, 94 .rating = 250,
95 .read = m68328_read_clk, 95 .read = m68328_read_clk,
96 .shift = 20,
97 .mask = CLOCKSOURCE_MASK(32), 96 .mask = CLOCKSOURCE_MASK(32),
98 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 97 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
99}; 98};
@@ -115,8 +114,7 @@ void hw_timer_init(void)
115 114
116 /* Enable timer 1 */ 115 /* Enable timer 1 */
117 TCTL |= TCTL_TEN; 116 TCTL |= TCTL_TEN;
118 m68328_clk.mult = clocksource_hz2mult(TICKS_PER_JIFFY*HZ, m68328_clk.shift); 117 clocksource_register_hz(&m68328_clk, TICKS_PER_JIFFY*HZ);
119 clocksource_register(&m68328_clk);
120} 118}
121 119
122/***************************************************************************/ 120/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/dma_timer.c b/arch/m68k/platform/coldfire/dma_timer.c
index a5f562823d7a..235ad57c4707 100644
--- a/arch/m68k/platform/coldfire/dma_timer.c
+++ b/arch/m68k/platform/coldfire/dma_timer.c
@@ -44,7 +44,6 @@ static struct clocksource clocksource_cf_dt = {
44 .rating = 200, 44 .rating = 200,
45 .read = cf_dt_get_cycles, 45 .read = cf_dt_get_cycles,
46 .mask = CLOCKSOURCE_MASK(32), 46 .mask = CLOCKSOURCE_MASK(32),
47 .shift = 20,
48 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 47 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
49}; 48};
50 49
@@ -60,9 +59,7 @@ static int __init init_cf_dt_clocksource(void)
60 __raw_writeb(0x00, DTER0); 59 __raw_writeb(0x00, DTER0);
61 __raw_writel(0x00000000, DTRR0); 60 __raw_writel(0x00000000, DTRR0);
62 __raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0); 61 __raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0);
63 clocksource_cf_dt.mult = clocksource_hz2mult(DMA_FREQ, 62 return clocksource_register_hz(&clocksource_cf_dt, DMA_FREQ);
64 clocksource_cf_dt.shift);
65 return clocksource_register(&clocksource_cf_dt);
66} 63}
67 64
68arch_initcall(init_cf_dt_clocksource); 65arch_initcall(init_cf_dt_clocksource);
diff --git a/arch/m68k/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S
index 3157461a8d1d..281e38c2b6c7 100644
--- a/arch/m68k/platform/coldfire/entry.S
+++ b/arch/m68k/platform/coldfire/entry.S
@@ -54,7 +54,6 @@ sw_usp:
54.globl ret_from_signal 54.globl ret_from_signal
55.globl sys_call_table 55.globl sys_call_table
56.globl inthandler 56.globl inthandler
57.globl fasthandler
58 57
59enosys: 58enosys:
60 mov.l #sys_ni_syscall,%d3 59 mov.l #sys_ni_syscall,%d3
@@ -63,6 +62,7 @@ enosys:
63ENTRY(system_call) 62ENTRY(system_call)
64 SAVE_ALL_SYS 63 SAVE_ALL_SYS
65 move #0x2000,%sr /* enable intrs again */ 64 move #0x2000,%sr /* enable intrs again */
65 GET_CURRENT(%d2)
66 66
67 cmpl #NR_syscalls,%d0 67 cmpl #NR_syscalls,%d0
68 jcc enosys 68 jcc enosys
@@ -136,7 +136,7 @@ Luser_return:
136 movel %sp,%d1 /* get thread_info pointer */ 136 movel %sp,%d1 /* get thread_info pointer */
137 andl #-THREAD_SIZE,%d1 /* at base of kernel stack */ 137 andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
138 movel %d1,%a0 138 movel %d1,%a0
139 movel %a0@(TINFO_FLAGS),%d1 /* get thread_info->flags */ 139 moveb %a0@(TINFO_FLAGS+3),%d1 /* thread_info->flags (low 8 bits) */
140 jne Lwork_to_do /* still work to do */ 140 jne Lwork_to_do /* still work to do */
141 141
142Lreturn: 142Lreturn:
@@ -148,8 +148,6 @@ Lwork_to_do:
148 btst #TIF_NEED_RESCHED,%d1 148 btst #TIF_NEED_RESCHED,%d1
149 jne reschedule 149 jne reschedule
150 150
151 /* GERG: do we need something here for TRACEing?? */
152
153Lsignal_return: 151Lsignal_return:
154 subql #4,%sp /* dummy return address */ 152 subql #4,%sp /* dummy return address */
155 SAVE_SWITCH_STACK 153 SAVE_SWITCH_STACK
@@ -166,6 +164,7 @@ Lsignal_return:
166 */ 164 */
167ENTRY(inthandler) 165ENTRY(inthandler)
168 SAVE_ALL_INT 166 SAVE_ALL_INT
167 GET_CURRENT(%d2)
169 168
170 movew %sp@(PT_OFF_FORMATVEC),%d0 /* put exception # in d0 */ 169 movew %sp@(PT_OFF_FORMATVEC),%d0 /* put exception # in d0 */
171 andl #0x03fc,%d0 /* mask out vector only */ 170 andl #0x03fc,%d0 /* mask out vector only */
@@ -191,7 +190,9 @@ ENTRY(resume)
191 movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */ 190 movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */
192 RDUSP /* movel %usp,%a3 */ 191 RDUSP /* movel %usp,%a3 */
193 movel %a3,%a0@(TASK_THREAD+THREAD_USP) /* save thread user stack */ 192 movel %a3,%a0@(TASK_THREAD+THREAD_USP) /* save thread user stack */
194 193#ifdef CONFIG_MMU
194 movel %a1,%a2 /* set new current */
195#endif
195 movel %a1@(TASK_THREAD+THREAD_USP),%a3 /* restore thread user stack */ 196 movel %a1@(TASK_THREAD+THREAD_USP),%a3 /* restore thread user stack */
196 WRUSP /* movel %a3,%usp */ 197 WRUSP /* movel %a3,%usp */
197 movel %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new kernel stack */ 198 movel %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new kernel stack */
diff --git a/arch/m68k/platform/coldfire/gpio.c b/arch/m68k/platform/coldfire/gpio.c
index ff0045793450..292a1a5a2d7c 100644
--- a/arch/m68k/platform/coldfire/gpio.c
+++ b/arch/m68k/platform/coldfire/gpio.c
@@ -15,7 +15,7 @@
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/sysdev.h> 18#include <linux/device.h>
19 19
20#include <asm/gpio.h> 20#include <asm/gpio.h>
21#include <asm/pinmux.h> 21#include <asm/pinmux.h>
@@ -115,13 +115,14 @@ void mcf_gpio_free(struct gpio_chip *chip, unsigned offset)
115 mcf_pinmux_release(mcf_chip->gpio_to_pinmux[offset], 0); 115 mcf_pinmux_release(mcf_chip->gpio_to_pinmux[offset], 0);
116} 116}
117 117
118struct sysdev_class mcf_gpio_sysclass = { 118struct bus_type mcf_gpio_subsys = {
119 .name = "gpio", 119 .name = "gpio",
120 .dev_name = "gpio",
120}; 121};
121 122
122static int __init mcf_gpio_sysinit(void) 123static int __init mcf_gpio_sysinit(void)
123{ 124{
124 return sysdev_class_register(&mcf_gpio_sysclass); 125 return subsys_system_register(&mcf_gpio_subsys, NULL);
125} 126}
126 127
127core_initcall(mcf_gpio_sysinit); 128core_initcall(mcf_gpio_sysinit);
diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S
index c33483824a2e..38f04a3f6207 100644
--- a/arch/m68k/platform/coldfire/head.S
+++ b/arch/m68k/platform/coldfire/head.S
@@ -3,7 +3,7 @@
3/* 3/*
4 * head.S -- common startup code for ColdFire CPUs. 4 * head.S -- common startup code for ColdFire CPUs.
5 * 5 *
6 * (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>. 6 * (C) Copyright 1999-2011, Greg Ungerer <gerg@snapgear.com>.
7 */ 7 */
8 8
9/*****************************************************************************/ 9/*****************************************************************************/
@@ -13,6 +13,7 @@
13#include <asm/asm-offsets.h> 13#include <asm/asm-offsets.h>
14#include <asm/coldfire.h> 14#include <asm/coldfire.h>
15#include <asm/mcfsim.h> 15#include <asm/mcfsim.h>
16#include <asm/mcfmmu.h>
16#include <asm/thread_info.h> 17#include <asm/thread_info.h>
17 18
18/*****************************************************************************/ 19/*****************************************************************************/
@@ -135,6 +136,14 @@ _init_sp:
135 136
136__HEAD 137__HEAD
137 138
139#ifdef CONFIG_MMU
140_start0:
141 jmp _start
142.global kernel_pg_dir
143.equ kernel_pg_dir,_start0
144.equ .,_start0+0x1000
145#endif
146
138/* 147/*
139 * This is the codes first entry point. This is where it all 148 * This is the codes first entry point. This is where it all
140 * begins... 149 * begins...
@@ -143,6 +152,9 @@ __HEAD
143_start: 152_start:
144 nop /* filler */ 153 nop /* filler */
145 movew #0x2700, %sr /* no interrupts */ 154 movew #0x2700, %sr /* no interrupts */
155 movel #CACHE_INIT,%d0 /* disable cache */
156 movec %d0,%CACR
157 nop
146#if defined(CONFIG_UBOOT) 158#if defined(CONFIG_UBOOT)
147 movel %sp,_init_sp /* save initial stack pointer */ 159 movel %sp,_init_sp /* save initial stack pointer */
148#endif 160#endif
@@ -176,9 +188,6 @@ _start:
176 * it is very similar. Define the exact settings in the headers 188 * it is very similar. Define the exact settings in the headers
177 * then the code here is the same for all. 189 * then the code here is the same for all.
178 */ 190 */
179 movel #CACHE_INIT,%d0 /* invalidate whole cache */
180 movec %d0,%CACR
181 nop
182 movel #ACR0_MODE,%d0 /* set RAM region for caching */ 191 movel #ACR0_MODE,%d0 /* set RAM region for caching */
183 movec %d0,%ACR0 192 movec %d0,%ACR0
184 movel #ACR1_MODE,%d0 /* anything else to cache? */ 193 movel #ACR1_MODE,%d0 /* anything else to cache? */
@@ -193,6 +202,26 @@ _start:
193 movec %d0,%CACR 202 movec %d0,%CACR
194 nop 203 nop
195 204
205#ifdef CONFIG_MMU
206 /*
207 * Identity mapping for the kernel region.
208 */
209 movel #(MMUBASE+1),%d0 /* enable MMUBAR registers */
210 movec %d0,%MMUBAR
211 movel #MMUOR_CA,%d0 /* clear TLB entries */
212 movel %d0,MMUOR
213 movel #0,%d0 /* set ASID to 0 */
214 movec %d0,%asid
215
216 movel #MMUCR_EN,%d0 /* Enable the identity map */
217 movel %d0,MMUCR
218 nop /* sync i-pipeline */
219
220 movel #_vstart,%a0 /* jump to "virtual" space */
221 jmp %a0@
222_vstart:
223#endif /* CONFIG_MMU */
224
196#ifdef CONFIG_ROMFS_FS 225#ifdef CONFIG_ROMFS_FS
197 /* 226 /*
198 * Move ROM filesystem above bss :-) 227 * Move ROM filesystem above bss :-)
@@ -238,6 +267,22 @@ _clear_bss:
238 lea init_thread_union,%a0 267 lea init_thread_union,%a0
239 lea THREAD_SIZE(%a0),%sp 268 lea THREAD_SIZE(%a0),%sp
240 269
270#ifdef CONFIG_MMU
271.global m68k_cputype
272.global m68k_mmutype
273.global m68k_fputype
274.global m68k_machtype
275 movel #CPU_COLDFIRE,%d0
276 movel %d0,m68k_cputype /* Mark us as a ColdFire */
277 movel #MMU_COLDFIRE,%d0
278 movel %d0,m68k_mmutype
279 movel #FPU_COLDFIRE,%d0
280 movel %d0,m68k_fputype
281 movel #MACH_M54XX,%d0
282 movel %d0,m68k_machtype /* Mark us as a 54xx machine */
283 lea init_task,%a2 /* Set "current" init task */
284#endif
285
241 /* 286 /*
242 * Assember start up done, start code proper. 287 * Assember start up done, start code proper.
243 */ 288 */
diff --git a/arch/m68k/platform/coldfire/pit.c b/arch/m68k/platform/coldfire/pit.c
index c2b980926bec..02663d25822d 100644
--- a/arch/m68k/platform/coldfire/pit.c
+++ b/arch/m68k/platform/coldfire/pit.c
@@ -144,7 +144,6 @@ static struct clocksource pit_clk = {
144 .name = "pit", 144 .name = "pit",
145 .rating = 100, 145 .rating = 100,
146 .read = pit_read_clk, 146 .read = pit_read_clk,
147 .shift = 20,
148 .mask = CLOCKSOURCE_MASK(32), 147 .mask = CLOCKSOURCE_MASK(32),
149}; 148};
150 149
@@ -162,8 +161,7 @@ void hw_timer_init(void)
162 161
163 setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq); 162 setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq);
164 163
165 pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift); 164 clocksource_register_hz(&pit_clk, FREQ);
166 clocksource_register(&pit_clk);
167} 165}
168 166
169/***************************************************************************/ 167/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c
index 6a85daf9a7fd..54e1452f853a 100644
--- a/arch/m68k/platform/coldfire/sltimers.c
+++ b/arch/m68k/platform/coldfire/sltimers.c
@@ -98,23 +98,25 @@ static struct irqaction mcfslt_timer_irq = {
98static cycle_t mcfslt_read_clk(struct clocksource *cs) 98static cycle_t mcfslt_read_clk(struct clocksource *cs)
99{ 99{
100 unsigned long flags; 100 unsigned long flags;
101 u32 cycles; 101 u32 cycles, scnt;
102 u16 scnt;
103 102
104 local_irq_save(flags); 103 local_irq_save(flags);
105 scnt = __raw_readl(TA(MCFSLT_SCNT)); 104 scnt = __raw_readl(TA(MCFSLT_SCNT));
106 cycles = mcfslt_cnt; 105 cycles = mcfslt_cnt;
106 if (__raw_readl(TA(MCFSLT_SSR)) & MCFSLT_SSR_TE) {
107 cycles += mcfslt_cycles_per_jiffy;
108 scnt = __raw_readl(TA(MCFSLT_SCNT));
109 }
107 local_irq_restore(flags); 110 local_irq_restore(flags);
108 111
109 /* subtract because slice timers count down */ 112 /* subtract because slice timers count down */
110 return cycles - scnt; 113 return cycles + ((mcfslt_cycles_per_jiffy - 1) - scnt);
111} 114}
112 115
113static struct clocksource mcfslt_clk = { 116static struct clocksource mcfslt_clk = {
114 .name = "slt", 117 .name = "slt",
115 .rating = 250, 118 .rating = 250,
116 .read = mcfslt_read_clk, 119 .read = mcfslt_read_clk,
117 .shift = 20,
118 .mask = CLOCKSOURCE_MASK(32), 120 .mask = CLOCKSOURCE_MASK(32),
119 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 121 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
120}; 122};
@@ -136,8 +138,7 @@ void hw_timer_init(void)
136 138
137 setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq); 139 setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq);
138 140
139 mcfslt_clk.mult = clocksource_hz2mult(MCF_BUSCLK, mcfslt_clk.shift); 141 clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK);
140 clocksource_register(&mcfslt_clk);
141 142
142#ifdef CONFIG_HIGHPROFILE 143#ifdef CONFIG_HIGHPROFILE
143 mcfslt_profile_init(); 144 mcfslt_profile_init();
diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c
index 60242f65fea9..0d90da32fcdb 100644
--- a/arch/m68k/platform/coldfire/timers.c
+++ b/arch/m68k/platform/coldfire/timers.c
@@ -88,7 +88,6 @@ static struct clocksource mcftmr_clk = {
88 .name = "tmr", 88 .name = "tmr",
89 .rating = 250, 89 .rating = 250,
90 .read = mcftmr_read_clk, 90 .read = mcftmr_read_clk,
91 .shift = 20,
92 .mask = CLOCKSOURCE_MASK(32), 91 .mask = CLOCKSOURCE_MASK(32),
93 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 92 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
94}; 93};
@@ -109,8 +108,7 @@ void hw_timer_init(void)
109 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 | 108 __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
110 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR)); 109 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
111 110
112 mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift); 111 clocksource_register_hz(&mcftmr_clk, FREQ);
113 clocksource_register(&mcftmr_clk);
114 112
115 setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq); 113 setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
116 114
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-01 06:18:55 -0400