m68knommu: fix multi-function pin setup for FEC module on ColdFire 523x

The multi-function pin setup code for the FEC ethernet module is using just
plain wrong. Looks like it was cut-and-pasted from other init code. It has
hard coded register addresses that are incorrect for the 523x, and it is
manipulating bits that don't make sense.

Add proper register definitions for the Pin Assignment registers of the 532x,
and then use them to fix the setup code for the FEC hardware module.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

2 files changed, 9 insertions, 7 deletions

diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index 91d3abc3f2a5..d1d4ec74d286 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -189,8 +189,16 @@
 /*
  * Pin Assignment
 */
+#define MCFGPIO_PAR_AD          (MCF_IPSBAR + 0x100040)
+#define MCFGPIO_PAR_BUSCTL      (MCF_IPSBAR + 0x100042)
+#define MCFGPIO_PAR_BS          (MCF_IPSBAR + 0x100044)
+#define MCFGPIO_PAR_CS          (MCF_IPSBAR + 0x100045)
+#define MCFGPIO_PAR_SDRAM       (MCF_IPSBAR + 0x100046)
+#define MCFGPIO_PAR_FECI2C      (MCF_IPSBAR + 0x100047)
+#define MCFGPIO_PAR_UART        (MCF_IPSBAR + 0x100048)
 #define MCFGPIO_PAR_QSPI        (MCF_IPSBAR + 0x10004A)
 #define MCFGPIO_PAR_TIMER       (MCF_IPSBAR + 0x10004C)
+#define MCFGPIO_PAR_ETPU        (MCF_IPSBAR + 0x10004E)
 
 /*
  * DMA unit base addresses.
diff --git a/arch/m68k/platform/coldfire/m523x.c b/arch/m68k/platform/coldfire/m523x.c
index d47dfd8f50a2..ff37fe9553ea 100644
--- a/arch/m68k/platform/coldfire/m523x.c
+++ b/arch/m68k/platform/coldfire/m523x.c
@@ -42,14 +42,8 @@ static void __init m523x_qspi_init(void)
 
 static void __init m523x_fec_init(void)
 {
-        u16 par;
-        u8 v;
-
         /* Set multi-function pins to ethernet use */
-        par = readw(MCF_IPSBAR + 0x100082);
-        writew(par | 0xf00, MCF_IPSBAR + 0x100082);
-        v = readb(MCF_IPSBAR + 0x100078);
-        writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
+        writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
 }
 
 /***************************************************************************/