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authorGreg Ungerer <gerg@uclinux.org>2012-11-04 21:01:38 -0500
committerGreg Ungerer <gerg@uclinux.org>2013-04-28 19:17:58 -0400
commit6eac402783441543ffc582f5e6c942d488d848b0 (patch)
tree8abb904035e4dc624da23e76dd4007eaa577443d /arch/m68k
parent0d5340f93cc80418ab49af0fa1387403d0227dd5 (diff)
m68knommu: create and use a common M53xx ColdFire class of CPUs
The current CONFIG_M532x support definitions are actually common to a larger set of version 3 ColdFire CPU types. In the future we want to add support for the 537x family. It is very similar to the 532x internally, and will be able to use most of the same definitions. Create a CONFIG_M53xx option that is enabled to support any of the common 532x and 537x CPU types. Convert the current users of CONFIG_M532x to use CONFIG_M53xx instead. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/Kconfig.cpu4
-rw-r--r--arch/m68k/include/asm/dma.h2
-rw-r--r--arch/m68k/include/asm/m53xxacr.h4
-rw-r--r--arch/m68k/include/asm/m53xxsim.h (renamed from arch/m68k/include/asm/m532xsim.h)10
-rw-r--r--arch/m68k/include/asm/mcfgpio.h10
-rw-r--r--arch/m68k/include/asm/mcfsim.h4
-rw-r--r--arch/m68k/include/asm/mcftimer.h2
-rw-r--r--arch/m68k/platform/coldfire/timers.c2
8 files changed, 21 insertions, 17 deletions
diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
index b1cfff832fb5..c94b930600b4 100644
--- a/arch/m68k/Kconfig.cpu
+++ b/arch/m68k/Kconfig.cpu
@@ -224,9 +224,13 @@ config M5307
224 help 224 help
225 Motorola ColdFire 5307 processor support. 225 Motorola ColdFire 5307 processor support.
226 226
227config M53xx
228 bool
229
227config M532x 230config M532x
228 bool "MCF532x" 231 bool "MCF532x"
229 depends on !MMU 232 depends on !MMU
233 select M53xx
230 select HAVE_CACHE_CB 234 select HAVE_CACHE_CB
231 help 235 help
232 Freescale (Motorola) ColdFire 532x processor support. 236 Freescale (Motorola) ColdFire 532x processor support.
diff --git a/arch/m68k/include/asm/dma.h b/arch/m68k/include/asm/dma.h
index 0ff3fc6a6d9a..429fe26e320c 100644
--- a/arch/m68k/include/asm/dma.h
+++ b/arch/m68k/include/asm/dma.h
@@ -39,7 +39,7 @@
39#define MAX_M68K_DMA_CHANNELS 4 39#define MAX_M68K_DMA_CHANNELS 4
40#elif defined(CONFIG_M5272) 40#elif defined(CONFIG_M5272)
41#define MAX_M68K_DMA_CHANNELS 1 41#define MAX_M68K_DMA_CHANNELS 1
42#elif defined(CONFIG_M532x) 42#elif defined(CONFIG_M53xx)
43#define MAX_M68K_DMA_CHANNELS 0 43#define MAX_M68K_DMA_CHANNELS 0
44#else 44#else
45#define MAX_M68K_DMA_CHANNELS 2 45#define MAX_M68K_DMA_CHANNELS 2
diff --git a/arch/m68k/include/asm/m53xxacr.h b/arch/m68k/include/asm/m53xxacr.h
index cd952b0a8bd3..3177ce8331d6 100644
--- a/arch/m68k/include/asm/m53xxacr.h
+++ b/arch/m68k/include/asm/m53xxacr.h
@@ -55,8 +55,8 @@
55#define CACHE_SIZE 0x2000 /* 8k of unified cache */ 55#define CACHE_SIZE 0x2000 /* 8k of unified cache */
56#define ICACHE_SIZE CACHE_SIZE 56#define ICACHE_SIZE CACHE_SIZE
57#define DCACHE_SIZE CACHE_SIZE 57#define DCACHE_SIZE CACHE_SIZE
58#elif defined(CONFIG_M532x) 58#elif defined(CONFIG_M53xx)
59#define CACHE_SIZE 0x4000 /* 32k of unified cache */ 59#define CACHE_SIZE 0x4000 /* 16k of unified cache */
60#define ICACHE_SIZE CACHE_SIZE 60#define ICACHE_SIZE CACHE_SIZE
61#define DCACHE_SIZE CACHE_SIZE 61#define DCACHE_SIZE CACHE_SIZE
62#endif 62#endif
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m53xxsim.h
index 8668e47ced0e..cfa1d3591e42 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m53xxsim.h
@@ -1,15 +1,15 @@
1/****************************************************************************/ 1/****************************************************************************/
2 2
3/* 3/*
4 * m532xsim.h -- ColdFire 5329 registers 4 * m53xxsim.h -- ColdFire 5329 registers
5 */ 5 */
6 6
7/****************************************************************************/ 7/****************************************************************************/
8#ifndef m532xsim_h 8#ifndef m53xxsim_h
9#define m532xsim_h 9#define m53xxsim_h
10/****************************************************************************/ 10/****************************************************************************/
11 11
12#define CPU_NAME "COLDFIRE(m532x)" 12#define CPU_NAME "COLDFIRE(m53xx)"
13#define CPU_INSTR_PER_JIFFY 3 13#define CPU_INSTR_PER_JIFFY 3
14#define MCF_BUSCLK (MCF_CLK / 3) 14#define MCF_BUSCLK (MCF_CLK / 3)
15 15
@@ -1238,4 +1238,4 @@
1238#define MCFEPORT_EPFR (0xFC094006) 1238#define MCFEPORT_EPFR (0xFC094006)
1239 1239
1240/********************************************************************/ 1240/********************************************************************/
1241#endif /* m532xsim_h */ 1241#endif /* m53xxsim_h */
diff --git a/arch/m68k/include/asm/mcfgpio.h b/arch/m68k/include/asm/mcfgpio.h
index fa1059f50dfc..c41ebf45f1d0 100644
--- a/arch/m68k/include/asm/mcfgpio.h
+++ b/arch/m68k/include/asm/mcfgpio.h
@@ -104,7 +104,7 @@ static inline void gpio_free(unsigned gpio)
104#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \ 104#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
105 defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ 105 defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
106 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ 106 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
107 defined(CONFIG_M532x) || defined(CONFIG_M54xx) || \ 107 defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \
108 defined(CONFIG_M5441x) 108 defined(CONFIG_M5441x)
109 109
110/* These parts have GPIO organized by 8 bit ports */ 110/* These parts have GPIO organized by 8 bit ports */
@@ -139,7 +139,7 @@ static inline void gpio_free(unsigned gpio)
139 139
140#if defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ 140#if defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
141 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ 141 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
142 defined(CONFIG_M532x) || defined(CONFIG_M5441x) 142 defined(CONFIG_M53xx) || defined(CONFIG_M5441x)
143/* 143/*
144 * These parts have an 'Edge' Port module (external interrupt/GPIO) which uses 144 * These parts have an 'Edge' Port module (external interrupt/GPIO) which uses
145 * read-modify-write to change an output and a GPIO module which has separate 145 * read-modify-write to change an output and a GPIO module which has separate
@@ -195,7 +195,7 @@ static inline u32 __mcfgpio_ppdr(unsigned gpio)
195 return MCFSIM2_GPIO1READ; 195 return MCFSIM2_GPIO1READ;
196#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ 196#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
197 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ 197 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
198 defined(CONFIG_M532x) || defined(CONFIG_M5441x) 198 defined(CONFIG_M53xx) || defined(CONFIG_M5441x)
199#if !defined(CONFIG_M5441x) 199#if !defined(CONFIG_M5441x)
200 if (gpio < 8) 200 if (gpio < 8)
201 return MCFEPORT_EPPDR; 201 return MCFEPORT_EPPDR;
@@ -237,7 +237,7 @@ static inline u32 __mcfgpio_podr(unsigned gpio)
237 return MCFSIM2_GPIO1WRITE; 237 return MCFSIM2_GPIO1WRITE;
238#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ 238#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
239 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ 239 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
240 defined(CONFIG_M532x) || defined(CONFIG_M5441x) 240 defined(CONFIG_M53xx) || defined(CONFIG_M5441x)
241#if !defined(CONFIG_M5441x) 241#if !defined(CONFIG_M5441x)
242 if (gpio < 8) 242 if (gpio < 8)
243 return MCFEPORT_EPDR; 243 return MCFEPORT_EPDR;
@@ -279,7 +279,7 @@ static inline u32 __mcfgpio_pddr(unsigned gpio)
279 return MCFSIM2_GPIO1ENABLE; 279 return MCFSIM2_GPIO1ENABLE;
280#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ 280#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
281 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ 281 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
282 defined(CONFIG_M532x) || defined(CONFIG_M5441x) 282 defined(CONFIG_M53xx) || defined(CONFIG_M5441x)
283#if !defined(CONFIG_M5441x) 283#if !defined(CONFIG_M5441x)
284 if (gpio < 8) 284 if (gpio < 8)
285 return MCFEPORT_EPDDR; 285 return MCFEPORT_EPDDR;
diff --git a/arch/m68k/include/asm/mcfsim.h b/arch/m68k/include/asm/mcfsim.h
index a04fd9b2714c..bc867de8a1e9 100644
--- a/arch/m68k/include/asm/mcfsim.h
+++ b/arch/m68k/include/asm/mcfsim.h
@@ -36,8 +36,8 @@
36#elif defined(CONFIG_M5307) 36#elif defined(CONFIG_M5307)
37#include <asm/m5307sim.h> 37#include <asm/m5307sim.h>
38#include <asm/mcfintc.h> 38#include <asm/mcfintc.h>
39#elif defined(CONFIG_M532x) 39#elif defined(CONFIG_M53xx)
40#include <asm/m532xsim.h> 40#include <asm/m53xxsim.h>
41#elif defined(CONFIG_M5407) 41#elif defined(CONFIG_M5407)
42#include <asm/m5407sim.h> 42#include <asm/m5407sim.h>
43#include <asm/mcfintc.h> 43#include <asm/mcfintc.h>
diff --git a/arch/m68k/include/asm/mcftimer.h b/arch/m68k/include/asm/mcftimer.h
index da2fa43c2e45..089f0f150bbf 100644
--- a/arch/m68k/include/asm/mcftimer.h
+++ b/arch/m68k/include/asm/mcftimer.h
@@ -19,7 +19,7 @@
19#define MCFTIMER_TRR 0x04 /* Timer Reference (r/w) */ 19#define MCFTIMER_TRR 0x04 /* Timer Reference (r/w) */
20#define MCFTIMER_TCR 0x08 /* Timer Capture reg (r/w) */ 20#define MCFTIMER_TCR 0x08 /* Timer Capture reg (r/w) */
21#define MCFTIMER_TCN 0x0C /* Timer Counter reg (r/w) */ 21#define MCFTIMER_TCN 0x0C /* Timer Counter reg (r/w) */
22#if defined(CONFIG_M532x) || defined(CONFIG_M5441x) 22#if defined(CONFIG_M53xx) || defined(CONFIG_M5441x)
23#define MCFTIMER_TER 0x03 /* Timer Event reg (r/w) */ 23#define MCFTIMER_TER 0x03 /* Timer Event reg (r/w) */
24#else 24#else
25#define MCFTIMER_TER 0x11 /* Timer Event reg (r/w) */ 25#define MCFTIMER_TER 0x11 /* Timer Event reg (r/w) */
diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c
index 51f6d2af807f..d06068e45764 100644
--- a/arch/m68k/platform/coldfire/timers.c
+++ b/arch/m68k/platform/coldfire/timers.c
@@ -36,7 +36,7 @@
36 */ 36 */
37void coldfire_profile_init(void); 37void coldfire_profile_init(void);
38 38
39#if defined(CONFIG_M532x) || defined(CONFIG_M5441x) 39#if defined(CONFIG_M53xx) || defined(CONFIG_M5441x)
40#define __raw_readtrr __raw_readl 40#define __raw_readtrr __raw_readl
41#define __raw_writetrr __raw_writel 41#define __raw_writetrr __raw_writel
42#else 42#else