m68k: merge m68k and m68knommu arch directories

There is a lot of common code that could be shared between the m68k
and m68knommu arch branches. It makes sense to merge the two branches
into a single directory structure so that we can more easily share
that common code.

This is a brute force merge, based on a script from Stephen King
<sfking@fdwdc.com>, which was originally written by Arnd Bergmann
<arnd@arndb.de>.

> The script was inspired by the script Sam Ravnborg used to merge the
> includes from m68knommu. For those files common to both arches but
> differing in content, the m68k version of the file is renamed to
> <file>_mm.<ext> and the m68knommu version of the file is moved into the
> corresponding m68k directory and renamed <file>_no.<ext> and a small
> wrapper file <file>.<ext> is used to select between the two version. Files
> that are common to both but don't differ are removed from the m68knommu
> tree and files and directories that are unique to the m68knommu tree are
> moved to the m68k tree. Finally, the arch/m68knommu tree is removed.
>
> To select between the the versions of the files, the wrapper uses
>
> #ifdef CONFIG_MMU
> #include <file>_mm.<ext>
> #else
> #include <file>_no.<ext>
> #endif

On top of this file merge I have done a simplistic merge of m68k and
m68knommu Kconfig, which primarily attempts to keep existing options and
menus in place. Other than a handful of options being moved it produces
identical .config outputs on m68k and m68knommu targets I tested it on.

With this in place there is now quite a bit of scope for merge cleanups
in future patches.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

165 files changed, 27737 insertions, 6770 deletions

diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 525174d41679..6e056d3c5d01 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -1,13 +1,11 @@
 config M68K
         bool
         default y
-        select HAVE_AOUT
         select HAVE_IDE
-        select GENERIC_ATOMIC64
-
-config MMU
-        bool
-        default y
+        select HAVE_AOUT if MMU
+        select GENERIC_ATOMIC64 if MMU
+        select HAVE_GENERIC_HARDIRQS if !MMU
+        select GENERIC_HARDIRQS_NO_DEPRECATED if !MMU
 
 config RWSEM_GENERIC_SPINLOCK
         bool
@@ -34,457 +32,67 @@ config TIME_LOW_RES
         bool
         default y
 
-config GENERIC_IOMAP
-        bool
-        default y
-
-config ARCH_MAY_HAVE_PC_FDC
-        bool
-        depends on BROKEN && (Q40 || SUN3X)
-        default y
-
 config NO_IOPORT
         def_bool y
 
 config NO_DMA
-        def_bool SUN3
+        def_bool (MMU && SUN3) || (!MMU && !COLDFIRE)
 
+config ZONE_DMA
+        bool
+        default y
 config HZ
         int
+        default 1000 if CLEOPATRA
         default 100
 
-config ARCH_USES_GETTIMEOFFSET
-        def_bool y
-
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
 
-menu "Platform dependent setup"
-
-config EISA
-        bool
-        ---help---
-          The Extended Industry Standard Architecture (EISA) bus was
-          developed as an open alternative to the IBM MicroChannel bus.
-
-          The EISA bus provided some of the features of the IBM MicroChannel
-          bus while maintaining backward compatibility with cards made for
-          the older ISA bus.  The EISA bus saw limited use between 1988 and
-          1995 when it was made obsolete by the PCI bus.
-
-          Say Y here if you are building a kernel for an EISA-based machine.
-
-          Otherwise, say N.
-
-config MCA
-        bool
-        help
-          MicroChannel Architecture is found in some IBM PS/2 machines and
-          laptops.  It is a bus system similar to PCI or ISA. See
-          <file:Documentation/mca.txt> (and especially the web page given
-          there) before attempting to build an MCA bus kernel.
-
-config PCMCIA
-        tristate
-        ---help---
-          Say Y here if you want to attach PCMCIA- or PC-cards to your Linux
-          computer.  These are credit-card size devices such as network cards,
-          modems or hard drives often used with laptops computers.  There are
-          actually two varieties of these cards: the older 16 bit PCMCIA cards
-          and the newer 32 bit CardBus cards.  If you want to use CardBus
-          cards, you need to say Y here and also to "CardBus support" below.
-
-          To use your PC-cards, you will need supporting software from David
-          Hinds' pcmcia-cs package (see the file <file:Documentation/Changes>
-          for location).  Please also read the PCMCIA-HOWTO, available from
-          <http://www.tldp.org/docs.html#howto>.
-
-          To compile this driver as modules, choose M here: the
-          modules will be called pcmcia_core and ds.
-
-config AMIGA
-        bool "Amiga support"
-        select MMU_MOTOROLA if MMU
-        help
-          This option enables support for the Amiga series of computers. If
-          you plan to use this kernel on an Amiga, say Y here and browse the
-          material available in <file:Documentation/m68k>; otherwise say N.
-
-config ATARI
-        bool "Atari support"
-        select MMU_MOTOROLA if MMU
-        help
-          This option enables support for the 68000-based Atari series of
-          computers (including the TT, Falcon and Medusa). If you plan to use
-          this kernel on an Atari, say Y here and browse the material
-          available in <file:Documentation/m68k>; otherwise say N.
-
-config MAC
-        bool "Macintosh support"
-        select MMU_MOTOROLA if MMU
-        help
-          This option enables support for the Apple Macintosh series of
-          computers (yes, there is experimental support now, at least for part
-          of the series).
-
-          Say N unless you're willing to code the remaining necessary support.
-          ;)
-
-config NUBUS
-        bool
-        depends on MAC
-        default y
-
-config M68K_L2_CACHE
-        bool
-        depends on MAC
-        default y
-
-config APOLLO
-        bool "Apollo support"
-        select MMU_MOTOROLA if MMU
-        help
-          Say Y here if you want to run Linux on an MC680x0-based Apollo
-          Domain workstation such as the DN3500.
-
-config VME
-        bool "VME (Motorola and BVM) support"
-        select MMU_MOTOROLA if MMU
-        help
-          Say Y here if you want to build a kernel for a 680x0 based VME
-          board.  Boards currently supported include Motorola boards MVME147,
-          MVME162, MVME166, MVME167, MVME172, and MVME177.  BVME4000 and
-          BVME6000 boards from BVM Ltd are also supported.
-
-config MVME147
-        bool "MVME147 support"
-        depends on VME
-        help
-          Say Y to include support for early Motorola VME boards.  This will
-          build a kernel which can run on MVME147 single-board computers.  If
-          you select this option you will have to select the appropriate
-          drivers for SCSI, Ethernet and serial ports later on.
-
-config MVME16x
-        bool "MVME162, 166 and 167 support"
-        depends on VME
-        help
-          Say Y to include support for Motorola VME boards.  This will build a
-          kernel which can run on MVME162, MVME166, MVME167, MVME172, and
-          MVME177 boards.  If you select this option you will have to select
-          the appropriate drivers for SCSI, Ethernet and serial ports later
-          on.
-
-config BVME6000
-        bool "BVME4000 and BVME6000 support"
-        depends on VME
-        help
-          Say Y to include support for VME boards from BVM Ltd.  This will
-          build a kernel which can run on BVME4000 and BVME6000 boards.  If
-          you select this option you will have to select the appropriate
-          drivers for SCSI, Ethernet and serial ports later on.
-
-config HP300
-        bool "HP9000/300 and HP9000/400 support"
-        select MMU_MOTOROLA if MMU
-        help
-          This option enables support for the HP9000/300 and HP9000/400 series
-          of workstations. Support for these machines is still somewhat
-          experimental. If you plan to try to use the kernel on such a machine
-          say Y here.
-          Everybody else says N.
-
-config DIO
-        bool "DIO bus support"
-        depends on HP300
+config MMU
+        bool "MMU-based Paged Memory Management Support"
         default y
         help
-          Say Y here to enable support for the "DIO" expansion bus used in
-          HP300 machines. If you are using such a system you almost certainly
-          want this.
-
-config SUN3X
-        bool "Sun3x support"
-        select MMU_MOTOROLA if MMU
-        select M68030
-        help
-          This option enables support for the Sun 3x series of workstations.
-          Be warned that this support is very experimental.
-          Note that Sun 3x kernels are not compatible with Sun 3 hardware.
-          General Linux information on the Sun 3x series (now discontinued)
-          is at <http://www.angelfire.com/ca2/tech68k/sun3.html>.
-
-          If you don't want to compile a kernel for a Sun 3x, say N.
-
-config Q40
-        bool "Q40/Q60 support"
-        select MMU_MOTOROLA if MMU
-        help
-          The Q40 is a Motorola 68040-based successor to the Sinclair QL
-          manufactured in Germany.  There is an official Q40 home page at
-          <http://www.q40.de/>.  This option enables support for the Q40 and
-          Q60. Select your CPU below.  For 68LC060 don't forget to enable FPU
-          emulation.
-
-config SUN3
-        bool "Sun3 support"
-        depends on !MMU_MOTOROLA
-        select MMU_SUN3 if MMU
-        select M68020
-        help
-          This option enables support for the Sun 3 series of workstations
-          (3/50, 3/60, 3/1xx, 3/2xx systems). Enabling this option requires
-          that all other hardware types must be disabled, as Sun 3 kernels
-          are incompatible with all other m68k targets (including Sun 3x!).
-
-          If you don't want to compile a kernel exclusively for a Sun 3, say N.
-
-config NATFEAT
-        bool "ARAnyM emulator support"
-        depends on ATARI
-        help
-          This option enables support for ARAnyM native features, such as
-          access to a disk image as /dev/hda.
-
-config NFBLOCK
-        tristate "NatFeat block device support"
-        depends on BLOCK && NATFEAT
-        help
-          Say Y to include support for the ARAnyM NatFeat block device
-          which allows direct access to the hard drives without using
-          the hardware emulation.
-
-config NFCON
-        tristate "NatFeat console driver"
-        depends on NATFEAT
-        help
-          Say Y to include support for the ARAnyM NatFeat console driver
-          which allows the console output to be redirected to the stderr
-          output of ARAnyM.
-
-config NFETH
-        tristate "NatFeat Ethernet support"
-        depends on NET_ETHERNET && NATFEAT
-        help
-          Say Y to include support for the ARAnyM NatFeat network device
-          which will emulate a regular ethernet device while presenting an
-          ethertap device to the host system.
-
-comment "Processor type"
-
-config M68020
-        bool "68020 support"
-        help
-          If you anticipate running this kernel on a computer with a MC68020
-          processor, say Y. Otherwise, say N. Note that the 68020 requires a
-          68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
-          Sun 3, which provides its own version.
-
-config M68030
-        bool "68030 support"
-        depends on !MMU_SUN3
-        help
-          If you anticipate running this kernel on a computer with a MC68030
-          processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
-          work, as it does not include an MMU (Memory Management Unit).
-
-config M68040
-        bool "68040 support"
-        depends on !MMU_SUN3
-        help
-          If you anticipate running this kernel on a computer with a MC68LC040
-          or MC68040 processor, say Y. Otherwise, say N. Note that an
-          MC68EC040 will not work, as it does not include an MMU (Memory
-          Management Unit).
-
-config M68060
-        bool "68060 support"
-        depends on !MMU_SUN3
-        help
-          If you anticipate running this kernel on a computer with a MC68060
-          processor, say Y. Otherwise, say N.
-
-config MMU_MOTOROLA
-        bool
-
-config MMU_SUN3
-        bool
-        depends on MMU && !MMU_MOTOROLA
-
-config M68KFPU_EMU
-        bool "Math emulation support (EXPERIMENTAL)"
-        depends on EXPERIMENTAL
-        help
-          At some point in the future, this will cause floating-point math
-          instructions to be emulated by the kernel on machines that lack a
-          floating-point math coprocessor.  Thrill-seekers and chronically
-          sleep-deprived psychotic hacker types can say Y now, everyone else
-          should probably wait a while.
-
-config M68KFPU_EMU_EXTRAPREC
-        bool "Math emulation extra precision"
-        depends on M68KFPU_EMU
-        help
-          The fpu uses normally a few bit more during calculations for
-          correct rounding, the emulator can (often) do the same but this
-          extra calculation can cost quite some time, so you can disable
-          it here. The emulator will then "only" calculate with a 64 bit
-          mantissa and round slightly incorrect, what is more than enough
-          for normal usage.
-
-config M68KFPU_EMU_ONLY
-        bool "Math emulation only kernel"
-        depends on M68KFPU_EMU
-        help
-          This option prevents any floating-point instructions from being
-          compiled into the kernel, thereby the kernel doesn't save any
-          floating point context anymore during task switches, so this
-          kernel will only be usable on machines without a floating-point
-          math coprocessor. This makes the kernel a bit faster as no tests
-          needs to be executed whether a floating-point instruction in the
-          kernel should be executed or not.
-
-config ADVANCED
-        bool "Advanced configuration options"
-        ---help---
-          This gives you access to some advanced options for the CPU. The
-          defaults should be fine for most users, but these options may make
-          it possible for you to improve performance somewhat if you know what
-          you are doing.
-
-          Note that the answer to this question won't directly affect the
-          kernel: saying N will just cause the configurator to skip all
-          the questions about these options.
+          Select if you want MMU-based virtualised addressing space
+          support by paged memory management. If unsure, say 'Y'.
 
-          Most users should say N to this question.
-
-config RMW_INSNS
-        bool "Use read-modify-write instructions"
-        depends on ADVANCED
-        ---help---
-          This allows to use certain instructions that work with indivisible
-          read-modify-write bus cycles. While this is faster than the
-          workaround of disabling interrupts, it can conflict with DMA
-          ( = direct memory access) on many Amiga systems, and it is also said
-          to destabilize other machines. It is very likely that this will
-          cause serious problems on any Amiga or Atari Medusa if set. The only
-          configuration where it should work are 68030-based Ataris, where it
-          apparently improves performance. But you've been warned! Unless you
-          really know what you are doing, say N. Try Y only if you're quite
-          adventurous.
-
-config SINGLE_MEMORY_CHUNK
-        bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
-        default y if SUN3
-        select NEED_MULTIPLE_NODES
-        help
-          Ignore all but the first contiguous chunk of physical memory for VM
-          purposes.  This will save a few bytes kernel size and may speed up
-          some operations.  Say N if not sure.
+menu "Platform dependent setup"
 
-config 060_WRITETHROUGH
-        bool "Use write-through caching for 68060 supervisor accesses"
-        depends on ADVANCED && M68060
-        ---help---
-          The 68060 generally uses copyback caching of recently accessed data.
-          Copyback caching means that memory writes will be held in an on-chip
-          cache and only written back to memory some time later.  Saying Y
-          here will force supervisor (kernel) accesses to use writethrough
-          caching.  Writethrough caching means that data is written to memory
-          straight away, so that cache and memory data always agree.
-          Writethrough caching is less efficient, but is needed for some
-          drivers on 68060 based systems where the 68060 bus snooping signal
-          is hardwired on.  The 53c710 SCSI driver is known to suffer from
-          this problem.
-
-config ARCH_DISCONTIGMEM_ENABLE
-        def_bool !SINGLE_MEMORY_CHUNK
-
-config NODES_SHIFT
-        int
-        default "3"
-        depends on !SINGLE_MEMORY_CHUNK
+if MMU
+source arch/m68k/Kconfig.mmu
+endif
+if !MMU
+source arch/m68k/Kconfig.nommu
+endif
 
 source "mm/Kconfig"
 
 endmenu
 
-menu "General setup"
+menu "Executable file formats"
 
 source "fs/Kconfig.binfmt"
 
-config ZORRO
-        bool "Amiga Zorro (AutoConfig) bus support"
-        depends on AMIGA
-        help
-          This enables support for the Zorro bus in the Amiga. If you have
-          expansion cards in your Amiga that conform to the Amiga
-          AutoConfig(tm) specification, say Y, otherwise N. Note that even
-          expansion cards that do not fit in the Zorro slots but fit in e.g.
-          the CPU slot may fall in this category, so you have to say Y to let
-          Linux use these.
-
-config AMIGA_PCMCIA
-        bool "Amiga 1200/600 PCMCIA support (EXPERIMENTAL)"
-        depends on AMIGA && EXPERIMENTAL
-        help
-          Include support in the kernel for pcmcia on Amiga 1200 and Amiga
-          600. If you intend to use pcmcia cards say Y; otherwise say N.
-
-config STRAM_PROC
-        bool "ST-RAM statistics in /proc"
-        depends on ATARI
-        help
-          Say Y here to report ST-RAM usage statistics in /proc/stram.
-
-config HEARTBEAT
-        bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || MAC ||Q40
-        default y if !AMIGA && !APOLLO && !ATARI && !MAC && !Q40 && HP300
-        help
-          Use the power-on LED on your machine as a load meter.  The exact
-          behavior is platform-dependent, but normally the flash frequency is
-          a hyperbolic function of the 5-minute load average.
-
-# We have a dedicated heartbeat LED. :-)
-config PROC_HARDWARE
-        bool "/proc/hardware support"
-        help
-          Say Y here to support the /proc/hardware file, which gives you
-          access to information about the machine you're running on,
-          including the model, CPU, MMU, clock speed, BogoMIPS rating,
-          and memory size.
-
-config ISA
-        bool
-        depends on Q40 || AMIGA_PCMCIA
-        default y
-        help
-          Find out whether you have ISA slots on your motherboard.  ISA is the
-          name of a bus system, i.e. the way the CPU talks to the other stuff
-          inside your box.  Other bus systems are PCI, EISA, MicroChannel
-          (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
-          newer boards don't support it.  If you have ISA, say Y, otherwise N.
-
-config GENERIC_ISA_DMA
-        bool
-        depends on Q40 || AMIGA_PCMCIA
-        default y
-
-config ZONE_DMA
-        bool
-        default y
+endmenu
 
-source "drivers/pci/Kconfig"
+if !MMU
+menu "Power management options"
 
-source "drivers/zorro/Kconfig"
+config PM
+        bool "Power Management support"
+        help
+          Support processor power management modes
 
 endmenu
+endif
 
 source "net/Kconfig"
 
 source "drivers/Kconfig"
 
+if MMU
+
 menu "Character devices"
 
 config ATARI_MFPSER
@@ -627,6 +235,8 @@ config SERIAL_CONSOLE
 
 endmenu
 
+endif
+
 source "fs/Kconfig"
 
 source "arch/m68k/Kconfig.debug"
diff --git a/arch/m68k/Kconfig.debug b/arch/m68k/Kconfig.debug
index f53b6d5300e5..2bdb1b01115c 100644
--- a/arch/m68k/Kconfig.debug
+++ b/arch/m68k/Kconfig.debug
@@ -2,4 +2,38 @@ menu "Kernel hacking"
 
 source "lib/Kconfig.debug"
 
+if !MMU
+
+config FULLDEBUG
+        bool "Full Symbolic/Source Debugging support"
+        help
+          Enable debugging symbols on kernel build.
+
+config HIGHPROFILE
+        bool "Use fast second timer for profiling"
+        depends on COLDFIRE
+        help
+          Use a fast secondary clock to produce profiling information.
+
+config BOOTPARAM
+        bool 'Compiled-in Kernel Boot Parameter'
+
+config BOOTPARAM_STRING
+        string 'Kernel Boot Parameter'
+        default 'console=ttyS0,19200'
+        depends on BOOTPARAM
+
+config NO_KERNEL_MSG
+        bool "Suppress Kernel BUG Messages"
+        help
+          Do not output any debug BUG messages within the kernel.
+
+config BDM_DISABLE
+        bool "Disable BDM signals"
+        depends on (EXPERIMENTAL && COLDFIRE)
+        help
+          Disable the ColdFire CPU's BDM signals.
+
+endif
+
 endmenu
diff --git a/arch/m68k/Kconfig.mmu b/arch/m68k/Kconfig.mmu
new file mode 100644
index 000000000000..16539b1d5d3a
--- /dev/null
+++ b/arch/m68k/Kconfig.mmu
@@ -0,0 +1,417 @@
+config GENERIC_IOMAP
+        bool
+        default y
+
+config ARCH_MAY_HAVE_PC_FDC
+        bool
+        depends on BROKEN && (Q40 || SUN3X)
+        default y
+
+config ARCH_USES_GETTIMEOFFSET
+        def_bool y
+
+config EISA
+        bool
+        ---help---
+          The Extended Industry Standard Architecture (EISA) bus was
+          developed as an open alternative to the IBM MicroChannel bus.
+
+          The EISA bus provided some of the features of the IBM MicroChannel
+          bus while maintaining backward compatibility with cards made for
+          the older ISA bus.  The EISA bus saw limited use between 1988 and
+          1995 when it was made obsolete by the PCI bus.
+
+          Say Y here if you are building a kernel for an EISA-based machine.
+
+          Otherwise, say N.
+
+config MCA
+        bool
+        help
+          MicroChannel Architecture is found in some IBM PS/2 machines and
+          laptops.  It is a bus system similar to PCI or ISA. See
+          <file:Documentation/mca.txt> (and especially the web page given
+          there) before attempting to build an MCA bus kernel.
+
+config PCMCIA
+        tristate
+        ---help---
+          Say Y here if you want to attach PCMCIA- or PC-cards to your Linux
+          computer.  These are credit-card size devices such as network cards,
+          modems or hard drives often used with laptops computers.  There are
+          actually two varieties of these cards: the older 16 bit PCMCIA cards
+          and the newer 32 bit CardBus cards.  If you want to use CardBus
+          cards, you need to say Y here and also to "CardBus support" below.
+
+          To use your PC-cards, you will need supporting software from David
+          Hinds' pcmcia-cs package (see the file <file:Documentation/Changes>
+          for location).  Please also read the PCMCIA-HOWTO, available from
+          <http://www.tldp.org/docs.html#howto>.
+
+          To compile this driver as modules, choose M here: the
+          modules will be called pcmcia_core and ds.
+
+config AMIGA
+        bool "Amiga support"
+        select MMU_MOTOROLA if MMU
+        help
+          This option enables support for the Amiga series of computers. If
+          you plan to use this kernel on an Amiga, say Y here and browse the
+          material available in <file:Documentation/m68k>; otherwise say N.
+
+config ATARI
+        bool "Atari support"
+        select MMU_MOTOROLA if MMU
+        help
+          This option enables support for the 68000-based Atari series of
+          computers (including the TT, Falcon and Medusa). If you plan to use
+          this kernel on an Atari, say Y here and browse the material
+          available in <file:Documentation/m68k>; otherwise say N.
+
+config MAC
+        bool "Macintosh support"
+        select MMU_MOTOROLA if MMU
+        help
+          This option enables support for the Apple Macintosh series of
+          computers (yes, there is experimental support now, at least for part
+          of the series).
+
+          Say N unless you're willing to code the remaining necessary support.
+          ;)
+
+config NUBUS
+        bool
+        depends on MAC
+        default y
+
+config M68K_L2_CACHE
+        bool
+        depends on MAC
+        default y
+
+config APOLLO
+        bool "Apollo support"
+        select MMU_MOTOROLA if MMU
+        help
+          Say Y here if you want to run Linux on an MC680x0-based Apollo
+          Domain workstation such as the DN3500.
+
+config VME
+        bool "VME (Motorola and BVM) support"
+        select MMU_MOTOROLA if MMU
+        help
+          Say Y here if you want to build a kernel for a 680x0 based VME
+          board.  Boards currently supported include Motorola boards MVME147,
+          MVME162, MVME166, MVME167, MVME172, and MVME177.  BVME4000 and
+          BVME6000 boards from BVM Ltd are also supported.
+
+config MVME147
+        bool "MVME147 support"
+        depends on VME
+        help
+          Say Y to include support for early Motorola VME boards.  This will
+          build a kernel which can run on MVME147 single-board computers.  If
+          you select this option you will have to select the appropriate
+          drivers for SCSI, Ethernet and serial ports later on.
+
+config MVME16x
+        bool "MVME162, 166 and 167 support"
+        depends on VME
+        help
+          Say Y to include support for Motorola VME boards.  This will build a
+          kernel which can run on MVME162, MVME166, MVME167, MVME172, and
+          MVME177 boards.  If you select this option you will have to select
+          the appropriate drivers for SCSI, Ethernet and serial ports later
+          on.
+
+config BVME6000
+        bool "BVME4000 and BVME6000 support"
+        depends on VME
+        help
+          Say Y to include support for VME boards from BVM Ltd.  This will
+          build a kernel which can run on BVME4000 and BVME6000 boards.  If
+          you select this option you will have to select the appropriate
+          drivers for SCSI, Ethernet and serial ports later on.
+
+config HP300
+        bool "HP9000/300 and HP9000/400 support"
+        select MMU_MOTOROLA if MMU
+        help
+          This option enables support for the HP9000/300 and HP9000/400 series
+          of workstations. Support for these machines is still somewhat
+          experimental. If you plan to try to use the kernel on such a machine
+          say Y here.
+          Everybody else says N.
+
+config DIO
+        bool "DIO bus support"
+        depends on HP300
+        default y
+        help
+          Say Y here to enable support for the "DIO" expansion bus used in
+          HP300 machines. If you are using such a system you almost certainly
+          want this.
+
+config SUN3X
+        bool "Sun3x support"
+        select MMU_MOTOROLA if MMU
+        select M68030
+        help
+          This option enables support for the Sun 3x series of workstations.
+          Be warned that this support is very experimental.
+          Note that Sun 3x kernels are not compatible with Sun 3 hardware.
+          General Linux information on the Sun 3x series (now discontinued)
+          is at <http://www.angelfire.com/ca2/tech68k/sun3.html>.
+
+          If you don't want to compile a kernel for a Sun 3x, say N.
+
+config Q40
+        bool "Q40/Q60 support"
+        select MMU_MOTOROLA if MMU
+        help
+          The Q40 is a Motorola 68040-based successor to the Sinclair QL
+          manufactured in Germany.  There is an official Q40 home page at
+          <http://www.q40.de/>.  This option enables support for the Q40 and
+          Q60. Select your CPU below.  For 68LC060 don't forget to enable FPU
+          emulation.
+
+config SUN3
+        bool "Sun3 support"
+        depends on !MMU_MOTOROLA
+        select MMU_SUN3 if MMU
+        select M68020
+        help
+          This option enables support for the Sun 3 series of workstations
+          (3/50, 3/60, 3/1xx, 3/2xx systems). Enabling this option requires
+          that all other hardware types must be disabled, as Sun 3 kernels
+          are incompatible with all other m68k targets (including Sun 3x!).
+
+          If you don't want to compile a kernel exclusively for a Sun 3, say N.
+
+config NATFEAT
+        bool "ARAnyM emulator support"
+        depends on ATARI
+        help
+          This option enables support for ARAnyM native features, such as
+          access to a disk image as /dev/hda.
+
+config NFBLOCK
+        tristate "NatFeat block device support"
+        depends on BLOCK && NATFEAT
+        help
+          Say Y to include support for the ARAnyM NatFeat block device
+          which allows direct access to the hard drives without using
+          the hardware emulation.
+
+config NFCON
+        tristate "NatFeat console driver"
+        depends on NATFEAT
+        help
+          Say Y to include support for the ARAnyM NatFeat console driver
+          which allows the console output to be redirected to the stderr
+          output of ARAnyM.
+
+config NFETH
+        tristate "NatFeat Ethernet support"
+        depends on NET_ETHERNET && NATFEAT
+        help
+          Say Y to include support for the ARAnyM NatFeat network device
+          which will emulate a regular ethernet device while presenting an
+          ethertap device to the host system.
+
+comment "Processor type"
+
+config M68020
+        bool "68020 support"
+        help
+          If you anticipate running this kernel on a computer with a MC68020
+          processor, say Y. Otherwise, say N. Note that the 68020 requires a
+          68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
+          Sun 3, which provides its own version.
+
+config M68030
+        bool "68030 support"
+        depends on !MMU_SUN3
+        help
+          If you anticipate running this kernel on a computer with a MC68030
+          processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
+          work, as it does not include an MMU (Memory Management Unit).
+
+config M68040
+        bool "68040 support"
+        depends on !MMU_SUN3
+        help
+          If you anticipate running this kernel on a computer with a MC68LC040
+          or MC68040 processor, say Y. Otherwise, say N. Note that an
+          MC68EC040 will not work, as it does not include an MMU (Memory
+          Management Unit).
+
+config M68060
+        bool "68060 support"
+        depends on !MMU_SUN3
+        help
+          If you anticipate running this kernel on a computer with a MC68060
+          processor, say Y. Otherwise, say N.
+
+config MMU_MOTOROLA
+        bool
+
+config MMU_SUN3
+        bool
+        depends on MMU && !MMU_MOTOROLA
+
+config M68KFPU_EMU
+        bool "Math emulation support (EXPERIMENTAL)"
+        depends on EXPERIMENTAL
+        help
+          At some point in the future, this will cause floating-point math
+          instructions to be emulated by the kernel on machines that lack a
+          floating-point math coprocessor.  Thrill-seekers and chronically
+          sleep-deprived psychotic hacker types can say Y now, everyone else
+          should probably wait a while.
+
+config M68KFPU_EMU_EXTRAPREC
+        bool "Math emulation extra precision"
+        depends on M68KFPU_EMU
+        help
+          The fpu uses normally a few bit more during calculations for
+          correct rounding, the emulator can (often) do the same but this
+          extra calculation can cost quite some time, so you can disable
+          it here. The emulator will then "only" calculate with a 64 bit
+          mantissa and round slightly incorrect, what is more than enough
+          for normal usage.
+
+config M68KFPU_EMU_ONLY
+        bool "Math emulation only kernel"
+        depends on M68KFPU_EMU
+        help
+          This option prevents any floating-point instructions from being
+          compiled into the kernel, thereby the kernel doesn't save any
+          floating point context anymore during task switches, so this
+          kernel will only be usable on machines without a floating-point
+          math coprocessor. This makes the kernel a bit faster as no tests
+          needs to be executed whether a floating-point instruction in the
+          kernel should be executed or not.
+
+config ADVANCED
+        bool "Advanced configuration options"
+        ---help---
+          This gives you access to some advanced options for the CPU. The
+          defaults should be fine for most users, but these options may make
+          it possible for you to improve performance somewhat if you know what
+          you are doing.
+
+          Note that the answer to this question won't directly affect the
+          kernel: saying N will just cause the configurator to skip all
+          the questions about these options.
+
+          Most users should say N to this question.
+
+config RMW_INSNS
+        bool "Use read-modify-write instructions"
+        depends on ADVANCED
+        ---help---
+          This allows to use certain instructions that work with indivisible
+          read-modify-write bus cycles. While this is faster than the
+          workaround of disabling interrupts, it can conflict with DMA
+          ( = direct memory access) on many Amiga systems, and it is also said
+          to destabilize other machines. It is very likely that this will
+          cause serious problems on any Amiga or Atari Medusa if set. The only
+          configuration where it should work are 68030-based Ataris, where it
+          apparently improves performance. But you've been warned! Unless you
+          really know what you are doing, say N. Try Y only if you're quite
+          adventurous.
+
+config SINGLE_MEMORY_CHUNK
+        bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
+        default y if SUN3
+        select NEED_MULTIPLE_NODES
+        help
+          Ignore all but the first contiguous chunk of physical memory for VM
+          purposes.  This will save a few bytes kernel size and may speed up
+          some operations.  Say N if not sure.
+
+config 060_WRITETHROUGH
+        bool "Use write-through caching for 68060 supervisor accesses"
+        depends on ADVANCED && M68060
+        ---help---
+          The 68060 generally uses copyback caching of recently accessed data.
+          Copyback caching means that memory writes will be held in an on-chip
+          cache and only written back to memory some time later.  Saying Y
+          here will force supervisor (kernel) accesses to use writethrough
+          caching.  Writethrough caching means that data is written to memory
+          straight away, so that cache and memory data always agree.
+          Writethrough caching is less efficient, but is needed for some
+          drivers on 68060 based systems where the 68060 bus snooping signal
+          is hardwired on.  The 53c710 SCSI driver is known to suffer from
+          this problem.
+
+config ARCH_DISCONTIGMEM_ENABLE
+        def_bool !SINGLE_MEMORY_CHUNK
+
+config NODES_SHIFT
+        int
+        default "3"
+        depends on !SINGLE_MEMORY_CHUNK
+
+config ZORRO
+        bool "Amiga Zorro (AutoConfig) bus support"
+        depends on AMIGA
+        help
+          This enables support for the Zorro bus in the Amiga. If you have
+          expansion cards in your Amiga that conform to the Amiga
+          AutoConfig(tm) specification, say Y, otherwise N. Note that even
+          expansion cards that do not fit in the Zorro slots but fit in e.g.
+          the CPU slot may fall in this category, so you have to say Y to let
+          Linux use these.
+
+config AMIGA_PCMCIA
+        bool "Amiga 1200/600 PCMCIA support (EXPERIMENTAL)"
+        depends on AMIGA && EXPERIMENTAL
+        help
+          Include support in the kernel for pcmcia on Amiga 1200 and Amiga
+          600. If you intend to use pcmcia cards say Y; otherwise say N.
+
+config STRAM_PROC
+        bool "ST-RAM statistics in /proc"
+        depends on ATARI
+        help
+          Say Y here to report ST-RAM usage statistics in /proc/stram.
+
+config HEARTBEAT
+        bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || MAC ||Q40
+        default y if !AMIGA && !APOLLO && !ATARI && !MAC && !Q40 && HP300
+        help
+          Use the power-on LED on your machine as a load meter.  The exact
+          behavior is platform-dependent, but normally the flash frequency is
+          a hyperbolic function of the 5-minute load average.
+
+# We have a dedicated heartbeat LED. :-)
+config PROC_HARDWARE
+        bool "/proc/hardware support"
+        help
+          Say Y here to support the /proc/hardware file, which gives you
+          access to information about the machine you're running on,
+          including the model, CPU, MMU, clock speed, BogoMIPS rating,
+          and memory size.
+
+config ISA
+        bool
+        depends on Q40 || AMIGA_PCMCIA
+        default y
+        help
+          Find out whether you have ISA slots on your motherboard.  ISA is the
+          name of a bus system, i.e. the way the CPU talks to the other stuff
+          inside your box.  Other bus systems are PCI, EISA, MicroChannel
+          (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
+          newer boards don't support it.  If you have ISA, say Y, otherwise N.
+
+config GENERIC_ISA_DMA
+        bool
+        depends on Q40 || AMIGA_PCMCIA
+        default y
+
+source "drivers/pci/Kconfig"
+
+source "drivers/zorro/Kconfig"
+
diff --git a/arch/m68k/Kconfig.nommu b/arch/m68k/Kconfig.nommu
new file mode 100644
index 000000000000..273bccab9517
--- /dev/null
+++ b/arch/m68k/Kconfig.nommu
@@ -0,0 +1,750 @@
+config FPU
+        bool
+        default n
+
+config GENERIC_FIND_NEXT_BIT
+        bool
+        default y
+
+config GENERIC_GPIO
+        bool
+        default n
+
+config GENERIC_CMOS_UPDATE
+        bool
+        default y
+
+config GENERIC_CLOCKEVENTS
+        bool
+        default n
+
+config COLDFIRE_SW_A7
+        bool
+        default n
+
+config HAVE_CACHE_SPLIT
+        bool
+
+config HAVE_CACHE_CB
+        bool
+
+config HAVE_MBAR
+        bool
+
+config HAVE_IPSBAR
+        bool
+
+choice
+        prompt "CPU"
+        default M68EZ328
+
+config M68328
+        bool "MC68328"
+        help
+          Motorola 68328 processor support.
+
+config M68EZ328
+        bool "MC68EZ328"
+        help
+          Motorola 68EX328 processor support.
+
+config M68VZ328
+        bool "MC68VZ328"
+        help
+          Motorola 68VZ328 processor support.
+
+config M68360
+        bool "MC68360"
+        help
+          Motorola 68360 processor support.
+
+config M5206
+        bool "MCF5206"
+        select COLDFIRE_SW_A7
+        select HAVE_MBAR
+        help
+          Motorola ColdFire 5206 processor support.
+
+config M5206e
+        bool "MCF5206e"
+        select COLDFIRE_SW_A7
+        select HAVE_MBAR
+        help
+          Motorola ColdFire 5206e processor support.
+
+config M520x
+        bool "MCF520x"
+        select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
+        help
+           Freescale Coldfire 5207/5208 processor support.
+
+config M523x
+        bool "MCF523x"
+        select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
+        select HAVE_IPSBAR
+        help
+          Freescale Coldfire 5230/1/2/4/5 processor support
+
+config M5249
+        bool "MCF5249"
+        select COLDFIRE_SW_A7
+        select HAVE_MBAR
+        help
+          Motorola ColdFire 5249 processor support.
+
+config M5271
+        bool "MCF5271"
+        select HAVE_CACHE_SPLIT
+        select HAVE_IPSBAR
+        help
+          Freescale (Motorola) ColdFire 5270/5271 processor support.
+
+config M5272
+        bool "MCF5272"
+        select COLDFIRE_SW_A7
+        select HAVE_MBAR
+        help
+          Motorola ColdFire 5272 processor support.
+
+config M5275
+        bool "MCF5275"
+        select HAVE_CACHE_SPLIT
+        select HAVE_IPSBAR
+        help
+          Freescale (Motorola) ColdFire 5274/5275 processor support.
+
+config M528x
+        bool "MCF528x"
+        select GENERIC_CLOCKEVENTS
+        select HAVE_CACHE_SPLIT
+        select HAVE_IPSBAR
+        help
+          Motorola ColdFire 5280/5282 processor support.
+
+config M5307
+        bool "MCF5307"
+        select COLDFIRE_SW_A7
+        select HAVE_CACHE_CB
+        select HAVE_MBAR
+        help
+          Motorola ColdFire 5307 processor support.
+
+config M532x
+        bool "MCF532x"
+        select HAVE_CACHE_CB
+        help
+          Freescale (Motorola) ColdFire 532x processor support.
+
+config M5407
+        bool "MCF5407"
+        select COLDFIRE_SW_A7
+        select HAVE_CACHE_CB
+        select HAVE_MBAR
+        help
+          Motorola ColdFire 5407 processor support.
+
+config M547x
+        bool "MCF547x"
+        select HAVE_CACHE_CB
+        select HAVE_MBAR
+        help
+          Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
+
+config M548x
+        bool "MCF548x"
+        select HAVE_CACHE_CB
+        select HAVE_MBAR
+        help
+          Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
+
+endchoice
+
+config M527x
+        bool
+        depends on (M5271 || M5275)
+        select GENERIC_CLOCKEVENTS
+        default y
+
+config M54xx
+        bool
+        depends on (M548x || M547x)
+        default y
+
+config COLDFIRE
+        bool
+        depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx)
+        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
+        default y
+
+config CLOCK_SET
+        bool "Enable setting the CPU clock frequency"
+        default n
+        help
+          On some CPU's you do not need to know what the core CPU clock
+          frequency is. On these you can disable clock setting. On some
+          traditional 68K parts, and on all ColdFire parts you need to set
+          the appropriate CPU clock frequency. On these devices many of the
+          onboard peripherals derive their timing from the master CPU clock
+          frequency.
+
+config CLOCK_FREQ
+        int "Set the core clock frequency"
+        default "66666666"
+        depends on CLOCK_SET
+        help
+          Define the CPU clock frequency in use. This is the core clock
+          frequency, it may or may not be the same as the external clock
+          crystal fitted to your board. Some processors have an internal
+          PLL and can have their frequency programmed at run time, others
+          use internal dividers. In general the kernel won't setup a PLL
+          if it is fitted (there are some exceptions). This value will be
+          specific to the exact CPU that you are using.
+
+config OLDMASK
+        bool "Old mask 5307 (1H55J) silicon"
+        depends on M5307
+        help
+          Build support for the older revision ColdFire 5307 silicon.
+          Specifically this is the 1H55J mask revision.
+
+if HAVE_CACHE_SPLIT
+choice
+        prompt "Split Cache Configuration"
+        default CACHE_I
+
+config CACHE_I
+        bool "Instruction"
+        help
+          Use all of the ColdFire CPU cache memory as an instruction cache.
+
+config CACHE_D
+        bool "Data"
+        help
+          Use all of the ColdFire CPU cache memory as a data cache.
+
+config CACHE_BOTH
+        bool "Both"
+        help
+          Split the ColdFire CPU cache, and use half as an instruction cache
+          and half as a data cache.
+endchoice
+endif
+
+if HAVE_CACHE_CB
+choice
+        prompt "Data cache mode"
+        default CACHE_WRITETHRU
+
+config CACHE_WRITETHRU
+        bool "Write-through"
+        help
+          The ColdFire CPU cache is set into Write-through mode.
+
+config CACHE_COPYBACK
+        bool "Copy-back"
+        help
+          The ColdFire CPU cache is set into Copy-back mode.
+endchoice
+endif
+
+comment "Platform"
+
+config PILOT3
+        bool "Pilot 1000/5000, PalmPilot Personal/Pro, or PalmIII support"
+        depends on M68328
+        help
+          Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII.
+
+config XCOPILOT_BUGS
+        bool "(X)Copilot support"
+        depends on PILOT3
+        help
+          Support the bugs of Xcopilot.
+
+config UC5272
+        bool 'Arcturus Networks uC5272 dimm board support'
+        depends on M5272
+        help
+          Support for the Arcturus Networks uC5272 dimm board.
+
+config UC5282
+        bool "Arcturus Networks uC5282 board support"
+        depends on M528x
+        help
+          Support for the Arcturus Networks uC5282 dimm board.
+
+config UCSIMM
+        bool "uCsimm module support"
+        depends on M68EZ328
+        help
+          Support for the Arcturus Networks uCsimm module.
+
+config UCDIMM
+        bool "uDsimm module support"
+        depends on M68VZ328
+        help
+          Support for the Arcturus Networks uDsimm module.
+
+config DRAGEN2
+        bool "DragenEngine II board support"
+        depends on M68VZ328
+        help
+          Support for the DragenEngine II board.
+
+config DIRECT_IO_ACCESS
+        bool "Allow user to access IO directly"
+        depends on (UCSIMM || UCDIMM || DRAGEN2)
+        help
+          Disable the CPU internal registers protection in user mode,
+          to allow a user application to read/write them.
+
+config INIT_LCD
+        bool "Initialize LCD"
+        depends on (UCSIMM || UCDIMM || DRAGEN2)
+        help
+          Initialize the LCD controller of the 68x328 processor.
+
+config MEMORY_RESERVE
+        int "Memory reservation (MiB)"
+        depends on (UCSIMM || UCDIMM)
+        help
+          Reserve certain memory regions on 68x328 based boards.
+
+config UCQUICC
+        bool "Lineo uCquicc board support"
+        depends on M68360
+        help
+          Support for the Lineo uCquicc board.
+
+config ARN5206
+        bool "Arnewsh 5206 board support"
+        depends on M5206
+        help
+          Support for the Arnewsh 5206 board.
+
+config M5206eC3
+        bool "Motorola M5206eC3 board support"
+        depends on M5206e
+        help
+          Support for the Motorola M5206eC3 board.
+
+config ELITE
+        bool "Motorola M5206eLITE board support"
+        depends on M5206e
+        help
+          Support for the Motorola M5206eLITE board.
+
+config M5208EVB
+        bool "Freescale M5208EVB board support"
+        depends on M520x
+        help
+          Support for the Freescale Coldfire M5208EVB.
+
+config M5235EVB
+        bool "Freescale M5235EVB support"
+        depends on M523x
+        help
+          Support for the Freescale M5235EVB board.
+
+config M5249C3
+        bool "Motorola M5249C3 board support"
+        depends on M5249
+        help
+          Support for the Motorola M5249C3 board.
+
+config M5271EVB
+        bool "Freescale (Motorola) M5271EVB board support"
+        depends on M5271
+        help
+          Support for the Freescale (Motorola) M5271EVB board.
+
+config M5275EVB
+        bool "Freescale (Motorola) M5275EVB board support"
+        depends on M5275
+        help
+          Support for the Freescale (Motorola) M5275EVB board.
+
+config M5272C3
+        bool "Motorola M5272C3 board support"
+        depends on M5272
+        help
+          Support for the Motorola M5272C3 board.
+
+config COBRA5272
+        bool "senTec COBRA5272 board support"
+        depends on M5272
+        help
+          Support for the senTec COBRA5272 board.
+
+config AVNET5282
+        bool "Avnet 5282 board support"
+        depends on M528x
+        help
+          Support for the Avnet 5282 board.  
+          
+config M5282EVB
+        bool "Motorola M5282EVB board support"
+        depends on M528x
+        help
+          Support for the Motorola M5282EVB board.
+
+config COBRA5282
+        bool "senTec COBRA5282 board support"
+        depends on M528x
+        help
+          Support for the senTec COBRA5282 board.
+          
+config SOM5282EM
+        bool "EMAC.Inc SOM5282EM board support"
+        depends on M528x
+        help
+          Support for the EMAC.Inc SOM5282EM module.  
+          
+config WILDFIRE
+        bool "Intec Automation Inc. WildFire board support"
+        depends on M528x
+        help
+          Support for the Intec Automation Inc. WildFire.
+          
+config WILDFIREMOD
+        bool "Intec Automation Inc. WildFire module support"
+        depends on M528x
+        help
+          Support for the Intec Automation Inc. WildFire module.
+
+config ARN5307
+        bool "Arnewsh 5307 board support"
+        depends on M5307
+        help
+          Support for the Arnewsh 5307 board.
+
+config M5307C3
+        bool "Motorola M5307C3 board support"
+        depends on M5307
+        help
+          Support for the Motorola M5307C3 board.
+
+config SECUREEDGEMP3
+        bool "SnapGear SecureEdge/MP3 platform support"
+        depends on M5307
+        help
+          Support for the SnapGear SecureEdge/MP3 platform.
+
+config M5329EVB
+        bool "Freescale (Motorola) M5329EVB board support"
+        depends on M532x
+        help
+          Support for the Freescale (Motorola) M5329EVB board.
+
+config COBRA5329
+        bool "senTec COBRA5329 board support"
+        depends on M532x
+        help
+          Support for the senTec COBRA5329 board.
+
+config M5407C3
+        bool "Motorola M5407C3 board support"
+        depends on M5407
+        help
+          Support for the Motorola M5407C3 board.
+
+config FIREBEE
+        bool "FireBee board support"
+        depends on M547x
+        help
+          Support for the FireBee ColdFire 5475 based board.
+
+config CLEOPATRA
+        bool "Feith CLEOPATRA board support"
+        depends on (M5307 || M5407)
+        help
+          Support for the Feith Cleopatra boards.
+
+config CANCam
+        bool "Feith CANCam board support"
+        depends on M5272
+        help
+          Support for the Feith CANCam board.
+
+config SCALES
+        bool "Feith SCALES board support"
+        depends on M5272
+        help
+          Support for the Feith SCALES board.
+
+config NETtel
+        bool "SecureEdge/NETtel board support"
+        depends on (M5206e || M5272 || M5307)
+        help
+          Support for the SnapGear NETtel/SecureEdge/SnapGear boards.
+
+config SNAPGEAR
+        bool "SnapGear router board support"
+        depends on NETtel
+        help
+          Special additional support for SnapGear router boards.
+
+config CPU16B
+        bool "Sneha Technologies S.L. Sarasvati board support"
+        depends on M5272
+        help
+          Support for the SNEHA CPU16B board.
+
+config MOD5272
+        bool "Netburner MOD-5272 board support"
+        depends on M5272
+        help
+          Support for the Netburner MOD-5272 board.
+
+config SAVANTrosie1
+        bool "Savant Rosie1 board support"
+        depends on M523x
+        help
+          Support for the Savant Rosie1 board.
+
+config ROMFS_FROM_ROM
+        bool "ROMFS image not RAM resident"
+        depends on (NETtel || SNAPGEAR)
+        help
+          The ROMfs filesystem will stay resident in the FLASH/ROM, not be
+          moved into RAM.
+
+config PILOT
+        bool
+        default y
+        depends on (PILOT3 || PILOT5)
+
+config ARNEWSH
+        bool
+        default y
+        depends on (ARN5206 || ARN5307)
+
+config FREESCALE
+        bool
+        default y
+        depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5329EVB || M5407C3)
+
+config HW_FEITH
+        bool
+        default y
+        depends on (CLEOPATRA || CANCam || SCALES)
+
+config senTec
+        bool
+        default y
+        depends on (COBRA5272 || COBRA5282)
+        
+config EMAC_INC
+        bool
+        default y
+        depends on (SOM5282EM)
+
+config SNEHA
+        bool
+        default y
+        depends on CPU16B
+
+config SAVANT
+        bool
+        default y
+        depends on SAVANTrosie1
+
+config AVNET
+        bool
+        default y
+        depends on (AVNET5282)
+
+config UBOOT
+        bool "Support for U-Boot command line parameters"
+        help
+          If you say Y here kernel will try to collect command
+          line parameters from the initial u-boot stack.
+        default n
+
+config 4KSTACKS
+        bool "Use 4Kb for kernel stacks instead of 8Kb"
+        default y
+        help
+          If you say Y here the kernel will use a 4Kb stacksize for the
+          kernel stack attached to each process/thread. This facilitates
+          running more threads on a system and also reduces the pressure
+          on the VM subsystem for higher order allocations.
+
+comment "RAM configuration"
+
+config RAMBASE
+        hex "Address of the base of RAM"
+        default "0"
+        help
+          Define the address that RAM starts at. On many platforms this is
+          0, the base of the address space. And this is the default. Some
+          platforms choose to setup their RAM at other addresses within the
+          processor address space.
+
+config RAMSIZE
+        hex "Size of RAM (in bytes), or 0 for automatic"
+        default "0x400000"
+        help
+          Define the size of the system RAM. If you select 0 then the
+          kernel will try to probe the RAM size at runtime. This is not
+          supported on all CPU types.
+
+config VECTORBASE
+        hex "Address of the base of system vectors"
+        default "0"
+        help
+          Define the address of the system vectors. Commonly this is
+          put at the start of RAM, but it doesn't have to be. On ColdFire
+          platforms this address is programmed into the VBR register, thus
+          actually setting the address to use.
+
+config MBAR
+        hex "Address of the MBAR (internal peripherals)"
+        default "0x10000000"
+        depends on HAVE_MBAR
+        help
+          Define the address of the internal system peripherals. This value
+          is set in the processors MBAR register. This is generally setup by
+          the boot loader, and will not be written by the kernel. By far most
+          ColdFire boards use the default 0x10000000 value, so if unsure then
+          use this.
+
+config IPSBAR
+        hex "Address of the IPSBAR (internal peripherals)"
+        default "0x40000000"
+        depends on HAVE_IPSBAR
+        help
+          Define the address of the internal system peripherals. This value
+          is set in the processors IPSBAR register. This is generally setup by
+          the boot loader, and will not be written by the kernel. By far most
+          ColdFire boards use the default 0x40000000 value, so if unsure then
+          use this.
+
+config KERNELBASE
+        hex "Address of the base of kernel code"
+        default "0x400"
+        help
+          Typically on m68k systems the kernel will not start at the base
+          of RAM, but usually some small offset from it. Define the start
+          address of the kernel here. The most common setup will have the
+          processor vectors at the base of RAM and then the start of the
+          kernel. On some platforms some RAM is reserved for boot loaders
+          and the kernel starts after that. The 0x400 default was based on
+          a system with the RAM based at address 0, and leaving enough room
+          for the theoretical maximum number of 256 vectors.
+
+choice
+        prompt "RAM bus width"
+        default RAMAUTOBIT
+
+config RAMAUTOBIT
+        bool "AUTO"
+        help
+          Select the physical RAM data bus size. Not needed on most platforms,
+          so you can generally choose AUTO.
+
+config RAM8BIT
+        bool "8bit"
+        help
+          Configure RAM bus to be 8 bits wide.
+
+config RAM16BIT
+        bool "16bit"
+        help
+          Configure RAM bus to be 16 bits wide.
+
+config RAM32BIT
+        bool "32bit"
+        help
+          Configure RAM bus to be 32 bits wide.
+
+endchoice
+
+comment "ROM configuration"
+
+config ROM
+        bool "Specify ROM linker regions"
+        default n
+        help
+          Define a ROM region for the linker script. This creates a kernel
+          that can be stored in flash, with possibly the text, and data
+          regions being copied out to RAM at startup.
+
+config ROMBASE
+        hex "Address of the base of ROM device"
+        default "0"
+        depends on ROM
+        help
+          Define the address that the ROM region starts at. Some platforms
+          use this to set their chip select region accordingly for the boot
+          device.
+
+config ROMVEC
+        hex "Address of the base of the ROM vectors"
+        default "0"
+        depends on ROM
+        help
+          This is almost always the same as the base of the ROM. Since on all
+          68000 type variants the vectors are at the base of the boot device
+          on system startup.
+
+config ROMVECSIZE
+        hex "Size of ROM vector region (in bytes)"
+        default "0x400"
+        depends on ROM
+        help
+          Define the size of the vector region in ROM. For most 68000
+          variants this would be 0x400 bytes in size. Set to 0 if you do
+          not want a vector region at the start of the ROM.
+
+config ROMSTART
+        hex "Address of the base of system image in ROM"
+        default "0x400"
+        depends on ROM
+        help
+          Define the start address of the system image in ROM. Commonly this
+          is strait after the ROM vectors.
+
+config ROMSIZE
+        hex "Size of the ROM device"
+        default "0x100000"
+        depends on ROM
+        help
+          Size of the ROM device. On some platforms this is used to setup
+          the chip select that controls the boot ROM device.
+
+choice
+        prompt "Kernel executes from"
+        ---help---
+          Choose the memory type that the kernel will be running in.
+
+config RAMKERNEL
+        bool "RAM"
+        help
+          The kernel will be resident in RAM when running.
+
+config ROMKERNEL
+        bool "ROM"
+        help
+          The kernel will be resident in FLASH/ROM when running. This is
+          often referred to as Execute-in-Place (XIP), since the kernel
+          code executes from the position it is stored in the FLASH/ROM.
+
+endchoice
+
+if COLDFIRE
+source "kernel/Kconfig.preempt"
+endif
+
+source "kernel/time/Kconfig"
+
+config ISA_DMA_API
+        bool
+        depends on !M5272
+        default y
+
+source "drivers/pcmcia/Kconfig"
+
diff --git a/arch/m68k/Makefile b/arch/m68k/Makefile
index b793163abc61..be46cadd4017 100644
--- a/arch/m68k/Makefile
+++ b/arch/m68k/Makefile
@@ -1,123 +1,7 @@
-#
-# m68k/Makefile
-#
-# This file is included by the global makefile so that you can add your own
-# architecture-specific flags and dependencies. Remember to do have actions
-# for "archclean" and "archdep" for cleaning up and making dependencies for
-# this architecture
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License.  See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1994 by Hamish Macdonald
-#
-
 KBUILD_DEFCONFIG := multi_defconfig
 
-# override top level makefile
-AS += -m68020
-LDFLAGS := -m m68kelf
-KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/m68k/kernel/module.lds
-ifneq ($(SUBARCH),$(ARCH))
-        ifeq ($(CROSS_COMPILE),)
-                CROSS_COMPILE := $(call cc-cross-prefix, \
-                        m68k-linux-gnu- m68k-linux- m68k-unknown-linux-gnu-)
-        endif
-endif
-
-ifdef CONFIG_SUN3
-LDFLAGS_vmlinux = -N
-endif
-
-CHECKFLAGS += -D__mc68000__
-
-# without -fno-strength-reduce the 53c7xx.c driver fails ;-(
-KBUILD_CFLAGS += -pipe -fno-strength-reduce -ffixed-a2
-
-# enable processor switch if compiled only for a single cpu
-ifndef CONFIG_M68020
-ifndef CONFIG_M68030
-
-ifndef CONFIG_M68060
-KBUILD_CFLAGS += -m68040
-endif
-
-ifndef CONFIG_M68040
-KBUILD_CFLAGS += -m68060
-endif
-
-endif
-endif
-
-ifdef CONFIG_KGDB
-# If configured for kgdb support, include debugging infos and keep the
-# frame pointer
-KBUILD_CFLAGS := $(subst -fomit-frame-pointer,,$(KBUILD_CFLAGS)) -g
-endif
-
-ifndef CONFIG_SUN3
-head-y := arch/m68k/kernel/head.o
+ifdef CONFIG_MMU
+include $(srctree)/arch/m68k/Makefile_mm
 else
-head-y := arch/m68k/kernel/sun3-head.o
+include $(srctree)/arch/m68k/Makefile_no
 endif
-
-core-y                          += arch/m68k/kernel/    arch/m68k/mm/
-libs-y                          += arch/m68k/lib/
-
-core-$(CONFIG_Q40)              += arch/m68k/q40/
-core-$(CONFIG_AMIGA)            += arch/m68k/amiga/
-core-$(CONFIG_ATARI)            += arch/m68k/atari/
-core-$(CONFIG_MAC)              += arch/m68k/mac/
-core-$(CONFIG_HP300)            += arch/m68k/hp300/
-core-$(CONFIG_APOLLO)           += arch/m68k/apollo/
-core-$(CONFIG_MVME147)          += arch/m68k/mvme147/
-core-$(CONFIG_MVME16x)          += arch/m68k/mvme16x/
-core-$(CONFIG_BVME6000)         += arch/m68k/bvme6000/
-core-$(CONFIG_SUN3X)            += arch/m68k/sun3x/     arch/m68k/sun3/
-core-$(CONFIG_SUN3)             += arch/m68k/sun3/      arch/m68k/sun3/prom/
-core-$(CONFIG_NATFEAT)          += arch/m68k/emu/
-core-$(CONFIG_M68040)           += arch/m68k/fpsp040/
-core-$(CONFIG_M68060)           += arch/m68k/ifpsp060/
-core-$(CONFIG_M68KFPU_EMU)      += arch/m68k/math-emu/
-
-all:    zImage
-
-lilo:   vmlinux
-        if [ -f $(INSTALL_PATH)/vmlinux ]; then mv -f $(INSTALL_PATH)/vmlinux $(INSTALL_PATH)/vmlinux.old; fi
-        if [ -f $(INSTALL_PATH)/System.map ]; then mv -f $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
-        cat vmlinux > $(INSTALL_PATH)/vmlinux
-        cp System.map $(INSTALL_PATH)/System.map
-        if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
-
-zImage compressed: vmlinux.gz
-
-vmlinux.gz: vmlinux
-
-ifndef CONFIG_KGDB
-        cp vmlinux vmlinux.tmp
-        $(STRIP) vmlinux.tmp
-        gzip -9c vmlinux.tmp >vmlinux.gz
-        rm vmlinux.tmp
-else
-        gzip -9c vmlinux >vmlinux.gz
-endif
-
-bzImage: vmlinux.bz2
-
-vmlinux.bz2: vmlinux
-
-ifndef CONFIG_KGDB
-        cp vmlinux vmlinux.tmp
-        $(STRIP) vmlinux.tmp
-        bzip2 -1c vmlinux.tmp >vmlinux.bz2
-        rm vmlinux.tmp
-else
-        bzip2 -1c vmlinux >vmlinux.bz2
-endif
-
-archclean:
-        rm -f vmlinux.gz vmlinux.bz2
-
-install:
-        sh $(srctree)/arch/m68k/install.sh $(KERNELRELEASE) vmlinux.gz System.map "$(INSTALL_PATH)"
diff --git a/arch/m68k/Makefile_mm b/arch/m68k/Makefile_mm
new file mode 100644
index 000000000000..d449b6d5aecf
--- /dev/null
+++ b/arch/m68k/Makefile_mm
@@ -0,0 +1,121 @@
+#
+# m68k/Makefile
+#
+# This file is included by the global makefile so that you can add your own
+# architecture-specific flags and dependencies. Remember to do have actions
+# for "archclean" and "archdep" for cleaning up and making dependencies for
+# this architecture
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# Copyright (C) 1994 by Hamish Macdonald
+#
+
+# override top level makefile
+AS += -m68020
+LDFLAGS := -m m68kelf
+KBUILD_LDFLAGS_MODULE += -T $(srctree)/arch/m68k/kernel/module.lds
+ifneq ($(SUBARCH),$(ARCH))
+        ifeq ($(CROSS_COMPILE),)
+                CROSS_COMPILE := $(call cc-cross-prefix, \
+                        m68k-linux-gnu- m68k-linux- m68k-unknown-linux-gnu-)
+        endif
+endif
+
+ifdef CONFIG_SUN3
+LDFLAGS_vmlinux = -N
+endif
+
+CHECKFLAGS += -D__mc68000__
+
+# without -fno-strength-reduce the 53c7xx.c driver fails ;-(
+KBUILD_CFLAGS += -pipe -fno-strength-reduce -ffixed-a2
+
+# enable processor switch if compiled only for a single cpu
+ifndef CONFIG_M68020
+ifndef CONFIG_M68030
+
+ifndef CONFIG_M68060
+KBUILD_CFLAGS += -m68040
+endif
+
+ifndef CONFIG_M68040
+KBUILD_CFLAGS += -m68060
+endif
+
+endif
+endif
+
+ifdef CONFIG_KGDB
+# If configured for kgdb support, include debugging infos and keep the
+# frame pointer
+KBUILD_CFLAGS := $(subst -fomit-frame-pointer,,$(KBUILD_CFLAGS)) -g
+endif
+
+ifndef CONFIG_SUN3
+head-y := arch/m68k/kernel/head.o
+else
+head-y := arch/m68k/kernel/sun3-head.o
+endif
+
+core-y                          += arch/m68k/kernel/    arch/m68k/mm/
+libs-y                          += arch/m68k/lib/
+
+core-$(CONFIG_Q40)              += arch/m68k/q40/
+core-$(CONFIG_AMIGA)            += arch/m68k/amiga/
+core-$(CONFIG_ATARI)            += arch/m68k/atari/
+core-$(CONFIG_MAC)              += arch/m68k/mac/
+core-$(CONFIG_HP300)            += arch/m68k/hp300/
+core-$(CONFIG_APOLLO)           += arch/m68k/apollo/
+core-$(CONFIG_MVME147)          += arch/m68k/mvme147/
+core-$(CONFIG_MVME16x)          += arch/m68k/mvme16x/
+core-$(CONFIG_BVME6000)         += arch/m68k/bvme6000/
+core-$(CONFIG_SUN3X)            += arch/m68k/sun3x/     arch/m68k/sun3/
+core-$(CONFIG_SUN3)             += arch/m68k/sun3/      arch/m68k/sun3/prom/
+core-$(CONFIG_NATFEAT)          += arch/m68k/emu/
+core-$(CONFIG_M68040)           += arch/m68k/fpsp040/
+core-$(CONFIG_M68060)           += arch/m68k/ifpsp060/
+core-$(CONFIG_M68KFPU_EMU)      += arch/m68k/math-emu/
+
+all:    zImage
+
+lilo:   vmlinux
+        if [ -f $(INSTALL_PATH)/vmlinux ]; then mv -f $(INSTALL_PATH)/vmlinux $(INSTALL_PATH)/vmlinux.old; fi
+        if [ -f $(INSTALL_PATH)/System.map ]; then mv -f $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
+        cat vmlinux > $(INSTALL_PATH)/vmlinux
+        cp System.map $(INSTALL_PATH)/System.map
+        if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
+
+zImage compressed: vmlinux.gz
+
+vmlinux.gz: vmlinux
+
+ifndef CONFIG_KGDB
+        cp vmlinux vmlinux.tmp
+        $(STRIP) vmlinux.tmp
+        gzip -9c vmlinux.tmp >vmlinux.gz
+        rm vmlinux.tmp
+else
+        gzip -9c vmlinux >vmlinux.gz
+endif
+
+bzImage: vmlinux.bz2
+
+vmlinux.bz2: vmlinux
+
+ifndef CONFIG_KGDB
+        cp vmlinux vmlinux.tmp
+        $(STRIP) vmlinux.tmp
+        bzip2 -1c vmlinux.tmp >vmlinux.bz2
+        rm vmlinux.tmp
+else
+        bzip2 -1c vmlinux >vmlinux.bz2
+endif
+
+archclean:
+        rm -f vmlinux.gz vmlinux.bz2
+
+install:
+        sh $(srctree)/arch/m68k/install.sh $(KERNELRELEASE) vmlinux.gz System.map "$(INSTALL_PATH)"
diff --git a/arch/m68k/Makefile_no b/arch/m68k/Makefile_no
new file mode 100644
index 000000000000..81652ab893e1
--- /dev/null
+++ b/arch/m68k/Makefile_no
@@ -0,0 +1,124 @@
+#
+# arch/m68k/Makefile
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# (C) Copyright 2002, Greg Ungerer <gerg@snapgear.com>
+#
+
+platform-$(CONFIG_M68328)       := 68328
+platform-$(CONFIG_M68EZ328)     := 68EZ328
+platform-$(CONFIG_M68VZ328)     := 68VZ328
+platform-$(CONFIG_M68360)       := 68360
+platform-$(CONFIG_M5206)        := 5206
+platform-$(CONFIG_M5206e)       := 5206e
+platform-$(CONFIG_M520x)        := 520x
+platform-$(CONFIG_M523x)        := 523x
+platform-$(CONFIG_M5249)        := 5249
+platform-$(CONFIG_M527x)        := 527x
+platform-$(CONFIG_M5272)        := 5272
+platform-$(CONFIG_M528x)        := 528x
+platform-$(CONFIG_M5307)        := 5307
+platform-$(CONFIG_M532x)        := 532x
+platform-$(CONFIG_M5407)        := 5407
+platform-$(CONFIG_M54xx)        := 54xx
+PLATFORM := $(platform-y)
+
+board-$(CONFIG_PILOT)           := pilot
+board-$(CONFIG_UC5272)          := UC5272
+board-$(CONFIG_UC5282)          := UC5282
+board-$(CONFIG_UCSIMM)          := ucsimm
+board-$(CONFIG_UCDIMM)          := ucdimm
+board-$(CONFIG_UCQUICC)         := uCquicc
+board-$(CONFIG_DRAGEN2)         := de2
+board-$(CONFIG_ARNEWSH)         := ARNEWSH
+board-$(CONFIG_FREESCALE)       := FREESCALE
+board-$(CONFIG_M5235EVB)        := M5235EVB
+board-$(CONFIG_M5271EVB)        := M5271EVB
+board-$(CONFIG_M5275EVB)        := M5275EVB
+board-$(CONFIG_M5282EVB)        := M5282EVB
+board-$(CONFIG_ELITE)           := eLITE
+board-$(CONFIG_NETtel)          := NETtel
+board-$(CONFIG_SECUREEDGEMP3)   := MP3
+board-$(CONFIG_CLEOPATRA)       := CLEOPATRA
+board-$(CONFIG_senTec)          := senTec
+board-$(CONFIG_SNEHA)           := SNEHA
+board-$(CONFIG_M5208EVB)        := M5208EVB
+board-$(CONFIG_MOD5272)         := MOD5272
+board-$(CONFIG_AVNET)           := AVNET
+board-$(CONFIG_SAVANT)          := SAVANT
+BOARD := $(board-y)
+
+model-$(CONFIG_RAMKERNEL)       := ram
+model-$(CONFIG_ROMKERNEL)       := rom
+MODEL := $(model-y)
+
+#
+# Some code support is grouped together for a common cpu-subclass (for
+# example all ColdFire cpu's are very similar). Determine the sub-class
+# for the selected cpu. ONLY need to define this for the non-base member
+# of the family.
+#
+cpuclass-$(CONFIG_M5206)        := coldfire
+cpuclass-$(CONFIG_M5206e)       := coldfire
+cpuclass-$(CONFIG_M520x)        := coldfire
+cpuclass-$(CONFIG_M523x)        := coldfire
+cpuclass-$(CONFIG_M5249)        := coldfire
+cpuclass-$(CONFIG_M527x)        := coldfire
+cpuclass-$(CONFIG_M5272)        := coldfire
+cpuclass-$(CONFIG_M528x)        := coldfire
+cpuclass-$(CONFIG_M5307)        := coldfire
+cpuclass-$(CONFIG_M532x)        := coldfire
+cpuclass-$(CONFIG_M5407)        := coldfire
+cpuclass-$(CONFIG_M54xx)        := coldfire
+cpuclass-$(CONFIG_M68328)       := 68328
+cpuclass-$(CONFIG_M68EZ328)     := 68328
+cpuclass-$(CONFIG_M68VZ328)     := 68328
+cpuclass-$(CONFIG_M68360)       := 68360
+CPUCLASS := $(cpuclass-y)
+
+ifneq ($(CPUCLASS),$(PLATFORM))
+CLASSDIR := arch/m68k/platform/$(cpuclass-y)/
+endif
+
+export PLATFORM BOARD MODEL CPUCLASS
+
+#
+# Some CFLAG additions based on specific CPU type.
+#
+cflags-$(CONFIG_M5206)          := $(call cc-option,-mcpu=5206,-m5200)
+cflags-$(CONFIG_M5206e)         := $(call cc-option,-mcpu=5206e,-m5200)
+cflags-$(CONFIG_M520x)          := $(call cc-option,-mcpu=5208,-m5200)
+cflags-$(CONFIG_M523x)          := $(call cc-option,-mcpu=523x,-m5307)
+cflags-$(CONFIG_M5249)          := $(call cc-option,-mcpu=5249,-m5200)
+cflags-$(CONFIG_M5271)          := $(call cc-option,-mcpu=5271,-m5307)
+cflags-$(CONFIG_M5272)          := $(call cc-option,-mcpu=5272,-m5307)
+cflags-$(CONFIG_M5275)          := $(call cc-option,-mcpu=5275,-m5307)
+cflags-$(CONFIG_M528x)          := $(call cc-option,-mcpu=528x,-m5307)
+cflags-$(CONFIG_M5307)          := $(call cc-option,-mcpu=5307,-m5200)
+cflags-$(CONFIG_M532x)          := $(call cc-option,-mcpu=532x,-m5307)
+cflags-$(CONFIG_M5407)          := $(call cc-option,-mcpu=5407,-m5200)
+cflags-$(CONFIG_M54xx)          := $(call cc-option,-mcpu=5475,-m5200)
+cflags-$(CONFIG_M68328)         := -m68000
+cflags-$(CONFIG_M68EZ328)       := -m68000
+cflags-$(CONFIG_M68VZ328)       := -m68000
+cflags-$(CONFIG_M68360)         := -m68332
+
+KBUILD_AFLAGS += $(cflags-y)
+
+KBUILD_CFLAGS += $(cflags-y)
+KBUILD_CFLAGS += -D__linux__
+KBUILD_CFLAGS += -DUTS_SYSNAME=\"uClinux\"
+
+head-y := arch/m68k/platform/$(cpuclass-y)/head.o
+
+core-y  += arch/m68k/kernel/ \
+           arch/m68k/mm/ \
+           $(CLASSDIR) \
+           arch/m68k/platform/$(PLATFORM)/
+libs-y  += arch/m68k/lib/
+
+archclean:
+
diff --git a/arch/m68k/configs/m5208evb_defconfig b/arch/m68k/configs/m5208evb_defconfig
new file mode 100644
index 000000000000..c1616824e201
--- /dev/null
+++ b/arch/m68k/configs/m5208evb_defconfig
@@ -0,0 +1,76 @@
+# CONFIG_MMU is not set
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EXPERT=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_M520x=y
+CONFIG_CLOCK_SET=y
+CONFIG_CLOCK_FREQ=166666666
+CONFIG_CLOCK_DIV=2
+CONFIG_M5208EVB=y
+# CONFIG_4KSTACKS is not set
+CONFIG_RAMBASE=0x40000000
+CONFIG_RAMSIZE=0x2000000
+CONFIG_VECTORBASE=0x40000000
+CONFIG_KERNELBASE=0x40020000
+CONFIG_RAM16BIT=y
+CONFIG_BINFMT_FLAT=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_UCLINUX=y
+CONFIG_BLK_DEV_RAM=y
+# CONFIG_MISC_DEVICES is not set
+CONFIG_NETDEVICES=y
+CONFIG_NET_ETHERNET=y
+CONFIG_FEC=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_MCF=y
+CONFIG_SERIAL_MCF_BAUDRATE=115200
+CONFIG_SERIAL_MCF_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_EXT2_FS=y
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_SYSFS is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_MTD=y
+# CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_FULLDEBUG=y
+CONFIG_BOOTPARAM=y
+CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
diff --git a/arch/m68k/configs/m5249evb_defconfig b/arch/m68k/configs/m5249evb_defconfig
new file mode 100644
index 000000000000..a6599e42facf
--- /dev/null
+++ b/arch/m68k/configs/m5249evb_defconfig
@@ -0,0 +1,69 @@
+# CONFIG_MMU is not set
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EXPERT=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_M5249=y
+CONFIG_CLOCK_SET=y
+CONFIG_CLOCK_FREQ=140000000
+CONFIG_CLOCK_DIV=2
+CONFIG_M5249C3=y
+CONFIG_RAMBASE=0x00000000
+CONFIG_RAMSIZE=0x00800000
+CONFIG_VECTORBASE=0x00000000
+CONFIG_KERNELBASE=0x00020000
+CONFIG_BINFMT_FLAT=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_UCLINUX=y
+CONFIG_BLK_DEV_RAM=y
+# CONFIG_MISC_DEVICES is not set
+CONFIG_NETDEVICES=y
+CONFIG_NET_ETHERNET=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_PPP=y
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_MCF=y
+CONFIG_SERIAL_MCF_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_EXT2_FS=y
+# CONFIG_FILE_LOCKING is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_MTD=y
+# CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_BOOTPARAM=y
+CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
+# CONFIG_CRC32 is not set
diff --git a/arch/m68k/configs/m5272c3_defconfig b/arch/m68k/configs/m5272c3_defconfig
new file mode 100644
index 000000000000..3fa60a57a0f9
--- /dev/null
+++ b/arch/m68k/configs/m5272c3_defconfig
@@ -0,0 +1,67 @@
+# CONFIG_MMU is not set
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EXPERT=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_M5272=y
+CONFIG_CLOCK_SET=y
+CONFIG_M5272C3=y
+CONFIG_RAMBASE=0x00000000
+CONFIG_RAMSIZE=0x00800000
+CONFIG_VECTORBASE=0x00000000
+CONFIG_KERNELBASE=0x00020000
+CONFIG_BINFMT_FLAT=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_UCLINUX=y
+CONFIG_BLK_DEV_RAM=y
+# CONFIG_MISC_DEVICES is not set
+CONFIG_NETDEVICES=y
+CONFIG_NET_ETHERNET=y
+CONFIG_FEC=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_MCF=y
+CONFIG_SERIAL_MCF_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_EXT2_FS=y
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_MTD=y
+# CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_BOOTPARAM=y
+CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
diff --git a/arch/m68k/configs/m5275evb_defconfig b/arch/m68k/configs/m5275evb_defconfig
new file mode 100644
index 000000000000..33c32aeca12b
--- /dev/null
+++ b/arch/m68k/configs/m5275evb_defconfig
@@ -0,0 +1,74 @@
+# CONFIG_MMU is not set
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EXPERT=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_M5275=y
+CONFIG_CLOCK_SET=y
+CONFIG_CLOCK_FREQ=150000000
+CONFIG_CLOCK_DIV=2
+CONFIG_M5275EVB=y
+# CONFIG_4KSTACKS is not set
+CONFIG_RAMBASE=0x00000000
+CONFIG_RAMSIZE=0x00000000
+CONFIG_VECTORBASE=0x00000000
+CONFIG_KERNELBASE=0x00020000
+CONFIG_BINFMT_FLAT=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_UCLINUX=y
+CONFIG_BLK_DEV_RAM=y
+# CONFIG_MISC_DEVICES is not set
+CONFIG_NETDEVICES=y
+CONFIG_NET_ETHERNET=y
+CONFIG_FEC=y
+CONFIG_FEC2=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_PPP=y
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_MCF=y
+CONFIG_SERIAL_MCF_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_EXT2_FS=y
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_MTD=y
+# CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_BOOTPARAM=y
+CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
+# CONFIG_CRC32 is not set
diff --git a/arch/m68k/configs/m5307c3_defconfig b/arch/m68k/configs/m5307c3_defconfig
new file mode 100644
index 000000000000..43795f41f7c7
--- /dev/null
+++ b/arch/m68k/configs/m5307c3_defconfig
@@ -0,0 +1,77 @@
+# CONFIG_MMU is not set
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EXPERT=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_M5307=y
+CONFIG_CLOCK_SET=y
+CONFIG_CLOCK_FREQ=90000000
+CONFIG_CLOCK_DIV=2
+CONFIG_M5307C3=y
+CONFIG_RAMBASE=0x00000000
+CONFIG_RAMSIZE=0x00800000
+CONFIG_VECTORBASE=0x00000000
+CONFIG_KERNELBASE=0x00020000
+CONFIG_BINFMT_FLAT=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_UCLINUX=y
+CONFIG_BLK_DEV_RAM=y
+# CONFIG_MISC_DEVICES is not set
+CONFIG_NETDEVICES=y
+CONFIG_NET_ETHERNET=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_PPP=y
+CONFIG_SLIP=y
+CONFIG_SLIP_COMPRESSED=y
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_MCF=y
+CONFIG_SERIAL_MCF_CONSOLE=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_EXT2_FS=y
+# CONFIG_DNOTIFY is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_MTD=y
+# CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_FULLDEBUG=y
+CONFIG_BOOTPARAM=y
+CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
+# CONFIG_CRC32 is not set
diff --git a/arch/m68k/configs/m5407c3_defconfig b/arch/m68k/configs/m5407c3_defconfig
new file mode 100644
index 000000000000..72746c57a571
--- /dev/null
+++ b/arch/m68k/configs/m5407c3_defconfig
@@ -0,0 +1,71 @@
+# CONFIG_MMU is not set
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EXPERT=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_M5407=y
+CONFIG_CLOCK_SET=y
+CONFIG_CLOCK_FREQ=50000000
+CONFIG_M5407C3=y
+CONFIG_RAMBASE=0x00000000
+CONFIG_RAMSIZE=0x00000000
+CONFIG_VECTORBASE=0x00000000
+CONFIG_KERNELBASE=0x00020000
+CONFIG_BINFMT_FLAT=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_UCLINUX=y
+CONFIG_BLK_DEV_RAM=y
+# CONFIG_MISC_DEVICES is not set
+CONFIG_NETDEVICES=y
+CONFIG_NET_ETHERNET=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_PPP=y
+# CONFIG_INPUT is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_MCF=y
+CONFIG_SERIAL_MCF_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_EXT2_FS=y
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_MTD=y
+# CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_BOOTPARAM=y
+CONFIG_BOOTPARAM_STRING="root=/dev/mtdblock0"
+# CONFIG_CRC32 is not set
diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile
index 55d5d6b680a2..c482ebc9dd54 100644
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -1,17 +1,5 @@
-#
-# Makefile for the linux kernel.
-#
-
-ifndef CONFIG_SUN3
-  extra-y := head.o
+ifdef CONFIG_MMU
+include arch/m68k/kernel/Makefile_mm
 else
-  extra-y := sun3-head.o
+include arch/m68k/kernel/Makefile_no
 endif
-extra-y += vmlinux.lds
-
-obj-y   := entry.o process.o traps.o ints.o signal.o ptrace.o module.o \
-           sys_m68k.o time.o setup.o m68k_ksyms.o devres.o
-
-devres-y = ../../../kernel/irq/devres.o
-
-obj-y$(CONFIG_MMU_SUN3) += dma.o        # no, it's not a typo
diff --git a/arch/m68k/kernel/Makefile_mm b/arch/m68k/kernel/Makefile_mm
new file mode 100644
index 000000000000..55d5d6b680a2
--- /dev/null
+++ b/arch/m68k/kernel/Makefile_mm
@@ -0,0 +1,17 @@
+#
+# Makefile for the linux kernel.
+#
+
+ifndef CONFIG_SUN3
+  extra-y := head.o
+else
+  extra-y := sun3-head.o
+endif
+extra-y += vmlinux.lds
+
+obj-y   := entry.o process.o traps.o ints.o signal.o ptrace.o module.o \
+           sys_m68k.o time.o setup.o m68k_ksyms.o devres.o
+
+devres-y = ../../../kernel/irq/devres.o
+
+obj-y$(CONFIG_MMU_SUN3) += dma.o        # no, it's not a typo
diff --git a/arch/m68k/kernel/Makefile_no b/arch/m68k/kernel/Makefile_no
new file mode 100644
index 000000000000..37c3fc074c0a
--- /dev/null
+++ b/arch/m68k/kernel/Makefile_no
@@ -0,0 +1,10 @@
+#
+# Makefile for arch/m68knommu/kernel.
+#
+
+extra-y := vmlinux.lds
+
+obj-y += dma.o entry.o init_task.o irq.o m68k_ksyms.o process.o ptrace.o \
+         setup.o signal.o syscalltable.o sys_m68k.o time.o traps.o
+
+obj-$(CONFIG_MODULES)   += module.o
diff --git a/arch/m68k/kernel/asm-offsets.c b/arch/m68k/kernel/asm-offsets.c
index 78e59b82ebc3..59a69a5c62f2 100644
--- a/arch/m68k/kernel/asm-offsets.c
+++ b/arch/m68k/kernel/asm-offsets.c
@@ -1,100 +1,5 @@
-/*
- * This program is used to generate definitions needed by
- * assembly language modules.
- *
- * We use the technique used in the OSF Mach kernel code:
- * generate asm statements containing #defines,
- * compile this file to assembler, and then extract the
- * #defines from the assembly-language output.
- */
-
-#define ASM_OFFSETS_C
-
-#include <linux/stddef.h>
-#include <linux/sched.h>
-#include <linux/kernel_stat.h>
-#include <linux/kbuild.h>
-#include <asm/bootinfo.h>
-#include <asm/irq.h>
-#include <asm/amigahw.h>
-#include <linux/font.h>
-
-int main(void)
-{
-        /* offsets into the task struct */
-        DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
-        DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info));
-        DEFINE(TASK_MM, offsetof(struct task_struct, mm));
 #ifdef CONFIG_MMU
-        DEFINE(TASK_TINFO, offsetof(struct task_struct, thread.info));
+#include "asm-offsets_mm.c"
+#else
+#include "asm-offsets_no.c"
 #endif
-
-        /* offsets into the thread struct */
-        DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
-        DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
-        DEFINE(THREAD_SR, offsetof(struct thread_struct, sr));
-        DEFINE(THREAD_FS, offsetof(struct thread_struct, fs));
-        DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp));
-        DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
-        DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp));
-        DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl));
-        DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate));
-
-        /* offsets into the thread_info struct */
-        DEFINE(TINFO_PREEMPT, offsetof(struct thread_info, preempt_count));
-        DEFINE(TINFO_FLAGS, offsetof(struct thread_info, flags));
-
-        /* offsets into the pt_regs */
-        DEFINE(PT_OFF_D0, offsetof(struct pt_regs, d0));
-        DEFINE(PT_OFF_ORIG_D0, offsetof(struct pt_regs, orig_d0));
-        DEFINE(PT_OFF_D1, offsetof(struct pt_regs, d1));
-        DEFINE(PT_OFF_D2, offsetof(struct pt_regs, d2));
-        DEFINE(PT_OFF_D3, offsetof(struct pt_regs, d3));
-        DEFINE(PT_OFF_D4, offsetof(struct pt_regs, d4));
-        DEFINE(PT_OFF_D5, offsetof(struct pt_regs, d5));
-        DEFINE(PT_OFF_A0, offsetof(struct pt_regs, a0));
-        DEFINE(PT_OFF_A1, offsetof(struct pt_regs, a1));
-        DEFINE(PT_OFF_A2, offsetof(struct pt_regs, a2));
-        DEFINE(PT_OFF_PC, offsetof(struct pt_regs, pc));
-        DEFINE(PT_OFF_SR, offsetof(struct pt_regs, sr));
-        /* bitfields are a bit difficult */
-        DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, pc) + 4);
-
-        /* offsets into the irq_cpustat_t struct */
-        DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
-
-        /* offsets into the bi_record struct */
-        DEFINE(BIR_TAG, offsetof(struct bi_record, tag));
-        DEFINE(BIR_SIZE, offsetof(struct bi_record, size));
-        DEFINE(BIR_DATA, offsetof(struct bi_record, data));
-
-        /* offsets into font_desc (drivers/video/console/font.h) */
-        DEFINE(FONT_DESC_IDX, offsetof(struct font_desc, idx));
-        DEFINE(FONT_DESC_NAME, offsetof(struct font_desc, name));
-        DEFINE(FONT_DESC_WIDTH, offsetof(struct font_desc, width));
-        DEFINE(FONT_DESC_HEIGHT, offsetof(struct font_desc, height));
-        DEFINE(FONT_DESC_DATA, offsetof(struct font_desc, data));
-        DEFINE(FONT_DESC_PREF, offsetof(struct font_desc, pref));
-
-        /* signal defines */
-        DEFINE(LSIGSEGV, SIGSEGV);
-        DEFINE(LSEGV_MAPERR, SEGV_MAPERR);
-        DEFINE(LSIGTRAP, SIGTRAP);
-        DEFINE(LTRAP_TRACE, TRAP_TRACE);
-
-        /* offsets into the custom struct */
-        DEFINE(CUSTOMBASE, &amiga_custom);
-        DEFINE(C_INTENAR, offsetof(struct CUSTOM, intenar));
-        DEFINE(C_INTREQR, offsetof(struct CUSTOM, intreqr));
-        DEFINE(C_INTENA, offsetof(struct CUSTOM, intena));
-        DEFINE(C_INTREQ, offsetof(struct CUSTOM, intreq));
-        DEFINE(C_SERDATR, offsetof(struct CUSTOM, serdatr));
-        DEFINE(C_SERDAT, offsetof(struct CUSTOM, serdat));
-        DEFINE(C_SERPER, offsetof(struct CUSTOM, serper));
-        DEFINE(CIAABASE, &ciaa);
-        DEFINE(CIABBASE, &ciab);
-        DEFINE(C_PRA, offsetof(struct CIA, pra));
-        DEFINE(ZTWOBASE, zTwoBase);
-
-        return 0;
-}
diff --git a/arch/m68k/kernel/asm-offsets_mm.c b/arch/m68k/kernel/asm-offsets_mm.c
new file mode 100644
index 000000000000..78e59b82ebc3
--- /dev/null
+++ b/arch/m68k/kernel/asm-offsets_mm.c
@@ -0,0 +1,100 @@
+/*
+ * This program is used to generate definitions needed by
+ * assembly language modules.
+ *
+ * We use the technique used in the OSF Mach kernel code:
+ * generate asm statements containing #defines,
+ * compile this file to assembler, and then extract the
+ * #defines from the assembly-language output.
+ */
+
+#define ASM_OFFSETS_C
+
+#include <linux/stddef.h>
+#include <linux/sched.h>
+#include <linux/kernel_stat.h>
+#include <linux/kbuild.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/amigahw.h>
+#include <linux/font.h>
+
+int main(void)
+{
+        /* offsets into the task struct */
+        DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
+        DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info));
+        DEFINE(TASK_MM, offsetof(struct task_struct, mm));
+#ifdef CONFIG_MMU
+        DEFINE(TASK_TINFO, offsetof(struct task_struct, thread.info));
+#endif
+
+        /* offsets into the thread struct */
+        DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
+        DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
+        DEFINE(THREAD_SR, offsetof(struct thread_struct, sr));
+        DEFINE(THREAD_FS, offsetof(struct thread_struct, fs));
+        DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp));
+        DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
+        DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp));
+        DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl));
+        DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate));
+
+        /* offsets into the thread_info struct */
+        DEFINE(TINFO_PREEMPT, offsetof(struct thread_info, preempt_count));
+        DEFINE(TINFO_FLAGS, offsetof(struct thread_info, flags));
+
+        /* offsets into the pt_regs */
+        DEFINE(PT_OFF_D0, offsetof(struct pt_regs, d0));
+        DEFINE(PT_OFF_ORIG_D0, offsetof(struct pt_regs, orig_d0));
+        DEFINE(PT_OFF_D1, offsetof(struct pt_regs, d1));
+        DEFINE(PT_OFF_D2, offsetof(struct pt_regs, d2));
+        DEFINE(PT_OFF_D3, offsetof(struct pt_regs, d3));
+        DEFINE(PT_OFF_D4, offsetof(struct pt_regs, d4));
+        DEFINE(PT_OFF_D5, offsetof(struct pt_regs, d5));
+        DEFINE(PT_OFF_A0, offsetof(struct pt_regs, a0));
+        DEFINE(PT_OFF_A1, offsetof(struct pt_regs, a1));
+        DEFINE(PT_OFF_A2, offsetof(struct pt_regs, a2));
+        DEFINE(PT_OFF_PC, offsetof(struct pt_regs, pc));
+        DEFINE(PT_OFF_SR, offsetof(struct pt_regs, sr));
+        /* bitfields are a bit difficult */
+        DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, pc) + 4);
+
+        /* offsets into the irq_cpustat_t struct */
+        DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
+
+        /* offsets into the bi_record struct */
+        DEFINE(BIR_TAG, offsetof(struct bi_record, tag));
+        DEFINE(BIR_SIZE, offsetof(struct bi_record, size));
+        DEFINE(BIR_DATA, offsetof(struct bi_record, data));
+
+        /* offsets into font_desc (drivers/video/console/font.h) */
+        DEFINE(FONT_DESC_IDX, offsetof(struct font_desc, idx));
+        DEFINE(FONT_DESC_NAME, offsetof(struct font_desc, name));
+        DEFINE(FONT_DESC_WIDTH, offsetof(struct font_desc, width));
+        DEFINE(FONT_DESC_HEIGHT, offsetof(struct font_desc, height));
+        DEFINE(FONT_DESC_DATA, offsetof(struct font_desc, data));
+        DEFINE(FONT_DESC_PREF, offsetof(struct font_desc, pref));
+
+        /* signal defines */
+        DEFINE(LSIGSEGV, SIGSEGV);
+        DEFINE(LSEGV_MAPERR, SEGV_MAPERR);
+        DEFINE(LSIGTRAP, SIGTRAP);
+        DEFINE(LTRAP_TRACE, TRAP_TRACE);
+
+        /* offsets into the custom struct */
+        DEFINE(CUSTOMBASE, &amiga_custom);
+        DEFINE(C_INTENAR, offsetof(struct CUSTOM, intenar));
+        DEFINE(C_INTREQR, offsetof(struct CUSTOM, intreqr));
+        DEFINE(C_INTENA, offsetof(struct CUSTOM, intena));
+        DEFINE(C_INTREQ, offsetof(struct CUSTOM, intreq));
+        DEFINE(C_SERDATR, offsetof(struct CUSTOM, serdatr));
+        DEFINE(C_SERDAT, offsetof(struct CUSTOM, serdat));
+        DEFINE(C_SERPER, offsetof(struct CUSTOM, serper));
+        DEFINE(CIAABASE, &ciaa);
+        DEFINE(CIABBASE, &ciab);
+        DEFINE(C_PRA, offsetof(struct CIA, pra));
+        DEFINE(ZTWOBASE, zTwoBase);
+
+        return 0;
+}
diff --git a/arch/m68k/kernel/asm-offsets_no.c b/arch/m68k/kernel/asm-offsets_no.c
new file mode 100644
index 000000000000..ffe02f41ad46
--- /dev/null
+++ b/arch/m68k/kernel/asm-offsets_no.c
@@ -0,0 +1,76 @@
+/*
+ * This program is used to generate definitions needed by
+ * assembly language modules.
+ *
+ * We use the technique used in the OSF Mach kernel code:
+ * generate asm statements containing #defines,
+ * compile this file to assembler, and then extract the
+ * #defines from the assembly-language output.
+ */
+
+#include <linux/stddef.h>
+#include <linux/sched.h>
+#include <linux/kernel_stat.h>
+#include <linux/ptrace.h>
+#include <linux/hardirq.h>
+#include <linux/kbuild.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/thread_info.h>
+
+int main(void)
+{
+        /* offsets into the task struct */
+        DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
+        DEFINE(TASK_MM, offsetof(struct task_struct, mm));
+
+        /* offsets into the irq_cpustat_t struct */
+        DEFINE(CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
+
+        /* offsets into the thread struct */
+        DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
+        DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
+        DEFINE(THREAD_SR, offsetof(struct thread_struct, sr));
+        DEFINE(THREAD_FS, offsetof(struct thread_struct, fs));
+        DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp));
+        DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
+        DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp));
+        DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl));
+        DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate));
+
+        /* offsets into the pt_regs */
+        DEFINE(PT_OFF_D0, offsetof(struct pt_regs, d0));
+        DEFINE(PT_OFF_ORIG_D0, offsetof(struct pt_regs, orig_d0));
+        DEFINE(PT_OFF_D1, offsetof(struct pt_regs, d1));
+        DEFINE(PT_OFF_D2, offsetof(struct pt_regs, d2));
+        DEFINE(PT_OFF_D3, offsetof(struct pt_regs, d3));
+        DEFINE(PT_OFF_D4, offsetof(struct pt_regs, d4));
+        DEFINE(PT_OFF_D5, offsetof(struct pt_regs, d5));
+        DEFINE(PT_OFF_A0, offsetof(struct pt_regs, a0));
+        DEFINE(PT_OFF_A1, offsetof(struct pt_regs, a1));
+        DEFINE(PT_OFF_A2, offsetof(struct pt_regs, a2));
+        DEFINE(PT_OFF_PC, offsetof(struct pt_regs, pc));
+        DEFINE(PT_OFF_SR, offsetof(struct pt_regs, sr));
+
+#ifdef CONFIG_COLDFIRE
+        /* bitfields are a bit difficult */
+        DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, sr) - 2);
+#else
+        /* bitfields are a bit difficult */
+        DEFINE(PT_OFF_FORMATVEC, offsetof(struct pt_regs, pc) + 4);
+#endif
+
+        /* signal defines */
+        DEFINE(SIGSEGV, SIGSEGV);
+        DEFINE(SEGV_MAPERR, SEGV_MAPERR);
+        DEFINE(SIGTRAP, SIGTRAP);
+        DEFINE(TRAP_TRACE, TRAP_TRACE);
+
+        DEFINE(PT_PTRACED, PT_PTRACED);
+
+        /* Offsets in thread_info structure */
+        DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
+        DEFINE(TI_PREEMPTCOUNT, offsetof(struct thread_info, preempt_count));
+
+        return 0;
+}
diff --git a/arch/m68k/kernel/dma.c b/arch/m68k/kernel/dma.c
index 4bbb3c2a8880..90e8cb726c8c 100644
--- a/arch/m68k/kernel/dma.c
+++ b/arch/m68k/kernel/dma.c
@@ -1,130 +1,5 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#undef DEBUG
-
-#include <linux/dma-mapping.h>
-#include <linux/device.h>
-#include <linux/kernel.h>
-#include <linux/scatterlist.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-
-#include <asm/pgalloc.h>
-
-void *dma_alloc_coherent(struct device *dev, size_t size,
-                         dma_addr_t *handle, gfp_t flag)
-{
-        struct page *page, **map;
-        pgprot_t pgprot;
-        void *addr;
-        int i, order;
-
-        pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);
-
-        size = PAGE_ALIGN(size);
-        order = get_order(size);
-
-        page = alloc_pages(flag, order);
-        if (!page)
-                return NULL;
-
-        *handle = page_to_phys(page);
-        map = kmalloc(sizeof(struct page *) << order, flag & ~__GFP_DMA);
-        if (!map) {
-                __free_pages(page, order);
-                return NULL;
-        }
-        split_page(page, order);
-
-        order = 1 << order;
-        size >>= PAGE_SHIFT;
-        map[0] = page;
-        for (i = 1; i < size; i++)
-                map[i] = page + i;
-        for (; i < order; i++)
-                __free_page(page + i);
-        pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
-        if (CPU_IS_040_OR_060)
-                pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
-        else
-                pgprot_val(pgprot) |= _PAGE_NOCACHE030;
-        addr = vmap(map, size, VM_MAP, pgprot);
-        kfree(map);
-
-        return addr;
-}
-EXPORT_SYMBOL(dma_alloc_coherent);
-
-void dma_free_coherent(struct device *dev, size_t size,
-                       void *addr, dma_addr_t handle)
-{
-        pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
-        vfree(addr);
-}
-EXPORT_SYMBOL(dma_free_coherent);
-
-void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
-                                size_t size, enum dma_data_direction dir)
-{
-        switch (dir) {
-        case DMA_TO_DEVICE:
-                cache_push(handle, size);
-                break;
-        case DMA_FROM_DEVICE:
-                cache_clear(handle, size);
-                break;
-        default:
-                if (printk_ratelimit())
-                        printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
-                break;
-        }
-}
-EXPORT_SYMBOL(dma_sync_single_for_device);
-
-void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
-                            enum dma_data_direction dir)
-{
-        int i;
-
-        for (i = 0; i < nents; sg++, i++)
-                dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
-}
-EXPORT_SYMBOL(dma_sync_sg_for_device);
-
-dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
-                          enum dma_data_direction dir)
-{
-        dma_addr_t handle = virt_to_bus(addr);
-
-        dma_sync_single_for_device(dev, handle, size, dir);
-        return handle;
-}
-EXPORT_SYMBOL(dma_map_single);
-
-dma_addr_t dma_map_page(struct device *dev, struct page *page,
-                        unsigned long offset, size_t size,
-                        enum dma_data_direction dir)
-{
-        dma_addr_t handle = page_to_phys(page) + offset;
-
-        dma_sync_single_for_device(dev, handle, size, dir);
-        return handle;
-}
-EXPORT_SYMBOL(dma_map_page);
-
-int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
-               enum dma_data_direction dir)
-{
-        int i;
-
-        for (i = 0; i < nents; sg++, i++) {
-                sg->dma_address = sg_phys(sg);
-                dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
-        }
-        return nents;
-}
-EXPORT_SYMBOL(dma_map_sg);
+#ifdef CONFIG_MMU
+#include "dma_mm.c"
+#else
+#include "dma_no.c"
+#endif
diff --git a/arch/m68k/kernel/dma_mm.c b/arch/m68k/kernel/dma_mm.c
new file mode 100644
index 000000000000..4bbb3c2a8880
--- /dev/null
+++ b/arch/m68k/kernel/dma_mm.c
@@ -0,0 +1,130 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#undef DEBUG
+
+#include <linux/dma-mapping.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/scatterlist.h>
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+
+#include <asm/pgalloc.h>
+
+void *dma_alloc_coherent(struct device *dev, size_t size,
+                         dma_addr_t *handle, gfp_t flag)
+{
+        struct page *page, **map;
+        pgprot_t pgprot;
+        void *addr;
+        int i, order;
+
+        pr_debug("dma_alloc_coherent: %d,%x\n", size, flag);
+
+        size = PAGE_ALIGN(size);
+        order = get_order(size);
+
+        page = alloc_pages(flag, order);
+        if (!page)
+                return NULL;
+
+        *handle = page_to_phys(page);
+        map = kmalloc(sizeof(struct page *) << order, flag & ~__GFP_DMA);
+        if (!map) {
+                __free_pages(page, order);
+                return NULL;
+        }
+        split_page(page, order);
+
+        order = 1 << order;
+        size >>= PAGE_SHIFT;
+        map[0] = page;
+        for (i = 1; i < size; i++)
+                map[i] = page + i;
+        for (; i < order; i++)
+                __free_page(page + i);
+        pgprot = __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
+        if (CPU_IS_040_OR_060)
+                pgprot_val(pgprot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
+        else
+                pgprot_val(pgprot) |= _PAGE_NOCACHE030;
+        addr = vmap(map, size, VM_MAP, pgprot);
+        kfree(map);
+
+        return addr;
+}
+EXPORT_SYMBOL(dma_alloc_coherent);
+
+void dma_free_coherent(struct device *dev, size_t size,
+                       void *addr, dma_addr_t handle)
+{
+        pr_debug("dma_free_coherent: %p, %x\n", addr, handle);
+        vfree(addr);
+}
+EXPORT_SYMBOL(dma_free_coherent);
+
+void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
+                                size_t size, enum dma_data_direction dir)
+{
+        switch (dir) {
+        case DMA_TO_DEVICE:
+                cache_push(handle, size);
+                break;
+        case DMA_FROM_DEVICE:
+                cache_clear(handle, size);
+                break;
+        default:
+                if (printk_ratelimit())
+                        printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
+                break;
+        }
+}
+EXPORT_SYMBOL(dma_sync_single_for_device);
+
+void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
+                            enum dma_data_direction dir)
+{
+        int i;
+
+        for (i = 0; i < nents; sg++, i++)
+                dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
+}
+EXPORT_SYMBOL(dma_sync_sg_for_device);
+
+dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
+                          enum dma_data_direction dir)
+{
+        dma_addr_t handle = virt_to_bus(addr);
+
+        dma_sync_single_for_device(dev, handle, size, dir);
+        return handle;
+}
+EXPORT_SYMBOL(dma_map_single);
+
+dma_addr_t dma_map_page(struct device *dev, struct page *page,
+                        unsigned long offset, size_t size,
+                        enum dma_data_direction dir)
+{
+        dma_addr_t handle = page_to_phys(page) + offset;
+
+        dma_sync_single_for_device(dev, handle, size, dir);
+        return handle;
+}
+EXPORT_SYMBOL(dma_map_page);
+
+int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+               enum dma_data_direction dir)
+{
+        int i;
+
+        for (i = 0; i < nents; sg++, i++) {
+                sg->dma_address = sg_phys(sg);
+                dma_sync_single_for_device(dev, sg->dma_address, sg->length, dir);
+        }
+        return nents;
+}
+EXPORT_SYMBOL(dma_map_sg);
diff --git a/arch/m68k/kernel/dma_no.c b/arch/m68k/kernel/dma_no.c
new file mode 100644
index 000000000000..fc61541aeb71
--- /dev/null
+++ b/arch/m68k/kernel/dma_no.c
@@ -0,0 +1,74 @@
+/*
+ * Dynamic DMA mapping support.
+ *
+ * We never have any address translations to worry about, so this
+ * is just alloc/free.
+ */
+
+#include <linux/types.h>
+#include <linux/gfp.h>
+#include <linux/mm.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <asm/cacheflush.h>
+
+void *dma_alloc_coherent(struct device *dev, size_t size,
+                           dma_addr_t *dma_handle, gfp_t gfp)
+{
+        void *ret;
+        /* ignore region specifiers */
+        gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
+
+        if (dev == NULL || (*dev->dma_mask < 0xffffffff))
+                gfp |= GFP_DMA;
+        ret = (void *)__get_free_pages(gfp, get_order(size));
+
+        if (ret != NULL) {
+                memset(ret, 0, size);
+                *dma_handle = virt_to_phys(ret);
+        }
+        return ret;
+}
+
+void dma_free_coherent(struct device *dev, size_t size,
+                         void *vaddr, dma_addr_t dma_handle)
+{
+        free_pages((unsigned long)vaddr, get_order(size));
+}
+
+void dma_sync_single_for_device(struct device *dev, dma_addr_t handle,
+                                size_t size, enum dma_data_direction dir)
+{
+        switch (dir) {
+        case DMA_TO_DEVICE:
+                flush_dcache_range(handle, size);
+                break;
+        case DMA_FROM_DEVICE:
+                /* Should be clear already */
+                break;
+        default:
+                if (printk_ratelimit())
+                        printk("dma_sync_single_for_device: unsupported dir %u\n", dir);
+                break;
+        }
+}
+
+EXPORT_SYMBOL(dma_sync_single_for_device);
+dma_addr_t dma_map_single(struct device *dev, void *addr, size_t size,
+                          enum dma_data_direction dir)
+{
+        dma_addr_t handle = virt_to_phys(addr);
+        flush_dcache_range(handle, size);
+        return handle;
+}
+EXPORT_SYMBOL(dma_map_single);
+
+dma_addr_t dma_map_page(struct device *dev, struct page *page,
+                        unsigned long offset, size_t size,
+                        enum dma_data_direction dir)
+{
+        dma_addr_t handle = page_to_phys(page) + offset;
+        dma_sync_single_for_device(dev, handle, size, dir);
+        return handle;
+}
+EXPORT_SYMBOL(dma_map_page);
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S
index 1559dea36e55..081cf96f243b 100644
--- a/arch/m68k/kernel/entry.S
+++ b/arch/m68k/kernel/entry.S
@@ -1,753 +1,5 @@
-/* -*- mode: asm -*-
- *
- *  linux/arch/m68k/kernel/entry.S
- *
- *  Copyright (C) 1991, 1992  Linus Torvalds
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file README.legal in the main directory of this archive
- * for more details.
- *
- * Linux/m68k support by Hamish Macdonald
- *
- * 68060 fixes by Jesper Skov
- *
- */
-
-/*
- * entry.S  contains the system-call and fault low-level handling routines.
- * This also contains the timer-interrupt handler, as well as all interrupts
- * and faults that can result in a task-switch.
- *
- * NOTE: This code handles signal-recognition, which happens every time
- * after a timer-interrupt and after each system call.
- *
- */
-
-/*
- * 12/03/96 Jes: Currently we only support m68k single-cpu systems, so
- *               all pointers that used to be 'current' are now entry
- *               number 0 in the 'current_set' list.
- *
- *  6/05/00 RZ:  addedd writeback completion after return from sighandler
- *               for 68040
- */
-
-#include <linux/linkage.h>
-#include <asm/entry.h>
-#include <asm/errno.h>
-#include <asm/setup.h>
-#include <asm/segment.h>
-#include <asm/traps.h>
-#include <asm/unistd.h>
-
-#include <asm/asm-offsets.h>
-
-.globl system_call, buserr, trap, resume
-.globl sys_call_table
-.globl sys_fork, sys_clone, sys_vfork
-.globl ret_from_interrupt, bad_interrupt
-.globl auto_irqhandler_fixup
-.globl user_irqvec_fixup, user_irqhandler_fixup
-
-.text
-ENTRY(buserr)
-        SAVE_ALL_INT
-        GET_CURRENT(%d0)
-        movel   %sp,%sp@-               | stack frame pointer argument
-        bsrl    buserr_c
-        addql   #4,%sp
-        jra     .Lret_from_exception
-
-ENTRY(trap)
-        SAVE_ALL_INT
-        GET_CURRENT(%d0)
-        movel   %sp,%sp@-               | stack frame pointer argument
-        bsrl    trap_c
-        addql   #4,%sp
-        jra     .Lret_from_exception
-
-        | After a fork we jump here directly from resume,
-        | so that %d1 contains the previous task
-        | schedule_tail now used regardless of CONFIG_SMP
-ENTRY(ret_from_fork)
-        movel   %d1,%sp@-
-        jsr     schedule_tail
-        addql   #4,%sp
-        jra     .Lret_from_exception
-
-do_trace_entry:
-        movel   #-ENOSYS,%sp@(PT_OFF_D0)| needed for strace
-        subql   #4,%sp
-        SAVE_SWITCH_STACK
-        jbsr    syscall_trace
-        RESTORE_SWITCH_STACK
-        addql   #4,%sp
-        movel   %sp@(PT_OFF_ORIG_D0),%d0
-        cmpl    #NR_syscalls,%d0
-        jcs     syscall
-badsys:
-        movel   #-ENOSYS,%sp@(PT_OFF_D0)
-        jra     ret_from_syscall
-
-do_trace_exit:
-        subql   #4,%sp
-        SAVE_SWITCH_STACK
-        jbsr    syscall_trace
-        RESTORE_SWITCH_STACK
-        addql   #4,%sp
-        jra     .Lret_from_exception
-
-ENTRY(ret_from_signal)
-        tstb    %curptr@(TASK_INFO+TINFO_FLAGS+2)
-        jge     1f
-        jbsr    syscall_trace
-1:      RESTORE_SWITCH_STACK
-        addql   #4,%sp
-/* on 68040 complete pending writebacks if any */
-#ifdef CONFIG_M68040
-        bfextu  %sp@(PT_OFF_FORMATVEC){#0,#4},%d0
-        subql   #7,%d0                          | bus error frame ?
-        jbne    1f
-        movel   %sp,%sp@-
-        jbsr    berr_040cleanup
-        addql   #4,%sp
-1:
+#ifdef CONFIG_MMU
+#include "entry_mm.S"
+#else
+#include "entry_no.S"
 #endif
-        jra     .Lret_from_exception
-
-ENTRY(system_call)
-        SAVE_ALL_SYS
-
-        GET_CURRENT(%d1)
-        | save top of frame
-        movel   %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
-
-        | syscall trace?
-        tstb    %curptr@(TASK_INFO+TINFO_FLAGS+2)
-        jmi     do_trace_entry
-        cmpl    #NR_syscalls,%d0
-        jcc     badsys
-syscall:
-        jbsr    @(sys_call_table,%d0:l:4)@(0)
-        movel   %d0,%sp@(PT_OFF_D0)     | save the return value
-ret_from_syscall:
-        |oriw   #0x0700,%sr
-        movew   %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0
-        jne     syscall_exit_work
-1:      RESTORE_ALL
-
-syscall_exit_work:
-        btst    #5,%sp@(PT_OFF_SR)      | check if returning to kernel
-        bnes    1b                      | if so, skip resched, signals
-        lslw    #1,%d0
-        jcs     do_trace_exit
-        jmi     do_delayed_trace
-        lslw    #8,%d0
-        jmi     do_signal_return
-        pea     resume_userspace
-        jra     schedule
-
-
-ENTRY(ret_from_exception)
-.Lret_from_exception:
-        btst    #5,%sp@(PT_OFF_SR)      | check if returning to kernel
-        bnes    1f                      | if so, skip resched, signals
-        | only allow interrupts when we are really the last one on the
-        | kernel stack, otherwise stack overflow can occur during
-        | heavy interrupt load
-        andw    #ALLOWINT,%sr
-
-resume_userspace:
-        moveb   %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0
-        jne     exit_work
-1:      RESTORE_ALL
-
-exit_work:
-        | save top of frame
-        movel   %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
-        lslb    #1,%d0
-        jmi     do_signal_return
-        pea     resume_userspace
-        jra     schedule
-
-
-do_signal_return:
-        |andw   #ALLOWINT,%sr
-        subql   #4,%sp                  | dummy return address
-        SAVE_SWITCH_STACK
-        pea     %sp@(SWITCH_STACK_SIZE)
-        bsrl    do_signal
-        addql   #4,%sp
-        RESTORE_SWITCH_STACK
-        addql   #4,%sp
-        jbra    resume_userspace
-
-do_delayed_trace:
-        bclr    #7,%sp@(PT_OFF_SR)      | clear trace bit in SR
-        pea     1                       | send SIGTRAP
-        movel   %curptr,%sp@-
-        pea     LSIGTRAP
-        jbsr    send_sig
-        addql   #8,%sp
-        addql   #4,%sp
-        jbra    resume_userspace
-
-
-/* This is the main interrupt handler for autovector interrupts */
-
-ENTRY(auto_inthandler)
-        SAVE_ALL_INT
-        GET_CURRENT(%d0)
-        addqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
-                                        |  put exception # in d0
-        bfextu  %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
-        subw    #VEC_SPUR,%d0
-
-        movel   %sp,%sp@-
-        movel   %d0,%sp@-               |  put vector # on stack
-auto_irqhandler_fixup = . + 2
-        jsr     __m68k_handle_int       |  process the IRQ
-        addql   #8,%sp                  |  pop parameters off stack
-
-ret_from_interrupt:
-        subqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
-        jeq     ret_from_last_interrupt
-2:      RESTORE_ALL
-
-        ALIGN
-ret_from_last_interrupt:
-        moveq   #(~ALLOWINT>>8)&0xff,%d0
-        andb    %sp@(PT_OFF_SR),%d0
-        jne     2b
-
-        /* check if we need to do software interrupts */
-        tstl    irq_stat+CPUSTAT_SOFTIRQ_PENDING
-        jeq     .Lret_from_exception
-        pea     ret_from_exception
-        jra     do_softirq
-
-/* Handler for user defined interrupt vectors */
-
-ENTRY(user_inthandler)
-        SAVE_ALL_INT
-        GET_CURRENT(%d0)
-        addqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
-                                        |  put exception # in d0
-        bfextu  %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
-user_irqvec_fixup = . + 2
-        subw    #VEC_USER,%d0
-
-        movel   %sp,%sp@-
-        movel   %d0,%sp@-               |  put vector # on stack
-user_irqhandler_fixup = . + 2
-        jsr     __m68k_handle_int       |  process the IRQ
-        addql   #8,%sp                  |  pop parameters off stack
-
-        subqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
-        jeq     ret_from_last_interrupt
-        RESTORE_ALL
-
-/* Handler for uninitialized and spurious interrupts */
-
-ENTRY(bad_inthandler)
-        SAVE_ALL_INT
-        GET_CURRENT(%d0)
-        addqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
-
-        movel   %sp,%sp@-
-        jsr     handle_badint
-        addql   #4,%sp
-
-        subqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
-        jeq     ret_from_last_interrupt
-        RESTORE_ALL
-
-
-ENTRY(sys_fork)
-        SAVE_SWITCH_STACK
-        pea     %sp@(SWITCH_STACK_SIZE)
-        jbsr    m68k_fork
-        addql   #4,%sp
-        RESTORE_SWITCH_STACK
-        rts
-
-ENTRY(sys_clone)
-        SAVE_SWITCH_STACK
-        pea     %sp@(SWITCH_STACK_SIZE)
-        jbsr    m68k_clone
-        addql   #4,%sp
-        RESTORE_SWITCH_STACK
-        rts
-
-ENTRY(sys_vfork)
-        SAVE_SWITCH_STACK
-        pea     %sp@(SWITCH_STACK_SIZE)
-        jbsr    m68k_vfork
-        addql   #4,%sp
-        RESTORE_SWITCH_STACK
-        rts
-
-ENTRY(sys_sigreturn)
-        SAVE_SWITCH_STACK
-        jbsr    do_sigreturn
-        RESTORE_SWITCH_STACK
-        rts
-
-ENTRY(sys_rt_sigreturn)
-        SAVE_SWITCH_STACK
-        jbsr    do_rt_sigreturn
-        RESTORE_SWITCH_STACK
-        rts
-
-resume:
-        /*
-         * Beware - when entering resume, prev (the current task) is
-         * in a0, next (the new task) is in a1,so don't change these
-         * registers until their contents are no longer needed.
-         */
-
-        /* save sr */
-        movew   %sr,%a0@(TASK_THREAD+THREAD_SR)
-
-        /* save fs (sfc,%dfc) (may be pointing to kernel memory) */
-        movec   %sfc,%d0
-        movew   %d0,%a0@(TASK_THREAD+THREAD_FS)
-
-        /* save usp */
-        /* it is better to use a movel here instead of a movew 8*) */
-        movec   %usp,%d0
-        movel   %d0,%a0@(TASK_THREAD+THREAD_USP)
-
-        /* save non-scratch registers on stack */
-        SAVE_SWITCH_STACK
-
-        /* save current kernel stack pointer */
-        movel   %sp,%a0@(TASK_THREAD+THREAD_KSP)
-
-        /* save floating point context */
-#ifndef CONFIG_M68KFPU_EMU_ONLY
-#ifdef CONFIG_M68KFPU_EMU
-        tstl    m68k_fputype
-        jeq     3f
-#endif
-        fsave   %a0@(TASK_THREAD+THREAD_FPSTATE)
-
-#if defined(CONFIG_M68060)
-#if !defined(CPU_M68060_ONLY)
-        btst    #3,m68k_cputype+3
-        beqs    1f
-#endif
-        /* The 060 FPU keeps status in bits 15-8 of the first longword */
-        tstb    %a0@(TASK_THREAD+THREAD_FPSTATE+2)
-        jeq     3f
-#if !defined(CPU_M68060_ONLY)
-        jra     2f
-#endif
-#endif /* CONFIG_M68060 */
-#if !defined(CPU_M68060_ONLY)
-1:      tstb    %a0@(TASK_THREAD+THREAD_FPSTATE)
-        jeq     3f
-#endif
-2:      fmovemx %fp0-%fp7,%a0@(TASK_THREAD+THREAD_FPREG)
-        fmoveml %fpcr/%fpsr/%fpiar,%a0@(TASK_THREAD+THREAD_FPCNTL)
-3:
-#endif  /* CONFIG_M68KFPU_EMU_ONLY */
-        /* Return previous task in %d1 */
-        movel   %curptr,%d1
-
-        /* switch to new task (a1 contains new task) */
-        movel   %a1,%curptr
-
-        /* restore floating point context */
-#ifndef CONFIG_M68KFPU_EMU_ONLY
-#ifdef CONFIG_M68KFPU_EMU
-        tstl    m68k_fputype
-        jeq     4f
-#endif
-#if defined(CONFIG_M68060)
-#if !defined(CPU_M68060_ONLY)
-        btst    #3,m68k_cputype+3
-        beqs    1f
-#endif
-        /* The 060 FPU keeps status in bits 15-8 of the first longword */
-        tstb    %a1@(TASK_THREAD+THREAD_FPSTATE+2)
-        jeq     3f
-#if !defined(CPU_M68060_ONLY)
-        jra     2f
-#endif
-#endif /* CONFIG_M68060 */
-#if !defined(CPU_M68060_ONLY)
-1:      tstb    %a1@(TASK_THREAD+THREAD_FPSTATE)
-        jeq     3f
-#endif
-2:      fmovemx %a1@(TASK_THREAD+THREAD_FPREG),%fp0-%fp7
-        fmoveml %a1@(TASK_THREAD+THREAD_FPCNTL),%fpcr/%fpsr/%fpiar
-3:      frestore %a1@(TASK_THREAD+THREAD_FPSTATE)
-4:
-#endif  /* CONFIG_M68KFPU_EMU_ONLY */
-
-        /* restore the kernel stack pointer */
-        movel   %a1@(TASK_THREAD+THREAD_KSP),%sp
-
-        /* restore non-scratch registers */
-        RESTORE_SWITCH_STACK
-
-        /* restore user stack pointer */
-        movel   %a1@(TASK_THREAD+THREAD_USP),%a0
-        movel   %a0,%usp
-
-        /* restore fs (sfc,%dfc) */
-        movew   %a1@(TASK_THREAD+THREAD_FS),%a0
-        movec   %a0,%sfc
-        movec   %a0,%dfc
-
-        /* restore status register */
-        movew   %a1@(TASK_THREAD+THREAD_SR),%sr
-
-        rts
-
-.data
-ALIGN
-sys_call_table:
-        .long sys_restart_syscall       /* 0 - old "setup()" system call, used for restarting */
-        .long sys_exit
-        .long sys_fork
-        .long sys_read
-        .long sys_write
-        .long sys_open          /* 5 */
-        .long sys_close
-        .long sys_waitpid
-        .long sys_creat
-        .long sys_link
-        .long sys_unlink        /* 10 */
-        .long sys_execve
-        .long sys_chdir
-        .long sys_time
-        .long sys_mknod
-        .long sys_chmod         /* 15 */
-        .long sys_chown16
-        .long sys_ni_syscall                            /* old break syscall holder */
-        .long sys_stat
-        .long sys_lseek
-        .long sys_getpid        /* 20 */
-        .long sys_mount
-        .long sys_oldumount
-        .long sys_setuid16
-        .long sys_getuid16
-        .long sys_stime         /* 25 */
-        .long sys_ptrace
-        .long sys_alarm
-        .long sys_fstat
-        .long sys_pause
-        .long sys_utime         /* 30 */
-        .long sys_ni_syscall                            /* old stty syscall holder */
-        .long sys_ni_syscall                            /* old gtty syscall holder */
-        .long sys_access
-        .long sys_nice
-        .long sys_ni_syscall    /* 35 */        /* old ftime syscall holder */
-        .long sys_sync
-        .long sys_kill
-        .long sys_rename
-        .long sys_mkdir
-        .long sys_rmdir         /* 40 */
-        .long sys_dup
-        .long sys_pipe
-        .long sys_times
-        .long sys_ni_syscall                            /* old prof syscall holder */
-        .long sys_brk           /* 45 */
-        .long sys_setgid16
-        .long sys_getgid16
-        .long sys_signal
-        .long sys_geteuid16
-        .long sys_getegid16     /* 50 */
-        .long sys_acct
-        .long sys_umount                                /* recycled never used phys() */
-        .long sys_ni_syscall                            /* old lock syscall holder */
-        .long sys_ioctl
-        .long sys_fcntl         /* 55 */
-        .long sys_ni_syscall                            /* old mpx syscall holder */
-        .long sys_setpgid
-        .long sys_ni_syscall                            /* old ulimit syscall holder */
-        .long sys_ni_syscall
-        .long sys_umask         /* 60 */
-        .long sys_chroot
-        .long sys_ustat
-        .long sys_dup2
-        .long sys_getppid
-        .long sys_getpgrp       /* 65 */
-        .long sys_setsid
-        .long sys_sigaction
-        .long sys_sgetmask
-        .long sys_ssetmask
-        .long sys_setreuid16    /* 70 */
-        .long sys_setregid16
-        .long sys_sigsuspend
-        .long sys_sigpending
-        .long sys_sethostname
-        .long sys_setrlimit     /* 75 */
-        .long sys_old_getrlimit
-        .long sys_getrusage
-        .long sys_gettimeofday
-        .long sys_settimeofday
-        .long sys_getgroups16   /* 80 */
-        .long sys_setgroups16
-        .long sys_old_select
-        .long sys_symlink
-        .long sys_lstat
-        .long sys_readlink      /* 85 */
-        .long sys_uselib
-        .long sys_swapon
-        .long sys_reboot
-        .long sys_old_readdir
-        .long sys_old_mmap      /* 90 */
-        .long sys_munmap
-        .long sys_truncate
-        .long sys_ftruncate
-        .long sys_fchmod
-        .long sys_fchown16      /* 95 */
-        .long sys_getpriority
-        .long sys_setpriority
-        .long sys_ni_syscall                            /* old profil syscall holder */
-        .long sys_statfs
-        .long sys_fstatfs       /* 100 */
-        .long sys_ni_syscall                            /* ioperm for i386 */
-        .long sys_socketcall
-        .long sys_syslog
-        .long sys_setitimer
-        .long sys_getitimer     /* 105 */
-        .long sys_newstat
-        .long sys_newlstat
-        .long sys_newfstat
-        .long sys_ni_syscall
-        .long sys_ni_syscall    /* 110 */       /* iopl for i386 */
-        .long sys_vhangup
-        .long sys_ni_syscall                            /* obsolete idle() syscall */
-        .long sys_ni_syscall                            /* vm86old for i386 */
-        .long sys_wait4
-        .long sys_swapoff       /* 115 */
-        .long sys_sysinfo
-        .long sys_ipc
-        .long sys_fsync
-        .long sys_sigreturn
-        .long sys_clone         /* 120 */
-        .long sys_setdomainname
-        .long sys_newuname
-        .long sys_cacheflush                            /* modify_ldt for i386 */
-        .long sys_adjtimex
-        .long sys_mprotect      /* 125 */
-        .long sys_sigprocmask
-        .long sys_ni_syscall            /* old "create_module" */
-        .long sys_init_module
-        .long sys_delete_module
-        .long sys_ni_syscall    /* 130 - old "get_kernel_syms" */
-        .long sys_quotactl
-        .long sys_getpgid
-        .long sys_fchdir
-        .long sys_bdflush
-        .long sys_sysfs         /* 135 */
-        .long sys_personality
-        .long sys_ni_syscall                            /* for afs_syscall */
-        .long sys_setfsuid16
-        .long sys_setfsgid16
-        .long sys_llseek        /* 140 */
-        .long sys_getdents
-        .long sys_select
-        .long sys_flock
-        .long sys_msync
-        .long sys_readv         /* 145 */
-        .long sys_writev
-        .long sys_getsid
-        .long sys_fdatasync
-        .long sys_sysctl
-        .long sys_mlock         /* 150 */
-        .long sys_munlock
-        .long sys_mlockall
-        .long sys_munlockall
-        .long sys_sched_setparam
-        .long sys_sched_getparam        /* 155 */
-        .long sys_sched_setscheduler
-        .long sys_sched_getscheduler
-        .long sys_sched_yield
-        .long sys_sched_get_priority_max
-        .long sys_sched_get_priority_min  /* 160 */
-        .long sys_sched_rr_get_interval
-        .long sys_nanosleep
-        .long sys_mremap
-        .long sys_setresuid16
-        .long sys_getresuid16   /* 165 */
-        .long sys_getpagesize
-        .long sys_ni_syscall            /* old sys_query_module */
-        .long sys_poll
-        .long sys_nfsservctl
-        .long sys_setresgid16   /* 170 */
-        .long sys_getresgid16
-        .long sys_prctl
-        .long sys_rt_sigreturn
-        .long sys_rt_sigaction
-        .long sys_rt_sigprocmask        /* 175 */
-        .long sys_rt_sigpending
-        .long sys_rt_sigtimedwait
-        .long sys_rt_sigqueueinfo
-        .long sys_rt_sigsuspend
-        .long sys_pread64       /* 180 */
-        .long sys_pwrite64
-        .long sys_lchown16;
-        .long sys_getcwd
-        .long sys_capget
-        .long sys_capset        /* 185 */
-        .long sys_sigaltstack
-        .long sys_sendfile
-        .long sys_ni_syscall                            /* streams1 */
-        .long sys_ni_syscall                            /* streams2 */
-        .long sys_vfork         /* 190 */
-        .long sys_getrlimit
-        .long sys_mmap2
-        .long sys_truncate64
-        .long sys_ftruncate64
-        .long sys_stat64        /* 195 */
-        .long sys_lstat64
-        .long sys_fstat64
-        .long sys_chown
-        .long sys_getuid
-        .long sys_getgid        /* 200 */
-        .long sys_geteuid
-        .long sys_getegid
-        .long sys_setreuid
-        .long sys_setregid
-        .long sys_getgroups     /* 205 */
-        .long sys_setgroups
-        .long sys_fchown
-        .long sys_setresuid
-        .long sys_getresuid
-        .long sys_setresgid     /* 210 */
-        .long sys_getresgid
-        .long sys_lchown
-        .long sys_setuid
-        .long sys_setgid
-        .long sys_setfsuid      /* 215 */
-        .long sys_setfsgid
-        .long sys_pivot_root
-        .long sys_ni_syscall
-        .long sys_ni_syscall
-        .long sys_getdents64    /* 220 */
-        .long sys_gettid
-        .long sys_tkill
-        .long sys_setxattr
-        .long sys_lsetxattr
-        .long sys_fsetxattr     /* 225 */
-        .long sys_getxattr
-        .long sys_lgetxattr
-        .long sys_fgetxattr
-        .long sys_listxattr
-        .long sys_llistxattr    /* 230 */
-        .long sys_flistxattr
-        .long sys_removexattr
-        .long sys_lremovexattr
-        .long sys_fremovexattr
-        .long sys_futex         /* 235 */
-        .long sys_sendfile64
-        .long sys_mincore
-        .long sys_madvise
-        .long sys_fcntl64
-        .long sys_readahead     /* 240 */
-        .long sys_io_setup
-        .long sys_io_destroy
-        .long sys_io_getevents
-        .long sys_io_submit
-        .long sys_io_cancel     /* 245 */
-        .long sys_fadvise64
-        .long sys_exit_group
-        .long sys_lookup_dcookie
-        .long sys_epoll_create
-        .long sys_epoll_ctl     /* 250 */
-        .long sys_epoll_wait
-        .long sys_remap_file_pages
-        .long sys_set_tid_address
-        .long sys_timer_create
-        .long sys_timer_settime /* 255 */
-        .long sys_timer_gettime
-        .long sys_timer_getoverrun
-        .long sys_timer_delete
-        .long sys_clock_settime
-        .long sys_clock_gettime /* 260 */
-        .long sys_clock_getres
-        .long sys_clock_nanosleep
-        .long sys_statfs64
-        .long sys_fstatfs64
-        .long sys_tgkill        /* 265 */
-        .long sys_utimes
-        .long sys_fadvise64_64
-        .long sys_mbind
-        .long sys_get_mempolicy
-        .long sys_set_mempolicy /* 270 */
-        .long sys_mq_open
-        .long sys_mq_unlink
-        .long sys_mq_timedsend
-        .long sys_mq_timedreceive
-        .long sys_mq_notify     /* 275 */
-        .long sys_mq_getsetattr
-        .long sys_waitid
-        .long sys_ni_syscall    /* for sys_vserver */
-        .long sys_add_key
-        .long sys_request_key   /* 280 */
-        .long sys_keyctl
-        .long sys_ioprio_set
-        .long sys_ioprio_get
-        .long sys_inotify_init
-        .long sys_inotify_add_watch     /* 285 */
-        .long sys_inotify_rm_watch
-        .long sys_migrate_pages
-        .long sys_openat
-        .long sys_mkdirat
-        .long sys_mknodat               /* 290 */
-        .long sys_fchownat
-        .long sys_futimesat
-        .long sys_fstatat64
-        .long sys_unlinkat
-        .long sys_renameat              /* 295 */
-        .long sys_linkat
-        .long sys_symlinkat
-        .long sys_readlinkat
-        .long sys_fchmodat
-        .long sys_faccessat             /* 300 */
-        .long sys_ni_syscall            /* Reserved for pselect6 */
-        .long sys_ni_syscall            /* Reserved for ppoll */
-        .long sys_unshare
-        .long sys_set_robust_list
-        .long sys_get_robust_list       /* 305 */
-        .long sys_splice
-        .long sys_sync_file_range
-        .long sys_tee
-        .long sys_vmsplice
-        .long sys_move_pages            /* 310 */
-        .long sys_sched_setaffinity
-        .long sys_sched_getaffinity
-        .long sys_kexec_load
-        .long sys_getcpu
-        .long sys_epoll_pwait           /* 315 */
-        .long sys_utimensat
-        .long sys_signalfd
-        .long sys_timerfd_create
-        .long sys_eventfd
-        .long sys_fallocate             /* 320 */
-        .long sys_timerfd_settime
-        .long sys_timerfd_gettime
-        .long sys_signalfd4
-        .long sys_eventfd2
-        .long sys_epoll_create1         /* 325 */
-        .long sys_dup3
-        .long sys_pipe2
-        .long sys_inotify_init1
-        .long sys_preadv
-        .long sys_pwritev               /* 330 */
-        .long sys_rt_tgsigqueueinfo
-        .long sys_perf_event_open
-        .long sys_get_thread_area
-        .long sys_set_thread_area
-        .long sys_atomic_cmpxchg_32     /* 335 */
-        .long sys_atomic_barrier
-        .long sys_fanotify_init
-        .long sys_fanotify_mark
-        .long sys_prlimit64
-
diff --git a/arch/m68k/kernel/entry_mm.S b/arch/m68k/kernel/entry_mm.S
new file mode 100644
index 000000000000..1559dea36e55
--- /dev/null
+++ b/arch/m68k/kernel/entry_mm.S
@@ -0,0 +1,753 @@
+/* -*- mode: asm -*-
+ *
+ *  linux/arch/m68k/kernel/entry.S
+ *
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file README.legal in the main directory of this archive
+ * for more details.
+ *
+ * Linux/m68k support by Hamish Macdonald
+ *
+ * 68060 fixes by Jesper Skov
+ *
+ */
+
+/*
+ * entry.S  contains the system-call and fault low-level handling routines.
+ * This also contains the timer-interrupt handler, as well as all interrupts
+ * and faults that can result in a task-switch.
+ *
+ * NOTE: This code handles signal-recognition, which happens every time
+ * after a timer-interrupt and after each system call.
+ *
+ */
+
+/*
+ * 12/03/96 Jes: Currently we only support m68k single-cpu systems, so
+ *               all pointers that used to be 'current' are now entry
+ *               number 0 in the 'current_set' list.
+ *
+ *  6/05/00 RZ:  addedd writeback completion after return from sighandler
+ *               for 68040
+ */
+
+#include <linux/linkage.h>
+#include <asm/entry.h>
+#include <asm/errno.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/traps.h>
+#include <asm/unistd.h>
+
+#include <asm/asm-offsets.h>
+
+.globl system_call, buserr, trap, resume
+.globl sys_call_table
+.globl sys_fork, sys_clone, sys_vfork
+.globl ret_from_interrupt, bad_interrupt
+.globl auto_irqhandler_fixup
+.globl user_irqvec_fixup, user_irqhandler_fixup
+
+.text
+ENTRY(buserr)
+        SAVE_ALL_INT
+        GET_CURRENT(%d0)
+        movel   %sp,%sp@-               | stack frame pointer argument
+        bsrl    buserr_c
+        addql   #4,%sp
+        jra     .Lret_from_exception
+
+ENTRY(trap)
+        SAVE_ALL_INT
+        GET_CURRENT(%d0)
+        movel   %sp,%sp@-               | stack frame pointer argument
+        bsrl    trap_c
+        addql   #4,%sp
+        jra     .Lret_from_exception
+
+        | After a fork we jump here directly from resume,
+        | so that %d1 contains the previous task
+        | schedule_tail now used regardless of CONFIG_SMP
+ENTRY(ret_from_fork)
+        movel   %d1,%sp@-
+        jsr     schedule_tail
+        addql   #4,%sp
+        jra     .Lret_from_exception
+
+do_trace_entry:
+        movel   #-ENOSYS,%sp@(PT_OFF_D0)| needed for strace
+        subql   #4,%sp
+        SAVE_SWITCH_STACK
+        jbsr    syscall_trace
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        movel   %sp@(PT_OFF_ORIG_D0),%d0
+        cmpl    #NR_syscalls,%d0
+        jcs     syscall
+badsys:
+        movel   #-ENOSYS,%sp@(PT_OFF_D0)
+        jra     ret_from_syscall
+
+do_trace_exit:
+        subql   #4,%sp
+        SAVE_SWITCH_STACK
+        jbsr    syscall_trace
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        jra     .Lret_from_exception
+
+ENTRY(ret_from_signal)
+        tstb    %curptr@(TASK_INFO+TINFO_FLAGS+2)
+        jge     1f
+        jbsr    syscall_trace
+1:      RESTORE_SWITCH_STACK
+        addql   #4,%sp
+/* on 68040 complete pending writebacks if any */
+#ifdef CONFIG_M68040
+        bfextu  %sp@(PT_OFF_FORMATVEC){#0,#4},%d0
+        subql   #7,%d0                          | bus error frame ?
+        jbne    1f
+        movel   %sp,%sp@-
+        jbsr    berr_040cleanup
+        addql   #4,%sp
+1:
+#endif
+        jra     .Lret_from_exception
+
+ENTRY(system_call)
+        SAVE_ALL_SYS
+
+        GET_CURRENT(%d1)
+        | save top of frame
+        movel   %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
+
+        | syscall trace?
+        tstb    %curptr@(TASK_INFO+TINFO_FLAGS+2)
+        jmi     do_trace_entry
+        cmpl    #NR_syscalls,%d0
+        jcc     badsys
+syscall:
+        jbsr    @(sys_call_table,%d0:l:4)@(0)
+        movel   %d0,%sp@(PT_OFF_D0)     | save the return value
+ret_from_syscall:
+        |oriw   #0x0700,%sr
+        movew   %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0
+        jne     syscall_exit_work
+1:      RESTORE_ALL
+
+syscall_exit_work:
+        btst    #5,%sp@(PT_OFF_SR)      | check if returning to kernel
+        bnes    1b                      | if so, skip resched, signals
+        lslw    #1,%d0
+        jcs     do_trace_exit
+        jmi     do_delayed_trace
+        lslw    #8,%d0
+        jmi     do_signal_return
+        pea     resume_userspace
+        jra     schedule
+
+
+ENTRY(ret_from_exception)
+.Lret_from_exception:
+        btst    #5,%sp@(PT_OFF_SR)      | check if returning to kernel
+        bnes    1f                      | if so, skip resched, signals
+        | only allow interrupts when we are really the last one on the
+        | kernel stack, otherwise stack overflow can occur during
+        | heavy interrupt load
+        andw    #ALLOWINT,%sr
+
+resume_userspace:
+        moveb   %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0
+        jne     exit_work
+1:      RESTORE_ALL
+
+exit_work:
+        | save top of frame
+        movel   %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
+        lslb    #1,%d0
+        jmi     do_signal_return
+        pea     resume_userspace
+        jra     schedule
+
+
+do_signal_return:
+        |andw   #ALLOWINT,%sr
+        subql   #4,%sp                  | dummy return address
+        SAVE_SWITCH_STACK
+        pea     %sp@(SWITCH_STACK_SIZE)
+        bsrl    do_signal
+        addql   #4,%sp
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        jbra    resume_userspace
+
+do_delayed_trace:
+        bclr    #7,%sp@(PT_OFF_SR)      | clear trace bit in SR
+        pea     1                       | send SIGTRAP
+        movel   %curptr,%sp@-
+        pea     LSIGTRAP
+        jbsr    send_sig
+        addql   #8,%sp
+        addql   #4,%sp
+        jbra    resume_userspace
+
+
+/* This is the main interrupt handler for autovector interrupts */
+
+ENTRY(auto_inthandler)
+        SAVE_ALL_INT
+        GET_CURRENT(%d0)
+        addqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+                                        |  put exception # in d0
+        bfextu  %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
+        subw    #VEC_SPUR,%d0
+
+        movel   %sp,%sp@-
+        movel   %d0,%sp@-               |  put vector # on stack
+auto_irqhandler_fixup = . + 2
+        jsr     __m68k_handle_int       |  process the IRQ
+        addql   #8,%sp                  |  pop parameters off stack
+
+ret_from_interrupt:
+        subqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+        jeq     ret_from_last_interrupt
+2:      RESTORE_ALL
+
+        ALIGN
+ret_from_last_interrupt:
+        moveq   #(~ALLOWINT>>8)&0xff,%d0
+        andb    %sp@(PT_OFF_SR),%d0
+        jne     2b
+
+        /* check if we need to do software interrupts */
+        tstl    irq_stat+CPUSTAT_SOFTIRQ_PENDING
+        jeq     .Lret_from_exception
+        pea     ret_from_exception
+        jra     do_softirq
+
+/* Handler for user defined interrupt vectors */
+
+ENTRY(user_inthandler)
+        SAVE_ALL_INT
+        GET_CURRENT(%d0)
+        addqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+                                        |  put exception # in d0
+        bfextu  %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
+user_irqvec_fixup = . + 2
+        subw    #VEC_USER,%d0
+
+        movel   %sp,%sp@-
+        movel   %d0,%sp@-               |  put vector # on stack
+user_irqhandler_fixup = . + 2
+        jsr     __m68k_handle_int       |  process the IRQ
+        addql   #8,%sp                  |  pop parameters off stack
+
+        subqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+        jeq     ret_from_last_interrupt
+        RESTORE_ALL
+
+/* Handler for uninitialized and spurious interrupts */
+
+ENTRY(bad_inthandler)
+        SAVE_ALL_INT
+        GET_CURRENT(%d0)
+        addqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+
+        movel   %sp,%sp@-
+        jsr     handle_badint
+        addql   #4,%sp
+
+        subqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+        jeq     ret_from_last_interrupt
+        RESTORE_ALL
+
+
+ENTRY(sys_fork)
+        SAVE_SWITCH_STACK
+        pea     %sp@(SWITCH_STACK_SIZE)
+        jbsr    m68k_fork
+        addql   #4,%sp
+        RESTORE_SWITCH_STACK
+        rts
+
+ENTRY(sys_clone)
+        SAVE_SWITCH_STACK
+        pea     %sp@(SWITCH_STACK_SIZE)
+        jbsr    m68k_clone
+        addql   #4,%sp
+        RESTORE_SWITCH_STACK
+        rts
+
+ENTRY(sys_vfork)
+        SAVE_SWITCH_STACK
+        pea     %sp@(SWITCH_STACK_SIZE)
+        jbsr    m68k_vfork
+        addql   #4,%sp
+        RESTORE_SWITCH_STACK
+        rts
+
+ENTRY(sys_sigreturn)
+        SAVE_SWITCH_STACK
+        jbsr    do_sigreturn
+        RESTORE_SWITCH_STACK
+        rts
+
+ENTRY(sys_rt_sigreturn)
+        SAVE_SWITCH_STACK
+        jbsr    do_rt_sigreturn
+        RESTORE_SWITCH_STACK
+        rts
+
+resume:
+        /*
+         * Beware - when entering resume, prev (the current task) is
+         * in a0, next (the new task) is in a1,so don't change these
+         * registers until their contents are no longer needed.
+         */
+
+        /* save sr */
+        movew   %sr,%a0@(TASK_THREAD+THREAD_SR)
+
+        /* save fs (sfc,%dfc) (may be pointing to kernel memory) */
+        movec   %sfc,%d0
+        movew   %d0,%a0@(TASK_THREAD+THREAD_FS)
+
+        /* save usp */
+        /* it is better to use a movel here instead of a movew 8*) */
+        movec   %usp,%d0
+        movel   %d0,%a0@(TASK_THREAD+THREAD_USP)
+
+        /* save non-scratch registers on stack */
+        SAVE_SWITCH_STACK
+
+        /* save current kernel stack pointer */
+        movel   %sp,%a0@(TASK_THREAD+THREAD_KSP)
+
+        /* save floating point context */
+#ifndef CONFIG_M68KFPU_EMU_ONLY
+#ifdef CONFIG_M68KFPU_EMU
+        tstl    m68k_fputype
+        jeq     3f
+#endif
+        fsave   %a0@(TASK_THREAD+THREAD_FPSTATE)
+
+#if defined(CONFIG_M68060)
+#if !defined(CPU_M68060_ONLY)
+        btst    #3,m68k_cputype+3
+        beqs    1f
+#endif
+        /* The 060 FPU keeps status in bits 15-8 of the first longword */
+        tstb    %a0@(TASK_THREAD+THREAD_FPSTATE+2)
+        jeq     3f
+#if !defined(CPU_M68060_ONLY)
+        jra     2f
+#endif
+#endif /* CONFIG_M68060 */
+#if !defined(CPU_M68060_ONLY)
+1:      tstb    %a0@(TASK_THREAD+THREAD_FPSTATE)
+        jeq     3f
+#endif
+2:      fmovemx %fp0-%fp7,%a0@(TASK_THREAD+THREAD_FPREG)
+        fmoveml %fpcr/%fpsr/%fpiar,%a0@(TASK_THREAD+THREAD_FPCNTL)
+3:
+#endif  /* CONFIG_M68KFPU_EMU_ONLY */
+        /* Return previous task in %d1 */
+        movel   %curptr,%d1
+
+        /* switch to new task (a1 contains new task) */
+        movel   %a1,%curptr
+
+        /* restore floating point context */
+#ifndef CONFIG_M68KFPU_EMU_ONLY
+#ifdef CONFIG_M68KFPU_EMU
+        tstl    m68k_fputype
+        jeq     4f
+#endif
+#if defined(CONFIG_M68060)
+#if !defined(CPU_M68060_ONLY)
+        btst    #3,m68k_cputype+3
+        beqs    1f
+#endif
+        /* The 060 FPU keeps status in bits 15-8 of the first longword */
+        tstb    %a1@(TASK_THREAD+THREAD_FPSTATE+2)
+        jeq     3f
+#if !defined(CPU_M68060_ONLY)
+        jra     2f
+#endif
+#endif /* CONFIG_M68060 */
+#if !defined(CPU_M68060_ONLY)
+1:      tstb    %a1@(TASK_THREAD+THREAD_FPSTATE)
+        jeq     3f
+#endif
+2:      fmovemx %a1@(TASK_THREAD+THREAD_FPREG),%fp0-%fp7
+        fmoveml %a1@(TASK_THREAD+THREAD_FPCNTL),%fpcr/%fpsr/%fpiar
+3:      frestore %a1@(TASK_THREAD+THREAD_FPSTATE)
+4:
+#endif  /* CONFIG_M68KFPU_EMU_ONLY */
+
+        /* restore the kernel stack pointer */
+        movel   %a1@(TASK_THREAD+THREAD_KSP),%sp
+
+        /* restore non-scratch registers */
+        RESTORE_SWITCH_STACK
+
+        /* restore user stack pointer */
+        movel   %a1@(TASK_THREAD+THREAD_USP),%a0
+        movel   %a0,%usp
+
+        /* restore fs (sfc,%dfc) */
+        movew   %a1@(TASK_THREAD+THREAD_FS),%a0
+        movec   %a0,%sfc
+        movec   %a0,%dfc
+
+        /* restore status register */
+        movew   %a1@(TASK_THREAD+THREAD_SR),%sr
+
+        rts
+
+.data
+ALIGN
+sys_call_table:
+        .long sys_restart_syscall       /* 0 - old "setup()" system call, used for restarting */
+        .long sys_exit
+        .long sys_fork
+        .long sys_read
+        .long sys_write
+        .long sys_open          /* 5 */
+        .long sys_close
+        .long sys_waitpid
+        .long sys_creat
+        .long sys_link
+        .long sys_unlink        /* 10 */
+        .long sys_execve
+        .long sys_chdir
+        .long sys_time
+        .long sys_mknod
+        .long sys_chmod         /* 15 */
+        .long sys_chown16
+        .long sys_ni_syscall                            /* old break syscall holder */
+        .long sys_stat
+        .long sys_lseek
+        .long sys_getpid        /* 20 */
+        .long sys_mount
+        .long sys_oldumount
+        .long sys_setuid16
+        .long sys_getuid16
+        .long sys_stime         /* 25 */
+        .long sys_ptrace
+        .long sys_alarm
+        .long sys_fstat
+        .long sys_pause
+        .long sys_utime         /* 30 */
+        .long sys_ni_syscall                            /* old stty syscall holder */
+        .long sys_ni_syscall                            /* old gtty syscall holder */
+        .long sys_access
+        .long sys_nice
+        .long sys_ni_syscall    /* 35 */        /* old ftime syscall holder */
+        .long sys_sync
+        .long sys_kill
+        .long sys_rename
+        .long sys_mkdir
+        .long sys_rmdir         /* 40 */
+        .long sys_dup
+        .long sys_pipe
+        .long sys_times
+        .long sys_ni_syscall                            /* old prof syscall holder */
+        .long sys_brk           /* 45 */
+        .long sys_setgid16
+        .long sys_getgid16
+        .long sys_signal
+        .long sys_geteuid16
+        .long sys_getegid16     /* 50 */
+        .long sys_acct
+        .long sys_umount                                /* recycled never used phys() */
+        .long sys_ni_syscall                            /* old lock syscall holder */
+        .long sys_ioctl
+        .long sys_fcntl         /* 55 */
+        .long sys_ni_syscall                            /* old mpx syscall holder */
+        .long sys_setpgid
+        .long sys_ni_syscall                            /* old ulimit syscall holder */
+        .long sys_ni_syscall
+        .long sys_umask         /* 60 */
+        .long sys_chroot
+        .long sys_ustat
+        .long sys_dup2
+        .long sys_getppid
+        .long sys_getpgrp       /* 65 */
+        .long sys_setsid
+        .long sys_sigaction
+        .long sys_sgetmask
+        .long sys_ssetmask
+        .long sys_setreuid16    /* 70 */
+        .long sys_setregid16
+        .long sys_sigsuspend
+        .long sys_sigpending
+        .long sys_sethostname
+        .long sys_setrlimit     /* 75 */
+        .long sys_old_getrlimit
+        .long sys_getrusage
+        .long sys_gettimeofday
+        .long sys_settimeofday
+        .long sys_getgroups16   /* 80 */
+        .long sys_setgroups16
+        .long sys_old_select
+        .long sys_symlink
+        .long sys_lstat
+        .long sys_readlink      /* 85 */
+        .long sys_uselib
+        .long sys_swapon
+        .long sys_reboot
+        .long sys_old_readdir
+        .long sys_old_mmap      /* 90 */
+        .long sys_munmap
+        .long sys_truncate
+        .long sys_ftruncate
+        .long sys_fchmod
+        .long sys_fchown16      /* 95 */
+        .long sys_getpriority
+        .long sys_setpriority
+        .long sys_ni_syscall                            /* old profil syscall holder */
+        .long sys_statfs
+        .long sys_fstatfs       /* 100 */
+        .long sys_ni_syscall                            /* ioperm for i386 */
+        .long sys_socketcall
+        .long sys_syslog
+        .long sys_setitimer
+        .long sys_getitimer     /* 105 */
+        .long sys_newstat
+        .long sys_newlstat
+        .long sys_newfstat
+        .long sys_ni_syscall
+        .long sys_ni_syscall    /* 110 */       /* iopl for i386 */
+        .long sys_vhangup
+        .long sys_ni_syscall                            /* obsolete idle() syscall */
+        .long sys_ni_syscall                            /* vm86old for i386 */
+        .long sys_wait4
+        .long sys_swapoff       /* 115 */
+        .long sys_sysinfo
+        .long sys_ipc
+        .long sys_fsync
+        .long sys_sigreturn
+        .long sys_clone         /* 120 */
+        .long sys_setdomainname
+        .long sys_newuname
+        .long sys_cacheflush                            /* modify_ldt for i386 */
+        .long sys_adjtimex
+        .long sys_mprotect      /* 125 */
+        .long sys_sigprocmask
+        .long sys_ni_syscall            /* old "create_module" */
+        .long sys_init_module
+        .long sys_delete_module
+        .long sys_ni_syscall    /* 130 - old "get_kernel_syms" */
+        .long sys_quotactl
+        .long sys_getpgid
+        .long sys_fchdir
+        .long sys_bdflush
+        .long sys_sysfs         /* 135 */
+        .long sys_personality
+        .long sys_ni_syscall                            /* for afs_syscall */
+        .long sys_setfsuid16
+        .long sys_setfsgid16
+        .long sys_llseek        /* 140 */
+        .long sys_getdents
+        .long sys_select
+        .long sys_flock
+        .long sys_msync
+        .long sys_readv         /* 145 */
+        .long sys_writev
+        .long sys_getsid
+        .long sys_fdatasync
+        .long sys_sysctl
+        .long sys_mlock         /* 150 */
+        .long sys_munlock
+        .long sys_mlockall
+        .long sys_munlockall
+        .long sys_sched_setparam
+        .long sys_sched_getparam        /* 155 */
+        .long sys_sched_setscheduler
+        .long sys_sched_getscheduler
+        .long sys_sched_yield
+        .long sys_sched_get_priority_max
+        .long sys_sched_get_priority_min  /* 160 */
+        .long sys_sched_rr_get_interval
+        .long sys_nanosleep
+        .long sys_mremap
+        .long sys_setresuid16
+        .long sys_getresuid16   /* 165 */
+        .long sys_getpagesize
+        .long sys_ni_syscall            /* old sys_query_module */
+        .long sys_poll
+        .long sys_nfsservctl
+        .long sys_setresgid16   /* 170 */
+        .long sys_getresgid16
+        .long sys_prctl
+        .long sys_rt_sigreturn
+        .long sys_rt_sigaction
+        .long sys_rt_sigprocmask        /* 175 */
+        .long sys_rt_sigpending
+        .long sys_rt_sigtimedwait
+        .long sys_rt_sigqueueinfo
+        .long sys_rt_sigsuspend
+        .long sys_pread64       /* 180 */
+        .long sys_pwrite64
+        .long sys_lchown16;
+        .long sys_getcwd
+        .long sys_capget
+        .long sys_capset        /* 185 */
+        .long sys_sigaltstack
+        .long sys_sendfile
+        .long sys_ni_syscall                            /* streams1 */
+        .long sys_ni_syscall                            /* streams2 */
+        .long sys_vfork         /* 190 */
+        .long sys_getrlimit
+        .long sys_mmap2
+        .long sys_truncate64
+        .long sys_ftruncate64
+        .long sys_stat64        /* 195 */
+        .long sys_lstat64
+        .long sys_fstat64
+        .long sys_chown
+        .long sys_getuid
+        .long sys_getgid        /* 200 */
+        .long sys_geteuid
+        .long sys_getegid
+        .long sys_setreuid
+        .long sys_setregid
+        .long sys_getgroups     /* 205 */
+        .long sys_setgroups
+        .long sys_fchown
+        .long sys_setresuid
+        .long sys_getresuid
+        .long sys_setresgid     /* 210 */
+        .long sys_getresgid
+        .long sys_lchown
+        .long sys_setuid
+        .long sys_setgid
+        .long sys_setfsuid      /* 215 */
+        .long sys_setfsgid
+        .long sys_pivot_root
+        .long sys_ni_syscall
+        .long sys_ni_syscall
+        .long sys_getdents64    /* 220 */
+        .long sys_gettid
+        .long sys_tkill
+        .long sys_setxattr
+        .long sys_lsetxattr
+        .long sys_fsetxattr     /* 225 */
+        .long sys_getxattr
+        .long sys_lgetxattr
+        .long sys_fgetxattr
+        .long sys_listxattr
+        .long sys_llistxattr    /* 230 */
+        .long sys_flistxattr
+        .long sys_removexattr
+        .long sys_lremovexattr
+        .long sys_fremovexattr
+        .long sys_futex         /* 235 */
+        .long sys_sendfile64
+        .long sys_mincore
+        .long sys_madvise
+        .long sys_fcntl64
+        .long sys_readahead     /* 240 */
+        .long sys_io_setup
+        .long sys_io_destroy
+        .long sys_io_getevents
+        .long sys_io_submit
+        .long sys_io_cancel     /* 245 */
+        .long sys_fadvise64
+        .long sys_exit_group
+        .long sys_lookup_dcookie
+        .long sys_epoll_create
+        .long sys_epoll_ctl     /* 250 */
+        .long sys_epoll_wait
+        .long sys_remap_file_pages
+        .long sys_set_tid_address
+        .long sys_timer_create
+        .long sys_timer_settime /* 255 */
+        .long sys_timer_gettime
+        .long sys_timer_getoverrun
+        .long sys_timer_delete
+        .long sys_clock_settime
+        .long sys_clock_gettime /* 260 */
+        .long sys_clock_getres
+        .long sys_clock_nanosleep
+        .long sys_statfs64
+        .long sys_fstatfs64
+        .long sys_tgkill        /* 265 */
+        .long sys_utimes
+        .long sys_fadvise64_64
+        .long sys_mbind
+        .long sys_get_mempolicy
+        .long sys_set_mempolicy /* 270 */
+        .long sys_mq_open
+        .long sys_mq_unlink
+        .long sys_mq_timedsend
+        .long sys_mq_timedreceive
+        .long sys_mq_notify     /* 275 */
+        .long sys_mq_getsetattr
+        .long sys_waitid
+        .long sys_ni_syscall    /* for sys_vserver */
+        .long sys_add_key
+        .long sys_request_key   /* 280 */
+        .long sys_keyctl
+        .long sys_ioprio_set
+        .long sys_ioprio_get
+        .long sys_inotify_init
+        .long sys_inotify_add_watch     /* 285 */
+        .long sys_inotify_rm_watch
+        .long sys_migrate_pages
+        .long sys_openat
+        .long sys_mkdirat
+        .long sys_mknodat               /* 290 */
+        .long sys_fchownat
+        .long sys_futimesat
+        .long sys_fstatat64
+        .long sys_unlinkat
+        .long sys_renameat              /* 295 */
+        .long sys_linkat
+        .long sys_symlinkat
+        .long sys_readlinkat
+        .long sys_fchmodat
+        .long sys_faccessat             /* 300 */
+        .long sys_ni_syscall            /* Reserved for pselect6 */
+        .long sys_ni_syscall            /* Reserved for ppoll */
+        .long sys_unshare
+        .long sys_set_robust_list
+        .long sys_get_robust_list       /* 305 */
+        .long sys_splice
+        .long sys_sync_file_range
+        .long sys_tee
+        .long sys_vmsplice
+        .long sys_move_pages            /* 310 */
+        .long sys_sched_setaffinity
+        .long sys_sched_getaffinity
+        .long sys_kexec_load
+        .long sys_getcpu
+        .long sys_epoll_pwait           /* 315 */
+        .long sys_utimensat
+        .long sys_signalfd
+        .long sys_timerfd_create
+        .long sys_eventfd
+        .long sys_fallocate             /* 320 */
+        .long sys_timerfd_settime
+        .long sys_timerfd_gettime
+        .long sys_signalfd4
+        .long sys_eventfd2
+        .long sys_epoll_create1         /* 325 */
+        .long sys_dup3
+        .long sys_pipe2
+        .long sys_inotify_init1
+        .long sys_preadv
+        .long sys_pwritev               /* 330 */
+        .long sys_rt_tgsigqueueinfo
+        .long sys_perf_event_open
+        .long sys_get_thread_area
+        .long sys_set_thread_area
+        .long sys_atomic_cmpxchg_32     /* 335 */
+        .long sys_atomic_barrier
+        .long sys_fanotify_init
+        .long sys_fanotify_mark
+        .long sys_prlimit64
+
diff --git a/arch/m68k/kernel/entry_no.S b/arch/m68k/kernel/entry_no.S
new file mode 100644
index 000000000000..2783f25e38bd
--- /dev/null
+++ b/arch/m68k/kernel/entry_no.S
@@ -0,0 +1,134 @@
+/*
+ *  linux/arch/m68knommu/kernel/entry.S
+ *
+ *  Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
+ *  Copyright (C) 1998  D. Jeff Dionne <jeff@lineo.ca>,
+ *                      Kenneth Albanowski <kjahds@kjahds.com>,
+ *  Copyright (C) 2000  Lineo Inc. (www.lineo.com) 
+ *
+ * Based on:
+ *
+ *  linux/arch/m68k/kernel/entry.S
+ *
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file README.legal in the main directory of this archive
+ * for more details.
+ *
+ * Linux/m68k support by Hamish Macdonald
+ *
+ * 68060 fixes by Jesper Skov
+ * ColdFire support by Greg Ungerer (gerg@snapgear.com)
+ * 5307 fixes by David W. Miller
+ * linux 2.4 support David McCullough <davidm@snapgear.com>
+ */
+
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/errno.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/asm-offsets.h>
+#include <asm/entry.h>
+#include <asm/unistd.h>
+
+.text
+
+.globl buserr
+.globl trap
+.globl ret_from_exception
+.globl ret_from_signal
+.globl sys_fork
+.globl sys_clone
+.globl sys_vfork
+
+ENTRY(buserr)
+        SAVE_ALL
+        moveq   #-1,%d0
+        movel   %d0,%sp@(PT_OFF_ORIG_D0)
+        movel   %sp,%sp@-               /* stack frame pointer argument */
+        jsr     buserr_c
+        addql   #4,%sp
+        jra     ret_from_exception
+
+ENTRY(trap)
+        SAVE_ALL
+        moveq   #-1,%d0
+        movel   %d0,%sp@(PT_OFF_ORIG_D0)
+        movel   %sp,%sp@-               /* stack frame pointer argument */
+        jsr     trap_c
+        addql   #4,%sp
+        jra     ret_from_exception
+
+#ifdef TRAP_DBG_INTERRUPT
+
+.globl dbginterrupt
+ENTRY(dbginterrupt)
+        SAVE_ALL
+        moveq   #-1,%d0
+        movel   %d0,%sp@(PT_OFF_ORIG_D0)
+        movel   %sp,%sp@-               /* stack frame pointer argument */
+        jsr     dbginterrupt_c
+        addql   #4,%sp
+        jra     ret_from_exception
+#endif
+
+ENTRY(reschedule)
+        /* save top of frame */
+        pea     %sp@
+        jbsr    set_esp0
+        addql   #4,%sp
+        pea     ret_from_exception
+        jmp     schedule
+
+ENTRY(ret_from_fork)
+        movel   %d1,%sp@-
+        jsr     schedule_tail
+        addql   #4,%sp
+        jra     ret_from_exception
+
+ENTRY(sys_fork)
+        SAVE_SWITCH_STACK
+        pea     %sp@(SWITCH_STACK_SIZE)
+        jbsr    m68k_fork
+        addql   #4,%sp
+        RESTORE_SWITCH_STACK
+        rts
+
+ENTRY(sys_vfork)
+        SAVE_SWITCH_STACK
+        pea     %sp@(SWITCH_STACK_SIZE)
+        jbsr    m68k_vfork
+        addql   #4,%sp
+        RESTORE_SWITCH_STACK
+        rts
+
+ENTRY(sys_clone)
+        SAVE_SWITCH_STACK
+        pea     %sp@(SWITCH_STACK_SIZE)
+        jbsr    m68k_clone
+        addql   #4,%sp
+        RESTORE_SWITCH_STACK
+        rts
+
+ENTRY(sys_sigreturn)
+        SAVE_SWITCH_STACK
+        jbsr    do_sigreturn
+        RESTORE_SWITCH_STACK
+        rts
+
+ENTRY(sys_rt_sigreturn)
+        SAVE_SWITCH_STACK
+        jbsr    do_rt_sigreturn
+        RESTORE_SWITCH_STACK
+        rts
+
+ENTRY(ret_from_user_signal)
+        moveq #__NR_sigreturn,%d0
+        trap #0
+
+ENTRY(ret_from_user_rt_signal)
+        movel #__NR_rt_sigreturn,%d0
+        trap #0
+
diff --git a/arch/m68k/kernel/init_task.c b/arch/m68k/kernel/init_task.c
new file mode 100644
index 000000000000..cbf9dc3cc51d
--- /dev/null
+++ b/arch/m68k/kernel/init_task.c
@@ -0,0 +1,36 @@
+/*
+ *  linux/arch/m68knommu/kernel/init_task.c
+ */
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/init_task.h>
+#include <linux/fs.h>
+#include <linux/mqueue.h>
+
+#include <asm/uaccess.h>
+#include <asm/pgtable.h>
+
+static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
+static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
+/*
+ * Initial task structure.
+ *
+ * All other task structs will be allocated on slabs in fork.c
+ */
+__asm__(".align 4");
+struct task_struct init_task = INIT_TASK(init_task);
+
+EXPORT_SYMBOL(init_task);
+
+/*
+ * Initial thread structure.
+ *
+ * We need to make sure that this is 8192-byte aligned due to the
+ * way process stacks are handled. This is done by having a special
+ * "init_task" linker map entry..
+ */
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
+
diff --git a/arch/m68k/kernel/irq.c b/arch/m68k/kernel/irq.c
new file mode 100644
index 000000000000..c7dd48f37bee
--- /dev/null
+++ b/arch/m68k/kernel/irq.c
@@ -0,0 +1,58 @@
+/*
+ * irq.c
+ *
+ * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/kernel_stat.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/seq_file.h>
+#include <asm/system.h>
+#include <asm/traps.h>
+
+asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
+{
+        struct pt_regs *oldregs = set_irq_regs(regs);
+
+        irq_enter();
+        generic_handle_irq(irq);
+        irq_exit();
+
+        set_irq_regs(oldregs);
+}
+
+int show_interrupts(struct seq_file *p, void *v)
+{
+        struct irqaction *ap;
+        int irq = *((loff_t *) v);
+
+        if (irq == 0)
+                seq_puts(p, "           CPU0\n");
+
+        if (irq < NR_IRQS) {
+                struct irq_desc *desc = irq_to_desc(irq);
+
+                ap = desc->action;
+                if (ap) {
+                        seq_printf(p, "%3d: ", irq);
+                        seq_printf(p, "%10u ", kstat_irqs(irq));
+                        seq_printf(p, "%14s  ", get_irq_desc_chip(desc)->name);
+
+                        seq_printf(p, "%s", ap->name);
+                        for (ap = ap->next; ap; ap = ap->next)
+                                seq_printf(p, ", %s", ap->name);
+                        seq_putc(p, '\n');
+                }
+        }
+
+        return 0;
+}
+
diff --git a/arch/m68k/kernel/m68k_ksyms.c b/arch/m68k/kernel/m68k_ksyms.c
index d900e77e5363..4752c28ce0ac 100644
--- a/arch/m68k/kernel/m68k_ksyms.c
+++ b/arch/m68k/kernel/m68k_ksyms.c
@@ -1,16 +1,5 @@
-#include <linux/module.h>
-
-asmlinkage long long __ashldi3 (long long, int);
-asmlinkage long long __ashrdi3 (long long, int);
-asmlinkage long long __lshrdi3 (long long, int);
-asmlinkage long long __muldi3 (long long, long long);
-
-/* The following are special because they're not called
-   explicitly (the C compiler generates them).  Fortunately,
-   their interface isn't gonna change any time soon now, so
-   it's OK to leave it out of version control.  */
-EXPORT_SYMBOL(__ashldi3);
-EXPORT_SYMBOL(__ashrdi3);
-EXPORT_SYMBOL(__lshrdi3);
-EXPORT_SYMBOL(__muldi3);
-
+#ifdef CONFIG_MMU
+#include "m68k_ksyms_mm.c"
+#else
+#include "m68k_ksyms_no.c"
+#endif
diff --git a/arch/m68k/kernel/m68k_ksyms_mm.c b/arch/m68k/kernel/m68k_ksyms_mm.c
new file mode 100644
index 000000000000..d900e77e5363
--- /dev/null
+++ b/arch/m68k/kernel/m68k_ksyms_mm.c
@@ -0,0 +1,16 @@
+#include <linux/module.h>
+
+asmlinkage long long __ashldi3 (long long, int);
+asmlinkage long long __ashrdi3 (long long, int);
+asmlinkage long long __lshrdi3 (long long, int);
+asmlinkage long long __muldi3 (long long, long long);
+
+/* The following are special because they're not called
+   explicitly (the C compiler generates them).  Fortunately,
+   their interface isn't gonna change any time soon now, so
+   it's OK to leave it out of version control.  */
+EXPORT_SYMBOL(__ashldi3);
+EXPORT_SYMBOL(__ashrdi3);
+EXPORT_SYMBOL(__lshrdi3);
+EXPORT_SYMBOL(__muldi3);
+
diff --git a/arch/m68k/kernel/m68k_ksyms_no.c b/arch/m68k/kernel/m68k_ksyms_no.c
new file mode 100644
index 000000000000..39fe0a7aec32
--- /dev/null
+++ b/arch/m68k/kernel/m68k_ksyms_no.c
@@ -0,0 +1,78 @@
+#include <linux/module.h>
+#include <linux/linkage.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/user.h>
+#include <linux/elfcore.h>
+#include <linux/in6.h>
+#include <linux/interrupt.h>
+
+#include <asm/setup.h>
+#include <asm/machdep.h>
+#include <asm/pgalloc.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/checksum.h>
+#include <asm/current.h>
+
+extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
+
+/* platform dependent support */
+
+EXPORT_SYMBOL(__ioremap);
+EXPORT_SYMBOL(iounmap);
+EXPORT_SYMBOL(dump_fpu);
+
+EXPORT_SYMBOL(ip_fast_csum);
+
+EXPORT_SYMBOL(kernel_thread);
+
+/* Networking helper routines. */
+EXPORT_SYMBOL(csum_partial_copy_nocheck);
+
+/* The following are special because they're not called
+   explicitly (the C compiler generates them).  Fortunately,
+   their interface isn't gonna change any time soon now, so
+   it's OK to leave it out of version control.  */
+EXPORT_SYMBOL(memcpy);
+EXPORT_SYMBOL(memset);
+
+/*
+ * libgcc functions - functions that are used internally by the
+ * compiler...  (prototypes are not correct though, but that
+ * doesn't really matter since they're not versioned).
+ */
+extern void __ashldi3(void);
+extern void __ashrdi3(void);
+extern void __divsi3(void);
+extern void __lshrdi3(void);
+extern void __modsi3(void);
+extern void __muldi3(void);
+extern void __mulsi3(void);
+extern void __udivsi3(void);
+extern void __umodsi3(void);
+
+        /* gcc lib functions */
+EXPORT_SYMBOL(__ashldi3);
+EXPORT_SYMBOL(__ashrdi3);
+EXPORT_SYMBOL(__divsi3);
+EXPORT_SYMBOL(__lshrdi3);
+EXPORT_SYMBOL(__modsi3);
+EXPORT_SYMBOL(__muldi3);
+EXPORT_SYMBOL(__mulsi3);
+EXPORT_SYMBOL(__udivsi3);
+EXPORT_SYMBOL(__umodsi3);
+
+#ifdef CONFIG_COLDFIRE
+extern unsigned int *dma_device_address;
+extern unsigned long dma_base_addr, _ramend;
+EXPORT_SYMBOL(dma_base_addr);
+EXPORT_SYMBOL(dma_device_address);
+EXPORT_SYMBOL(_ramend);
+
+extern asmlinkage void trap(void);
+extern void     *_ramvec;
+EXPORT_SYMBOL(trap);
+EXPORT_SYMBOL(_ramvec);
+#endif /* CONFIG_COLDFIRE */
diff --git a/arch/m68k/kernel/module.c b/arch/m68k/kernel/module.c
index cd6bcb1c957e..7ea203ce6b1a 100644
--- a/arch/m68k/kernel/module.c
+++ b/arch/m68k/kernel/module.c
@@ -1,155 +1,5 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#include <linux/moduleloader.h>
-#include <linux/elf.h>
-#include <linux/vmalloc.h>
-#include <linux/fs.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-
-#if 0
-#define DEBUGP printk
+#ifdef CONFIG_MMU
+#include "module_mm.c"
 #else
-#define DEBUGP(fmt...)
+#include "module_no.c"
 #endif
-
-#ifdef CONFIG_MODULES
-
-void *module_alloc(unsigned long size)
-{
-        if (size == 0)
-                return NULL;
-        return vmalloc(size);
-}
-
-
-/* Free memory returned from module_alloc */
-void module_free(struct module *mod, void *module_region)
-{
-        vfree(module_region);
-}
-
-/* We don't need anything special. */
-int module_frob_arch_sections(Elf_Ehdr *hdr,
-                              Elf_Shdr *sechdrs,
-                              char *secstrings,
-                              struct module *mod)
-{
-        return 0;
-}
-
-int apply_relocate(Elf32_Shdr *sechdrs,
-                   const char *strtab,
-                   unsigned int symindex,
-                   unsigned int relsec,
-                   struct module *me)
-{
-        unsigned int i;
-        Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
-        Elf32_Sym *sym;
-        uint32_t *location;
-
-        DEBUGP("Applying relocate section %u to %u\n", relsec,
-               sechdrs[relsec].sh_info);
-        for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
-                /* This is where to make the change */
-                location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
-                        + rel[i].r_offset;
-                /* This is the symbol it is referring to.  Note that all
-                   undefined symbols have been resolved.  */
-                sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
-                        + ELF32_R_SYM(rel[i].r_info);
-
-                switch (ELF32_R_TYPE(rel[i].r_info)) {
-                case R_68K_32:
-                        /* We add the value into the location given */
-                        *location += sym->st_value;
-                        break;
-                case R_68K_PC32:
-                        /* Add the value, subtract its postition */
-                        *location += sym->st_value - (uint32_t)location;
-                        break;
-                default:
-                        printk(KERN_ERR "module %s: Unknown relocation: %u\n",
-                               me->name, ELF32_R_TYPE(rel[i].r_info));
-                        return -ENOEXEC;
-                }
-        }
-        return 0;
-}
-
-int apply_relocate_add(Elf32_Shdr *sechdrs,
-                       const char *strtab,
-                       unsigned int symindex,
-                       unsigned int relsec,
-                       struct module *me)
-{
-        unsigned int i;
-        Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
-        Elf32_Sym *sym;
-        uint32_t *location;
-
-        DEBUGP("Applying relocate_add section %u to %u\n", relsec,
-               sechdrs[relsec].sh_info);
-        for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
-                /* This is where to make the change */
-                location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
-                        + rel[i].r_offset;
-                /* This is the symbol it is referring to.  Note that all
-                   undefined symbols have been resolved.  */
-                sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
-                        + ELF32_R_SYM(rel[i].r_info);
-
-                switch (ELF32_R_TYPE(rel[i].r_info)) {
-                case R_68K_32:
-                        /* We add the value into the location given */
-                        *location = rel[i].r_addend + sym->st_value;
-                        break;
-                case R_68K_PC32:
-                        /* Add the value, subtract its postition */
-                        *location = rel[i].r_addend + sym->st_value - (uint32_t)location;
-                        break;
-                default:
-                        printk(KERN_ERR "module %s: Unknown relocation: %u\n",
-                               me->name, ELF32_R_TYPE(rel[i].r_info));
-                        return -ENOEXEC;
-                }
-        }
-        return 0;
-}
-
-int module_finalize(const Elf_Ehdr *hdr,
-                    const Elf_Shdr *sechdrs,
-                    struct module *mod)
-{
-        module_fixup(mod, mod->arch.fixup_start, mod->arch.fixup_end);
-
-        return 0;
-}
-
-void module_arch_cleanup(struct module *mod)
-{
-}
-
-#endif /* CONFIG_MODULES */
-
-void module_fixup(struct module *mod, struct m68k_fixup_info *start,
-                  struct m68k_fixup_info *end)
-{
-        struct m68k_fixup_info *fixup;
-
-        for (fixup = start; fixup < end; fixup++) {
-                switch (fixup->type) {
-                case m68k_fixup_memoffset:
-                        *(u32 *)fixup->addr = m68k_memoffset;
-                        break;
-                case m68k_fixup_vnode_shift:
-                        *(u16 *)fixup->addr += m68k_virt_to_node_shift;
-                        break;
-                }
-        }
-}
diff --git a/arch/m68k/kernel/module_mm.c b/arch/m68k/kernel/module_mm.c
new file mode 100644
index 000000000000..cd6bcb1c957e
--- /dev/null
+++ b/arch/m68k/kernel/module_mm.c
@@ -0,0 +1,155 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/moduleloader.h>
+#include <linux/elf.h>
+#include <linux/vmalloc.h>
+#include <linux/fs.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+
+#if 0
+#define DEBUGP printk
+#else
+#define DEBUGP(fmt...)
+#endif
+
+#ifdef CONFIG_MODULES
+
+void *module_alloc(unsigned long size)
+{
+        if (size == 0)
+                return NULL;
+        return vmalloc(size);
+}
+
+
+/* Free memory returned from module_alloc */
+void module_free(struct module *mod, void *module_region)
+{
+        vfree(module_region);
+}
+
+/* We don't need anything special. */
+int module_frob_arch_sections(Elf_Ehdr *hdr,
+                              Elf_Shdr *sechdrs,
+                              char *secstrings,
+                              struct module *mod)
+{
+        return 0;
+}
+
+int apply_relocate(Elf32_Shdr *sechdrs,
+                   const char *strtab,
+                   unsigned int symindex,
+                   unsigned int relsec,
+                   struct module *me)
+{
+        unsigned int i;
+        Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
+        Elf32_Sym *sym;
+        uint32_t *location;
+
+        DEBUGP("Applying relocate section %u to %u\n", relsec,
+               sechdrs[relsec].sh_info);
+        for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
+                /* This is where to make the change */
+                location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+                        + rel[i].r_offset;
+                /* This is the symbol it is referring to.  Note that all
+                   undefined symbols have been resolved.  */
+                sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
+                        + ELF32_R_SYM(rel[i].r_info);
+
+                switch (ELF32_R_TYPE(rel[i].r_info)) {
+                case R_68K_32:
+                        /* We add the value into the location given */
+                        *location += sym->st_value;
+                        break;
+                case R_68K_PC32:
+                        /* Add the value, subtract its postition */
+                        *location += sym->st_value - (uint32_t)location;
+                        break;
+                default:
+                        printk(KERN_ERR "module %s: Unknown relocation: %u\n",
+                               me->name, ELF32_R_TYPE(rel[i].r_info));
+                        return -ENOEXEC;
+                }
+        }
+        return 0;
+}
+
+int apply_relocate_add(Elf32_Shdr *sechdrs,
+                       const char *strtab,
+                       unsigned int symindex,
+                       unsigned int relsec,
+                       struct module *me)
+{
+        unsigned int i;
+        Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
+        Elf32_Sym *sym;
+        uint32_t *location;
+
+        DEBUGP("Applying relocate_add section %u to %u\n", relsec,
+               sechdrs[relsec].sh_info);
+        for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
+                /* This is where to make the change */
+                location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+                        + rel[i].r_offset;
+                /* This is the symbol it is referring to.  Note that all
+                   undefined symbols have been resolved.  */
+                sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
+                        + ELF32_R_SYM(rel[i].r_info);
+
+                switch (ELF32_R_TYPE(rel[i].r_info)) {
+                case R_68K_32:
+                        /* We add the value into the location given */
+                        *location = rel[i].r_addend + sym->st_value;
+                        break;
+                case R_68K_PC32:
+                        /* Add the value, subtract its postition */
+                        *location = rel[i].r_addend + sym->st_value - (uint32_t)location;
+                        break;
+                default:
+                        printk(KERN_ERR "module %s: Unknown relocation: %u\n",
+                               me->name, ELF32_R_TYPE(rel[i].r_info));
+                        return -ENOEXEC;
+                }
+        }
+        return 0;
+}
+
+int module_finalize(const Elf_Ehdr *hdr,
+                    const Elf_Shdr *sechdrs,
+                    struct module *mod)
+{
+        module_fixup(mod, mod->arch.fixup_start, mod->arch.fixup_end);
+
+        return 0;
+}
+
+void module_arch_cleanup(struct module *mod)
+{
+}
+
+#endif /* CONFIG_MODULES */
+
+void module_fixup(struct module *mod, struct m68k_fixup_info *start,
+                  struct m68k_fixup_info *end)
+{
+        struct m68k_fixup_info *fixup;
+
+        for (fixup = start; fixup < end; fixup++) {
+                switch (fixup->type) {
+                case m68k_fixup_memoffset:
+                        *(u32 *)fixup->addr = m68k_memoffset;
+                        break;
+                case m68k_fixup_vnode_shift:
+                        *(u16 *)fixup->addr += m68k_virt_to_node_shift;
+                        break;
+                }
+        }
+}
diff --git a/arch/m68k/kernel/module_no.c b/arch/m68k/kernel/module_no.c
new file mode 100644
index 000000000000..d11ffae7956a
--- /dev/null
+++ b/arch/m68k/kernel/module_no.c
@@ -0,0 +1,126 @@
+#include <linux/moduleloader.h>
+#include <linux/elf.h>
+#include <linux/vmalloc.h>
+#include <linux/fs.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+
+#if 0
+#define DEBUGP printk
+#else
+#define DEBUGP(fmt...)
+#endif
+
+void *module_alloc(unsigned long size)
+{
+        if (size == 0)
+                return NULL;
+        return vmalloc(size);
+}
+
+
+/* Free memory returned from module_alloc */
+void module_free(struct module *mod, void *module_region)
+{
+        vfree(module_region);
+}
+
+/* We don't need anything special. */
+int module_frob_arch_sections(Elf_Ehdr *hdr,
+                              Elf_Shdr *sechdrs,
+                              char *secstrings,
+                              struct module *mod)
+{
+        return 0;
+}
+
+int apply_relocate(Elf32_Shdr *sechdrs,
+                   const char *strtab,
+                   unsigned int symindex,
+                   unsigned int relsec,
+                   struct module *me)
+{
+        unsigned int i;
+        Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
+        Elf32_Sym *sym;
+        uint32_t *location;
+
+        DEBUGP("Applying relocate section %u to %u\n", relsec,
+               sechdrs[relsec].sh_info);
+        for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
+                /* This is where to make the change */
+                location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+                        + rel[i].r_offset;
+                /* This is the symbol it is referring to.  Note that all
+                   undefined symbols have been resolved.  */
+                sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
+                        + ELF32_R_SYM(rel[i].r_info);
+
+                switch (ELF32_R_TYPE(rel[i].r_info)) {
+                case R_68K_32:
+                        /* We add the value into the location given */
+                        *location += sym->st_value;
+                        break;
+                case R_68K_PC32:
+                        /* Add the value, subtract its postition */
+                        *location += sym->st_value - (uint32_t)location;
+                        break;
+                default:
+                        printk(KERN_ERR "module %s: Unknown relocation: %u\n",
+                               me->name, ELF32_R_TYPE(rel[i].r_info));
+                        return -ENOEXEC;
+                }
+        }
+        return 0;
+}
+
+int apply_relocate_add(Elf32_Shdr *sechdrs,
+                       const char *strtab,
+                       unsigned int symindex,
+                       unsigned int relsec,
+                       struct module *me)
+{
+        unsigned int i;
+        Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
+        Elf32_Sym *sym;
+        uint32_t *location;
+
+        DEBUGP("Applying relocate_add section %u to %u\n", relsec,
+               sechdrs[relsec].sh_info);
+        for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
+                /* This is where to make the change */
+                location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+                        + rel[i].r_offset;
+                /* This is the symbol it is referring to.  Note that all
+                   undefined symbols have been resolved.  */
+                sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
+                        + ELF32_R_SYM(rel[i].r_info);
+
+                switch (ELF32_R_TYPE(rel[i].r_info)) {
+                case R_68K_32:
+                        /* We add the value into the location given */
+                        *location = rel[i].r_addend + sym->st_value;
+                        break;
+                case R_68K_PC32:
+                        /* Add the value, subtract its postition */
+                        *location = rel[i].r_addend + sym->st_value - (uint32_t)location;
+                        break;
+                default:
+                        printk(KERN_ERR "module %s: Unknown relocation: %u\n",
+                               me->name, ELF32_R_TYPE(rel[i].r_info));
+                        return -ENOEXEC;
+                }
+        }
+        return 0;
+}
+
+int module_finalize(const Elf_Ehdr *hdr,
+                    const Elf_Shdr *sechdrs,
+                    struct module *me)
+{
+        return 0;
+}
+
+void module_arch_cleanup(struct module *mod)
+{
+}
diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c
index c2a1fc23dd75..6cf4bd6e34f8 100644
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -1,354 +1,5 @@
-/*
- *  linux/arch/m68k/kernel/process.c
- *
- *  Copyright (C) 1995  Hamish Macdonald
- *
- *  68060 fixes by Jesper Skov
- */
-
-/*
- * This file handles the architecture-dependent parts of process handling..
- */
-
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/fs.h>
-#include <linux/smp.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/user.h>
-#include <linux/reboot.h>
-#include <linux/init_task.h>
-#include <linux/mqueue.h>
-
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <asm/traps.h>
-#include <asm/machdep.h>
-#include <asm/setup.h>
-#include <asm/pgtable.h>
-
-/*
- * Initial task/thread structure. Make this a per-architecture thing,
- * because different architectures tend to have different
- * alignment requirements and potentially different initial
- * setup.
- */
-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
-union thread_union init_thread_union __init_task_data
-        __attribute__((aligned(THREAD_SIZE))) =
-                { INIT_THREAD_INFO(init_task) };
-
-/* initial task structure */
-struct task_struct init_task = INIT_TASK(init_task);
-
-EXPORT_SYMBOL(init_task);
-
-asmlinkage void ret_from_fork(void);
-
-
-/*
- * Return saved PC from a blocked thread
- */
-unsigned long thread_saved_pc(struct task_struct *tsk)
-{
-        struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp;
-        /* Check whether the thread is blocked in resume() */
-        if (in_sched_functions(sw->retpc))
-                return ((unsigned long *)sw->a6)[1];
-        else
-                return sw->retpc;
-}
-
-/*
- * The idle loop on an m68k..
- */
-static void default_idle(void)
-{
-        if (!need_resched())
-#if defined(MACH_ATARI_ONLY)
-                /* block out HSYNC on the atari (falcon) */
-                __asm__("stop #0x2200" : : : "cc");
+#ifdef CONFIG_MMU
+#include "process_mm.c"
 #else
-                __asm__("stop #0x2000" : : : "cc");
+#include "process_no.c"
 #endif
-}
-
-void (*idle)(void) = default_idle;
-
-/*
- * The idle thread. There's no useful work to be
- * done, so just try to conserve power and have a
- * low exit latency (ie sit in a loop waiting for
- * somebody to say that they'd like to reschedule)
- */
-void cpu_idle(void)
-{
-        /* endless idle loop with no priority at all */
-        while (1) {
-                while (!need_resched())
-                        idle();
-                preempt_enable_no_resched();
-                schedule();
-                preempt_disable();
-        }
-}
-
-void machine_restart(char * __unused)
-{
-        if (mach_reset)
-                mach_reset();
-        for (;;);
-}
-
-void machine_halt(void)
-{
-        if (mach_halt)
-                mach_halt();
-        for (;;);
-}
-
-void machine_power_off(void)
-{
-        if (mach_power_off)
-                mach_power_off();
-        for (;;);
-}
-
-void (*pm_power_off)(void) = machine_power_off;
-EXPORT_SYMBOL(pm_power_off);
-
-void show_regs(struct pt_regs * regs)
-{
-        printk("\n");
-        printk("Format %02x  Vector: %04x  PC: %08lx  Status: %04x    %s\n",
-               regs->format, regs->vector, regs->pc, regs->sr, print_tainted());
-        printk("ORIG_D0: %08lx  D0: %08lx  A2: %08lx  A1: %08lx\n",
-               regs->orig_d0, regs->d0, regs->a2, regs->a1);
-        printk("A0: %08lx  D5: %08lx  D4: %08lx\n",
-               regs->a0, regs->d5, regs->d4);
-        printk("D3: %08lx  D2: %08lx  D1: %08lx\n",
-               regs->d3, regs->d2, regs->d1);
-        if (!(regs->sr & PS_S))
-                printk("USP: %08lx\n", rdusp());
-}
-
-/*
- * Create a kernel thread
- */
-int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
-{
-        int pid;
-        mm_segment_t fs;
-
-        fs = get_fs();
-        set_fs (KERNEL_DS);
-
-        {
-        register long retval __asm__ ("d0");
-        register long clone_arg __asm__ ("d1") = flags | CLONE_VM | CLONE_UNTRACED;
-
-        retval = __NR_clone;
-        __asm__ __volatile__
-          ("clrl %%d2\n\t"
-           "trap #0\n\t"                /* Linux/m68k system call */
-           "tstl %0\n\t"                /* child or parent */
-           "jne 1f\n\t"                 /* parent - jump */
-           "lea %%sp@(%c7),%6\n\t"      /* reload current */
-           "movel %6@,%6\n\t"
-           "movel %3,%%sp@-\n\t"        /* push argument */
-           "jsr %4@\n\t"                /* call fn */
-           "movel %0,%%d1\n\t"          /* pass exit value */
-           "movel %2,%%d0\n\t"          /* exit */
-           "trap #0\n"
-           "1:"
-           : "+d" (retval)
-           : "i" (__NR_clone), "i" (__NR_exit),
-             "r" (arg), "a" (fn), "d" (clone_arg), "r" (current),
-             "i" (-THREAD_SIZE)
-           : "d2");
-
-        pid = retval;
-        }
-
-        set_fs (fs);
-        return pid;
-}
-EXPORT_SYMBOL(kernel_thread);
-
-void flush_thread(void)
-{
-        unsigned long zero = 0;
-        set_fs(USER_DS);
-        current->thread.fs = __USER_DS;
-        if (!FPU_IS_EMU)
-                asm volatile (".chip 68k/68881\n\t"
-                              "frestore %0@\n\t"
-                              ".chip 68k" : : "a" (&zero));
-}
-
-/*
- * "m68k_fork()".. By the time we get here, the
- * non-volatile registers have also been saved on the
- * stack. We do some ugly pointer stuff here.. (see
- * also copy_thread)
- */
-
-asmlinkage int m68k_fork(struct pt_regs *regs)
-{
-        return do_fork(SIGCHLD, rdusp(), regs, 0, NULL, NULL);
-}
-
-asmlinkage int m68k_vfork(struct pt_regs *regs)
-{
-        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0,
-                       NULL, NULL);
-}
-
-asmlinkage int m68k_clone(struct pt_regs *regs)
-{
-        unsigned long clone_flags;
-        unsigned long newsp;
-        int __user *parent_tidptr, *child_tidptr;
-
-        /* syscall2 puts clone_flags in d1 and usp in d2 */
-        clone_flags = regs->d1;
-        newsp = regs->d2;
-        parent_tidptr = (int __user *)regs->d3;
-        child_tidptr = (int __user *)regs->d4;
-        if (!newsp)
-                newsp = rdusp();
-        return do_fork(clone_flags, newsp, regs, 0,
-                       parent_tidptr, child_tidptr);
-}
-
-int copy_thread(unsigned long clone_flags, unsigned long usp,
-                 unsigned long unused,
-                 struct task_struct * p, struct pt_regs * regs)
-{
-        struct pt_regs * childregs;
-        struct switch_stack * childstack, *stack;
-        unsigned long *retp;
-
-        childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
-
-        *childregs = *regs;
-        childregs->d0 = 0;
-
-        retp = ((unsigned long *) regs);
-        stack = ((struct switch_stack *) retp) - 1;
-
-        childstack = ((struct switch_stack *) childregs) - 1;
-        *childstack = *stack;
-        childstack->retpc = (unsigned long)ret_from_fork;
-
-        p->thread.usp = usp;
-        p->thread.ksp = (unsigned long)childstack;
-
-        if (clone_flags & CLONE_SETTLS)
-                task_thread_info(p)->tp_value = regs->d5;
-
-        /*
-         * Must save the current SFC/DFC value, NOT the value when
-         * the parent was last descheduled - RGH  10-08-96
-         */
-        p->thread.fs = get_fs().seg;
-
-        if (!FPU_IS_EMU) {
-                /* Copy the current fpu state */
-                asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
-
-                if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2])
-                  asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
-                                "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
-                                : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
-                                : "memory");
-                /* Restore the state in case the fpu was busy */
-                asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
-        }
-
-        return 0;
-}
-
-/* Fill in the fpu structure for a core dump.  */
-
-int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
-{
-        char fpustate[216];
-
-        if (FPU_IS_EMU) {
-                int i;
-
-                memcpy(fpu->fpcntl, current->thread.fpcntl, 12);
-                memcpy(fpu->fpregs, current->thread.fp, 96);
-                /* Convert internal fpu reg representation
-                 * into long double format
-                 */
-                for (i = 0; i < 24; i += 3)
-                        fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) |
-                                         ((fpu->fpregs[i] & 0x0000ffff) << 16);
-                return 1;
-        }
-
-        /* First dump the fpu context to avoid protocol violation.  */
-        asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
-        if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
-                return 0;
-
-        asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
-                :: "m" (fpu->fpcntl[0])
-                : "memory");
-        asm volatile ("fmovemx %/fp0-%/fp7,%0"
-                :: "m" (fpu->fpregs[0])
-                : "memory");
-        return 1;
-}
-EXPORT_SYMBOL(dump_fpu);
-
-/*
- * sys_execve() executes a new program.
- */
-asmlinkage int sys_execve(const char __user *name,
-                          const char __user *const __user *argv,
-                          const char __user *const __user *envp)
-{
-        int error;
-        char * filename;
-        struct pt_regs *regs = (struct pt_regs *) &name;
-
-        filename = getname(name);
-        error = PTR_ERR(filename);
-        if (IS_ERR(filename))
-                return error;
-        error = do_execve(filename, argv, envp, regs);
-        putname(filename);
-        return error;
-}
-
-unsigned long get_wchan(struct task_struct *p)
-{
-        unsigned long fp, pc;
-        unsigned long stack_page;
-        int count = 0;
-        if (!p || p == current || p->state == TASK_RUNNING)
-                return 0;
-
-        stack_page = (unsigned long)task_stack_page(p);
-        fp = ((struct switch_stack *)p->thread.ksp)->a6;
-        do {
-                if (fp < stack_page+sizeof(struct thread_info) ||
-                    fp >= 8184+stack_page)
-                        return 0;
-                pc = ((unsigned long *)fp)[1];
-                if (!in_sched_functions(pc))
-                        return pc;
-                fp = *(unsigned long *) fp;
-        } while (count++ < 16);
-        return 0;
-}
diff --git a/arch/m68k/kernel/process_mm.c b/arch/m68k/kernel/process_mm.c
new file mode 100644
index 000000000000..c2a1fc23dd75
--- /dev/null
+++ b/arch/m68k/kernel/process_mm.c
@@ -0,0 +1,354 @@
+/*
+ *  linux/arch/m68k/kernel/process.c
+ *
+ *  Copyright (C) 1995  Hamish Macdonald
+ *
+ *  68060 fixes by Jesper Skov
+ */
+
+/*
+ * This file handles the architecture-dependent parts of process handling..
+ */
+
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/smp.h>
+#include <linux/stddef.h>
+#include <linux/unistd.h>
+#include <linux/ptrace.h>
+#include <linux/user.h>
+#include <linux/reboot.h>
+#include <linux/init_task.h>
+#include <linux/mqueue.h>
+
+#include <asm/uaccess.h>
+#include <asm/system.h>
+#include <asm/traps.h>
+#include <asm/machdep.h>
+#include <asm/setup.h>
+#include <asm/pgtable.h>
+
+/*
+ * Initial task/thread structure. Make this a per-architecture thing,
+ * because different architectures tend to have different
+ * alignment requirements and potentially different initial
+ * setup.
+ */
+static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
+static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
+union thread_union init_thread_union __init_task_data
+        __attribute__((aligned(THREAD_SIZE))) =
+                { INIT_THREAD_INFO(init_task) };
+
+/* initial task structure */
+struct task_struct init_task = INIT_TASK(init_task);
+
+EXPORT_SYMBOL(init_task);
+
+asmlinkage void ret_from_fork(void);
+
+
+/*
+ * Return saved PC from a blocked thread
+ */
+unsigned long thread_saved_pc(struct task_struct *tsk)
+{
+        struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp;
+        /* Check whether the thread is blocked in resume() */
+        if (in_sched_functions(sw->retpc))
+                return ((unsigned long *)sw->a6)[1];
+        else
+                return sw->retpc;
+}
+
+/*
+ * The idle loop on an m68k..
+ */
+static void default_idle(void)
+{
+        if (!need_resched())
+#if defined(MACH_ATARI_ONLY)
+                /* block out HSYNC on the atari (falcon) */
+                __asm__("stop #0x2200" : : : "cc");
+#else
+                __asm__("stop #0x2000" : : : "cc");
+#endif
+}
+
+void (*idle)(void) = default_idle;
+
+/*
+ * The idle thread. There's no useful work to be
+ * done, so just try to conserve power and have a
+ * low exit latency (ie sit in a loop waiting for
+ * somebody to say that they'd like to reschedule)
+ */
+void cpu_idle(void)
+{
+        /* endless idle loop with no priority at all */
+        while (1) {
+                while (!need_resched())
+                        idle();
+                preempt_enable_no_resched();
+                schedule();
+                preempt_disable();
+        }
+}
+
+void machine_restart(char * __unused)
+{
+        if (mach_reset)
+                mach_reset();
+        for (;;);
+}
+
+void machine_halt(void)
+{
+        if (mach_halt)
+                mach_halt();
+        for (;;);
+}
+
+void machine_power_off(void)
+{
+        if (mach_power_off)
+                mach_power_off();
+        for (;;);
+}
+
+void (*pm_power_off)(void) = machine_power_off;
+EXPORT_SYMBOL(pm_power_off);
+
+void show_regs(struct pt_regs * regs)
+{
+        printk("\n");
+        printk("Format %02x  Vector: %04x  PC: %08lx  Status: %04x    %s\n",
+               regs->format, regs->vector, regs->pc, regs->sr, print_tainted());
+        printk("ORIG_D0: %08lx  D0: %08lx  A2: %08lx  A1: %08lx\n",
+               regs->orig_d0, regs->d0, regs->a2, regs->a1);
+        printk("A0: %08lx  D5: %08lx  D4: %08lx\n",
+               regs->a0, regs->d5, regs->d4);
+        printk("D3: %08lx  D2: %08lx  D1: %08lx\n",
+               regs->d3, regs->d2, regs->d1);
+        if (!(regs->sr & PS_S))
+                printk("USP: %08lx\n", rdusp());
+}
+
+/*
+ * Create a kernel thread
+ */
+int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
+{
+        int pid;
+        mm_segment_t fs;
+
+        fs = get_fs();
+        set_fs (KERNEL_DS);
+
+        {
+        register long retval __asm__ ("d0");
+        register long clone_arg __asm__ ("d1") = flags | CLONE_VM | CLONE_UNTRACED;
+
+        retval = __NR_clone;
+        __asm__ __volatile__
+          ("clrl %%d2\n\t"
+           "trap #0\n\t"                /* Linux/m68k system call */
+           "tstl %0\n\t"                /* child or parent */
+           "jne 1f\n\t"                 /* parent - jump */
+           "lea %%sp@(%c7),%6\n\t"      /* reload current */
+           "movel %6@,%6\n\t"
+           "movel %3,%%sp@-\n\t"        /* push argument */
+           "jsr %4@\n\t"                /* call fn */
+           "movel %0,%%d1\n\t"          /* pass exit value */
+           "movel %2,%%d0\n\t"          /* exit */
+           "trap #0\n"
+           "1:"
+           : "+d" (retval)
+           : "i" (__NR_clone), "i" (__NR_exit),
+             "r" (arg), "a" (fn), "d" (clone_arg), "r" (current),
+             "i" (-THREAD_SIZE)
+           : "d2");
+
+        pid = retval;
+        }
+
+        set_fs (fs);
+        return pid;
+}
+EXPORT_SYMBOL(kernel_thread);
+
+void flush_thread(void)
+{
+        unsigned long zero = 0;
+        set_fs(USER_DS);
+        current->thread.fs = __USER_DS;
+        if (!FPU_IS_EMU)
+                asm volatile (".chip 68k/68881\n\t"
+                              "frestore %0@\n\t"
+                              ".chip 68k" : : "a" (&zero));
+}
+
+/*
+ * "m68k_fork()".. By the time we get here, the
+ * non-volatile registers have also been saved on the
+ * stack. We do some ugly pointer stuff here.. (see
+ * also copy_thread)
+ */
+
+asmlinkage int m68k_fork(struct pt_regs *regs)
+{
+        return do_fork(SIGCHLD, rdusp(), regs, 0, NULL, NULL);
+}
+
+asmlinkage int m68k_vfork(struct pt_regs *regs)
+{
+        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0,
+                       NULL, NULL);
+}
+
+asmlinkage int m68k_clone(struct pt_regs *regs)
+{
+        unsigned long clone_flags;
+        unsigned long newsp;
+        int __user *parent_tidptr, *child_tidptr;
+
+        /* syscall2 puts clone_flags in d1 and usp in d2 */
+        clone_flags = regs->d1;
+        newsp = regs->d2;
+        parent_tidptr = (int __user *)regs->d3;
+        child_tidptr = (int __user *)regs->d4;
+        if (!newsp)
+                newsp = rdusp();
+        return do_fork(clone_flags, newsp, regs, 0,
+                       parent_tidptr, child_tidptr);
+}
+
+int copy_thread(unsigned long clone_flags, unsigned long usp,
+                 unsigned long unused,
+                 struct task_struct * p, struct pt_regs * regs)
+{
+        struct pt_regs * childregs;
+        struct switch_stack * childstack, *stack;
+        unsigned long *retp;
+
+        childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
+
+        *childregs = *regs;
+        childregs->d0 = 0;
+
+        retp = ((unsigned long *) regs);
+        stack = ((struct switch_stack *) retp) - 1;
+
+        childstack = ((struct switch_stack *) childregs) - 1;
+        *childstack = *stack;
+        childstack->retpc = (unsigned long)ret_from_fork;
+
+        p->thread.usp = usp;
+        p->thread.ksp = (unsigned long)childstack;
+
+        if (clone_flags & CLONE_SETTLS)
+                task_thread_info(p)->tp_value = regs->d5;
+
+        /*
+         * Must save the current SFC/DFC value, NOT the value when
+         * the parent was last descheduled - RGH  10-08-96
+         */
+        p->thread.fs = get_fs().seg;
+
+        if (!FPU_IS_EMU) {
+                /* Copy the current fpu state */
+                asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
+
+                if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2])
+                  asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
+                                "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
+                                : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
+                                : "memory");
+                /* Restore the state in case the fpu was busy */
+                asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
+        }
+
+        return 0;
+}
+
+/* Fill in the fpu structure for a core dump.  */
+
+int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
+{
+        char fpustate[216];
+
+        if (FPU_IS_EMU) {
+                int i;
+
+                memcpy(fpu->fpcntl, current->thread.fpcntl, 12);
+                memcpy(fpu->fpregs, current->thread.fp, 96);
+                /* Convert internal fpu reg representation
+                 * into long double format
+                 */
+                for (i = 0; i < 24; i += 3)
+                        fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) |
+                                         ((fpu->fpregs[i] & 0x0000ffff) << 16);
+                return 1;
+        }
+
+        /* First dump the fpu context to avoid protocol violation.  */
+        asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
+        if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
+                return 0;
+
+        asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
+                :: "m" (fpu->fpcntl[0])
+                : "memory");
+        asm volatile ("fmovemx %/fp0-%/fp7,%0"
+                :: "m" (fpu->fpregs[0])
+                : "memory");
+        return 1;
+}
+EXPORT_SYMBOL(dump_fpu);
+
+/*
+ * sys_execve() executes a new program.
+ */
+asmlinkage int sys_execve(const char __user *name,
+                          const char __user *const __user *argv,
+                          const char __user *const __user *envp)
+{
+        int error;
+        char * filename;
+        struct pt_regs *regs = (struct pt_regs *) &name;
+
+        filename = getname(name);
+        error = PTR_ERR(filename);
+        if (IS_ERR(filename))
+                return error;
+        error = do_execve(filename, argv, envp, regs);
+        putname(filename);
+        return error;
+}
+
+unsigned long get_wchan(struct task_struct *p)
+{
+        unsigned long fp, pc;
+        unsigned long stack_page;
+        int count = 0;
+        if (!p || p == current || p->state == TASK_RUNNING)
+                return 0;
+
+        stack_page = (unsigned long)task_stack_page(p);
+        fp = ((struct switch_stack *)p->thread.ksp)->a6;
+        do {
+                if (fp < stack_page+sizeof(struct thread_info) ||
+                    fp >= 8184+stack_page)
+                        return 0;
+                pc = ((unsigned long *)fp)[1];
+                if (!in_sched_functions(pc))
+                        return pc;
+                fp = *(unsigned long *) fp;
+        } while (count++ < 16);
+        return 0;
+}
diff --git a/arch/m68k/kernel/process_no.c b/arch/m68k/kernel/process_no.c
new file mode 100644
index 000000000000..e2a63af5d517
--- /dev/null
+++ b/arch/m68k/kernel/process_no.c
@@ -0,0 +1,404 @@
+/*
+ *  linux/arch/m68knommu/kernel/process.c
+ *
+ *  Copyright (C) 1995  Hamish Macdonald
+ *
+ *  68060 fixes by Jesper Skov
+ *
+ *  uClinux changes
+ *  Copyright (C) 2000-2002, David McCullough <davidm@snapgear.com>
+ */
+
+/*
+ * This file handles the architecture-dependent parts of process handling..
+ */
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/stddef.h>
+#include <linux/unistd.h>
+#include <linux/ptrace.h>
+#include <linux/user.h>
+#include <linux/interrupt.h>
+#include <linux/reboot.h>
+#include <linux/fs.h>
+#include <linux/slab.h>
+
+#include <asm/uaccess.h>
+#include <asm/system.h>
+#include <asm/traps.h>
+#include <asm/machdep.h>
+#include <asm/setup.h>
+#include <asm/pgtable.h>
+
+asmlinkage void ret_from_fork(void);
+
+/*
+ * The following aren't currently used.
+ */
+void (*pm_idle)(void);
+EXPORT_SYMBOL(pm_idle);
+
+void (*pm_power_off)(void);
+EXPORT_SYMBOL(pm_power_off);
+
+/*
+ * The idle loop on an m68knommu..
+ */
+static void default_idle(void)
+{
+        local_irq_disable();
+        while (!need_resched()) {
+                /* This stop will re-enable interrupts */
+                __asm__("stop #0x2000" : : : "cc");
+                local_irq_disable();
+        }
+        local_irq_enable();
+}
+
+void (*idle)(void) = default_idle;
+
+/*
+ * The idle thread. There's no useful work to be
+ * done, so just try to conserve power and have a
+ * low exit latency (ie sit in a loop waiting for
+ * somebody to say that they'd like to reschedule)
+ */
+void cpu_idle(void)
+{
+        /* endless idle loop with no priority at all */
+        while (1) {
+                idle();
+                preempt_enable_no_resched();
+                schedule();
+                preempt_disable();
+        }
+}
+
+void machine_restart(char * __unused)
+{
+        if (mach_reset)
+                mach_reset();
+        for (;;);
+}
+
+void machine_halt(void)
+{
+        if (mach_halt)
+                mach_halt();
+        for (;;);
+}
+
+void machine_power_off(void)
+{
+        if (mach_power_off)
+                mach_power_off();
+        for (;;);
+}
+
+void show_regs(struct pt_regs * regs)
+{
+        printk(KERN_NOTICE "\n");
+        printk(KERN_NOTICE "Format %02x  Vector: %04x  PC: %08lx  Status: %04x    %s\n",
+               regs->format, regs->vector, regs->pc, regs->sr, print_tainted());
+        printk(KERN_NOTICE "ORIG_D0: %08lx  D0: %08lx  A2: %08lx  A1: %08lx\n",
+               regs->orig_d0, regs->d0, regs->a2, regs->a1);
+        printk(KERN_NOTICE "A0: %08lx  D5: %08lx  D4: %08lx\n",
+               regs->a0, regs->d5, regs->d4);
+        printk(KERN_NOTICE "D3: %08lx  D2: %08lx  D1: %08lx\n",
+               regs->d3, regs->d2, regs->d1);
+        if (!(regs->sr & PS_S))
+                printk(KERN_NOTICE "USP: %08lx\n", rdusp());
+}
+
+/*
+ * Create a kernel thread
+ */
+int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
+{
+        int retval;
+        long clone_arg = flags | CLONE_VM;
+        mm_segment_t fs;
+
+        fs = get_fs();
+        set_fs(KERNEL_DS);
+
+        __asm__ __volatile__ (
+                        "movel  %%sp, %%d2\n\t"
+                        "movel  %5, %%d1\n\t"
+                        "movel  %1, %%d0\n\t"
+                        "trap   #0\n\t"
+                        "cmpl   %%sp, %%d2\n\t"
+                        "jeq    1f\n\t"
+                        "movel  %3, %%sp@-\n\t"
+                        "jsr    %4@\n\t"
+                        "movel  %2, %%d0\n\t"
+                        "trap   #0\n"
+                        "1:\n\t"
+                        "movel  %%d0, %0\n"
+                : "=d" (retval)
+                : "i" (__NR_clone),
+                  "i" (__NR_exit),
+                  "a" (arg),
+                  "a" (fn),
+                  "a" (clone_arg)
+                : "cc", "%d0", "%d1", "%d2");
+
+        set_fs(fs);
+        return retval;
+}
+
+void flush_thread(void)
+{
+#ifdef CONFIG_FPU
+        unsigned long zero = 0;
+#endif
+        set_fs(USER_DS);
+        current->thread.fs = __USER_DS;
+#ifdef CONFIG_FPU
+        if (!FPU_IS_EMU)
+                asm volatile (".chip 68k/68881\n\t"
+                              "frestore %0@\n\t"
+                              ".chip 68k" : : "a" (&zero));
+#endif
+}
+
+/*
+ * "m68k_fork()".. By the time we get here, the
+ * non-volatile registers have also been saved on the
+ * stack. We do some ugly pointer stuff here.. (see
+ * also copy_thread)
+ */
+
+asmlinkage int m68k_fork(struct pt_regs *regs)
+{
+        /* fork almost works, enough to trick you into looking elsewhere :-( */
+        return(-EINVAL);
+}
+
+asmlinkage int m68k_vfork(struct pt_regs *regs)
+{
+        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL, NULL);
+}
+
+asmlinkage int m68k_clone(struct pt_regs *regs)
+{
+        unsigned long clone_flags;
+        unsigned long newsp;
+
+        /* syscall2 puts clone_flags in d1 and usp in d2 */
+        clone_flags = regs->d1;
+        newsp = regs->d2;
+        if (!newsp)
+                newsp = rdusp();
+        return do_fork(clone_flags, newsp, regs, 0, NULL, NULL);
+}
+
+int copy_thread(unsigned long clone_flags,
+                unsigned long usp, unsigned long topstk,
+                struct task_struct * p, struct pt_regs * regs)
+{
+        struct pt_regs * childregs;
+        struct switch_stack * childstack, *stack;
+        unsigned long *retp;
+
+        childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
+
+        *childregs = *regs;
+        childregs->d0 = 0;
+
+        retp = ((unsigned long *) regs);
+        stack = ((struct switch_stack *) retp) - 1;
+
+        childstack = ((struct switch_stack *) childregs) - 1;
+        *childstack = *stack;
+        childstack->retpc = (unsigned long)ret_from_fork;
+
+        p->thread.usp = usp;
+        p->thread.ksp = (unsigned long)childstack;
+
+        if (clone_flags & CLONE_SETTLS)
+                task_thread_info(p)->tp_value = regs->d5;
+
+        /*
+         * Must save the current SFC/DFC value, NOT the value when
+         * the parent was last descheduled - RGH  10-08-96
+         */
+        p->thread.fs = get_fs().seg;
+
+#ifdef CONFIG_FPU
+        if (!FPU_IS_EMU) {
+                /* Copy the current fpu state */
+                asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
+
+                if (p->thread.fpstate[0])
+                  asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
+                                "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
+                                : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
+                                : "memory");
+                /* Restore the state in case the fpu was busy */
+                asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
+        }
+#endif
+
+        return 0;
+}
+
+/* Fill in the fpu structure for a core dump.  */
+
+int dump_fpu(struct pt_regs *regs, struct user_m68kfp_struct *fpu)
+{
+#ifdef CONFIG_FPU
+        char fpustate[216];
+
+        if (FPU_IS_EMU) {
+                int i;
+
+                memcpy(fpu->fpcntl, current->thread.fpcntl, 12);
+                memcpy(fpu->fpregs, current->thread.fp, 96);
+                /* Convert internal fpu reg representation
+                 * into long double format
+                 */
+                for (i = 0; i < 24; i += 3)
+                        fpu->fpregs[i] = ((fpu->fpregs[i] & 0xffff0000) << 15) |
+                                         ((fpu->fpregs[i] & 0x0000ffff) << 16);
+                return 1;
+        }
+
+        /* First dump the fpu context to avoid protocol violation.  */
+        asm volatile ("fsave %0" :: "m" (fpustate[0]) : "memory");
+        if (!fpustate[0])
+                return 0;
+
+        asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
+                :: "m" (fpu->fpcntl[0])
+                : "memory");
+        asm volatile ("fmovemx %/fp0-%/fp7,%0"
+                :: "m" (fpu->fpregs[0])
+                : "memory");
+#endif
+        return 1;
+}
+
+/*
+ *      Generic dumping code. Used for panic and debug.
+ */
+void dump(struct pt_regs *fp)
+{
+        unsigned long   *sp;
+        unsigned char   *tp;
+        int             i;
+
+        printk(KERN_EMERG "\nCURRENT PROCESS:\n\n");
+        printk(KERN_EMERG "COMM=%s PID=%d\n", current->comm, current->pid);
+
+        if (current->mm) {
+                printk(KERN_EMERG "TEXT=%08x-%08x DATA=%08x-%08x BSS=%08x-%08x\n",
+                        (int) current->mm->start_code,
+                        (int) current->mm->end_code,
+                        (int) current->mm->start_data,
+                        (int) current->mm->end_data,
+                        (int) current->mm->end_data,
+                        (int) current->mm->brk);
+                printk(KERN_EMERG "USER-STACK=%08x KERNEL-STACK=%08x\n\n",
+                        (int) current->mm->start_stack,
+                        (int)(((unsigned long) current) + THREAD_SIZE));
+        }
+
+        printk(KERN_EMERG "PC: %08lx\n", fp->pc);
+        printk(KERN_EMERG "SR: %08lx    SP: %08lx\n", (long) fp->sr, (long) fp);
+        printk(KERN_EMERG "d0: %08lx    d1: %08lx    d2: %08lx    d3: %08lx\n",
+                fp->d0, fp->d1, fp->d2, fp->d3);
+        printk(KERN_EMERG "d4: %08lx    d5: %08lx    a0: %08lx    a1: %08lx\n",
+                fp->d4, fp->d5, fp->a0, fp->a1);
+        printk(KERN_EMERG "\nUSP: %08x   TRAPFRAME: %p\n",
+                (unsigned int) rdusp(), fp);
+
+        printk(KERN_EMERG "\nCODE:");
+        tp = ((unsigned char *) fp->pc) - 0x20;
+        for (sp = (unsigned long *) tp, i = 0; (i < 0x40);  i += 4) {
+                if ((i % 0x10) == 0)
+                        printk(KERN_EMERG "%p: ", tp + i);
+                printk("%08x ", (int) *sp++);
+        }
+        printk(KERN_EMERG "\n");
+
+        printk(KERN_EMERG "KERNEL STACK:");
+        tp = ((unsigned char *) fp) - 0x40;
+        for (sp = (unsigned long *) tp, i = 0; (i < 0xc0); i += 4) {
+                if ((i % 0x10) == 0)
+                        printk(KERN_EMERG "%p: ", tp + i);
+                printk("%08x ", (int) *sp++);
+        }
+        printk(KERN_EMERG "\n");
+
+        printk(KERN_EMERG "USER STACK:");
+        tp = (unsigned char *) (rdusp() - 0x10);
+        for (sp = (unsigned long *) tp, i = 0; (i < 0x80); i += 4) {
+                if ((i % 0x10) == 0)
+                        printk(KERN_EMERG "%p: ", tp + i);
+                printk("%08x ", (int) *sp++);
+        }
+        printk(KERN_EMERG "\n");
+}
+
+/*
+ * sys_execve() executes a new program.
+ */
+asmlinkage int sys_execve(const char *name,
+                          const char *const *argv,
+                          const char *const *envp)
+{
+        int error;
+        char * filename;
+        struct pt_regs *regs = (struct pt_regs *) &name;
+
+        filename = getname(name);
+        error = PTR_ERR(filename);
+        if (IS_ERR(filename))
+                return error;
+        error = do_execve(filename, argv, envp, regs);
+        putname(filename);
+        return error;
+}
+
+unsigned long get_wchan(struct task_struct *p)
+{
+        unsigned long fp, pc;
+        unsigned long stack_page;
+        int count = 0;
+        if (!p || p == current || p->state == TASK_RUNNING)
+                return 0;
+
+        stack_page = (unsigned long)p;
+        fp = ((struct switch_stack *)p->thread.ksp)->a6;
+        do {
+                if (fp < stack_page+sizeof(struct thread_info) ||
+                    fp >= THREAD_SIZE-8+stack_page)
+                        return 0;
+                pc = ((unsigned long *)fp)[1];
+                if (!in_sched_functions(pc))
+                        return pc;
+                fp = *(unsigned long *) fp;
+        } while (count++ < 16);
+        return 0;
+}
+
+/*
+ * Return saved PC of a blocked thread.
+ */
+unsigned long thread_saved_pc(struct task_struct *tsk)
+{
+        struct switch_stack *sw = (struct switch_stack *)tsk->thread.ksp;
+
+        /* Check whether the thread is blocked in resume() */
+        if (in_sched_functions(sw->retpc))
+                return ((unsigned long *)sw->a6)[1];
+        else
+                return sw->retpc;
+}
+
diff --git a/arch/m68k/kernel/ptrace.c b/arch/m68k/kernel/ptrace.c
index 0b252683cefb..07a417550e94 100644
--- a/arch/m68k/kernel/ptrace.c
+++ b/arch/m68k/kernel/ptrace.c
@@ -1,277 +1,5 @@
-/*
- *  linux/arch/m68k/kernel/ptrace.c
- *
- *  Copyright (C) 1994 by Hamish Macdonald
- *  Taken from linux/kernel/ptrace.c and modified for M680x0.
- *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License.  See the file COPYING in the main directory of
- * this archive for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/errno.h>
-#include <linux/ptrace.h>
-#include <linux/user.h>
-#include <linux/signal.h>
-
-#include <asm/uaccess.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/system.h>
-#include <asm/processor.h>
-
-/*
- * does not yet catch signals sent when the child dies.
- * in exit.c or in signal.c.
- */
-
-/* determines which bits in the SR the user has access to. */
-/* 1 = access 0 = no access */
-#define SR_MASK 0x001f
-
-/* sets the trace bits. */
-#define TRACE_BITS 0xC000
-#define T1_BIT 0x8000
-#define T0_BIT 0x4000
-
-/* Find the stack offset for a register, relative to thread.esp0. */
-#define PT_REG(reg)     ((long)&((struct pt_regs *)0)->reg)
-#define SW_REG(reg)     ((long)&((struct switch_stack *)0)->reg \
-                         - sizeof(struct switch_stack))
-/* Mapping from PT_xxx to the stack offset at which the register is
-   saved.  Notice that usp has no stack-slot and needs to be treated
-   specially (see get_reg/put_reg below). */
-static const int regoff[] = {
-        [0]     = PT_REG(d1),
-        [1]     = PT_REG(d2),
-        [2]     = PT_REG(d3),
-        [3]     = PT_REG(d4),
-        [4]     = PT_REG(d5),
-        [5]     = SW_REG(d6),
-        [6]     = SW_REG(d7),
-        [7]     = PT_REG(a0),
-        [8]     = PT_REG(a1),
-        [9]     = PT_REG(a2),
-        [10]    = SW_REG(a3),
-        [11]    = SW_REG(a4),
-        [12]    = SW_REG(a5),
-        [13]    = SW_REG(a6),
-        [14]    = PT_REG(d0),
-        [15]    = -1,
-        [16]    = PT_REG(orig_d0),
-        [17]    = PT_REG(sr),
-        [18]    = PT_REG(pc),
-};
-
-/*
- * Get contents of register REGNO in task TASK.
- */
-static inline long get_reg(struct task_struct *task, int regno)
-{
-        unsigned long *addr;
-
-        if (regno == PT_USP)
-                addr = &task->thread.usp;
-        else if (regno < ARRAY_SIZE(regoff))
-                addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
-        else
-                return 0;
-        /* Need to take stkadj into account. */
-        if (regno == PT_SR || regno == PT_PC) {
-                long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
-                addr = (unsigned long *) ((unsigned long)addr + stkadj);
-                /* The sr is actually a 16 bit register.  */
-                if (regno == PT_SR)
-                        return *(unsigned short *)addr;
-        }
-        return *addr;
-}
-
-/*
- * Write contents of register REGNO in task TASK.
- */
-static inline int put_reg(struct task_struct *task, int regno,
-                          unsigned long data)
-{
-        unsigned long *addr;
-
-        if (regno == PT_USP)
-                addr = &task->thread.usp;
-        else if (regno < ARRAY_SIZE(regoff))
-                addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
-        else
-                return -1;
-        /* Need to take stkadj into account. */
-        if (regno == PT_SR || regno == PT_PC) {
-                long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
-                addr = (unsigned long *) ((unsigned long)addr + stkadj);
-                /* The sr is actually a 16 bit register.  */
-                if (regno == PT_SR) {
-                        *(unsigned short *)addr = data;
-                        return 0;
-                }
-        }
-        *addr = data;
-        return 0;
-}
-
-/*
- * Make sure the single step bit is not set.
- */
-static inline void singlestep_disable(struct task_struct *child)
-{
-        unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
-        put_reg(child, PT_SR, tmp);
-        clear_tsk_thread_flag(child, TIF_DELAYED_TRACE);
-}
-
-/*
- * Called by kernel/ptrace.c when detaching..
- */
-void ptrace_disable(struct task_struct *child)
-{
-        singlestep_disable(child);
-}
-
-void user_enable_single_step(struct task_struct *child)
-{
-        unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
-        put_reg(child, PT_SR, tmp | T1_BIT);
-        set_tsk_thread_flag(child, TIF_DELAYED_TRACE);
-}
-
-void user_enable_block_step(struct task_struct *child)
-{
-        unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
-        put_reg(child, PT_SR, tmp | T0_BIT);
-}
-
-void user_disable_single_step(struct task_struct *child)
-{
-        singlestep_disable(child);
-}
-
-long arch_ptrace(struct task_struct *child, long request,
-                 unsigned long addr, unsigned long data)
-{
-        unsigned long tmp;
-        int i, ret = 0;
-        int regno = addr >> 2; /* temporary hack. */
-        unsigned long __user *datap = (unsigned long __user *) data;
-
-        switch (request) {
-        /* read the word at location addr in the USER area. */
-        case PTRACE_PEEKUSR:
-                if (addr & 3)
-                        goto out_eio;
-
-                if (regno >= 0 && regno < 19) {
-                        tmp = get_reg(child, regno);
-                } else if (regno >= 21 && regno < 49) {
-                        tmp = child->thread.fp[regno - 21];
-                        /* Convert internal fpu reg representation
-                         * into long double format
-                         */
-                        if (FPU_IS_EMU && (regno < 45) && !(regno % 3))
-                                tmp = ((tmp & 0xffff0000) << 15) |
-                                      ((tmp & 0x0000ffff) << 16);
-                } else
-                        goto out_eio;
-                ret = put_user(tmp, datap);
-                break;
-
-        case PTRACE_POKEUSR:
-        /* write the word at location addr in the USER area */
-                if (addr & 3)
-                        goto out_eio;
-
-                if (regno == PT_SR) {
-                        data &= SR_MASK;
-                        data |= get_reg(child, PT_SR) & ~SR_MASK;
-                }
-                if (regno >= 0 && regno < 19) {
-                        if (put_reg(child, regno, data))
-                                goto out_eio;
-                } else if (regno >= 21 && regno < 48) {
-                        /* Convert long double format
-                         * into internal fpu reg representation
-                         */
-                        if (FPU_IS_EMU && (regno < 45) && !(regno % 3)) {
-                                data <<= 15;
-                                data = (data & 0xffff0000) |
-                                       ((data & 0x0000ffff) >> 1);
-                        }
-                        child->thread.fp[regno - 21] = data;
-                } else
-                        goto out_eio;
-                break;
-
-        case PTRACE_GETREGS:    /* Get all gp regs from the child. */
-                for (i = 0; i < 19; i++) {
-                        tmp = get_reg(child, i);
-                        ret = put_user(tmp, datap);
-                        if (ret)
-                                break;
-                        datap++;
-                }
-                break;
-
-        case PTRACE_SETREGS:    /* Set all gp regs in the child. */
-                for (i = 0; i < 19; i++) {
-                        ret = get_user(tmp, datap);
-                        if (ret)
-                                break;
-                        if (i == PT_SR) {
-                                tmp &= SR_MASK;
-                                tmp |= get_reg(child, PT_SR) & ~SR_MASK;
-                        }
-                        put_reg(child, i, tmp);
-                        datap++;
-                }
-                break;
-
-        case PTRACE_GETFPREGS:  /* Get the child FPU state. */
-                if (copy_to_user(datap, &child->thread.fp,
-                                 sizeof(struct user_m68kfp_struct)))
-                        ret = -EFAULT;
-                break;
-
-        case PTRACE_SETFPREGS:  /* Set the child FPU state. */
-                if (copy_from_user(&child->thread.fp, datap,
-                                   sizeof(struct user_m68kfp_struct)))
-                        ret = -EFAULT;
-                break;
-
-        case PTRACE_GET_THREAD_AREA:
-                ret = put_user(task_thread_info(child)->tp_value, datap);
-                break;
-
-        default:
-                ret = ptrace_request(child, request, addr, data);
-                break;
-        }
-
-        return ret;
-out_eio:
-        return -EIO;
-}
-
-asmlinkage void syscall_trace(void)
-{
-        ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
-                                 ? 0x80 : 0));
-        /*
-         * this isn't the same as continuing with a signal, but it will do
-         * for normal use.  strace only continues with a signal if the
-         * stopping signal is not SIGTRAP.  -brl
-         */
-        if (current->exit_code) {
-                send_sig(current->exit_code, current, 1);
-                current->exit_code = 0;
-        }
-}
+#ifdef CONFIG_MMU
+#include "ptrace_mm.c"
+#else
+#include "ptrace_no.c"
+#endif
diff --git a/arch/m68k/kernel/ptrace_mm.c b/arch/m68k/kernel/ptrace_mm.c
new file mode 100644
index 000000000000..0b252683cefb
--- /dev/null
+++ b/arch/m68k/kernel/ptrace_mm.c
@@ -0,0 +1,277 @@
+/*
+ *  linux/arch/m68k/kernel/ptrace.c
+ *
+ *  Copyright (C) 1994 by Hamish Macdonald
+ *  Taken from linux/kernel/ptrace.c and modified for M680x0.
+ *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of
+ * this archive for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/errno.h>
+#include <linux/ptrace.h>
+#include <linux/user.h>
+#include <linux/signal.h>
+
+#include <asm/uaccess.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/processor.h>
+
+/*
+ * does not yet catch signals sent when the child dies.
+ * in exit.c or in signal.c.
+ */
+
+/* determines which bits in the SR the user has access to. */
+/* 1 = access 0 = no access */
+#define SR_MASK 0x001f
+
+/* sets the trace bits. */
+#define TRACE_BITS 0xC000
+#define T1_BIT 0x8000
+#define T0_BIT 0x4000
+
+/* Find the stack offset for a register, relative to thread.esp0. */
+#define PT_REG(reg)     ((long)&((struct pt_regs *)0)->reg)
+#define SW_REG(reg)     ((long)&((struct switch_stack *)0)->reg \
+                         - sizeof(struct switch_stack))
+/* Mapping from PT_xxx to the stack offset at which the register is
+   saved.  Notice that usp has no stack-slot and needs to be treated
+   specially (see get_reg/put_reg below). */
+static const int regoff[] = {
+        [0]     = PT_REG(d1),
+        [1]     = PT_REG(d2),
+        [2]     = PT_REG(d3),
+        [3]     = PT_REG(d4),
+        [4]     = PT_REG(d5),
+        [5]     = SW_REG(d6),
+        [6]     = SW_REG(d7),
+        [7]     = PT_REG(a0),
+        [8]     = PT_REG(a1),
+        [9]     = PT_REG(a2),
+        [10]    = SW_REG(a3),
+        [11]    = SW_REG(a4),
+        [12]    = SW_REG(a5),
+        [13]    = SW_REG(a6),
+        [14]    = PT_REG(d0),
+        [15]    = -1,
+        [16]    = PT_REG(orig_d0),
+        [17]    = PT_REG(sr),
+        [18]    = PT_REG(pc),
+};
+
+/*
+ * Get contents of register REGNO in task TASK.
+ */
+static inline long get_reg(struct task_struct *task, int regno)
+{
+        unsigned long *addr;
+
+        if (regno == PT_USP)
+                addr = &task->thread.usp;
+        else if (regno < ARRAY_SIZE(regoff))
+                addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
+        else
+                return 0;
+        /* Need to take stkadj into account. */
+        if (regno == PT_SR || regno == PT_PC) {
+                long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
+                addr = (unsigned long *) ((unsigned long)addr + stkadj);
+                /* The sr is actually a 16 bit register.  */
+                if (regno == PT_SR)
+                        return *(unsigned short *)addr;
+        }
+        return *addr;
+}
+
+/*
+ * Write contents of register REGNO in task TASK.
+ */
+static inline int put_reg(struct task_struct *task, int regno,
+                          unsigned long data)
+{
+        unsigned long *addr;
+
+        if (regno == PT_USP)
+                addr = &task->thread.usp;
+        else if (regno < ARRAY_SIZE(regoff))
+                addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
+        else
+                return -1;
+        /* Need to take stkadj into account. */
+        if (regno == PT_SR || regno == PT_PC) {
+                long stkadj = *(long *)(task->thread.esp0 + PT_REG(stkadj));
+                addr = (unsigned long *) ((unsigned long)addr + stkadj);
+                /* The sr is actually a 16 bit register.  */
+                if (regno == PT_SR) {
+                        *(unsigned short *)addr = data;
+                        return 0;
+                }
+        }
+        *addr = data;
+        return 0;
+}
+
+/*
+ * Make sure the single step bit is not set.
+ */
+static inline void singlestep_disable(struct task_struct *child)
+{
+        unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
+        put_reg(child, PT_SR, tmp);
+        clear_tsk_thread_flag(child, TIF_DELAYED_TRACE);
+}
+
+/*
+ * Called by kernel/ptrace.c when detaching..
+ */
+void ptrace_disable(struct task_struct *child)
+{
+        singlestep_disable(child);
+}
+
+void user_enable_single_step(struct task_struct *child)
+{
+        unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
+        put_reg(child, PT_SR, tmp | T1_BIT);
+        set_tsk_thread_flag(child, TIF_DELAYED_TRACE);
+}
+
+void user_enable_block_step(struct task_struct *child)
+{
+        unsigned long tmp = get_reg(child, PT_SR) & ~TRACE_BITS;
+        put_reg(child, PT_SR, tmp | T0_BIT);
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        singlestep_disable(child);
+}
+
+long arch_ptrace(struct task_struct *child, long request,
+                 unsigned long addr, unsigned long data)
+{
+        unsigned long tmp;
+        int i, ret = 0;
+        int regno = addr >> 2; /* temporary hack. */
+        unsigned long __user *datap = (unsigned long __user *) data;
+
+        switch (request) {
+        /* read the word at location addr in the USER area. */
+        case PTRACE_PEEKUSR:
+                if (addr & 3)
+                        goto out_eio;
+
+                if (regno >= 0 && regno < 19) {
+                        tmp = get_reg(child, regno);
+                } else if (regno >= 21 && regno < 49) {
+                        tmp = child->thread.fp[regno - 21];
+                        /* Convert internal fpu reg representation
+                         * into long double format
+                         */
+                        if (FPU_IS_EMU && (regno < 45) && !(regno % 3))
+                                tmp = ((tmp & 0xffff0000) << 15) |
+                                      ((tmp & 0x0000ffff) << 16);
+                } else
+                        goto out_eio;
+                ret = put_user(tmp, datap);
+                break;
+
+        case PTRACE_POKEUSR:
+        /* write the word at location addr in the USER area */
+                if (addr & 3)
+                        goto out_eio;
+
+                if (regno == PT_SR) {
+                        data &= SR_MASK;
+                        data |= get_reg(child, PT_SR) & ~SR_MASK;
+                }
+                if (regno >= 0 && regno < 19) {
+                        if (put_reg(child, regno, data))
+                                goto out_eio;
+                } else if (regno >= 21 && regno < 48) {
+                        /* Convert long double format
+                         * into internal fpu reg representation
+                         */
+                        if (FPU_IS_EMU && (regno < 45) && !(regno % 3)) {
+                                data <<= 15;
+                                data = (data & 0xffff0000) |
+                                       ((data & 0x0000ffff) >> 1);
+                        }
+                        child->thread.fp[regno - 21] = data;
+                } else
+                        goto out_eio;
+                break;
+
+        case PTRACE_GETREGS:    /* Get all gp regs from the child. */
+                for (i = 0; i < 19; i++) {
+                        tmp = get_reg(child, i);
+                        ret = put_user(tmp, datap);
+                        if (ret)
+                                break;
+                        datap++;
+                }
+                break;
+
+        case PTRACE_SETREGS:    /* Set all gp regs in the child. */
+                for (i = 0; i < 19; i++) {
+                        ret = get_user(tmp, datap);
+                        if (ret)
+                                break;
+                        if (i == PT_SR) {
+                                tmp &= SR_MASK;
+                                tmp |= get_reg(child, PT_SR) & ~SR_MASK;
+                        }
+                        put_reg(child, i, tmp);
+                        datap++;
+                }
+                break;
+
+        case PTRACE_GETFPREGS:  /* Get the child FPU state. */
+                if (copy_to_user(datap, &child->thread.fp,
+                                 sizeof(struct user_m68kfp_struct)))
+                        ret = -EFAULT;
+                break;
+
+        case PTRACE_SETFPREGS:  /* Set the child FPU state. */
+                if (copy_from_user(&child->thread.fp, datap,
+                                   sizeof(struct user_m68kfp_struct)))
+                        ret = -EFAULT;
+                break;
+
+        case PTRACE_GET_THREAD_AREA:
+                ret = put_user(task_thread_info(child)->tp_value, datap);
+                break;
+
+        default:
+                ret = ptrace_request(child, request, addr, data);
+                break;
+        }
+
+        return ret;
+out_eio:
+        return -EIO;
+}
+
+asmlinkage void syscall_trace(void)
+{
+        ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
+                                 ? 0x80 : 0));
+        /*
+         * this isn't the same as continuing with a signal, but it will do
+         * for normal use.  strace only continues with a signal if the
+         * stopping signal is not SIGTRAP.  -brl
+         */
+        if (current->exit_code) {
+                send_sig(current->exit_code, current, 1);
+                current->exit_code = 0;
+        }
+}
diff --git a/arch/m68k/kernel/ptrace_no.c b/arch/m68k/kernel/ptrace_no.c
new file mode 100644
index 000000000000..6709fb707335
--- /dev/null
+++ b/arch/m68k/kernel/ptrace_no.c
@@ -0,0 +1,255 @@
+/*
+ *  linux/arch/m68knommu/kernel/ptrace.c
+ *
+ *  Copyright (C) 1994 by Hamish Macdonald
+ *  Taken from linux/kernel/ptrace.c and modified for M680x0.
+ *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of
+ * this archive for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/errno.h>
+#include <linux/ptrace.h>
+#include <linux/user.h>
+#include <linux/signal.h>
+#include <linux/tracehook.h>
+
+#include <asm/uaccess.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/processor.h>
+
+/*
+ * does not yet catch signals sent when the child dies.
+ * in exit.c or in signal.c.
+ */
+
+/* determines which bits in the SR the user has access to. */
+/* 1 = access 0 = no access */
+#define SR_MASK 0x001f
+
+/* sets the trace bits. */
+#define TRACE_BITS 0x8000
+
+/* Find the stack offset for a register, relative to thread.esp0. */
+#define PT_REG(reg)     ((long)&((struct pt_regs *)0)->reg)
+#define SW_REG(reg)     ((long)&((struct switch_stack *)0)->reg \
+                         - sizeof(struct switch_stack))
+/* Mapping from PT_xxx to the stack offset at which the register is
+   saved.  Notice that usp has no stack-slot and needs to be treated
+   specially (see get_reg/put_reg below). */
+static int regoff[] = {
+        PT_REG(d1), PT_REG(d2), PT_REG(d3), PT_REG(d4),
+        PT_REG(d5), SW_REG(d6), SW_REG(d7), PT_REG(a0),
+        PT_REG(a1), PT_REG(a2), SW_REG(a3), SW_REG(a4),
+        SW_REG(a5), SW_REG(a6), PT_REG(d0), -1,
+        PT_REG(orig_d0), PT_REG(sr), PT_REG(pc),
+};
+
+/*
+ * Get contents of register REGNO in task TASK.
+ */
+static inline long get_reg(struct task_struct *task, int regno)
+{
+        unsigned long *addr;
+
+        if (regno == PT_USP)
+                addr = &task->thread.usp;
+        else if (regno < ARRAY_SIZE(regoff))
+                addr = (unsigned long *)(task->thread.esp0 + regoff[regno]);
+        else
+                return 0;
+        return *addr;
+}
+
+/*
+ * Write contents of register REGNO in task TASK.
+ */
+static inline int put_reg(struct task_struct *task, int regno,
+                          unsigned long data)
+{
+        unsigned long *addr;
+
+        if (regno == PT_USP)
+                addr = &task->thread.usp;
+        else if (regno < ARRAY_SIZE(regoff))
+                addr = (unsigned long *) (task->thread.esp0 + regoff[regno]);
+        else
+                return -1;
+        *addr = data;
+        return 0;
+}
+
+void user_enable_single_step(struct task_struct *task)
+{
+        unsigned long srflags;
+        srflags = get_reg(task, PT_SR) | (TRACE_BITS << 16);
+        put_reg(task, PT_SR, srflags);
+}
+
+void user_disable_single_step(struct task_struct *task)
+{
+        unsigned long srflags;
+        srflags = get_reg(task, PT_SR) & ~(TRACE_BITS << 16);
+        put_reg(task, PT_SR, srflags);
+}
+
+/*
+ * Called by kernel/ptrace.c when detaching..
+ *
+ * Make sure the single step bit is not set.
+ */
+void ptrace_disable(struct task_struct *child)
+{
+        /* make sure the single step bit is not set. */
+        user_disable_single_step(child);
+}
+
+long arch_ptrace(struct task_struct *child, long request,
+                 unsigned long addr, unsigned long data)
+{
+        int ret;
+        int regno = addr >> 2;
+        unsigned long __user *datap = (unsigned long __user *) data;
+
+        switch (request) {
+                /* read the word at location addr in the USER area. */
+                case PTRACE_PEEKUSR: {
+                        unsigned long tmp;
+                        
+                        ret = -EIO;
+                        if ((addr & 3) || addr > sizeof(struct user) - 3)
+                                break;
+                        
+                        tmp = 0;  /* Default return condition */
+                        ret = -EIO;
+                        if (regno < 19) {
+                                tmp = get_reg(child, regno);
+                                if (regno == PT_SR)
+                                        tmp >>= 16;
+                        } else if (regno >= 21 && regno < 49) {
+                                tmp = child->thread.fp[regno - 21];
+                        } else if (regno == 49) {
+                                tmp = child->mm->start_code;
+                        } else if (regno == 50) {
+                                tmp = child->mm->start_data;
+                        } else if (regno == 51) {
+                                tmp = child->mm->end_code;
+                        } else
+                                break;
+                        ret = put_user(tmp, datap);
+                        break;
+                }
+
+                case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
+                        ret = -EIO;
+                        if ((addr & 3) || addr > sizeof(struct user) - 3)
+                                break;
+
+                        if (regno == PT_SR) {
+                                data &= SR_MASK;
+                                data <<= 16;
+                                data |= get_reg(child, PT_SR) & ~(SR_MASK << 16);
+                        }
+                        if (regno < 19) {
+                                if (put_reg(child, regno, data))
+                                        break;
+                                ret = 0;
+                                break;
+                        }
+                        if (regno >= 21 && regno < 48)
+                        {
+                                child->thread.fp[regno - 21] = data;
+                                ret = 0;
+                        }
+                        break;
+
+                case PTRACE_GETREGS: { /* Get all gp regs from the child. */
+                        int i;
+                        unsigned long tmp;
+                        for (i = 0; i < 19; i++) {
+                            tmp = get_reg(child, i);
+                            if (i == PT_SR)
+                                tmp >>= 16;
+                            if (put_user(tmp, datap)) {
+                                ret = -EFAULT;
+                                break;
+                            }
+                            datap++;
+                        }
+                        ret = 0;
+                        break;
+                }
+
+                case PTRACE_SETREGS: { /* Set all gp regs in the child. */
+                        int i;
+                        unsigned long tmp;
+                        for (i = 0; i < 19; i++) {
+                            if (get_user(tmp, datap)) {
+                                ret = -EFAULT;
+                                break;
+                            }
+                            if (i == PT_SR) {
+                                tmp &= SR_MASK;
+                                tmp <<= 16;
+                                tmp |= get_reg(child, PT_SR) & ~(SR_MASK << 16);
+                            }
+                            put_reg(child, i, tmp);
+                            datap++;
+                        }
+                        ret = 0;
+                        break;
+                }
+
+#ifdef PTRACE_GETFPREGS
+                case PTRACE_GETFPREGS: { /* Get the child FPU state. */
+                        ret = 0;
+                        if (copy_to_user(datap, &child->thread.fp,
+                                         sizeof(struct user_m68kfp_struct)))
+                                ret = -EFAULT;
+                        break;
+                }
+#endif
+
+#ifdef PTRACE_SETFPREGS
+                case PTRACE_SETFPREGS: { /* Set the child FPU state. */
+                        ret = 0;
+                        if (copy_from_user(&child->thread.fp, datap,
+                                           sizeof(struct user_m68kfp_struct)))
+                                ret = -EFAULT;
+                        break;
+                }
+#endif
+
+        case PTRACE_GET_THREAD_AREA:
+                ret = put_user(task_thread_info(child)->tp_value, datap);
+                break;
+
+                default:
+                        ret = ptrace_request(child, request, addr, data);
+                        break;
+        }
+        return ret;
+}
+
+asmlinkage int syscall_trace_enter(void)
+{
+        int ret = 0;
+
+        if (test_thread_flag(TIF_SYSCALL_TRACE))
+                ret = tracehook_report_syscall_entry(task_pt_regs(current));
+        return ret;
+}
+
+asmlinkage void syscall_trace_leave(void)
+{
+        if (test_thread_flag(TIF_SYSCALL_TRACE))
+                tracehook_report_syscall_exit(task_pt_regs(current), 0);
+}
diff --git a/arch/m68k/kernel/setup.c b/arch/m68k/kernel/setup.c
index 334d83640376..4bf129f1d2e2 100644
--- a/arch/m68k/kernel/setup.c
+++ b/arch/m68k/kernel/setup.c
@@ -1,533 +1,5 @@
-/*
- *  linux/arch/m68k/kernel/setup.c
- *
- *  Copyright (C) 1995  Hamish Macdonald
- */
-
-/*
- * This file handles the architecture-dependent parts of system setup
- */
-
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/fs.h>
-#include <linux/console.h>
-#include <linux/genhd.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <linux/bootmem.h>
-#include <linux/proc_fs.h>
-#include <linux/seq_file.h>
-#include <linux/module.h>
-#include <linux/initrd.h>
-
-#include <asm/bootinfo.h>
-#include <asm/sections.h>
-#include <asm/setup.h>
-#include <asm/fpu.h>
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#ifdef CONFIG_AMIGA
-#include <asm/amigahw.h>
-#endif
-#ifdef CONFIG_ATARI
-#include <asm/atarihw.h>
-#include <asm/atari_stram.h>
-#endif
-#ifdef CONFIG_SUN3X
-#include <asm/dvma.h>
-#endif
-#include <asm/natfeat.h>
-
-#if !FPSTATESIZE || !NR_IRQS
-#warning No CPU/platform type selected, your kernel will not work!
-#warning Are you building an allnoconfig kernel?
-#endif
-
-unsigned long m68k_machtype;
-EXPORT_SYMBOL(m68k_machtype);
-unsigned long m68k_cputype;
-EXPORT_SYMBOL(m68k_cputype);
-unsigned long m68k_fputype;
-unsigned long m68k_mmutype;
-EXPORT_SYMBOL(m68k_mmutype);
-#ifdef CONFIG_VME
-unsigned long vme_brdtype;
-EXPORT_SYMBOL(vme_brdtype);
-#endif
-
-int m68k_is040or060;
-EXPORT_SYMBOL(m68k_is040or060);
-
-extern unsigned long availmem;
-
-int m68k_num_memory;
-EXPORT_SYMBOL(m68k_num_memory);
-int m68k_realnum_memory;
-EXPORT_SYMBOL(m68k_realnum_memory);
-unsigned long m68k_memoffset;
-struct mem_info m68k_memory[NUM_MEMINFO];
-EXPORT_SYMBOL(m68k_memory);
-
-struct mem_info m68k_ramdisk;
-
-static char m68k_command_line[CL_SIZE];
-
-void (*mach_sched_init) (irq_handler_t handler) __initdata = NULL;
-/* machine dependent irq functions */
-void (*mach_init_IRQ) (void) __initdata = NULL;
-void (*mach_get_model) (char *model);
-void (*mach_get_hardware_list) (struct seq_file *m);
-/* machine dependent timer functions */
-unsigned long (*mach_gettimeoffset) (void);
-int (*mach_hwclk) (int, struct rtc_time*);
-EXPORT_SYMBOL(mach_hwclk);
-int (*mach_set_clock_mmss) (unsigned long);
-unsigned int (*mach_get_ss)(void);
-int (*mach_get_rtc_pll)(struct rtc_pll_info *);
-int (*mach_set_rtc_pll)(struct rtc_pll_info *);
-EXPORT_SYMBOL(mach_get_ss);
-EXPORT_SYMBOL(mach_get_rtc_pll);
-EXPORT_SYMBOL(mach_set_rtc_pll);
-void (*mach_reset)( void );
-void (*mach_halt)( void );
-void (*mach_power_off)( void );
-long mach_max_dma_address = 0x00ffffff; /* default set to the lower 16MB */
-#ifdef CONFIG_HEARTBEAT
-void (*mach_heartbeat) (int);
-EXPORT_SYMBOL(mach_heartbeat);
-#endif
-#ifdef CONFIG_M68K_L2_CACHE
-void (*mach_l2_flush) (int);
-#endif
-#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
-void (*mach_beep)(unsigned int, unsigned int);
-EXPORT_SYMBOL(mach_beep);
-#endif
-#if defined(CONFIG_ISA) && defined(MULTI_ISA)
-int isa_type;
-int isa_sex;
-EXPORT_SYMBOL(isa_type);
-EXPORT_SYMBOL(isa_sex);
-#endif
-
-extern int amiga_parse_bootinfo(const struct bi_record *);
-extern int atari_parse_bootinfo(const struct bi_record *);
-extern int mac_parse_bootinfo(const struct bi_record *);
-extern int q40_parse_bootinfo(const struct bi_record *);
-extern int bvme6000_parse_bootinfo(const struct bi_record *);
-extern int mvme16x_parse_bootinfo(const struct bi_record *);
-extern int mvme147_parse_bootinfo(const struct bi_record *);
-extern int hp300_parse_bootinfo(const struct bi_record *);
-extern int apollo_parse_bootinfo(const struct bi_record *);
-
-extern void config_amiga(void);
-extern void config_atari(void);
-extern void config_mac(void);
-extern void config_sun3(void);
-extern void config_apollo(void);
-extern void config_mvme147(void);
-extern void config_mvme16x(void);
-extern void config_bvme6000(void);
-extern void config_hp300(void);
-extern void config_q40(void);
-extern void config_sun3x(void);
-
-#define MASK_256K 0xfffc0000
-
-extern void paging_init(void);
-
-static void __init m68k_parse_bootinfo(const struct bi_record *record)
-{
-        while (record->tag != BI_LAST) {
-                int unknown = 0;
-                const unsigned long *data = record->data;
-
-                switch (record->tag) {
-                case BI_MACHTYPE:
-                case BI_CPUTYPE:
-                case BI_FPUTYPE:
-                case BI_MMUTYPE:
-                        /* Already set up by head.S */
-                        break;
-
-                case BI_MEMCHUNK:
-                        if (m68k_num_memory < NUM_MEMINFO) {
-                                m68k_memory[m68k_num_memory].addr = data[0];
-                                m68k_memory[m68k_num_memory].size = data[1];
-                                m68k_num_memory++;
-                        } else
-                                printk("m68k_parse_bootinfo: too many memory chunks\n");
-                        break;
-
-                case BI_RAMDISK:
-                        m68k_ramdisk.addr = data[0];
-                        m68k_ramdisk.size = data[1];
-                        break;
-
-                case BI_COMMAND_LINE:
-                        strlcpy(m68k_command_line, (const char *)data,
-                                sizeof(m68k_command_line));
-                        break;
-
-                default:
-                        if (MACH_IS_AMIGA)
-                                unknown = amiga_parse_bootinfo(record);
-                        else if (MACH_IS_ATARI)
-                                unknown = atari_parse_bootinfo(record);
-                        else if (MACH_IS_MAC)
-                                unknown = mac_parse_bootinfo(record);
-                        else if (MACH_IS_Q40)
-                                unknown = q40_parse_bootinfo(record);
-                        else if (MACH_IS_BVME6000)
-                                unknown = bvme6000_parse_bootinfo(record);
-                        else if (MACH_IS_MVME16x)
-                                unknown = mvme16x_parse_bootinfo(record);
-                        else if (MACH_IS_MVME147)
-                                unknown = mvme147_parse_bootinfo(record);
-                        else if (MACH_IS_HP300)
-                                unknown = hp300_parse_bootinfo(record);
-                        else if (MACH_IS_APOLLO)
-                                unknown = apollo_parse_bootinfo(record);
-                        else
-                                unknown = 1;
-                }
-                if (unknown)
-                        printk("m68k_parse_bootinfo: unknown tag 0x%04x ignored\n",
-                               record->tag);
-                record = (struct bi_record *)((unsigned long)record +
-                                              record->size);
-        }
-
-        m68k_realnum_memory = m68k_num_memory;
-#ifdef CONFIG_SINGLE_MEMORY_CHUNK
-        if (m68k_num_memory > 1) {
-                printk("Ignoring last %i chunks of physical memory\n",
-                       (m68k_num_memory - 1));
-                m68k_num_memory = 1;
-        }
-#endif
-}
-
-void __init setup_arch(char **cmdline_p)
-{
-        int i;
-
-        /* The bootinfo is located right after the kernel bss */
-        m68k_parse_bootinfo((const struct bi_record *)_end);
-
-        if (CPU_IS_040)
-                m68k_is040or060 = 4;
-        else if (CPU_IS_060)
-                m68k_is040or060 = 6;
-
-        /* FIXME: m68k_fputype is passed in by Penguin booter, which can
-         * be confused by software FPU emulation. BEWARE.
-         * We should really do our own FPU check at startup.
-         * [what do we do with buggy 68LC040s? if we have problems
-         *  with them, we should add a test to check_bugs() below] */
-#ifndef CONFIG_M68KFPU_EMU_ONLY
-        /* clear the fpu if we have one */
-        if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) {
-                volatile int zero = 0;
-                asm volatile ("frestore %0" : : "m" (zero));
-        }
-#endif
-
-        if (CPU_IS_060) {
-                u32 pcr;
-
-                asm (".chip 68060; movec %%pcr,%0; .chip 68k"
-                     : "=d" (pcr));
-                if (((pcr >> 8) & 0xff) <= 5) {
-                        printk("Enabling workaround for errata I14\n");
-                        asm (".chip 68060; movec %0,%%pcr; .chip 68k"
-                             : : "d" (pcr | 0x20));
-                }
-        }
-
-        init_mm.start_code = PAGE_OFFSET;
-        init_mm.end_code = (unsigned long)_etext;
-        init_mm.end_data = (unsigned long)_edata;
-        init_mm.brk = (unsigned long)_end;
-
-        *cmdline_p = m68k_command_line;
-        memcpy(boot_command_line, *cmdline_p, CL_SIZE);
-
-        parse_early_param();
-
-#ifdef CONFIG_DUMMY_CONSOLE
-        conswitchp = &dummy_con;
-#endif
-
-        switch (m68k_machtype) {
-#ifdef CONFIG_AMIGA
-        case MACH_AMIGA:
-                config_amiga();
-                break;
-#endif
-#ifdef CONFIG_ATARI
-        case MACH_ATARI:
-                config_atari();
-                break;
-#endif
-#ifdef CONFIG_MAC
-        case MACH_MAC:
-                config_mac();
-                break;
-#endif
-#ifdef CONFIG_SUN3
-        case MACH_SUN3:
-                config_sun3();
-                break;
-#endif
-#ifdef CONFIG_APOLLO
-        case MACH_APOLLO:
-                config_apollo();
-                break;
-#endif
-#ifdef CONFIG_MVME147
-        case MACH_MVME147:
-                config_mvme147();
-                break;
-#endif
-#ifdef CONFIG_MVME16x
-        case MACH_MVME16x:
-                config_mvme16x();
-                break;
-#endif
-#ifdef CONFIG_BVME6000
-        case MACH_BVME6000:
-                config_bvme6000();
-                break;
-#endif
-#ifdef CONFIG_HP300
-        case MACH_HP300:
-                config_hp300();
-                break;
-#endif
-#ifdef CONFIG_Q40
-        case MACH_Q40:
-                config_q40();
-                break;
-#endif
-#ifdef CONFIG_SUN3X
-        case MACH_SUN3X:
-                config_sun3x();
-                break;
-#endif
-        default:
-                panic("No configuration setup");
-        }
-
-#ifdef CONFIG_NATFEAT
-        nf_init();
-#endif
-
-        paging_init();
-
-#ifndef CONFIG_SUN3
-        for (i = 1; i < m68k_num_memory; i++)
-                free_bootmem_node(NODE_DATA(i), m68k_memory[i].addr,
-                                  m68k_memory[i].size);
-#ifdef CONFIG_BLK_DEV_INITRD
-        if (m68k_ramdisk.size) {
-                reserve_bootmem_node(__virt_to_node(phys_to_virt(m68k_ramdisk.addr)),
-                                     m68k_ramdisk.addr, m68k_ramdisk.size,
-                                     BOOTMEM_DEFAULT);
-                initrd_start = (unsigned long)phys_to_virt(m68k_ramdisk.addr);
-                initrd_end = initrd_start + m68k_ramdisk.size;
-                printk("initrd: %08lx - %08lx\n", initrd_start, initrd_end);
-        }
-#endif
-
-#ifdef CONFIG_ATARI
-        if (MACH_IS_ATARI)
-                atari_stram_reserve_pages((void *)availmem);
-#endif
-#ifdef CONFIG_SUN3X
-        if (MACH_IS_SUN3X) {
-                dvma_init();
-        }
-#endif
-
-#endif /* !CONFIG_SUN3 */
-
-/* set ISA defs early as possible */
-#if defined(CONFIG_ISA) && defined(MULTI_ISA)
-        if (MACH_IS_Q40) {
-                isa_type = ISA_TYPE_Q40;
-                isa_sex = 0;
-        }
-#ifdef CONFIG_AMIGA_PCMCIA
-        if (MACH_IS_AMIGA && AMIGAHW_PRESENT(PCMCIA)) {
-                isa_type = ISA_TYPE_AG;
-                isa_sex = 1;
-        }
-#endif
-#endif
-}
-
-static int show_cpuinfo(struct seq_file *m, void *v)
-{
-        const char *cpu, *mmu, *fpu;
-        unsigned long clockfreq, clockfactor;
-
-#define LOOP_CYCLES_68020       (8)
-#define LOOP_CYCLES_68030       (8)
-#define LOOP_CYCLES_68040       (3)
-#define LOOP_CYCLES_68060       (1)
-
-        if (CPU_IS_020) {
-                cpu = "68020";
-                clockfactor = LOOP_CYCLES_68020;
-        } else if (CPU_IS_030) {
-                cpu = "68030";
-                clockfactor = LOOP_CYCLES_68030;
-        } else if (CPU_IS_040) {
-                cpu = "68040";
-                clockfactor = LOOP_CYCLES_68040;
-        } else if (CPU_IS_060) {
-                cpu = "68060";
-                clockfactor = LOOP_CYCLES_68060;
-        } else {
-                cpu = "680x0";
-                clockfactor = 0;
-        }
-
-#ifdef CONFIG_M68KFPU_EMU_ONLY
-        fpu = "none(soft float)";
+#ifdef CONFIG_MMU
+#include "setup_mm.c"
 #else
-        if (m68k_fputype & FPU_68881)
-                fpu = "68881";
-        else if (m68k_fputype & FPU_68882)
-                fpu = "68882";
-        else if (m68k_fputype & FPU_68040)
-                fpu = "68040";
-        else if (m68k_fputype & FPU_68060)
-                fpu = "68060";
-        else if (m68k_fputype & FPU_SUNFPA)
-                fpu = "Sun FPA";
-        else
-                fpu = "none";
-#endif
-
-        if (m68k_mmutype & MMU_68851)
-                mmu = "68851";
-        else if (m68k_mmutype & MMU_68030)
-                mmu = "68030";
-        else if (m68k_mmutype & MMU_68040)
-                mmu = "68040";
-        else if (m68k_mmutype & MMU_68060)
-                mmu = "68060";
-        else if (m68k_mmutype & MMU_SUN3)
-                mmu = "Sun-3";
-        else if (m68k_mmutype & MMU_APOLLO)
-                mmu = "Apollo";
-        else
-                mmu = "unknown";
-
-        clockfreq = loops_per_jiffy * HZ * clockfactor;
-
-        seq_printf(m, "CPU:\t\t%s\n"
-                   "MMU:\t\t%s\n"
-                   "FPU:\t\t%s\n"
-                   "Clocking:\t%lu.%1luMHz\n"
-                   "BogoMips:\t%lu.%02lu\n"
-                   "Calibration:\t%lu loops\n",
-                   cpu, mmu, fpu,
-                   clockfreq/1000000,(clockfreq/100000)%10,
-                   loops_per_jiffy/(500000/HZ),(loops_per_jiffy/(5000/HZ))%100,
-                   loops_per_jiffy);
-        return 0;
-}
-
-static void *c_start(struct seq_file *m, loff_t *pos)
-{
-        return *pos < 1 ? (void *)1 : NULL;
-}
-static void *c_next(struct seq_file *m, void *v, loff_t *pos)
-{
-        ++*pos;
-        return NULL;
-}
-static void c_stop(struct seq_file *m, void *v)
-{
-}
-const struct seq_operations cpuinfo_op = {
-        .start  = c_start,
-        .next   = c_next,
-        .stop   = c_stop,
-        .show   = show_cpuinfo,
-};
-
-#ifdef CONFIG_PROC_HARDWARE
-static int hardware_proc_show(struct seq_file *m, void *v)
-{
-        char model[80];
-        unsigned long mem;
-        int i;
-
-        if (mach_get_model)
-                mach_get_model(model);
-        else
-                strcpy(model, "Unknown m68k");
-
-        seq_printf(m, "Model:\t\t%s\n", model);
-        for (mem = 0, i = 0; i < m68k_num_memory; i++)
-                mem += m68k_memory[i].size;
-        seq_printf(m, "System Memory:\t%ldK\n", mem >> 10);
-
-        if (mach_get_hardware_list)
-                mach_get_hardware_list(m);
-
-        return 0;
-}
-
-static int hardware_proc_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, hardware_proc_show, NULL);
-}
-
-static const struct file_operations hardware_proc_fops = {
-        .open           = hardware_proc_open,
-        .read           = seq_read,
-        .llseek         = seq_lseek,
-        .release        = single_release,
-};
-
-static int __init proc_hardware_init(void)
-{
-        proc_create("hardware", 0, NULL, &hardware_proc_fops);
-        return 0;
-}
-module_init(proc_hardware_init);
+#include "setup_no.c"
 #endif
-
-void check_bugs(void)
-{
-#ifndef CONFIG_M68KFPU_EMU
-        if (m68k_fputype == 0) {
-                printk(KERN_EMERG "*** YOU DO NOT HAVE A FLOATING POINT UNIT, "
-                        "WHICH IS REQUIRED BY LINUX/M68K ***\n");
-                printk(KERN_EMERG "Upgrade your hardware or join the FPU "
-                        "emulation project\n");
-                panic("no FPU");
-        }
-#endif /* !CONFIG_M68KFPU_EMU */
-}
-
-#ifdef CONFIG_ADB
-static int __init adb_probe_sync_enable (char *str) {
-        extern int __adb_probe_sync;
-        __adb_probe_sync = 1;
-        return 1;
-}
-
-__setup("adb_sync", adb_probe_sync_enable);
-#endif /* CONFIG_ADB */
diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c
new file mode 100644
index 000000000000..334d83640376
--- /dev/null
+++ b/arch/m68k/kernel/setup_mm.c
@@ -0,0 +1,533 @@
+/*
+ *  linux/arch/m68k/kernel/setup.c
+ *
+ *  Copyright (C) 1995  Hamish Macdonald
+ */
+
+/*
+ * This file handles the architecture-dependent parts of system setup
+ */
+
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/fs.h>
+#include <linux/console.h>
+#include <linux/genhd.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/module.h>
+#include <linux/initrd.h>
+
+#include <asm/bootinfo.h>
+#include <asm/sections.h>
+#include <asm/setup.h>
+#include <asm/fpu.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#ifdef CONFIG_AMIGA
+#include <asm/amigahw.h>
+#endif
+#ifdef CONFIG_ATARI
+#include <asm/atarihw.h>
+#include <asm/atari_stram.h>
+#endif
+#ifdef CONFIG_SUN3X
+#include <asm/dvma.h>
+#endif
+#include <asm/natfeat.h>
+
+#if !FPSTATESIZE || !NR_IRQS
+#warning No CPU/platform type selected, your kernel will not work!
+#warning Are you building an allnoconfig kernel?
+#endif
+
+unsigned long m68k_machtype;
+EXPORT_SYMBOL(m68k_machtype);
+unsigned long m68k_cputype;
+EXPORT_SYMBOL(m68k_cputype);
+unsigned long m68k_fputype;
+unsigned long m68k_mmutype;
+EXPORT_SYMBOL(m68k_mmutype);
+#ifdef CONFIG_VME
+unsigned long vme_brdtype;
+EXPORT_SYMBOL(vme_brdtype);
+#endif
+
+int m68k_is040or060;
+EXPORT_SYMBOL(m68k_is040or060);
+
+extern unsigned long availmem;
+
+int m68k_num_memory;
+EXPORT_SYMBOL(m68k_num_memory);
+int m68k_realnum_memory;
+EXPORT_SYMBOL(m68k_realnum_memory);
+unsigned long m68k_memoffset;
+struct mem_info m68k_memory[NUM_MEMINFO];
+EXPORT_SYMBOL(m68k_memory);
+
+struct mem_info m68k_ramdisk;
+
+static char m68k_command_line[CL_SIZE];
+
+void (*mach_sched_init) (irq_handler_t handler) __initdata = NULL;
+/* machine dependent irq functions */
+void (*mach_init_IRQ) (void) __initdata = NULL;
+void (*mach_get_model) (char *model);
+void (*mach_get_hardware_list) (struct seq_file *m);
+/* machine dependent timer functions */
+unsigned long (*mach_gettimeoffset) (void);
+int (*mach_hwclk) (int, struct rtc_time*);
+EXPORT_SYMBOL(mach_hwclk);
+int (*mach_set_clock_mmss) (unsigned long);
+unsigned int (*mach_get_ss)(void);
+int (*mach_get_rtc_pll)(struct rtc_pll_info *);
+int (*mach_set_rtc_pll)(struct rtc_pll_info *);
+EXPORT_SYMBOL(mach_get_ss);
+EXPORT_SYMBOL(mach_get_rtc_pll);
+EXPORT_SYMBOL(mach_set_rtc_pll);
+void (*mach_reset)( void );
+void (*mach_halt)( void );
+void (*mach_power_off)( void );
+long mach_max_dma_address = 0x00ffffff; /* default set to the lower 16MB */
+#ifdef CONFIG_HEARTBEAT
+void (*mach_heartbeat) (int);
+EXPORT_SYMBOL(mach_heartbeat);
+#endif
+#ifdef CONFIG_M68K_L2_CACHE
+void (*mach_l2_flush) (int);
+#endif
+#if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE)
+void (*mach_beep)(unsigned int, unsigned int);
+EXPORT_SYMBOL(mach_beep);
+#endif
+#if defined(CONFIG_ISA) && defined(MULTI_ISA)
+int isa_type;
+int isa_sex;
+EXPORT_SYMBOL(isa_type);
+EXPORT_SYMBOL(isa_sex);
+#endif
+
+extern int amiga_parse_bootinfo(const struct bi_record *);
+extern int atari_parse_bootinfo(const struct bi_record *);
+extern int mac_parse_bootinfo(const struct bi_record *);
+extern int q40_parse_bootinfo(const struct bi_record *);
+extern int bvme6000_parse_bootinfo(const struct bi_record *);
+extern int mvme16x_parse_bootinfo(const struct bi_record *);
+extern int mvme147_parse_bootinfo(const struct bi_record *);
+extern int hp300_parse_bootinfo(const struct bi_record *);
+extern int apollo_parse_bootinfo(const struct bi_record *);
+
+extern void config_amiga(void);
+extern void config_atari(void);
+extern void config_mac(void);
+extern void config_sun3(void);
+extern void config_apollo(void);
+extern void config_mvme147(void);
+extern void config_mvme16x(void);
+extern void config_bvme6000(void);
+extern void config_hp300(void);
+extern void config_q40(void);
+extern void config_sun3x(void);
+
+#define MASK_256K 0xfffc0000
+
+extern void paging_init(void);
+
+static void __init m68k_parse_bootinfo(const struct bi_record *record)
+{
+        while (record->tag != BI_LAST) {
+                int unknown = 0;
+                const unsigned long *data = record->data;
+
+                switch (record->tag) {
+                case BI_MACHTYPE:
+                case BI_CPUTYPE:
+                case BI_FPUTYPE:
+                case BI_MMUTYPE:
+                        /* Already set up by head.S */
+                        break;
+
+                case BI_MEMCHUNK:
+                        if (m68k_num_memory < NUM_MEMINFO) {
+                                m68k_memory[m68k_num_memory].addr = data[0];
+                                m68k_memory[m68k_num_memory].size = data[1];
+                                m68k_num_memory++;
+                        } else
+                                printk("m68k_parse_bootinfo: too many memory chunks\n");
+                        break;
+
+                case BI_RAMDISK:
+                        m68k_ramdisk.addr = data[0];
+                        m68k_ramdisk.size = data[1];
+                        break;
+
+                case BI_COMMAND_LINE:
+                        strlcpy(m68k_command_line, (const char *)data,
+                                sizeof(m68k_command_line));
+                        break;
+
+                default:
+                        if (MACH_IS_AMIGA)
+                                unknown = amiga_parse_bootinfo(record);
+                        else if (MACH_IS_ATARI)
+                                unknown = atari_parse_bootinfo(record);
+                        else if (MACH_IS_MAC)
+                                unknown = mac_parse_bootinfo(record);
+                        else if (MACH_IS_Q40)
+                                unknown = q40_parse_bootinfo(record);
+                        else if (MACH_IS_BVME6000)
+                                unknown = bvme6000_parse_bootinfo(record);
+                        else if (MACH_IS_MVME16x)
+                                unknown = mvme16x_parse_bootinfo(record);
+                        else if (MACH_IS_MVME147)
+                                unknown = mvme147_parse_bootinfo(record);
+                        else if (MACH_IS_HP300)
+                                unknown = hp300_parse_bootinfo(record);
+                        else if (MACH_IS_APOLLO)
+                                unknown = apollo_parse_bootinfo(record);
+                        else
+                                unknown = 1;
+                }
+                if (unknown)
+                        printk("m68k_parse_bootinfo: unknown tag 0x%04x ignored\n",
+                               record->tag);
+                record = (struct bi_record *)((unsigned long)record +
+                                              record->size);
+        }
+
+        m68k_realnum_memory = m68k_num_memory;
+#ifdef CONFIG_SINGLE_MEMORY_CHUNK
+        if (m68k_num_memory > 1) {
+                printk("Ignoring last %i chunks of physical memory\n",
+                       (m68k_num_memory - 1));
+                m68k_num_memory = 1;
+        }
+#endif
+}
+
+void __init setup_arch(char **cmdline_p)
+{
+        int i;
+
+        /* The bootinfo is located right after the kernel bss */
+        m68k_parse_bootinfo((const struct bi_record *)_end);
+
+        if (CPU_IS_040)
+                m68k_is040or060 = 4;
+        else if (CPU_IS_060)
+                m68k_is040or060 = 6;
+
+        /* FIXME: m68k_fputype is passed in by Penguin booter, which can
+         * be confused by software FPU emulation. BEWARE.
+         * We should really do our own FPU check at startup.
+         * [what do we do with buggy 68LC040s? if we have problems
+         *  with them, we should add a test to check_bugs() below] */
+#ifndef CONFIG_M68KFPU_EMU_ONLY
+        /* clear the fpu if we have one */
+        if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) {
+                volatile int zero = 0;
+                asm volatile ("frestore %0" : : "m" (zero));
+        }
+#endif
+
+        if (CPU_IS_060) {
+                u32 pcr;
+
+                asm (".chip 68060; movec %%pcr,%0; .chip 68k"
+                     : "=d" (pcr));
+                if (((pcr >> 8) & 0xff) <= 5) {
+                        printk("Enabling workaround for errata I14\n");
+                        asm (".chip 68060; movec %0,%%pcr; .chip 68k"
+                             : : "d" (pcr | 0x20));
+                }
+        }
+
+        init_mm.start_code = PAGE_OFFSET;
+        init_mm.end_code = (unsigned long)_etext;
+        init_mm.end_data = (unsigned long)_edata;
+        init_mm.brk = (unsigned long)_end;
+
+        *cmdline_p = m68k_command_line;
+        memcpy(boot_command_line, *cmdline_p, CL_SIZE);
+
+        parse_early_param();
+
+#ifdef CONFIG_DUMMY_CONSOLE
+        conswitchp = &dummy_con;
+#endif
+
+        switch (m68k_machtype) {
+#ifdef CONFIG_AMIGA
+        case MACH_AMIGA:
+                config_amiga();
+                break;
+#endif
+#ifdef CONFIG_ATARI
+        case MACH_ATARI:
+                config_atari();
+                break;
+#endif
+#ifdef CONFIG_MAC
+        case MACH_MAC:
+                config_mac();
+                break;
+#endif
+#ifdef CONFIG_SUN3
+        case MACH_SUN3:
+                config_sun3();
+                break;
+#endif
+#ifdef CONFIG_APOLLO
+        case MACH_APOLLO:
+                config_apollo();
+                break;
+#endif
+#ifdef CONFIG_MVME147
+        case MACH_MVME147:
+                config_mvme147();
+                break;
+#endif
+#ifdef CONFIG_MVME16x
+        case MACH_MVME16x:
+                config_mvme16x();
+                break;
+#endif
+#ifdef CONFIG_BVME6000
+        case MACH_BVME6000:
+                config_bvme6000();
+                break;
+#endif
+#ifdef CONFIG_HP300
+        case MACH_HP300:
+                config_hp300();
+                break;
+#endif
+#ifdef CONFIG_Q40
+        case MACH_Q40:
+                config_q40();
+                break;
+#endif
+#ifdef CONFIG_SUN3X
+        case MACH_SUN3X:
+                config_sun3x();
+                break;
+#endif
+        default:
+                panic("No configuration setup");
+        }
+
+#ifdef CONFIG_NATFEAT
+        nf_init();
+#endif
+
+        paging_init();
+
+#ifndef CONFIG_SUN3
+        for (i = 1; i < m68k_num_memory; i++)
+                free_bootmem_node(NODE_DATA(i), m68k_memory[i].addr,
+                                  m68k_memory[i].size);
+#ifdef CONFIG_BLK_DEV_INITRD
+        if (m68k_ramdisk.size) {
+                reserve_bootmem_node(__virt_to_node(phys_to_virt(m68k_ramdisk.addr)),
+                                     m68k_ramdisk.addr, m68k_ramdisk.size,
+                                     BOOTMEM_DEFAULT);
+                initrd_start = (unsigned long)phys_to_virt(m68k_ramdisk.addr);
+                initrd_end = initrd_start + m68k_ramdisk.size;
+                printk("initrd: %08lx - %08lx\n", initrd_start, initrd_end);
+        }
+#endif
+
+#ifdef CONFIG_ATARI
+        if (MACH_IS_ATARI)
+                atari_stram_reserve_pages((void *)availmem);
+#endif
+#ifdef CONFIG_SUN3X
+        if (MACH_IS_SUN3X) {
+                dvma_init();
+        }
+#endif
+
+#endif /* !CONFIG_SUN3 */
+
+/* set ISA defs early as possible */
+#if defined(CONFIG_ISA) && defined(MULTI_ISA)
+        if (MACH_IS_Q40) {
+                isa_type = ISA_TYPE_Q40;
+                isa_sex = 0;
+        }
+#ifdef CONFIG_AMIGA_PCMCIA
+        if (MACH_IS_AMIGA && AMIGAHW_PRESENT(PCMCIA)) {
+                isa_type = ISA_TYPE_AG;
+                isa_sex = 1;
+        }
+#endif
+#endif
+}
+
+static int show_cpuinfo(struct seq_file *m, void *v)
+{
+        const char *cpu, *mmu, *fpu;
+        unsigned long clockfreq, clockfactor;
+
+#define LOOP_CYCLES_68020       (8)
+#define LOOP_CYCLES_68030       (8)
+#define LOOP_CYCLES_68040       (3)
+#define LOOP_CYCLES_68060       (1)
+
+        if (CPU_IS_020) {
+                cpu = "68020";
+                clockfactor = LOOP_CYCLES_68020;
+        } else if (CPU_IS_030) {
+                cpu = "68030";
+                clockfactor = LOOP_CYCLES_68030;
+        } else if (CPU_IS_040) {
+                cpu = "68040";
+                clockfactor = LOOP_CYCLES_68040;
+        } else if (CPU_IS_060) {
+                cpu = "68060";
+                clockfactor = LOOP_CYCLES_68060;
+        } else {
+                cpu = "680x0";
+                clockfactor = 0;
+        }
+
+#ifdef CONFIG_M68KFPU_EMU_ONLY
+        fpu = "none(soft float)";
+#else
+        if (m68k_fputype & FPU_68881)
+                fpu = "68881";
+        else if (m68k_fputype & FPU_68882)
+                fpu = "68882";
+        else if (m68k_fputype & FPU_68040)
+                fpu = "68040";
+        else if (m68k_fputype & FPU_68060)
+                fpu = "68060";
+        else if (m68k_fputype & FPU_SUNFPA)
+                fpu = "Sun FPA";
+        else
+                fpu = "none";
+#endif
+
+        if (m68k_mmutype & MMU_68851)
+                mmu = "68851";
+        else if (m68k_mmutype & MMU_68030)
+                mmu = "68030";
+        else if (m68k_mmutype & MMU_68040)
+                mmu = "68040";
+        else if (m68k_mmutype & MMU_68060)
+                mmu = "68060";
+        else if (m68k_mmutype & MMU_SUN3)
+                mmu = "Sun-3";
+        else if (m68k_mmutype & MMU_APOLLO)
+                mmu = "Apollo";
+        else
+                mmu = "unknown";
+
+        clockfreq = loops_per_jiffy * HZ * clockfactor;
+
+        seq_printf(m, "CPU:\t\t%s\n"
+                   "MMU:\t\t%s\n"
+                   "FPU:\t\t%s\n"
+                   "Clocking:\t%lu.%1luMHz\n"
+                   "BogoMips:\t%lu.%02lu\n"
+                   "Calibration:\t%lu loops\n",
+                   cpu, mmu, fpu,
+                   clockfreq/1000000,(clockfreq/100000)%10,
+                   loops_per_jiffy/(500000/HZ),(loops_per_jiffy/(5000/HZ))%100,
+                   loops_per_jiffy);
+        return 0;
+}
+
+static void *c_start(struct seq_file *m, loff_t *pos)
+{
+        return *pos < 1 ? (void *)1 : NULL;
+}
+static void *c_next(struct seq_file *m, void *v, loff_t *pos)
+{
+        ++*pos;
+        return NULL;
+}
+static void c_stop(struct seq_file *m, void *v)
+{
+}
+const struct seq_operations cpuinfo_op = {
+        .start  = c_start,
+        .next   = c_next,
+        .stop   = c_stop,
+        .show   = show_cpuinfo,
+};
+
+#ifdef CONFIG_PROC_HARDWARE
+static int hardware_proc_show(struct seq_file *m, void *v)
+{
+        char model[80];
+        unsigned long mem;
+        int i;
+
+        if (mach_get_model)
+                mach_get_model(model);
+        else
+                strcpy(model, "Unknown m68k");
+
+        seq_printf(m, "Model:\t\t%s\n", model);
+        for (mem = 0, i = 0; i < m68k_num_memory; i++)
+                mem += m68k_memory[i].size;
+        seq_printf(m, "System Memory:\t%ldK\n", mem >> 10);
+
+        if (mach_get_hardware_list)
+                mach_get_hardware_list(m);
+
+        return 0;
+}
+
+static int hardware_proc_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, hardware_proc_show, NULL);
+}
+
+static const struct file_operations hardware_proc_fops = {
+        .open           = hardware_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int __init proc_hardware_init(void)
+{
+        proc_create("hardware", 0, NULL, &hardware_proc_fops);
+        return 0;
+}
+module_init(proc_hardware_init);
+#endif
+
+void check_bugs(void)
+{
+#ifndef CONFIG_M68KFPU_EMU
+        if (m68k_fputype == 0) {
+                printk(KERN_EMERG "*** YOU DO NOT HAVE A FLOATING POINT UNIT, "
+                        "WHICH IS REQUIRED BY LINUX/M68K ***\n");
+                printk(KERN_EMERG "Upgrade your hardware or join the FPU "
+                        "emulation project\n");
+                panic("no FPU");
+        }
+#endif /* !CONFIG_M68KFPU_EMU */
+}
+
+#ifdef CONFIG_ADB
+static int __init adb_probe_sync_enable (char *str) {
+        extern int __adb_probe_sync;
+        __adb_probe_sync = 1;
+        return 1;
+}
+
+__setup("adb_sync", adb_probe_sync_enable);
+#endif /* CONFIG_ADB */
diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c
new file mode 100644
index 000000000000..16b2de7f5101
--- /dev/null
+++ b/arch/m68k/kernel/setup_no.c
@@ -0,0 +1,317 @@
+/*
+ *  linux/arch/m68knommu/kernel/setup.c
+ *
+ *  Copyright (C) 1999-2007  Greg Ungerer (gerg@snapgear.com)
+ *  Copyright (C) 1998,1999  D. Jeff Dionne <jeff@uClinux.org>
+ *  Copyleft  ()) 2000       James D. Schettine {james@telos-systems.com}
+ *  Copyright (C) 1998       Kenneth Albanowski <kjahds@kjahds.com>
+ *  Copyright (C) 1995       Hamish Macdonald
+ *  Copyright (C) 2000       Lineo Inc. (www.lineo.com)
+ *  Copyright (C) 2001       Lineo, Inc. <www.lineo.com>
+ *
+ *  68VZ328 Fixes/support    Evan Stawnyczy <e@lineo.ca>
+ */
+
+/*
+ * This file handles the architecture-dependent parts of system setup
+ */
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/fb.h>
+#include <linux/module.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/bootmem.h>
+#include <linux/seq_file.h>
+#include <linux/init.h>
+#include <linux/initrd.h>
+#include <linux/root_dev.h>
+
+#include <asm/setup.h>
+#include <asm/irq.h>
+#include <asm/machdep.h>
+#include <asm/pgtable.h>
+
+unsigned long memory_start;
+unsigned long memory_end;
+
+EXPORT_SYMBOL(memory_start);
+EXPORT_SYMBOL(memory_end);
+
+char __initdata command_line[COMMAND_LINE_SIZE];
+
+/* machine dependent timer functions */
+void (*mach_gettod)(int*, int*, int*, int*, int*, int*);
+int (*mach_set_clock_mmss)(unsigned long);
+
+/* machine dependent reboot functions */
+void (*mach_reset)(void);
+void (*mach_halt)(void);
+void (*mach_power_off)(void);
+
+#ifdef CONFIG_M68328
+#define CPU_NAME        "MC68328"
+#endif
+#ifdef CONFIG_M68EZ328
+#define CPU_NAME        "MC68EZ328"
+#endif
+#ifdef CONFIG_M68VZ328
+#define CPU_NAME        "MC68VZ328"
+#endif
+#ifdef CONFIG_M68360
+#define CPU_NAME        "MC68360"
+#endif
+#ifndef CPU_NAME
+#define CPU_NAME        "UNKNOWN"
+#endif
+
+/*
+ * Different cores have different instruction execution timings.
+ * The old/traditional 68000 cores are basically all the same, at 16.
+ * The ColdFire cores vary a little, their values are defined in their
+ * headers. We default to the standard 68000 value here.
+ */
+#ifndef CPU_INSTR_PER_JIFFY
+#define CPU_INSTR_PER_JIFFY     16
+#endif
+
+extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
+extern int _ramstart, _ramend;
+
+#if defined(CONFIG_UBOOT)
+/*
+ * parse_uboot_commandline
+ *
+ * Copies u-boot commandline arguments and store them in the proper linux
+ * variables.
+ *
+ * Assumes:
+ *      _init_sp global contains the address in the stack pointer when the
+ *      kernel starts (see head.S::_start)
+ *
+ *      U-Boot calling convention:
+ *      (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
+ *
+ *      _init_sp can be parsed as such
+ *
+ *      _init_sp+00 = u-boot cmd after jsr into kernel (skip)
+ *      _init_sp+04 = &kernel board_info (residual data)
+ *      _init_sp+08 = &initrd_start
+ *      _init_sp+12 = &initrd_end
+ *      _init_sp+16 = &cmd_start
+ *      _init_sp+20 = &cmd_end
+ *
+ *      This also assumes that the memory locations pointed to are still
+ *      unmodified. U-boot places them near the end of external SDRAM.
+ *
+ * Argument(s):
+ *      commandp = the linux commandline arg container to fill.
+ *      size     = the sizeof commandp.
+ *
+ * Returns:
+ */
+void parse_uboot_commandline(char *commandp, int size)
+{
+        extern unsigned long _init_sp;
+        unsigned long *sp;
+        unsigned long uboot_kbd;
+        unsigned long uboot_initrd_start, uboot_initrd_end;
+        unsigned long uboot_cmd_start, uboot_cmd_end;
+
+
+        sp = (unsigned long *)_init_sp;
+        uboot_kbd = sp[1];
+        uboot_initrd_start = sp[2];
+        uboot_initrd_end = sp[3];
+        uboot_cmd_start = sp[4];
+        uboot_cmd_end = sp[5];
+
+        if (uboot_cmd_start && uboot_cmd_end)
+                strncpy(commandp, (const char *)uboot_cmd_start, size);
+#if defined(CONFIG_BLK_DEV_INITRD)
+        if (uboot_initrd_start && uboot_initrd_end &&
+                (uboot_initrd_end > uboot_initrd_start)) {
+                initrd_start = uboot_initrd_start;
+                initrd_end = uboot_initrd_end;
+                ROOT_DEV = Root_RAM0;
+                printk(KERN_INFO "initrd at 0x%lx:0x%lx\n",
+                        initrd_start, initrd_end);
+        }
+#endif /* if defined(CONFIG_BLK_DEV_INITRD) */
+}
+#endif /* #if defined(CONFIG_UBOOT) */
+
+void __init setup_arch(char **cmdline_p)
+{
+        int bootmap_size;
+
+        memory_start = PAGE_ALIGN(_ramstart);
+        memory_end = _ramend;
+
+        init_mm.start_code = (unsigned long) &_stext;
+        init_mm.end_code = (unsigned long) &_etext;
+        init_mm.end_data = (unsigned long) &_edata;
+        init_mm.brk = (unsigned long) 0;
+
+        config_BSP(&command_line[0], sizeof(command_line));
+
+#if defined(CONFIG_BOOTPARAM)
+        strncpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line));
+        command_line[sizeof(command_line) - 1] = 0;
+#endif /* CONFIG_BOOTPARAM */
+
+#if defined(CONFIG_UBOOT)
+        /* CONFIG_UBOOT and CONFIG_BOOTPARAM defined, concatenate cmdline */
+        #if defined(CONFIG_BOOTPARAM)
+                /* Add the whitespace separator */
+                command_line[strlen(CONFIG_BOOTPARAM_STRING)] = ' ';
+                /* Parse uboot command line into the rest of the buffer */
+                parse_uboot_commandline(
+                        &command_line[(strlen(CONFIG_BOOTPARAM_STRING)+1)],
+                        (sizeof(command_line) -
+                        (strlen(CONFIG_BOOTPARAM_STRING)+1)));
+        /* Only CONFIG_UBOOT defined, create cmdline */
+        #else
+                parse_uboot_commandline(&command_line[0], sizeof(command_line));
+        #endif /* CONFIG_BOOTPARAM */
+        command_line[sizeof(command_line) - 1] = 0;
+#endif /* CONFIG_UBOOT */
+
+        printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU_NAME "\n");
+
+#ifdef CONFIG_UCDIMM
+        printk(KERN_INFO "uCdimm by Lineo, Inc. <www.lineo.com>\n");
+#endif
+#ifdef CONFIG_M68VZ328
+        printk(KERN_INFO "M68VZ328 support by Evan Stawnyczy <e@lineo.ca>\n");
+#endif
+#ifdef CONFIG_COLDFIRE
+        printk(KERN_INFO "COLDFIRE port done by Greg Ungerer, gerg@snapgear.com\n");
+#ifdef CONFIG_M5307
+        printk(KERN_INFO "Modified for M5307 by Dave Miller, dmiller@intellistor.com\n");
+#endif
+#ifdef CONFIG_ELITE
+        printk(KERN_INFO "Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n");
+#endif
+#endif
+        printk(KERN_INFO "Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");
+
+#if defined( CONFIG_PILOT ) && defined( CONFIG_M68328 )
+        printk(KERN_INFO "TRG SuperPilot FLASH card support <info@trgnet.com>\n");
+#endif
+#if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 )
+        printk(KERN_INFO "PalmV support by Lineo Inc. <jeff@uclinux.com>\n");
+#endif
+#if defined (CONFIG_M68360)
+        printk(KERN_INFO "QUICC port done by SED Systems <hamilton@sedsystems.ca>,\n");
+        printk(KERN_INFO "based on 2.0.38 port by Lineo Inc. <mleslie@lineo.com>.\n");
+#endif
+#ifdef CONFIG_DRAGEN2
+        printk(KERN_INFO "DragonEngine II board support by Georges Menie\n");
+#endif
+#ifdef CONFIG_M5235EVB
+        printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
+#endif
+
+        pr_debug("KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
+                 "BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext,
+                 (int) &_sdata, (int) &_edata,
+                 (int) &_sbss, (int) &_ebss);
+        pr_debug("MEMORY -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x\n ",
+                 (int) &_ebss, (int) memory_start,
+                 (int) memory_start, (int) memory_end);
+
+        /* Keep a copy of command line */
+        *cmdline_p = &command_line[0];
+        memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
+        boot_command_line[COMMAND_LINE_SIZE-1] = 0;
+
+#if defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_DUMMY_CONSOLE)
+        conswitchp = &dummy_con;
+#endif
+
+        /*
+         * Give all the memory to the bootmap allocator, tell it to put the
+         * boot mem_map at the start of memory.
+         */
+        bootmap_size = init_bootmem_node(
+                        NODE_DATA(0),
+                        memory_start >> PAGE_SHIFT, /* map goes here */
+                        PAGE_OFFSET >> PAGE_SHIFT,      /* 0 on coldfire */
+                        memory_end >> PAGE_SHIFT);
+        /*
+         * Free the usable memory, we have to make sure we do not free
+         * the bootmem bitmap so we then reserve it after freeing it :-)
+         */
+        free_bootmem(memory_start, memory_end - memory_start);
+        reserve_bootmem(memory_start, bootmap_size, BOOTMEM_DEFAULT);
+
+#if defined(CONFIG_UBOOT) && defined(CONFIG_BLK_DEV_INITRD)
+        if ((initrd_start > 0) && (initrd_start < initrd_end) &&
+                        (initrd_end < memory_end))
+                reserve_bootmem(initrd_start, initrd_end - initrd_start,
+                                 BOOTMEM_DEFAULT);
+#endif /* if defined(CONFIG_BLK_DEV_INITRD) */
+
+        /*
+         * Get kmalloc into gear.
+         */
+        paging_init();
+}
+
+/*
+ *      Get CPU information for use by the procfs.
+ */
+static int show_cpuinfo(struct seq_file *m, void *v)
+{
+        char *cpu, *mmu, *fpu;
+        u_long clockfreq;
+
+        cpu = CPU_NAME;
+        mmu = "none";
+        fpu = "none";
+        clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
+
+        seq_printf(m, "CPU:\t\t%s\n"
+                      "MMU:\t\t%s\n"
+                      "FPU:\t\t%s\n"
+                      "Clocking:\t%lu.%1luMHz\n"
+                      "BogoMips:\t%lu.%02lu\n"
+                      "Calibration:\t%lu loops\n",
+                      cpu, mmu, fpu,
+                      clockfreq / 1000000,
+                      (clockfreq / 100000) % 10,
+                      (loops_per_jiffy * HZ) / 500000,
+                      ((loops_per_jiffy * HZ) / 5000) % 100,
+                      (loops_per_jiffy * HZ));
+
+        return 0;
+}
+
+static void *c_start(struct seq_file *m, loff_t *pos)
+{
+        return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL;
+}
+
+static void *c_next(struct seq_file *m, void *v, loff_t *pos)
+{
+        ++*pos;
+        return c_start(m, pos);
+}
+
+static void c_stop(struct seq_file *m, void *v)
+{
+}
+
+const struct seq_operations cpuinfo_op = {
+        .start  = c_start,
+        .next   = c_next,
+        .stop   = c_stop,
+        .show   = show_cpuinfo,
+};
+
diff --git a/arch/m68k/kernel/signal.c b/arch/m68k/kernel/signal.c
index a0afc239304e..2e25713e2ead 100644
--- a/arch/m68k/kernel/signal.c
+++ b/arch/m68k/kernel/signal.c
@@ -1,1017 +1,5 @@
-/*
- *  linux/arch/m68k/kernel/signal.c
- *
- *  Copyright (C) 1991, 1992  Linus Torvalds
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-/*
- * Linux/m68k support by Hamish Macdonald
- *
- * 68060 fixes by Jesper Skov
- *
- * 1997-12-01  Modified for POSIX.1b signals by Andreas Schwab
- *
- * mathemu support by Roman Zippel
- *  (Note: fpstate in the signal context is completely ignored for the emulator
- *         and the internal floating point format is put on stack)
- */
-
-/*
- * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
- * Atari :-) Current limitation: Only one sigstack can be active at one time.
- * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
- * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
- * signal handlers!
- */
-
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/signal.h>
-#include <linux/syscalls.h>
-#include <linux/errno.h>
-#include <linux/wait.h>
-#include <linux/ptrace.h>
-#include <linux/unistd.h>
-#include <linux/stddef.h>
-#include <linux/highuid.h>
-#include <linux/personality.h>
-#include <linux/tty.h>
-#include <linux/binfmts.h>
-#include <linux/module.h>
-
-#include <asm/setup.h>
-#include <asm/uaccess.h>
-#include <asm/pgtable.h>
-#include <asm/traps.h>
-#include <asm/ucontext.h>
-
-#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
-
-static const int frame_extra_sizes[16] = {
-  [1]   = -1, /* sizeof(((struct frame *)0)->un.fmt1), */
-  [2]   = sizeof(((struct frame *)0)->un.fmt2),
-  [3]   = sizeof(((struct frame *)0)->un.fmt3),
-  [4]   = sizeof(((struct frame *)0)->un.fmt4),
-  [5]   = -1, /* sizeof(((struct frame *)0)->un.fmt5), */
-  [6]   = -1, /* sizeof(((struct frame *)0)->un.fmt6), */
-  [7]   = sizeof(((struct frame *)0)->un.fmt7),
-  [8]   = -1, /* sizeof(((struct frame *)0)->un.fmt8), */
-  [9]   = sizeof(((struct frame *)0)->un.fmt9),
-  [10]  = sizeof(((struct frame *)0)->un.fmta),
-  [11]  = sizeof(((struct frame *)0)->un.fmtb),
-  [12]  = -1, /* sizeof(((struct frame *)0)->un.fmtc), */
-  [13]  = -1, /* sizeof(((struct frame *)0)->un.fmtd), */
-  [14]  = -1, /* sizeof(((struct frame *)0)->un.fmte), */
-  [15]  = -1, /* sizeof(((struct frame *)0)->un.fmtf), */
-};
-
-int handle_kernel_fault(struct pt_regs *regs)
-{
-        const struct exception_table_entry *fixup;
-        struct pt_regs *tregs;
-
-        /* Are we prepared to handle this kernel fault? */
-        fixup = search_exception_tables(regs->pc);
-        if (!fixup)
-                return 0;
-
-        /* Create a new four word stack frame, discarding the old one. */
-        regs->stkadj = frame_extra_sizes[regs->format];
-        tregs = (struct pt_regs *)((long)regs + regs->stkadj);
-        tregs->vector = regs->vector;
-        tregs->format = 0;
-        tregs->pc = fixup->fixup;
-        tregs->sr = regs->sr;
-
-        return 1;
-}
-
-/*
- * Atomically swap in the new signal mask, and wait for a signal.
- */
-asmlinkage int
-sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
-{
-        mask &= _BLOCKABLE;
-        spin_lock_irq(&current->sighand->siglock);
-        current->saved_sigmask = current->blocked;
-        siginitset(&current->blocked, mask);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
-
-        current->state = TASK_INTERRUPTIBLE;
-        schedule();
-        set_restore_sigmask();
-
-        return -ERESTARTNOHAND;
-}
-
-asmlinkage int
-sys_sigaction(int sig, const struct old_sigaction __user *act,
-              struct old_sigaction __user *oact)
-{
-        struct k_sigaction new_ka, old_ka;
-        int ret;
-
-        if (act) {
-                old_sigset_t mask;
-                if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
-                    __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
-                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
-                    __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
-                    __get_user(mask, &act->sa_mask))
-                        return -EFAULT;
-                siginitset(&new_ka.sa.sa_mask, mask);
-        }
-
-        ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
-
-        if (!ret && oact) {
-                if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
-                    __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
-                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
-                    __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
-                    __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
-                        return -EFAULT;
-        }
-
-        return ret;
-}
-
-asmlinkage int
-sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
-{
-        return do_sigaltstack(uss, uoss, rdusp());
-}
-
-
-/*
- * Do a signal return; undo the signal stack.
- *
- * Keep the return code on the stack quadword aligned!
- * That makes the cache flush below easier.
- */
-
-struct sigframe
-{
-        char __user *pretcode;
-        int sig;
-        int code;
-        struct sigcontext __user *psc;
-        char retcode[8];
-        unsigned long extramask[_NSIG_WORDS-1];
-        struct sigcontext sc;
-};
-
-struct rt_sigframe
-{
-        char __user *pretcode;
-        int sig;
-        struct siginfo __user *pinfo;
-        void __user *puc;
-        char retcode[8];
-        struct siginfo info;
-        struct ucontext uc;
-};
-
-
-static unsigned char fpu_version;       /* version number of fpu, set by setup_frame */
-
-static inline int restore_fpu_state(struct sigcontext *sc)
-{
-        int err = 1;
-
-        if (FPU_IS_EMU) {
-            /* restore registers */
-            memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
-            memcpy(current->thread.fp, sc->sc_fpregs, 24);
-            return 0;
-        }
-
-        if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
-            /* Verify the frame format.  */
-            if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version))
-                goto out;
-            if (CPU_IS_020_OR_030) {
-                if (m68k_fputype & FPU_68881 &&
-                    !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4))
-                    goto out;
-                if (m68k_fputype & FPU_68882 &&
-                    !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4))
-                    goto out;
-            } else if (CPU_IS_040) {
-                if (!(sc->sc_fpstate[1] == 0x00 ||
-                      sc->sc_fpstate[1] == 0x28 ||
-                      sc->sc_fpstate[1] == 0x60))
-                    goto out;
-            } else if (CPU_IS_060) {
-                if (!(sc->sc_fpstate[3] == 0x00 ||
-                      sc->sc_fpstate[3] == 0x60 ||
-                      sc->sc_fpstate[3] == 0xe0))
-                    goto out;
-            } else
-                goto out;
-
-            __asm__ volatile (".chip 68k/68881\n\t"
-                              "fmovemx %0,%%fp0-%%fp1\n\t"
-                              "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
-                              ".chip 68k"
-                              : /* no outputs */
-                              : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
-        }
-        __asm__ volatile (".chip 68k/68881\n\t"
-                          "frestore %0\n\t"
-                          ".chip 68k" : : "m" (*sc->sc_fpstate));
-        err = 0;
-
-out:
-        return err;
-}
-
-#define FPCONTEXT_SIZE  216
-#define uc_fpstate      uc_filler[0]
-#define uc_formatvec    uc_filler[FPCONTEXT_SIZE/4]
-#define uc_extra        uc_filler[FPCONTEXT_SIZE/4+1]
-
-static inline int rt_restore_fpu_state(struct ucontext __user *uc)
-{
-        unsigned char fpstate[FPCONTEXT_SIZE];
-        int context_size = CPU_IS_060 ? 8 : 0;
-        fpregset_t fpregs;
-        int err = 1;
-
-        if (FPU_IS_EMU) {
-                /* restore fpu control register */
-                if (__copy_from_user(current->thread.fpcntl,
-                                uc->uc_mcontext.fpregs.f_fpcntl, 12))
-                        goto out;
-                /* restore all other fpu register */
-                if (__copy_from_user(current->thread.fp,
-                                uc->uc_mcontext.fpregs.f_fpregs, 96))
-                        goto out;
-                return 0;
-        }
-
-        if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
-                goto out;
-        if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
-                if (!CPU_IS_060)
-                        context_size = fpstate[1];
-                /* Verify the frame format.  */
-                if (!CPU_IS_060 && (fpstate[0] != fpu_version))
-                        goto out;
-                if (CPU_IS_020_OR_030) {
-                        if (m68k_fputype & FPU_68881 &&
-                            !(context_size == 0x18 || context_size == 0xb4))
-                                goto out;
-                        if (m68k_fputype & FPU_68882 &&
-                            !(context_size == 0x38 || context_size == 0xd4))
-                                goto out;
-                } else if (CPU_IS_040) {
-                        if (!(context_size == 0x00 ||
-                              context_size == 0x28 ||
-                              context_size == 0x60))
-                                goto out;
-                } else if (CPU_IS_060) {
-                        if (!(fpstate[3] == 0x00 ||
-                              fpstate[3] == 0x60 ||
-                              fpstate[3] == 0xe0))
-                                goto out;
-                } else
-                        goto out;
-                if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
-                                     sizeof(fpregs)))
-                        goto out;
-                __asm__ volatile (".chip 68k/68881\n\t"
-                                  "fmovemx %0,%%fp0-%%fp7\n\t"
-                                  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
-                                  ".chip 68k"
-                                  : /* no outputs */
-                                  : "m" (*fpregs.f_fpregs),
-                                    "m" (*fpregs.f_fpcntl));
-        }
-        if (context_size &&
-            __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
-                             context_size))
-                goto out;
-        __asm__ volatile (".chip 68k/68881\n\t"
-                          "frestore %0\n\t"
-                          ".chip 68k" : : "m" (*fpstate));
-        err = 0;
-
-out:
-        return err;
-}
-
-static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
-                               void __user *fp)
-{
-        int fsize = frame_extra_sizes[formatvec >> 12];
-        if (fsize < 0) {
-                /*
-                 * user process trying to return with weird frame format
-                 */
-#ifdef DEBUG
-                printk("user process returning with weird frame format\n");
-#endif
-                return 1;
-        }
-        if (!fsize) {
-                regs->format = formatvec >> 12;
-                regs->vector = formatvec & 0xfff;
-        } else {
-                struct switch_stack *sw = (struct switch_stack *)regs - 1;
-                unsigned long buf[fsize / 2]; /* yes, twice as much */
-
-                /* that'll make sure that expansion won't crap over data */
-                if (copy_from_user(buf + fsize / 4, fp, fsize))
-                        return 1;
-
-                /* point of no return */
-                regs->format = formatvec >> 12;
-                regs->vector = formatvec & 0xfff;
-#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
-                __asm__ __volatile__
-                        ("   movel %0,%/a0\n\t"
-                         "   subl %1,%/a0\n\t"     /* make room on stack */
-                         "   movel %/a0,%/sp\n\t"  /* set stack pointer */
-                         /* move switch_stack and pt_regs */
-                         "1: movel %0@+,%/a0@+\n\t"
-                         "   dbra %2,1b\n\t"
-                         "   lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */
-                         "   lsrl  #2,%1\n\t"
-                         "   subql #1,%1\n\t"
-                         /* copy to the gap we'd made */
-                         "2: movel %4@+,%/a0@+\n\t"
-                         "   dbra %1,2b\n\t"
-                         "   bral ret_from_signal\n"
-                         : /* no outputs, it doesn't ever return */
-                         : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
-                           "n" (frame_offset), "a" (buf + fsize/4)
-                         : "a0");
-#undef frame_offset
-        }
-        return 0;
-}
-
-static inline int
-restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)
-{
-        int formatvec;
-        struct sigcontext context;
-        int err;
-
-        /* Always make any pending restarted system calls return -EINTR */
-        current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
-        /* get previous context */
-        if (copy_from_user(&context, usc, sizeof(context)))
-                goto badframe;
-
-        /* restore passed registers */
-        regs->d0 = context.sc_d0;
-        regs->d1 = context.sc_d1;
-        regs->a0 = context.sc_a0;
-        regs->a1 = context.sc_a1;
-        regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
-        regs->pc = context.sc_pc;
-        regs->orig_d0 = -1;             /* disable syscall checks */
-        wrusp(context.sc_usp);
-        formatvec = context.sc_formatvec;
-
-        err = restore_fpu_state(&context);
-
-        if (err || mangle_kernel_stack(regs, formatvec, fp))
-                goto badframe;
-
-        return 0;
-
-badframe:
-        return 1;
-}
-
-static inline int
-rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
-                    struct ucontext __user *uc)
-{
-        int temp;
-        greg_t __user *gregs = uc->uc_mcontext.gregs;
-        unsigned long usp;
-        int err;
-
-        /* Always make any pending restarted system calls return -EINTR */
-        current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
-        err = __get_user(temp, &uc->uc_mcontext.version);
-        if (temp != MCONTEXT_VERSION)
-                goto badframe;
-        /* restore passed registers */
-        err |= __get_user(regs->d0, &gregs[0]);
-        err |= __get_user(regs->d1, &gregs[1]);
-        err |= __get_user(regs->d2, &gregs[2]);
-        err |= __get_user(regs->d3, &gregs[3]);
-        err |= __get_user(regs->d4, &gregs[4]);
-        err |= __get_user(regs->d5, &gregs[5]);
-        err |= __get_user(sw->d6, &gregs[6]);
-        err |= __get_user(sw->d7, &gregs[7]);
-        err |= __get_user(regs->a0, &gregs[8]);
-        err |= __get_user(regs->a1, &gregs[9]);
-        err |= __get_user(regs->a2, &gregs[10]);
-        err |= __get_user(sw->a3, &gregs[11]);
-        err |= __get_user(sw->a4, &gregs[12]);
-        err |= __get_user(sw->a5, &gregs[13]);
-        err |= __get_user(sw->a6, &gregs[14]);
-        err |= __get_user(usp, &gregs[15]);
-        wrusp(usp);
-        err |= __get_user(regs->pc, &gregs[16]);
-        err |= __get_user(temp, &gregs[17]);
-        regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
-        regs->orig_d0 = -1;             /* disable syscall checks */
-        err |= __get_user(temp, &uc->uc_formatvec);
-
-        err |= rt_restore_fpu_state(uc);
-
-        if (err || do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
-                goto badframe;
-
-        if (mangle_kernel_stack(regs, temp, &uc->uc_extra))
-                goto badframe;
-
-        return 0;
-
-badframe:
-        return 1;
-}
-
-asmlinkage int do_sigreturn(unsigned long __unused)
-{
-        struct switch_stack *sw = (struct switch_stack *) &__unused;
-        struct pt_regs *regs = (struct pt_regs *) (sw + 1);
-        unsigned long usp = rdusp();
-        struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
-        sigset_t set;
-
-        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
-                goto badframe;
-        if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
-            (_NSIG_WORDS > 1 &&
-             __copy_from_user(&set.sig[1], &frame->extramask,
-                              sizeof(frame->extramask))))
-                goto badframe;
-
-        sigdelsetmask(&set, ~_BLOCKABLE);
-        current->blocked = set;
-        recalc_sigpending();
-
-        if (restore_sigcontext(regs, &frame->sc, frame + 1))
-                goto badframe;
-        return regs->d0;
-
-badframe:
-        force_sig(SIGSEGV, current);
-        return 0;
-}
-
-asmlinkage int do_rt_sigreturn(unsigned long __unused)
-{
-        struct switch_stack *sw = (struct switch_stack *) &__unused;
-        struct pt_regs *regs = (struct pt_regs *) (sw + 1);
-        unsigned long usp = rdusp();
-        struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
-        sigset_t set;
-
-        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
-                goto badframe;
-        if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
-                goto badframe;
-
-        sigdelsetmask(&set, ~_BLOCKABLE);
-        current->blocked = set;
-        recalc_sigpending();
-
-        if (rt_restore_ucontext(regs, sw, &frame->uc))
-                goto badframe;
-        return regs->d0;
-
-badframe:
-        force_sig(SIGSEGV, current);
-        return 0;
-}
-
-/*
- * Set up a signal frame.
- */
-
-static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
-{
-        if (FPU_IS_EMU) {
-                /* save registers */
-                memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
-                memcpy(sc->sc_fpregs, current->thread.fp, 24);
-                return;
-        }
-
-        __asm__ volatile (".chip 68k/68881\n\t"
-                          "fsave %0\n\t"
-                          ".chip 68k"
-                          : : "m" (*sc->sc_fpstate) : "memory");
-
-        if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
-                fpu_version = sc->sc_fpstate[0];
-                if (CPU_IS_020_OR_030 &&
-                    regs->vector >= (VEC_FPBRUC * 4) &&
-                    regs->vector <= (VEC_FPNAN * 4)) {
-                        /* Clear pending exception in 68882 idle frame */
-                        if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
-                                sc->sc_fpstate[0x38] |= 1 << 3;
-                }
-                __asm__ volatile (".chip 68k/68881\n\t"
-                                  "fmovemx %%fp0-%%fp1,%0\n\t"
-                                  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
-                                  ".chip 68k"
-                                  : "=m" (*sc->sc_fpregs),
-                                    "=m" (*sc->sc_fpcntl)
-                                  : /* no inputs */
-                                  : "memory");
-        }
-}
-
-static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
-{
-        unsigned char fpstate[FPCONTEXT_SIZE];
-        int context_size = CPU_IS_060 ? 8 : 0;
-        int err = 0;
-
-        if (FPU_IS_EMU) {
-                /* save fpu control register */
-                err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
-                                current->thread.fpcntl, 12);
-                /* save all other fpu register */
-                err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
-                                current->thread.fp, 96);
-                return err;
-        }
-
-        __asm__ volatile (".chip 68k/68881\n\t"
-                          "fsave %0\n\t"
-                          ".chip 68k"
-                          : : "m" (*fpstate) : "memory");
-
-        err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
-        if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
-                fpregset_t fpregs;
-                if (!CPU_IS_060)
-                        context_size = fpstate[1];
-                fpu_version = fpstate[0];
-                if (CPU_IS_020_OR_030 &&
-                    regs->vector >= (VEC_FPBRUC * 4) &&
-                    regs->vector <= (VEC_FPNAN * 4)) {
-                        /* Clear pending exception in 68882 idle frame */
-                        if (*(unsigned short *) fpstate == 0x1f38)
-                                fpstate[0x38] |= 1 << 3;
-                }
-                __asm__ volatile (".chip 68k/68881\n\t"
-                                  "fmovemx %%fp0-%%fp7,%0\n\t"
-                                  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
-                                  ".chip 68k"
-                                  : "=m" (*fpregs.f_fpregs),
-                                    "=m" (*fpregs.f_fpcntl)
-                                  : /* no inputs */
-                                  : "memory");
-                err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
-                                    sizeof(fpregs));
-        }
-        if (context_size)
-                err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
-                                    context_size);
-        return err;
-}
-
-static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
-                             unsigned long mask)
-{
-        sc->sc_mask = mask;
-        sc->sc_usp = rdusp();
-        sc->sc_d0 = regs->d0;
-        sc->sc_d1 = regs->d1;
-        sc->sc_a0 = regs->a0;
-        sc->sc_a1 = regs->a1;
-        sc->sc_sr = regs->sr;
-        sc->sc_pc = regs->pc;
-        sc->sc_formatvec = regs->format << 12 | regs->vector;
-        save_fpu_state(sc, regs);
-}
-
-static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
-{
-        struct switch_stack *sw = (struct switch_stack *)regs - 1;
-        greg_t __user *gregs = uc->uc_mcontext.gregs;
-        int err = 0;
-
-        err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
-        err |= __put_user(regs->d0, &gregs[0]);
-        err |= __put_user(regs->d1, &gregs[1]);
-        err |= __put_user(regs->d2, &gregs[2]);
-        err |= __put_user(regs->d3, &gregs[3]);
-        err |= __put_user(regs->d4, &gregs[4]);
-        err |= __put_user(regs->d5, &gregs[5]);
-        err |= __put_user(sw->d6, &gregs[6]);
-        err |= __put_user(sw->d7, &gregs[7]);
-        err |= __put_user(regs->a0, &gregs[8]);
-        err |= __put_user(regs->a1, &gregs[9]);
-        err |= __put_user(regs->a2, &gregs[10]);
-        err |= __put_user(sw->a3, &gregs[11]);
-        err |= __put_user(sw->a4, &gregs[12]);
-        err |= __put_user(sw->a5, &gregs[13]);
-        err |= __put_user(sw->a6, &gregs[14]);
-        err |= __put_user(rdusp(), &gregs[15]);
-        err |= __put_user(regs->pc, &gregs[16]);
-        err |= __put_user(regs->sr, &gregs[17]);
-        err |= __put_user((regs->format << 12) | regs->vector, &uc->uc_formatvec);
-        err |= rt_save_fpu_state(uc, regs);
-        return err;
-}
-
-static inline void push_cache (unsigned long vaddr)
-{
-        /*
-         * Using the old cache_push_v() was really a big waste.
-         *
-         * What we are trying to do is to flush 8 bytes to ram.
-         * Flushing 2 cache lines of 16 bytes is much cheaper than
-         * flushing 1 or 2 pages, as previously done in
-         * cache_push_v().
-         *                                                     Jes
-         */
-        if (CPU_IS_040) {
-                unsigned long temp;
-
-                __asm__ __volatile__ (".chip 68040\n\t"
-                                      "nop\n\t"
-                                      "ptestr (%1)\n\t"
-                                      "movec %%mmusr,%0\n\t"
-                                      ".chip 68k"
-                                      : "=r" (temp)
-                                      : "a" (vaddr));
-
-                temp &= PAGE_MASK;
-                temp |= vaddr & ~PAGE_MASK;
-
-                __asm__ __volatile__ (".chip 68040\n\t"
-                                      "nop\n\t"
-                                      "cpushl %%bc,(%0)\n\t"
-                                      ".chip 68k"
-                                      : : "a" (temp));
-        }
-        else if (CPU_IS_060) {
-                unsigned long temp;
-                __asm__ __volatile__ (".chip 68060\n\t"
-                                      "plpar (%0)\n\t"
-                                      ".chip 68k"
-                                      : "=a" (temp)
-                                      : "0" (vaddr));
-                __asm__ __volatile__ (".chip 68060\n\t"
-                                      "cpushl %%bc,(%0)\n\t"
-                                      ".chip 68k"
-                                      : : "a" (temp));
-        }
-        else {
-                /*
-                 * 68030/68020 have no writeback cache;
-                 * still need to clear icache.
-                 * Note that vaddr is guaranteed to be long word aligned.
-                 */
-                unsigned long temp;
-                asm volatile ("movec %%cacr,%0" : "=r" (temp));
-                temp += 4;
-                asm volatile ("movec %0,%%caar\n\t"
-                              "movec %1,%%cacr"
-                              : : "r" (vaddr), "r" (temp));
-                asm volatile ("movec %0,%%caar\n\t"
-                              "movec %1,%%cacr"
-                              : : "r" (vaddr + 4), "r" (temp));
-        }
-}
-
-static inline void __user *
-get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
-{
-        unsigned long usp;
-
-        /* Default to using normal stack.  */
-        usp = rdusp();
-
-        /* This is the X/Open sanctioned signal stack switching.  */
-        if (ka->sa.sa_flags & SA_ONSTACK) {
-                if (!sas_ss_flags(usp))
-                        usp = current->sas_ss_sp + current->sas_ss_size;
-        }
-        return (void __user *)((usp - frame_size) & -8UL);
-}
-
-static int setup_frame (int sig, struct k_sigaction *ka,
-                         sigset_t *set, struct pt_regs *regs)
-{
-        struct sigframe __user *frame;
-        int fsize = frame_extra_sizes[regs->format];
-        struct sigcontext context;
-        int err = 0;
-
-        if (fsize < 0) {
-#ifdef DEBUG
-                printk ("setup_frame: Unknown frame format %#x\n",
-                        regs->format);
-#endif
-                goto give_sigsegv;
-        }
-
-        frame = get_sigframe(ka, regs, sizeof(*frame) + fsize);
-
-        if (fsize)
-                err |= copy_to_user (frame + 1, regs + 1, fsize);
-
-        err |= __put_user((current_thread_info()->exec_domain
-                           && current_thread_info()->exec_domain->signal_invmap
-                           && sig < 32
-                           ? current_thread_info()->exec_domain->signal_invmap[sig]
-                           : sig),
-                          &frame->sig);
-
-        err |= __put_user(regs->vector, &frame->code);
-        err |= __put_user(&frame->sc, &frame->psc);
-
-        if (_NSIG_WORDS > 1)
-                err |= copy_to_user(frame->extramask, &set->sig[1],
-                                    sizeof(frame->extramask));
-
-        setup_sigcontext(&context, regs, set->sig[0]);
-        err |= copy_to_user (&frame->sc, &context, sizeof(context));
-
-        /* Set up to return from userspace.  */
-        err |= __put_user(frame->retcode, &frame->pretcode);
-        /* moveq #,d0; trap #0 */
-        err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
-                          (long __user *)(frame->retcode));
-
-        if (err)
-                goto give_sigsegv;
-
-        push_cache ((unsigned long) &frame->retcode);
-
-        /*
-         * Set up registers for signal handler.  All the state we are about
-         * to destroy is successfully copied to sigframe.
-         */
-        wrusp ((unsigned long) frame);
-        regs->pc = (unsigned long) ka->sa.sa_handler;
-
-        /*
-         * This is subtle; if we build more than one sigframe, all but the
-         * first one will see frame format 0 and have fsize == 0, so we won't
-         * screw stkadj.
-         */
-        if (fsize)
-                regs->stkadj = fsize;
-
-        /* Prepare to skip over the extra stuff in the exception frame.  */
-        if (regs->stkadj) {
-                struct pt_regs *tregs =
-                        (struct pt_regs *)((ulong)regs + regs->stkadj);
-#ifdef DEBUG
-                printk("Performing stackadjust=%04x\n", regs->stkadj);
-#endif
-                /* This must be copied with decreasing addresses to
-                   handle overlaps.  */
-                tregs->vector = 0;
-                tregs->format = 0;
-                tregs->pc = regs->pc;
-                tregs->sr = regs->sr;
-        }
-        return 0;
-
-give_sigsegv:
-        force_sigsegv(sig, current);
-        return err;
-}
-
-static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
-                            sigset_t *set, struct pt_regs *regs)
-{
-        struct rt_sigframe __user *frame;
-        int fsize = frame_extra_sizes[regs->format];
-        int err = 0;
-
-        if (fsize < 0) {
-#ifdef DEBUG
-                printk ("setup_frame: Unknown frame format %#x\n",
-                        regs->format);
-#endif
-                goto give_sigsegv;
-        }
-
-        frame = get_sigframe(ka, regs, sizeof(*frame));
-
-        if (fsize)
-                err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize);
-
-        err |= __put_user((current_thread_info()->exec_domain
-                           && current_thread_info()->exec_domain->signal_invmap
-                           && sig < 32
-                           ? current_thread_info()->exec_domain->signal_invmap[sig]
-                           : sig),
-                          &frame->sig);
-        err |= __put_user(&frame->info, &frame->pinfo);
-        err |= __put_user(&frame->uc, &frame->puc);
-        err |= copy_siginfo_to_user(&frame->info, info);
-
-        /* Create the ucontext.  */
-        err |= __put_user(0, &frame->uc.uc_flags);
-        err |= __put_user(NULL, &frame->uc.uc_link);
-        err |= __put_user((void __user *)current->sas_ss_sp,
-                          &frame->uc.uc_stack.ss_sp);
-        err |= __put_user(sas_ss_flags(rdusp()),
-                          &frame->uc.uc_stack.ss_flags);
-        err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
-        err |= rt_setup_ucontext(&frame->uc, regs);
-        err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
-
-        /* Set up to return from userspace.  */
-        err |= __put_user(frame->retcode, &frame->pretcode);
-#ifdef __mcoldfire__
-        /* movel #__NR_rt_sigreturn,d0; trap #0 */
-        err |= __put_user(0x203c0000, (long __user *)(frame->retcode + 0));
-        err |= __put_user(0x00004e40 + (__NR_rt_sigreturn << 16),
-                          (long __user *)(frame->retcode + 4));
+#ifdef CONFIG_MMU
+#include "signal_mm.c"
 #else
-        /* moveq #,d0; notb d0; trap #0 */
-        err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16),
-                          (long __user *)(frame->retcode + 0));
-        err |= __put_user(0x4e40, (short __user *)(frame->retcode + 4));
-#endif
-
-        if (err)
-                goto give_sigsegv;
-
-        push_cache ((unsigned long) &frame->retcode);
-
-        /*
-         * Set up registers for signal handler.  All the state we are about
-         * to destroy is successfully copied to sigframe.
-         */
-        wrusp ((unsigned long) frame);
-        regs->pc = (unsigned long) ka->sa.sa_handler;
-
-        /*
-         * This is subtle; if we build more than one sigframe, all but the
-         * first one will see frame format 0 and have fsize == 0, so we won't
-         * screw stkadj.
-         */
-        if (fsize)
-                regs->stkadj = fsize;
-
-        /* Prepare to skip over the extra stuff in the exception frame.  */
-        if (regs->stkadj) {
-                struct pt_regs *tregs =
-                        (struct pt_regs *)((ulong)regs + regs->stkadj);
-#ifdef DEBUG
-                printk("Performing stackadjust=%04x\n", regs->stkadj);
+#include "signal_no.c"
 #endif
-                /* This must be copied with decreasing addresses to
-                   handle overlaps.  */
-                tregs->vector = 0;
-                tregs->format = 0;
-                tregs->pc = regs->pc;
-                tregs->sr = regs->sr;
-        }
-        return 0;
-
-give_sigsegv:
-        force_sigsegv(sig, current);
-        return err;
-}
-
-static inline void
-handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
-{
-        switch (regs->d0) {
-        case -ERESTARTNOHAND:
-                if (!has_handler)
-                        goto do_restart;
-                regs->d0 = -EINTR;
-                break;
-
-        case -ERESTART_RESTARTBLOCK:
-                if (!has_handler) {
-                        regs->d0 = __NR_restart_syscall;
-                        regs->pc -= 2;
-                        break;
-                }
-                regs->d0 = -EINTR;
-                break;
-
-        case -ERESTARTSYS:
-                if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
-                        regs->d0 = -EINTR;
-                        break;
-                }
-        /* fallthrough */
-        case -ERESTARTNOINTR:
-        do_restart:
-                regs->d0 = regs->orig_d0;
-                regs->pc -= 2;
-                break;
-        }
-}
-
-void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
-{
-        if (regs->orig_d0 < 0)
-                return;
-        switch (regs->d0) {
-        case -ERESTARTNOHAND:
-        case -ERESTARTSYS:
-        case -ERESTARTNOINTR:
-                regs->d0 = regs->orig_d0;
-                regs->orig_d0 = -1;
-                regs->pc -= 2;
-                break;
-        }
-}
-
-/*
- * OK, we're invoking a handler
- */
-static void
-handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
-              sigset_t *oldset, struct pt_regs *regs)
-{
-        int err;
-        /* are we from a system call? */
-        if (regs->orig_d0 >= 0)
-                /* If so, check system call restarting.. */
-                handle_restart(regs, ka, 1);
-
-        /* set up the stack frame */
-        if (ka->sa.sa_flags & SA_SIGINFO)
-                err = setup_rt_frame(sig, ka, info, oldset, regs);
-        else
-                err = setup_frame(sig, ka, oldset, regs);
-
-        if (err)
-                return;
-
-        sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
-        if (!(ka->sa.sa_flags & SA_NODEFER))
-                sigaddset(&current->blocked,sig);
-        recalc_sigpending();
-
-        if (test_thread_flag(TIF_DELAYED_TRACE)) {
-                regs->sr &= ~0x8000;
-                send_sig(SIGTRAP, current, 1);
-        }
-
-        clear_thread_flag(TIF_RESTORE_SIGMASK);
-}
-
-/*
- * Note that 'init' is a special process: it doesn't get signals it doesn't
- * want to handle. Thus you cannot kill init even with a SIGKILL even by
- * mistake.
- */
-asmlinkage void do_signal(struct pt_regs *regs)
-{
-        siginfo_t info;
-        struct k_sigaction ka;
-        int signr;
-        sigset_t *oldset;
-
-        current->thread.esp0 = (unsigned long) regs;
-
-        if (test_thread_flag(TIF_RESTORE_SIGMASK))
-                oldset = &current->saved_sigmask;
-        else
-                oldset = &current->blocked;
-
-        signr = get_signal_to_deliver(&info, &ka, regs, NULL);
-        if (signr > 0) {
-                /* Whee!  Actually deliver the signal.  */
-                handle_signal(signr, &ka, &info, oldset, regs);
-                return;
-        }
-
-        /* Did we come from a system call? */
-        if (regs->orig_d0 >= 0)
-                /* Restart the system call - no handlers present */
-                handle_restart(regs, NULL, 0);
-
-        /* If there's no signal to deliver, we just restore the saved mask.  */
-        if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
-                clear_thread_flag(TIF_RESTORE_SIGMASK);
-                sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
-        }
-}
diff --git a/arch/m68k/kernel/signal_mm.c b/arch/m68k/kernel/signal_mm.c
new file mode 100644
index 000000000000..a0afc239304e
--- /dev/null
+++ b/arch/m68k/kernel/signal_mm.c
@@ -0,0 +1,1017 @@
+/*
+ *  linux/arch/m68k/kernel/signal.c
+ *
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+/*
+ * Linux/m68k support by Hamish Macdonald
+ *
+ * 68060 fixes by Jesper Skov
+ *
+ * 1997-12-01  Modified for POSIX.1b signals by Andreas Schwab
+ *
+ * mathemu support by Roman Zippel
+ *  (Note: fpstate in the signal context is completely ignored for the emulator
+ *         and the internal floating point format is put on stack)
+ */
+
+/*
+ * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
+ * Atari :-) Current limitation: Only one sigstack can be active at one time.
+ * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
+ * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
+ * signal handlers!
+ */
+
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/syscalls.h>
+#include <linux/errno.h>
+#include <linux/wait.h>
+#include <linux/ptrace.h>
+#include <linux/unistd.h>
+#include <linux/stddef.h>
+#include <linux/highuid.h>
+#include <linux/personality.h>
+#include <linux/tty.h>
+#include <linux/binfmts.h>
+#include <linux/module.h>
+
+#include <asm/setup.h>
+#include <asm/uaccess.h>
+#include <asm/pgtable.h>
+#include <asm/traps.h>
+#include <asm/ucontext.h>
+
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
+static const int frame_extra_sizes[16] = {
+  [1]   = -1, /* sizeof(((struct frame *)0)->un.fmt1), */
+  [2]   = sizeof(((struct frame *)0)->un.fmt2),
+  [3]   = sizeof(((struct frame *)0)->un.fmt3),
+  [4]   = sizeof(((struct frame *)0)->un.fmt4),
+  [5]   = -1, /* sizeof(((struct frame *)0)->un.fmt5), */
+  [6]   = -1, /* sizeof(((struct frame *)0)->un.fmt6), */
+  [7]   = sizeof(((struct frame *)0)->un.fmt7),
+  [8]   = -1, /* sizeof(((struct frame *)0)->un.fmt8), */
+  [9]   = sizeof(((struct frame *)0)->un.fmt9),
+  [10]  = sizeof(((struct frame *)0)->un.fmta),
+  [11]  = sizeof(((struct frame *)0)->un.fmtb),
+  [12]  = -1, /* sizeof(((struct frame *)0)->un.fmtc), */
+  [13]  = -1, /* sizeof(((struct frame *)0)->un.fmtd), */
+  [14]  = -1, /* sizeof(((struct frame *)0)->un.fmte), */
+  [15]  = -1, /* sizeof(((struct frame *)0)->un.fmtf), */
+};
+
+int handle_kernel_fault(struct pt_regs *regs)
+{
+        const struct exception_table_entry *fixup;
+        struct pt_regs *tregs;
+
+        /* Are we prepared to handle this kernel fault? */
+        fixup = search_exception_tables(regs->pc);
+        if (!fixup)
+                return 0;
+
+        /* Create a new four word stack frame, discarding the old one. */
+        regs->stkadj = frame_extra_sizes[regs->format];
+        tregs = (struct pt_regs *)((long)regs + regs->stkadj);
+        tregs->vector = regs->vector;
+        tregs->format = 0;
+        tregs->pc = fixup->fixup;
+        tregs->sr = regs->sr;
+
+        return 1;
+}
+
+/*
+ * Atomically swap in the new signal mask, and wait for a signal.
+ */
+asmlinkage int
+sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
+{
+        mask &= _BLOCKABLE;
+        spin_lock_irq(&current->sighand->siglock);
+        current->saved_sigmask = current->blocked;
+        siginitset(&current->blocked, mask);
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        current->state = TASK_INTERRUPTIBLE;
+        schedule();
+        set_restore_sigmask();
+
+        return -ERESTARTNOHAND;
+}
+
+asmlinkage int
+sys_sigaction(int sig, const struct old_sigaction __user *act,
+              struct old_sigaction __user *oact)
+{
+        struct k_sigaction new_ka, old_ka;
+        int ret;
+
+        if (act) {
+                old_sigset_t mask;
+                if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
+                    __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
+                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
+                    __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
+                    __get_user(mask, &act->sa_mask))
+                        return -EFAULT;
+                siginitset(&new_ka.sa.sa_mask, mask);
+        }
+
+        ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
+
+        if (!ret && oact) {
+                if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
+                    __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
+                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
+                    __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
+                    __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
+                        return -EFAULT;
+        }
+
+        return ret;
+}
+
+asmlinkage int
+sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
+{
+        return do_sigaltstack(uss, uoss, rdusp());
+}
+
+
+/*
+ * Do a signal return; undo the signal stack.
+ *
+ * Keep the return code on the stack quadword aligned!
+ * That makes the cache flush below easier.
+ */
+
+struct sigframe
+{
+        char __user *pretcode;
+        int sig;
+        int code;
+        struct sigcontext __user *psc;
+        char retcode[8];
+        unsigned long extramask[_NSIG_WORDS-1];
+        struct sigcontext sc;
+};
+
+struct rt_sigframe
+{
+        char __user *pretcode;
+        int sig;
+        struct siginfo __user *pinfo;
+        void __user *puc;
+        char retcode[8];
+        struct siginfo info;
+        struct ucontext uc;
+};
+
+
+static unsigned char fpu_version;       /* version number of fpu, set by setup_frame */
+
+static inline int restore_fpu_state(struct sigcontext *sc)
+{
+        int err = 1;
+
+        if (FPU_IS_EMU) {
+            /* restore registers */
+            memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
+            memcpy(current->thread.fp, sc->sc_fpregs, 24);
+            return 0;
+        }
+
+        if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
+            /* Verify the frame format.  */
+            if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version))
+                goto out;
+            if (CPU_IS_020_OR_030) {
+                if (m68k_fputype & FPU_68881 &&
+                    !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4))
+                    goto out;
+                if (m68k_fputype & FPU_68882 &&
+                    !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4))
+                    goto out;
+            } else if (CPU_IS_040) {
+                if (!(sc->sc_fpstate[1] == 0x00 ||
+                      sc->sc_fpstate[1] == 0x28 ||
+                      sc->sc_fpstate[1] == 0x60))
+                    goto out;
+            } else if (CPU_IS_060) {
+                if (!(sc->sc_fpstate[3] == 0x00 ||
+                      sc->sc_fpstate[3] == 0x60 ||
+                      sc->sc_fpstate[3] == 0xe0))
+                    goto out;
+            } else
+                goto out;
+
+            __asm__ volatile (".chip 68k/68881\n\t"
+                              "fmovemx %0,%%fp0-%%fp1\n\t"
+                              "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
+                              ".chip 68k"
+                              : /* no outputs */
+                              : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
+        }
+        __asm__ volatile (".chip 68k/68881\n\t"
+                          "frestore %0\n\t"
+                          ".chip 68k" : : "m" (*sc->sc_fpstate));
+        err = 0;
+
+out:
+        return err;
+}
+
+#define FPCONTEXT_SIZE  216
+#define uc_fpstate      uc_filler[0]
+#define uc_formatvec    uc_filler[FPCONTEXT_SIZE/4]
+#define uc_extra        uc_filler[FPCONTEXT_SIZE/4+1]
+
+static inline int rt_restore_fpu_state(struct ucontext __user *uc)
+{
+        unsigned char fpstate[FPCONTEXT_SIZE];
+        int context_size = CPU_IS_060 ? 8 : 0;
+        fpregset_t fpregs;
+        int err = 1;
+
+        if (FPU_IS_EMU) {
+                /* restore fpu control register */
+                if (__copy_from_user(current->thread.fpcntl,
+                                uc->uc_mcontext.fpregs.f_fpcntl, 12))
+                        goto out;
+                /* restore all other fpu register */
+                if (__copy_from_user(current->thread.fp,
+                                uc->uc_mcontext.fpregs.f_fpregs, 96))
+                        goto out;
+                return 0;
+        }
+
+        if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
+                goto out;
+        if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
+                if (!CPU_IS_060)
+                        context_size = fpstate[1];
+                /* Verify the frame format.  */
+                if (!CPU_IS_060 && (fpstate[0] != fpu_version))
+                        goto out;
+                if (CPU_IS_020_OR_030) {
+                        if (m68k_fputype & FPU_68881 &&
+                            !(context_size == 0x18 || context_size == 0xb4))
+                                goto out;
+                        if (m68k_fputype & FPU_68882 &&
+                            !(context_size == 0x38 || context_size == 0xd4))
+                                goto out;
+                } else if (CPU_IS_040) {
+                        if (!(context_size == 0x00 ||
+                              context_size == 0x28 ||
+                              context_size == 0x60))
+                                goto out;
+                } else if (CPU_IS_060) {
+                        if (!(fpstate[3] == 0x00 ||
+                              fpstate[3] == 0x60 ||
+                              fpstate[3] == 0xe0))
+                                goto out;
+                } else
+                        goto out;
+                if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
+                                     sizeof(fpregs)))
+                        goto out;
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "fmovemx %0,%%fp0-%%fp7\n\t"
+                                  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
+                                  ".chip 68k"
+                                  : /* no outputs */
+                                  : "m" (*fpregs.f_fpregs),
+                                    "m" (*fpregs.f_fpcntl));
+        }
+        if (context_size &&
+            __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
+                             context_size))
+                goto out;
+        __asm__ volatile (".chip 68k/68881\n\t"
+                          "frestore %0\n\t"
+                          ".chip 68k" : : "m" (*fpstate));
+        err = 0;
+
+out:
+        return err;
+}
+
+static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
+                               void __user *fp)
+{
+        int fsize = frame_extra_sizes[formatvec >> 12];
+        if (fsize < 0) {
+                /*
+                 * user process trying to return with weird frame format
+                 */
+#ifdef DEBUG
+                printk("user process returning with weird frame format\n");
+#endif
+                return 1;
+        }
+        if (!fsize) {
+                regs->format = formatvec >> 12;
+                regs->vector = formatvec & 0xfff;
+        } else {
+                struct switch_stack *sw = (struct switch_stack *)regs - 1;
+                unsigned long buf[fsize / 2]; /* yes, twice as much */
+
+                /* that'll make sure that expansion won't crap over data */
+                if (copy_from_user(buf + fsize / 4, fp, fsize))
+                        return 1;
+
+                /* point of no return */
+                regs->format = formatvec >> 12;
+                regs->vector = formatvec & 0xfff;
+#define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
+                __asm__ __volatile__
+                        ("   movel %0,%/a0\n\t"
+                         "   subl %1,%/a0\n\t"     /* make room on stack */
+                         "   movel %/a0,%/sp\n\t"  /* set stack pointer */
+                         /* move switch_stack and pt_regs */
+                         "1: movel %0@+,%/a0@+\n\t"
+                         "   dbra %2,1b\n\t"
+                         "   lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */
+                         "   lsrl  #2,%1\n\t"
+                         "   subql #1,%1\n\t"
+                         /* copy to the gap we'd made */
+                         "2: movel %4@+,%/a0@+\n\t"
+                         "   dbra %1,2b\n\t"
+                         "   bral ret_from_signal\n"
+                         : /* no outputs, it doesn't ever return */
+                         : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
+                           "n" (frame_offset), "a" (buf + fsize/4)
+                         : "a0");
+#undef frame_offset
+        }
+        return 0;
+}
+
+static inline int
+restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)
+{
+        int formatvec;
+        struct sigcontext context;
+        int err;
+
+        /* Always make any pending restarted system calls return -EINTR */
+        current_thread_info()->restart_block.fn = do_no_restart_syscall;
+
+        /* get previous context */
+        if (copy_from_user(&context, usc, sizeof(context)))
+                goto badframe;
+
+        /* restore passed registers */
+        regs->d0 = context.sc_d0;
+        regs->d1 = context.sc_d1;
+        regs->a0 = context.sc_a0;
+        regs->a1 = context.sc_a1;
+        regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
+        regs->pc = context.sc_pc;
+        regs->orig_d0 = -1;             /* disable syscall checks */
+        wrusp(context.sc_usp);
+        formatvec = context.sc_formatvec;
+
+        err = restore_fpu_state(&context);
+
+        if (err || mangle_kernel_stack(regs, formatvec, fp))
+                goto badframe;
+
+        return 0;
+
+badframe:
+        return 1;
+}
+
+static inline int
+rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
+                    struct ucontext __user *uc)
+{
+        int temp;
+        greg_t __user *gregs = uc->uc_mcontext.gregs;
+        unsigned long usp;
+        int err;
+
+        /* Always make any pending restarted system calls return -EINTR */
+        current_thread_info()->restart_block.fn = do_no_restart_syscall;
+
+        err = __get_user(temp, &uc->uc_mcontext.version);
+        if (temp != MCONTEXT_VERSION)
+                goto badframe;
+        /* restore passed registers */
+        err |= __get_user(regs->d0, &gregs[0]);
+        err |= __get_user(regs->d1, &gregs[1]);
+        err |= __get_user(regs->d2, &gregs[2]);
+        err |= __get_user(regs->d3, &gregs[3]);
+        err |= __get_user(regs->d4, &gregs[4]);
+        err |= __get_user(regs->d5, &gregs[5]);
+        err |= __get_user(sw->d6, &gregs[6]);
+        err |= __get_user(sw->d7, &gregs[7]);
+        err |= __get_user(regs->a0, &gregs[8]);
+        err |= __get_user(regs->a1, &gregs[9]);
+        err |= __get_user(regs->a2, &gregs[10]);
+        err |= __get_user(sw->a3, &gregs[11]);
+        err |= __get_user(sw->a4, &gregs[12]);
+        err |= __get_user(sw->a5, &gregs[13]);
+        err |= __get_user(sw->a6, &gregs[14]);
+        err |= __get_user(usp, &gregs[15]);
+        wrusp(usp);
+        err |= __get_user(regs->pc, &gregs[16]);
+        err |= __get_user(temp, &gregs[17]);
+        regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
+        regs->orig_d0 = -1;             /* disable syscall checks */
+        err |= __get_user(temp, &uc->uc_formatvec);
+
+        err |= rt_restore_fpu_state(uc);
+
+        if (err || do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
+                goto badframe;
+
+        if (mangle_kernel_stack(regs, temp, &uc->uc_extra))
+                goto badframe;
+
+        return 0;
+
+badframe:
+        return 1;
+}
+
+asmlinkage int do_sigreturn(unsigned long __unused)
+{
+        struct switch_stack *sw = (struct switch_stack *) &__unused;
+        struct pt_regs *regs = (struct pt_regs *) (sw + 1);
+        unsigned long usp = rdusp();
+        struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
+        sigset_t set;
+
+        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+                goto badframe;
+        if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
+            (_NSIG_WORDS > 1 &&
+             __copy_from_user(&set.sig[1], &frame->extramask,
+                              sizeof(frame->extramask))))
+                goto badframe;
+
+        sigdelsetmask(&set, ~_BLOCKABLE);
+        current->blocked = set;
+        recalc_sigpending();
+
+        if (restore_sigcontext(regs, &frame->sc, frame + 1))
+                goto badframe;
+        return regs->d0;
+
+badframe:
+        force_sig(SIGSEGV, current);
+        return 0;
+}
+
+asmlinkage int do_rt_sigreturn(unsigned long __unused)
+{
+        struct switch_stack *sw = (struct switch_stack *) &__unused;
+        struct pt_regs *regs = (struct pt_regs *) (sw + 1);
+        unsigned long usp = rdusp();
+        struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
+        sigset_t set;
+
+        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+                goto badframe;
+        if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
+                goto badframe;
+
+        sigdelsetmask(&set, ~_BLOCKABLE);
+        current->blocked = set;
+        recalc_sigpending();
+
+        if (rt_restore_ucontext(regs, sw, &frame->uc))
+                goto badframe;
+        return regs->d0;
+
+badframe:
+        force_sig(SIGSEGV, current);
+        return 0;
+}
+
+/*
+ * Set up a signal frame.
+ */
+
+static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
+{
+        if (FPU_IS_EMU) {
+                /* save registers */
+                memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
+                memcpy(sc->sc_fpregs, current->thread.fp, 24);
+                return;
+        }
+
+        __asm__ volatile (".chip 68k/68881\n\t"
+                          "fsave %0\n\t"
+                          ".chip 68k"
+                          : : "m" (*sc->sc_fpstate) : "memory");
+
+        if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
+                fpu_version = sc->sc_fpstate[0];
+                if (CPU_IS_020_OR_030 &&
+                    regs->vector >= (VEC_FPBRUC * 4) &&
+                    regs->vector <= (VEC_FPNAN * 4)) {
+                        /* Clear pending exception in 68882 idle frame */
+                        if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
+                                sc->sc_fpstate[0x38] |= 1 << 3;
+                }
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "fmovemx %%fp0-%%fp1,%0\n\t"
+                                  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
+                                  ".chip 68k"
+                                  : "=m" (*sc->sc_fpregs),
+                                    "=m" (*sc->sc_fpcntl)
+                                  : /* no inputs */
+                                  : "memory");
+        }
+}
+
+static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
+{
+        unsigned char fpstate[FPCONTEXT_SIZE];
+        int context_size = CPU_IS_060 ? 8 : 0;
+        int err = 0;
+
+        if (FPU_IS_EMU) {
+                /* save fpu control register */
+                err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
+                                current->thread.fpcntl, 12);
+                /* save all other fpu register */
+                err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
+                                current->thread.fp, 96);
+                return err;
+        }
+
+        __asm__ volatile (".chip 68k/68881\n\t"
+                          "fsave %0\n\t"
+                          ".chip 68k"
+                          : : "m" (*fpstate) : "memory");
+
+        err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
+        if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
+                fpregset_t fpregs;
+                if (!CPU_IS_060)
+                        context_size = fpstate[1];
+                fpu_version = fpstate[0];
+                if (CPU_IS_020_OR_030 &&
+                    regs->vector >= (VEC_FPBRUC * 4) &&
+                    regs->vector <= (VEC_FPNAN * 4)) {
+                        /* Clear pending exception in 68882 idle frame */
+                        if (*(unsigned short *) fpstate == 0x1f38)
+                                fpstate[0x38] |= 1 << 3;
+                }
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "fmovemx %%fp0-%%fp7,%0\n\t"
+                                  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
+                                  ".chip 68k"
+                                  : "=m" (*fpregs.f_fpregs),
+                                    "=m" (*fpregs.f_fpcntl)
+                                  : /* no inputs */
+                                  : "memory");
+                err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
+                                    sizeof(fpregs));
+        }
+        if (context_size)
+                err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
+                                    context_size);
+        return err;
+}
+
+static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
+                             unsigned long mask)
+{
+        sc->sc_mask = mask;
+        sc->sc_usp = rdusp();
+        sc->sc_d0 = regs->d0;
+        sc->sc_d1 = regs->d1;
+        sc->sc_a0 = regs->a0;
+        sc->sc_a1 = regs->a1;
+        sc->sc_sr = regs->sr;
+        sc->sc_pc = regs->pc;
+        sc->sc_formatvec = regs->format << 12 | regs->vector;
+        save_fpu_state(sc, regs);
+}
+
+static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
+{
+        struct switch_stack *sw = (struct switch_stack *)regs - 1;
+        greg_t __user *gregs = uc->uc_mcontext.gregs;
+        int err = 0;
+
+        err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
+        err |= __put_user(regs->d0, &gregs[0]);
+        err |= __put_user(regs->d1, &gregs[1]);
+        err |= __put_user(regs->d2, &gregs[2]);
+        err |= __put_user(regs->d3, &gregs[3]);
+        err |= __put_user(regs->d4, &gregs[4]);
+        err |= __put_user(regs->d5, &gregs[5]);
+        err |= __put_user(sw->d6, &gregs[6]);
+        err |= __put_user(sw->d7, &gregs[7]);
+        err |= __put_user(regs->a0, &gregs[8]);
+        err |= __put_user(regs->a1, &gregs[9]);
+        err |= __put_user(regs->a2, &gregs[10]);
+        err |= __put_user(sw->a3, &gregs[11]);
+        err |= __put_user(sw->a4, &gregs[12]);
+        err |= __put_user(sw->a5, &gregs[13]);
+        err |= __put_user(sw->a6, &gregs[14]);
+        err |= __put_user(rdusp(), &gregs[15]);
+        err |= __put_user(regs->pc, &gregs[16]);
+        err |= __put_user(regs->sr, &gregs[17]);
+        err |= __put_user((regs->format << 12) | regs->vector, &uc->uc_formatvec);
+        err |= rt_save_fpu_state(uc, regs);
+        return err;
+}
+
+static inline void push_cache (unsigned long vaddr)
+{
+        /*
+         * Using the old cache_push_v() was really a big waste.
+         *
+         * What we are trying to do is to flush 8 bytes to ram.
+         * Flushing 2 cache lines of 16 bytes is much cheaper than
+         * flushing 1 or 2 pages, as previously done in
+         * cache_push_v().
+         *                                                     Jes
+         */
+        if (CPU_IS_040) {
+                unsigned long temp;
+
+                __asm__ __volatile__ (".chip 68040\n\t"
+                                      "nop\n\t"
+                                      "ptestr (%1)\n\t"
+                                      "movec %%mmusr,%0\n\t"
+                                      ".chip 68k"
+                                      : "=r" (temp)
+                                      : "a" (vaddr));
+
+                temp &= PAGE_MASK;
+                temp |= vaddr & ~PAGE_MASK;
+
+                __asm__ __volatile__ (".chip 68040\n\t"
+                                      "nop\n\t"
+                                      "cpushl %%bc,(%0)\n\t"
+                                      ".chip 68k"
+                                      : : "a" (temp));
+        }
+        else if (CPU_IS_060) {
+                unsigned long temp;
+                __asm__ __volatile__ (".chip 68060\n\t"
+                                      "plpar (%0)\n\t"
+                                      ".chip 68k"
+                                      : "=a" (temp)
+                                      : "0" (vaddr));
+                __asm__ __volatile__ (".chip 68060\n\t"
+                                      "cpushl %%bc,(%0)\n\t"
+                                      ".chip 68k"
+                                      : : "a" (temp));
+        }
+        else {
+                /*
+                 * 68030/68020 have no writeback cache;
+                 * still need to clear icache.
+                 * Note that vaddr is guaranteed to be long word aligned.
+                 */
+                unsigned long temp;
+                asm volatile ("movec %%cacr,%0" : "=r" (temp));
+                temp += 4;
+                asm volatile ("movec %0,%%caar\n\t"
+                              "movec %1,%%cacr"
+                              : : "r" (vaddr), "r" (temp));
+                asm volatile ("movec %0,%%caar\n\t"
+                              "movec %1,%%cacr"
+                              : : "r" (vaddr + 4), "r" (temp));
+        }
+}
+
+static inline void __user *
+get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
+{
+        unsigned long usp;
+
+        /* Default to using normal stack.  */
+        usp = rdusp();
+
+        /* This is the X/Open sanctioned signal stack switching.  */
+        if (ka->sa.sa_flags & SA_ONSTACK) {
+                if (!sas_ss_flags(usp))
+                        usp = current->sas_ss_sp + current->sas_ss_size;
+        }
+        return (void __user *)((usp - frame_size) & -8UL);
+}
+
+static int setup_frame (int sig, struct k_sigaction *ka,
+                         sigset_t *set, struct pt_regs *regs)
+{
+        struct sigframe __user *frame;
+        int fsize = frame_extra_sizes[regs->format];
+        struct sigcontext context;
+        int err = 0;
+
+        if (fsize < 0) {
+#ifdef DEBUG
+                printk ("setup_frame: Unknown frame format %#x\n",
+                        regs->format);
+#endif
+                goto give_sigsegv;
+        }
+
+        frame = get_sigframe(ka, regs, sizeof(*frame) + fsize);
+
+        if (fsize)
+                err |= copy_to_user (frame + 1, regs + 1, fsize);
+
+        err |= __put_user((current_thread_info()->exec_domain
+                           && current_thread_info()->exec_domain->signal_invmap
+                           && sig < 32
+                           ? current_thread_info()->exec_domain->signal_invmap[sig]
+                           : sig),
+                          &frame->sig);
+
+        err |= __put_user(regs->vector, &frame->code);
+        err |= __put_user(&frame->sc, &frame->psc);
+
+        if (_NSIG_WORDS > 1)
+                err |= copy_to_user(frame->extramask, &set->sig[1],
+                                    sizeof(frame->extramask));
+
+        setup_sigcontext(&context, regs, set->sig[0]);
+        err |= copy_to_user (&frame->sc, &context, sizeof(context));
+
+        /* Set up to return from userspace.  */
+        err |= __put_user(frame->retcode, &frame->pretcode);
+        /* moveq #,d0; trap #0 */
+        err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
+                          (long __user *)(frame->retcode));
+
+        if (err)
+                goto give_sigsegv;
+
+        push_cache ((unsigned long) &frame->retcode);
+
+        /*
+         * Set up registers for signal handler.  All the state we are about
+         * to destroy is successfully copied to sigframe.
+         */
+        wrusp ((unsigned long) frame);
+        regs->pc = (unsigned long) ka->sa.sa_handler;
+
+        /*
+         * This is subtle; if we build more than one sigframe, all but the
+         * first one will see frame format 0 and have fsize == 0, so we won't
+         * screw stkadj.
+         */
+        if (fsize)
+                regs->stkadj = fsize;
+
+        /* Prepare to skip over the extra stuff in the exception frame.  */
+        if (regs->stkadj) {
+                struct pt_regs *tregs =
+                        (struct pt_regs *)((ulong)regs + regs->stkadj);
+#ifdef DEBUG
+                printk("Performing stackadjust=%04x\n", regs->stkadj);
+#endif
+                /* This must be copied with decreasing addresses to
+                   handle overlaps.  */
+                tregs->vector = 0;
+                tregs->format = 0;
+                tregs->pc = regs->pc;
+                tregs->sr = regs->sr;
+        }
+        return 0;
+
+give_sigsegv:
+        force_sigsegv(sig, current);
+        return err;
+}
+
+static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
+                            sigset_t *set, struct pt_regs *regs)
+{
+        struct rt_sigframe __user *frame;
+        int fsize = frame_extra_sizes[regs->format];
+        int err = 0;
+
+        if (fsize < 0) {
+#ifdef DEBUG
+                printk ("setup_frame: Unknown frame format %#x\n",
+                        regs->format);
+#endif
+                goto give_sigsegv;
+        }
+
+        frame = get_sigframe(ka, regs, sizeof(*frame));
+
+        if (fsize)
+                err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize);
+
+        err |= __put_user((current_thread_info()->exec_domain
+                           && current_thread_info()->exec_domain->signal_invmap
+                           && sig < 32
+                           ? current_thread_info()->exec_domain->signal_invmap[sig]
+                           : sig),
+                          &frame->sig);
+        err |= __put_user(&frame->info, &frame->pinfo);
+        err |= __put_user(&frame->uc, &frame->puc);
+        err |= copy_siginfo_to_user(&frame->info, info);
+
+        /* Create the ucontext.  */
+        err |= __put_user(0, &frame->uc.uc_flags);
+        err |= __put_user(NULL, &frame->uc.uc_link);
+        err |= __put_user((void __user *)current->sas_ss_sp,
+                          &frame->uc.uc_stack.ss_sp);
+        err |= __put_user(sas_ss_flags(rdusp()),
+                          &frame->uc.uc_stack.ss_flags);
+        err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
+        err |= rt_setup_ucontext(&frame->uc, regs);
+        err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
+
+        /* Set up to return from userspace.  */
+        err |= __put_user(frame->retcode, &frame->pretcode);
+#ifdef __mcoldfire__
+        /* movel #__NR_rt_sigreturn,d0; trap #0 */
+        err |= __put_user(0x203c0000, (long __user *)(frame->retcode + 0));
+        err |= __put_user(0x00004e40 + (__NR_rt_sigreturn << 16),
+                          (long __user *)(frame->retcode + 4));
+#else
+        /* moveq #,d0; notb d0; trap #0 */
+        err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16),
+                          (long __user *)(frame->retcode + 0));
+        err |= __put_user(0x4e40, (short __user *)(frame->retcode + 4));
+#endif
+
+        if (err)
+                goto give_sigsegv;
+
+        push_cache ((unsigned long) &frame->retcode);
+
+        /*
+         * Set up registers for signal handler.  All the state we are about
+         * to destroy is successfully copied to sigframe.
+         */
+        wrusp ((unsigned long) frame);
+        regs->pc = (unsigned long) ka->sa.sa_handler;
+
+        /*
+         * This is subtle; if we build more than one sigframe, all but the
+         * first one will see frame format 0 and have fsize == 0, so we won't
+         * screw stkadj.
+         */
+        if (fsize)
+                regs->stkadj = fsize;
+
+        /* Prepare to skip over the extra stuff in the exception frame.  */
+        if (regs->stkadj) {
+                struct pt_regs *tregs =
+                        (struct pt_regs *)((ulong)regs + regs->stkadj);
+#ifdef DEBUG
+                printk("Performing stackadjust=%04x\n", regs->stkadj);
+#endif
+                /* This must be copied with decreasing addresses to
+                   handle overlaps.  */
+                tregs->vector = 0;
+                tregs->format = 0;
+                tregs->pc = regs->pc;
+                tregs->sr = regs->sr;
+        }
+        return 0;
+
+give_sigsegv:
+        force_sigsegv(sig, current);
+        return err;
+}
+
+static inline void
+handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
+{
+        switch (regs->d0) {
+        case -ERESTARTNOHAND:
+                if (!has_handler)
+                        goto do_restart;
+                regs->d0 = -EINTR;
+                break;
+
+        case -ERESTART_RESTARTBLOCK:
+                if (!has_handler) {
+                        regs->d0 = __NR_restart_syscall;
+                        regs->pc -= 2;
+                        break;
+                }
+                regs->d0 = -EINTR;
+                break;
+
+        case -ERESTARTSYS:
+                if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
+                        regs->d0 = -EINTR;
+                        break;
+                }
+        /* fallthrough */
+        case -ERESTARTNOINTR:
+        do_restart:
+                regs->d0 = regs->orig_d0;
+                regs->pc -= 2;
+                break;
+        }
+}
+
+void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
+{
+        if (regs->orig_d0 < 0)
+                return;
+        switch (regs->d0) {
+        case -ERESTARTNOHAND:
+        case -ERESTARTSYS:
+        case -ERESTARTNOINTR:
+                regs->d0 = regs->orig_d0;
+                regs->orig_d0 = -1;
+                regs->pc -= 2;
+                break;
+        }
+}
+
+/*
+ * OK, we're invoking a handler
+ */
+static void
+handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
+              sigset_t *oldset, struct pt_regs *regs)
+{
+        int err;
+        /* are we from a system call? */
+        if (regs->orig_d0 >= 0)
+                /* If so, check system call restarting.. */
+                handle_restart(regs, ka, 1);
+
+        /* set up the stack frame */
+        if (ka->sa.sa_flags & SA_SIGINFO)
+                err = setup_rt_frame(sig, ka, info, oldset, regs);
+        else
+                err = setup_frame(sig, ka, oldset, regs);
+
+        if (err)
+                return;
+
+        sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
+        if (!(ka->sa.sa_flags & SA_NODEFER))
+                sigaddset(&current->blocked,sig);
+        recalc_sigpending();
+
+        if (test_thread_flag(TIF_DELAYED_TRACE)) {
+                regs->sr &= ~0x8000;
+                send_sig(SIGTRAP, current, 1);
+        }
+
+        clear_thread_flag(TIF_RESTORE_SIGMASK);
+}
+
+/*
+ * Note that 'init' is a special process: it doesn't get signals it doesn't
+ * want to handle. Thus you cannot kill init even with a SIGKILL even by
+ * mistake.
+ */
+asmlinkage void do_signal(struct pt_regs *regs)
+{
+        siginfo_t info;
+        struct k_sigaction ka;
+        int signr;
+        sigset_t *oldset;
+
+        current->thread.esp0 = (unsigned long) regs;
+
+        if (test_thread_flag(TIF_RESTORE_SIGMASK))
+                oldset = &current->saved_sigmask;
+        else
+                oldset = &current->blocked;
+
+        signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+        if (signr > 0) {
+                /* Whee!  Actually deliver the signal.  */
+                handle_signal(signr, &ka, &info, oldset, regs);
+                return;
+        }
+
+        /* Did we come from a system call? */
+        if (regs->orig_d0 >= 0)
+                /* Restart the system call - no handlers present */
+                handle_restart(regs, NULL, 0);
+
+        /* If there's no signal to deliver, we just restore the saved mask.  */
+        if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+                clear_thread_flag(TIF_RESTORE_SIGMASK);
+                sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
+        }
+}
diff --git a/arch/m68k/kernel/signal_no.c b/arch/m68k/kernel/signal_no.c
new file mode 100644
index 000000000000..36a81bb6835a
--- /dev/null
+++ b/arch/m68k/kernel/signal_no.c
@@ -0,0 +1,765 @@
+/*
+ *  linux/arch/m68knommu/kernel/signal.c
+ *
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+/*
+ * Linux/m68k support by Hamish Macdonald
+ *
+ * 68060 fixes by Jesper Skov
+ *
+ * 1997-12-01  Modified for POSIX.1b signals by Andreas Schwab
+ *
+ * mathemu support by Roman Zippel
+ *  (Note: fpstate in the signal context is completely ignored for the emulator
+ *         and the internal floating point format is put on stack)
+ */
+
+/*
+ * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
+ * Atari :-) Current limitation: Only one sigstack can be active at one time.
+ * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
+ * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
+ * signal handlers!
+ */
+
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/signal.h>
+#include <linux/syscalls.h>
+#include <linux/errno.h>
+#include <linux/wait.h>
+#include <linux/ptrace.h>
+#include <linux/unistd.h>
+#include <linux/stddef.h>
+#include <linux/highuid.h>
+#include <linux/tty.h>
+#include <linux/personality.h>
+#include <linux/binfmts.h>
+
+#include <asm/setup.h>
+#include <asm/uaccess.h>
+#include <asm/pgtable.h>
+#include <asm/traps.h>
+#include <asm/ucontext.h>
+
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
+void ret_from_user_signal(void);
+void ret_from_user_rt_signal(void);
+
+/*
+ * Atomically swap in the new signal mask, and wait for a signal.
+ */
+asmlinkage int
+sys_sigsuspend(int unused0, int unused1, old_sigset_t mask)
+{
+        mask &= _BLOCKABLE;
+        spin_lock_irq(&current->sighand->siglock);
+        current->saved_sigmask = current->blocked;
+        siginitset(&current->blocked, mask);
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        current->state = TASK_INTERRUPTIBLE;
+        schedule();
+        set_restore_sigmask();
+
+        return -ERESTARTNOHAND;
+}
+
+asmlinkage int
+sys_sigaction(int sig, const struct old_sigaction __user *act,
+              struct old_sigaction __user *oact)
+{
+        struct k_sigaction new_ka, old_ka;
+        int ret;
+
+        if (act) {
+                old_sigset_t mask;
+                if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
+                    __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
+                    __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) ||
+                    __get_user(new_ka.sa.sa_flags, &act->sa_flags) ||
+                    __get_user(mask, &act->sa_mask))
+                        return -EFAULT;
+                siginitset(&new_ka.sa.sa_mask, mask);
+        }
+
+        ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
+
+        if (!ret && oact) {
+                if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
+                    __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
+                    __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) ||
+                    __put_user(old_ka.sa.sa_flags, &oact->sa_flags) ||
+                    __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask))
+                        return -EFAULT;
+        }
+
+        return ret;
+}
+
+asmlinkage int
+sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss)
+{
+        return do_sigaltstack(uss, uoss, rdusp());
+}
+
+
+/*
+ * Do a signal return; undo the signal stack.
+ *
+ * Keep the return code on the stack quadword aligned!
+ * That makes the cache flush below easier.
+ */
+
+struct sigframe
+{
+        char __user *pretcode;
+        int sig;
+        int code;
+        struct sigcontext __user *psc;
+        char retcode[8];
+        unsigned long extramask[_NSIG_WORDS-1];
+        struct sigcontext sc;
+};
+
+struct rt_sigframe
+{
+        char __user *pretcode;
+        int sig;
+        struct siginfo __user *pinfo;
+        void __user *puc;
+        char retcode[8];
+        struct siginfo info;
+        struct ucontext uc;
+};
+
+#ifdef CONFIG_FPU
+
+static unsigned char fpu_version = 0;   /* version number of fpu, set by setup_frame */
+
+static inline int restore_fpu_state(struct sigcontext *sc)
+{
+        int err = 1;
+
+        if (FPU_IS_EMU) {
+            /* restore registers */
+            memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
+            memcpy(current->thread.fp, sc->sc_fpregs, 24);
+            return 0;
+        }
+
+        if (sc->sc_fpstate[0]) {
+            /* Verify the frame format.  */
+            if (sc->sc_fpstate[0] != fpu_version)
+                goto out;
+
+            __asm__ volatile (".chip 68k/68881\n\t"
+                              "fmovemx %0,%%fp0-%%fp1\n\t"
+                              "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
+                              ".chip 68k"
+                              : /* no outputs */
+                              : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
+        }
+        __asm__ volatile (".chip 68k/68881\n\t"
+                          "frestore %0\n\t"
+                          ".chip 68k" : : "m" (*sc->sc_fpstate));
+        err = 0;
+
+out:
+        return err;
+}
+
+#define FPCONTEXT_SIZE  216
+#define uc_fpstate      uc_filler[0]
+#define uc_formatvec    uc_filler[FPCONTEXT_SIZE/4]
+#define uc_extra        uc_filler[FPCONTEXT_SIZE/4+1]
+
+static inline int rt_restore_fpu_state(struct ucontext __user *uc)
+{
+        unsigned char fpstate[FPCONTEXT_SIZE];
+        int context_size = 0;
+        fpregset_t fpregs;
+        int err = 1;
+
+        if (FPU_IS_EMU) {
+                /* restore fpu control register */
+                if (__copy_from_user(current->thread.fpcntl,
+                                uc->uc_mcontext.fpregs.f_fpcntl, 12))
+                        goto out;
+                /* restore all other fpu register */
+                if (__copy_from_user(current->thread.fp,
+                                uc->uc_mcontext.fpregs.f_fpregs, 96))
+                        goto out;
+                return 0;
+        }
+
+        if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
+                goto out;
+        if (fpstate[0]) {
+                context_size = fpstate[1];
+
+                /* Verify the frame format.  */
+                if (fpstate[0] != fpu_version)
+                        goto out;
+                if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
+                     sizeof(fpregs)))
+                        goto out;
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "fmovemx %0,%%fp0-%%fp7\n\t"
+                                  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
+                                  ".chip 68k"
+                                  : /* no outputs */
+                                  : "m" (*fpregs.f_fpregs),
+                                    "m" (*fpregs.f_fpcntl));
+        }
+        if (context_size &&
+            __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
+                             context_size))
+                goto out;
+        __asm__ volatile (".chip 68k/68881\n\t"
+                          "frestore %0\n\t"
+                          ".chip 68k" : : "m" (*fpstate));
+        err = 0;
+
+out:
+        return err;
+}
+
+#endif
+
+static inline int
+restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp,
+                   int *pd0)
+{
+        int formatvec;
+        struct sigcontext context;
+        int err = 0;
+
+        /* Always make any pending restarted system calls return -EINTR */
+        current_thread_info()->restart_block.fn = do_no_restart_syscall;
+
+        /* get previous context */
+        if (copy_from_user(&context, usc, sizeof(context)))
+                goto badframe;
+        
+        /* restore passed registers */
+        regs->d1 = context.sc_d1;
+        regs->a0 = context.sc_a0;
+        regs->a1 = context.sc_a1;
+        ((struct switch_stack *)regs - 1)->a5 = context.sc_a5;
+        regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
+        regs->pc = context.sc_pc;
+        regs->orig_d0 = -1;             /* disable syscall checks */
+        wrusp(context.sc_usp);
+        formatvec = context.sc_formatvec;
+        regs->format = formatvec >> 12;
+        regs->vector = formatvec & 0xfff;
+
+#ifdef CONFIG_FPU
+        err = restore_fpu_state(&context);
+#endif
+
+        *pd0 = context.sc_d0;
+        return err;
+
+badframe:
+        return 1;
+}
+
+static inline int
+rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
+                    struct ucontext __user *uc, int *pd0)
+{
+        int temp;
+        greg_t __user *gregs = uc->uc_mcontext.gregs;
+        unsigned long usp;
+        int err;
+
+        /* Always make any pending restarted system calls return -EINTR */
+        current_thread_info()->restart_block.fn = do_no_restart_syscall;
+
+        err = __get_user(temp, &uc->uc_mcontext.version);
+        if (temp != MCONTEXT_VERSION)
+                goto badframe;
+        /* restore passed registers */
+        err |= __get_user(regs->d0, &gregs[0]);
+        err |= __get_user(regs->d1, &gregs[1]);
+        err |= __get_user(regs->d2, &gregs[2]);
+        err |= __get_user(regs->d3, &gregs[3]);
+        err |= __get_user(regs->d4, &gregs[4]);
+        err |= __get_user(regs->d5, &gregs[5]);
+        err |= __get_user(sw->d6, &gregs[6]);
+        err |= __get_user(sw->d7, &gregs[7]);
+        err |= __get_user(regs->a0, &gregs[8]);
+        err |= __get_user(regs->a1, &gregs[9]);
+        err |= __get_user(regs->a2, &gregs[10]);
+        err |= __get_user(sw->a3, &gregs[11]);
+        err |= __get_user(sw->a4, &gregs[12]);
+        err |= __get_user(sw->a5, &gregs[13]);
+        err |= __get_user(sw->a6, &gregs[14]);
+        err |= __get_user(usp, &gregs[15]);
+        wrusp(usp);
+        err |= __get_user(regs->pc, &gregs[16]);
+        err |= __get_user(temp, &gregs[17]);
+        regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
+        regs->orig_d0 = -1;             /* disable syscall checks */
+        regs->format = temp >> 12;
+        regs->vector = temp & 0xfff;
+
+        if (do_sigaltstack(&uc->uc_stack, NULL, usp) == -EFAULT)
+                goto badframe;
+
+        *pd0 = regs->d0;
+        return err;
+
+badframe:
+        return 1;
+}
+
+asmlinkage int do_sigreturn(unsigned long __unused)
+{
+        struct switch_stack *sw = (struct switch_stack *) &__unused;
+        struct pt_regs *regs = (struct pt_regs *) (sw + 1);
+        unsigned long usp = rdusp();
+        struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
+        sigset_t set;
+        int d0;
+
+        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+                goto badframe;
+        if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
+            (_NSIG_WORDS > 1 &&
+             __copy_from_user(&set.sig[1], &frame->extramask,
+                              sizeof(frame->extramask))))
+                goto badframe;
+
+        sigdelsetmask(&set, ~_BLOCKABLE);
+        spin_lock_irq(&current->sighand->siglock);
+        current->blocked = set;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+        
+        if (restore_sigcontext(regs, &frame->sc, frame + 1, &d0))
+                goto badframe;
+        return d0;
+
+badframe:
+        force_sig(SIGSEGV, current);
+        return 0;
+}
+
+asmlinkage int do_rt_sigreturn(unsigned long __unused)
+{
+        struct switch_stack *sw = (struct switch_stack *) &__unused;
+        struct pt_regs *regs = (struct pt_regs *) (sw + 1);
+        unsigned long usp = rdusp();
+        struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
+        sigset_t set;
+        int d0;
+
+        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+                goto badframe;
+        if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
+                goto badframe;
+
+        sigdelsetmask(&set, ~_BLOCKABLE);
+        spin_lock_irq(&current->sighand->siglock);
+        current->blocked = set;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+        
+        if (rt_restore_ucontext(regs, sw, &frame->uc, &d0))
+                goto badframe;
+        return d0;
+
+badframe:
+        force_sig(SIGSEGV, current);
+        return 0;
+}
+
+#ifdef CONFIG_FPU
+/*
+ * Set up a signal frame.
+ */
+
+static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
+{
+        if (FPU_IS_EMU) {
+                /* save registers */
+                memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
+                memcpy(sc->sc_fpregs, current->thread.fp, 24);
+                return;
+        }
+
+        __asm__ volatile (".chip 68k/68881\n\t"
+                          "fsave %0\n\t"
+                          ".chip 68k"
+                          : : "m" (*sc->sc_fpstate) : "memory");
+
+        if (sc->sc_fpstate[0]) {
+                fpu_version = sc->sc_fpstate[0];
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "fmovemx %%fp0-%%fp1,%0\n\t"
+                                  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
+                                  ".chip 68k"
+                                  : "=m" (*sc->sc_fpregs),
+                                    "=m" (*sc->sc_fpcntl)
+                                  : /* no inputs */
+                                  : "memory");
+        }
+}
+
+static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
+{
+        unsigned char fpstate[FPCONTEXT_SIZE];
+        int context_size = 0;
+        int err = 0;
+
+        if (FPU_IS_EMU) {
+                /* save fpu control register */
+                err |= copy_to_user(uc->uc_mcontext.fpregs.f_pcntl,
+                                current->thread.fpcntl, 12);
+                /* save all other fpu register */
+                err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
+                                current->thread.fp, 96);
+                return err;
+        }
+
+        __asm__ volatile (".chip 68k/68881\n\t"
+                          "fsave %0\n\t"
+                          ".chip 68k"
+                          : : "m" (*fpstate) : "memory");
+
+        err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
+        if (fpstate[0]) {
+                fpregset_t fpregs;
+                context_size = fpstate[1];
+                fpu_version = fpstate[0];
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "fmovemx %%fp0-%%fp7,%0\n\t"
+                                  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
+                                  ".chip 68k"
+                                  : "=m" (*fpregs.f_fpregs),
+                                    "=m" (*fpregs.f_fpcntl)
+                                  : /* no inputs */
+                                  : "memory");
+                err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
+                                    sizeof(fpregs));
+        }
+        if (context_size)
+                err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
+                                    context_size);
+        return err;
+}
+
+#endif
+
+static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
+                             unsigned long mask)
+{
+        sc->sc_mask = mask;
+        sc->sc_usp = rdusp();
+        sc->sc_d0 = regs->d0;
+        sc->sc_d1 = regs->d1;
+        sc->sc_a0 = regs->a0;
+        sc->sc_a1 = regs->a1;
+        sc->sc_a5 = ((struct switch_stack *)regs - 1)->a5;
+        sc->sc_sr = regs->sr;
+        sc->sc_pc = regs->pc;
+        sc->sc_formatvec = regs->format << 12 | regs->vector;
+#ifdef CONFIG_FPU
+        save_fpu_state(sc, regs);
+#endif
+}
+
+static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
+{
+        struct switch_stack *sw = (struct switch_stack *)regs - 1;
+        greg_t __user *gregs = uc->uc_mcontext.gregs;
+        int err = 0;
+
+        err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
+        err |= __put_user(regs->d0, &gregs[0]);
+        err |= __put_user(regs->d1, &gregs[1]);
+        err |= __put_user(regs->d2, &gregs[2]);
+        err |= __put_user(regs->d3, &gregs[3]);
+        err |= __put_user(regs->d4, &gregs[4]);
+        err |= __put_user(regs->d5, &gregs[5]);
+        err |= __put_user(sw->d6, &gregs[6]);
+        err |= __put_user(sw->d7, &gregs[7]);
+        err |= __put_user(regs->a0, &gregs[8]);
+        err |= __put_user(regs->a1, &gregs[9]);
+        err |= __put_user(regs->a2, &gregs[10]);
+        err |= __put_user(sw->a3, &gregs[11]);
+        err |= __put_user(sw->a4, &gregs[12]);
+        err |= __put_user(sw->a5, &gregs[13]);
+        err |= __put_user(sw->a6, &gregs[14]);
+        err |= __put_user(rdusp(), &gregs[15]);
+        err |= __put_user(regs->pc, &gregs[16]);
+        err |= __put_user(regs->sr, &gregs[17]);
+#ifdef CONFIG_FPU
+        err |= rt_save_fpu_state(uc, regs);
+#endif
+        return err;
+}
+
+static inline void __user *
+get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
+{
+        unsigned long usp;
+
+        /* Default to using normal stack.  */
+        usp = rdusp();
+
+        /* This is the X/Open sanctioned signal stack switching.  */
+        if (ka->sa.sa_flags & SA_ONSTACK) {
+                if (!sas_ss_flags(usp))
+                        usp = current->sas_ss_sp + current->sas_ss_size;
+        }
+        return (void __user *)((usp - frame_size) & -8UL);
+}
+
+static int setup_frame (int sig, struct k_sigaction *ka,
+                         sigset_t *set, struct pt_regs *regs)
+{
+        struct sigframe __user *frame;
+        struct sigcontext context;
+        int err = 0;
+
+        frame = get_sigframe(ka, regs, sizeof(*frame));
+
+        err |= __put_user((current_thread_info()->exec_domain
+                           && current_thread_info()->exec_domain->signal_invmap
+                           && sig < 32
+                           ? current_thread_info()->exec_domain->signal_invmap[sig]
+                           : sig),
+                          &frame->sig);
+
+        err |= __put_user(regs->vector, &frame->code);
+        err |= __put_user(&frame->sc, &frame->psc);
+
+        if (_NSIG_WORDS > 1)
+                err |= copy_to_user(frame->extramask, &set->sig[1],
+                                    sizeof(frame->extramask));
+
+        setup_sigcontext(&context, regs, set->sig[0]);
+        err |= copy_to_user (&frame->sc, &context, sizeof(context));
+
+        /* Set up to return from userspace.  */
+        err |= __put_user((void *) ret_from_user_signal, &frame->pretcode);
+
+        if (err)
+                goto give_sigsegv;
+
+        /* Set up registers for signal handler */
+        wrusp ((unsigned long) frame);
+        regs->pc = (unsigned long) ka->sa.sa_handler;
+        ((struct switch_stack *)regs - 1)->a5 = current->mm->start_data;
+        regs->format = 0x4; /*set format byte to make stack appear modulo 4 
+                                                which it will be when doing the rte */
+
+adjust_stack:
+        /* Prepare to skip over the extra stuff in the exception frame.  */
+        if (regs->stkadj) {
+                struct pt_regs *tregs =
+                        (struct pt_regs *)((ulong)regs + regs->stkadj);
+#if defined(DEBUG)
+                printk(KERN_DEBUG "Performing stackadjust=%04x\n", regs->stkadj);
+#endif
+                /* This must be copied with decreasing addresses to
+                   handle overlaps.  */
+                tregs->vector = 0;
+                tregs->format = 0;
+                tregs->pc = regs->pc;
+                tregs->sr = regs->sr;
+        }
+        return err;
+
+give_sigsegv:
+        force_sigsegv(sig, current);
+        goto adjust_stack;
+}
+
+static int setup_rt_frame (int sig, struct k_sigaction *ka, siginfo_t *info,
+                            sigset_t *set, struct pt_regs *regs)
+{
+        struct rt_sigframe __user *frame;
+        int err = 0;
+
+        frame = get_sigframe(ka, regs, sizeof(*frame));
+
+        err |= __put_user((current_thread_info()->exec_domain
+                           && current_thread_info()->exec_domain->signal_invmap
+                           && sig < 32
+                           ? current_thread_info()->exec_domain->signal_invmap[sig]
+                           : sig),
+                          &frame->sig);
+        err |= __put_user(&frame->info, &frame->pinfo);
+        err |= __put_user(&frame->uc, &frame->puc);
+        err |= copy_siginfo_to_user(&frame->info, info);
+
+        /* Create the ucontext.  */
+        err |= __put_user(0, &frame->uc.uc_flags);
+        err |= __put_user(NULL, &frame->uc.uc_link);
+        err |= __put_user((void __user *)current->sas_ss_sp,
+                          &frame->uc.uc_stack.ss_sp);
+        err |= __put_user(sas_ss_flags(rdusp()),
+                          &frame->uc.uc_stack.ss_flags);
+        err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
+        err |= rt_setup_ucontext(&frame->uc, regs);
+        err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
+
+        /* Set up to return from userspace.  */
+        err |= __put_user((void *) ret_from_user_rt_signal, &frame->pretcode);
+
+        if (err)
+                goto give_sigsegv;
+
+        /* Set up registers for signal handler */
+        wrusp ((unsigned long) frame);
+        regs->pc = (unsigned long) ka->sa.sa_handler;
+        ((struct switch_stack *)regs - 1)->a5 = current->mm->start_data;
+        regs->format = 0x4; /*set format byte to make stack appear modulo 4 
+                                                which it will be when doing the rte */
+
+adjust_stack:
+        /* Prepare to skip over the extra stuff in the exception frame.  */
+        if (regs->stkadj) {
+                struct pt_regs *tregs =
+                        (struct pt_regs *)((ulong)regs + regs->stkadj);
+#if defined(DEBUG)
+                printk(KERN_DEBUG "Performing stackadjust=%04x\n", regs->stkadj);
+#endif
+                /* This must be copied with decreasing addresses to
+                   handle overlaps.  */
+                tregs->vector = 0;
+                tregs->format = 0;
+                tregs->pc = regs->pc;
+                tregs->sr = regs->sr;
+        }
+        return err;
+
+give_sigsegv:
+        force_sigsegv(sig, current);
+        goto adjust_stack;
+}
+
+static inline void
+handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
+{
+        switch (regs->d0) {
+        case -ERESTARTNOHAND:
+                if (!has_handler)
+                        goto do_restart;
+                regs->d0 = -EINTR;
+                break;
+
+        case -ERESTART_RESTARTBLOCK:
+                if (!has_handler) {
+                        regs->d0 = __NR_restart_syscall;
+                        regs->pc -= 2;
+                        break;
+                }
+                regs->d0 = -EINTR;
+                break;
+
+        case -ERESTARTSYS:
+                if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
+                        regs->d0 = -EINTR;
+                        break;
+                }
+        /* fallthrough */
+        case -ERESTARTNOINTR:
+        do_restart:
+                regs->d0 = regs->orig_d0;
+                regs->pc -= 2;
+                break;
+        }
+}
+
+/*
+ * OK, we're invoking a handler
+ */
+static void
+handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
+              sigset_t *oldset, struct pt_regs *regs)
+{
+        int err;
+        /* are we from a system call? */
+        if (regs->orig_d0 >= 0)
+                /* If so, check system call restarting.. */
+                handle_restart(regs, ka, 1);
+
+        /* set up the stack frame */
+        if (ka->sa.sa_flags & SA_SIGINFO)
+                err = setup_rt_frame(sig, ka, info, oldset, regs);
+        else
+                err = setup_frame(sig, ka, oldset, regs);
+
+        if (err)
+                return;
+
+        spin_lock_irq(&current->sighand->siglock);
+        sigorsets(&current->blocked,&current->blocked,&ka->sa.sa_mask);
+        if (!(ka->sa.sa_flags & SA_NODEFER))
+                sigaddset(&current->blocked,sig);
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        clear_thread_flag(TIF_RESTORE_SIGMASK);
+}
+
+/*
+ * Note that 'init' is a special process: it doesn't get signals it doesn't
+ * want to handle. Thus you cannot kill init even with a SIGKILL even by
+ * mistake.
+ */
+asmlinkage void do_signal(struct pt_regs *regs)
+{
+        struct k_sigaction ka;
+        siginfo_t info;
+        int signr;
+        sigset_t *oldset;
+
+        /*
+         * We want the common case to go fast, which
+         * is why we may in certain cases get here from
+         * kernel mode. Just return without doing anything
+         * if so.
+         */
+        if (!user_mode(regs))
+                return;
+
+        if (test_thread_flag(TIF_RESTORE_SIGMASK))
+                oldset = &current->saved_sigmask;
+        else
+                oldset = &current->blocked;
+
+        signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+        if (signr > 0) {
+                /* Whee!  Actually deliver the signal.  */
+                handle_signal(signr, &ka, &info, oldset, regs);
+                return;
+        }
+
+        /* Did we come from a system call? */
+        if (regs->orig_d0 >= 0) {
+                /* Restart the system call - no handlers present */
+                handle_restart(regs, NULL, 0);
+        }
+
+        /* If there's no signal to deliver, we just restore the saved mask.  */
+        if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+                clear_thread_flag(TIF_RESTORE_SIGMASK);
+                sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
+        }
+}
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index 3db2e7f902aa..63013df33584 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -1,546 +1,5 @@
-/*
- * linux/arch/m68k/kernel/sys_m68k.c
- *
- * This file contains various random system calls that
- * have a non-standard calling sequence on the Linux/m68k
- * platform.
- */
-
-#include <linux/capability.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/fs.h>
-#include <linux/smp.h>
-#include <linux/sem.h>
-#include <linux/msg.h>
-#include <linux/shm.h>
-#include <linux/stat.h>
-#include <linux/syscalls.h>
-#include <linux/mman.h>
-#include <linux/file.h>
-#include <linux/ipc.h>
-
-#include <asm/setup.h>
-#include <asm/uaccess.h>
-#include <asm/cachectl.h>
-#include <asm/traps.h>
-#include <asm/page.h>
-#include <asm/unistd.h>
-#include <linux/elf.h>
-#include <asm/tlb.h>
-
-asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
-                             unsigned long error_code);
-
-asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
-        unsigned long prot, unsigned long flags,
-        unsigned long fd, unsigned long pgoff)
-{
-        /*
-         * This is wrong for sun3 - there PAGE_SIZE is 8Kb,
-         * so we need to shift the argument down by 1; m68k mmap64(3)
-         * (in libc) expects the last argument of mmap2 in 4Kb units.
-         */
-        return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
-}
-
-/* Convert virtual (user) address VADDR to physical address PADDR */
-#define virt_to_phys_040(vaddr)                                         \
-({                                                                      \
-  unsigned long _mmusr, _paddr;                                         \
-                                                                        \
-  __asm__ __volatile__ (".chip 68040\n\t"                               \
-                        "ptestr (%1)\n\t"                               \
-                        "movec %%mmusr,%0\n\t"                          \
-                        ".chip 68k"                                     \
-                        : "=r" (_mmusr)                                 \
-                        : "a" (vaddr));                                 \
-  _paddr = (_mmusr & MMU_R_040) ? (_mmusr & PAGE_MASK) : 0;             \
-  _paddr;                                                               \
-})
-
-static inline int
-cache_flush_040 (unsigned long addr, int scope, int cache, unsigned long len)
-{
-  unsigned long paddr, i;
-
-  switch (scope)
-    {
-    case FLUSH_SCOPE_ALL:
-      switch (cache)
-        {
-        case FLUSH_CACHE_DATA:
-          /* This nop is needed for some broken versions of the 68040.  */
-          __asm__ __volatile__ ("nop\n\t"
-                                ".chip 68040\n\t"
-                                "cpusha %dc\n\t"
-                                ".chip 68k");
-          break;
-        case FLUSH_CACHE_INSN:
-          __asm__ __volatile__ ("nop\n\t"
-                                ".chip 68040\n\t"
-                                "cpusha %ic\n\t"
-                                ".chip 68k");
-          break;
-        default:
-        case FLUSH_CACHE_BOTH:
-          __asm__ __volatile__ ("nop\n\t"
-                                ".chip 68040\n\t"
-                                "cpusha %bc\n\t"
-                                ".chip 68k");
-          break;
-        }
-      break;
-
-    case FLUSH_SCOPE_LINE:
-      /* Find the physical address of the first mapped page in the
-         address range.  */
-      if ((paddr = virt_to_phys_040(addr))) {
-        paddr += addr & ~(PAGE_MASK | 15);
-        len = (len + (addr & 15) + 15) >> 4;
-      } else {
-        unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
-
-        if (len <= tmp)
-          return 0;
-        addr += tmp;
-        len -= tmp;
-        tmp = PAGE_SIZE;
-        for (;;)
-          {
-            if ((paddr = virt_to_phys_040(addr)))
-              break;
-            if (len <= tmp)
-              return 0;
-            addr += tmp;
-            len -= tmp;
-          }
-        len = (len + 15) >> 4;
-      }
-      i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
-      while (len--)
-        {
-          switch (cache)
-            {
-            case FLUSH_CACHE_DATA:
-              __asm__ __volatile__ ("nop\n\t"
-                                    ".chip 68040\n\t"
-                                    "cpushl %%dc,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            case FLUSH_CACHE_INSN:
-              __asm__ __volatile__ ("nop\n\t"
-                                    ".chip 68040\n\t"
-                                    "cpushl %%ic,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            default:
-            case FLUSH_CACHE_BOTH:
-              __asm__ __volatile__ ("nop\n\t"
-                                    ".chip 68040\n\t"
-                                    "cpushl %%bc,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            }
-          if (!--i && len)
-            {
-              /*
-               * No need to page align here since it is done by
-               * virt_to_phys_040().
-               */
-              addr += PAGE_SIZE;
-              i = PAGE_SIZE / 16;
-              /* Recompute physical address when crossing a page
-                 boundary. */
-              for (;;)
-                {
-                  if ((paddr = virt_to_phys_040(addr)))
-                    break;
-                  if (len <= i)
-                    return 0;
-                  len -= i;
-                  addr += PAGE_SIZE;
-                }
-            }
-          else
-            paddr += 16;
-        }
-      break;
-
-    default:
-    case FLUSH_SCOPE_PAGE:
-      len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
-      for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
-        {
-          if (!(paddr = virt_to_phys_040(addr)))
-            continue;
-          switch (cache)
-            {
-            case FLUSH_CACHE_DATA:
-              __asm__ __volatile__ ("nop\n\t"
-                                    ".chip 68040\n\t"
-                                    "cpushp %%dc,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            case FLUSH_CACHE_INSN:
-              __asm__ __volatile__ ("nop\n\t"
-                                    ".chip 68040\n\t"
-                                    "cpushp %%ic,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            default:
-            case FLUSH_CACHE_BOTH:
-              __asm__ __volatile__ ("nop\n\t"
-                                    ".chip 68040\n\t"
-                                    "cpushp %%bc,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            }
-        }
-      break;
-    }
-  return 0;
-}
-
-#define virt_to_phys_060(vaddr)                         \
-({                                                      \
-  unsigned long paddr;                                  \
-  __asm__ __volatile__ (".chip 68060\n\t"               \
-                        "plpar (%0)\n\t"                \
-                        ".chip 68k"                     \
-                        : "=a" (paddr)                  \
-                        : "0" (vaddr));                 \
-  (paddr); /* XXX */                                    \
-})
-
-static inline int
-cache_flush_060 (unsigned long addr, int scope, int cache, unsigned long len)
-{
-  unsigned long paddr, i;
-
-  /*
-   * 68060 manual says:
-   *  cpush %dc : flush DC, remains valid (with our %cacr setup)
-   *  cpush %ic : invalidate IC
-   *  cpush %bc : flush DC + invalidate IC
-   */
-  switch (scope)
-    {
-    case FLUSH_SCOPE_ALL:
-      switch (cache)
-        {
-        case FLUSH_CACHE_DATA:
-          __asm__ __volatile__ (".chip 68060\n\t"
-                                "cpusha %dc\n\t"
-                                ".chip 68k");
-          break;
-        case FLUSH_CACHE_INSN:
-          __asm__ __volatile__ (".chip 68060\n\t"
-                                "cpusha %ic\n\t"
-                                ".chip 68k");
-          break;
-        default:
-        case FLUSH_CACHE_BOTH:
-          __asm__ __volatile__ (".chip 68060\n\t"
-                                "cpusha %bc\n\t"
-                                ".chip 68k");
-          break;
-        }
-      break;
-
-    case FLUSH_SCOPE_LINE:
-      /* Find the physical address of the first mapped page in the
-         address range.  */
-      len += addr & 15;
-      addr &= -16;
-      if (!(paddr = virt_to_phys_060(addr))) {
-        unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
-
-        if (len <= tmp)
-          return 0;
-        addr += tmp;
-        len -= tmp;
-        tmp = PAGE_SIZE;
-        for (;;)
-          {
-            if ((paddr = virt_to_phys_060(addr)))
-              break;
-            if (len <= tmp)
-              return 0;
-            addr += tmp;
-            len -= tmp;
-          }
-      }
-      len = (len + 15) >> 4;
-      i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
-      while (len--)
-        {
-          switch (cache)
-            {
-            case FLUSH_CACHE_DATA:
-              __asm__ __volatile__ (".chip 68060\n\t"
-                                    "cpushl %%dc,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            case FLUSH_CACHE_INSN:
-              __asm__ __volatile__ (".chip 68060\n\t"
-                                    "cpushl %%ic,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            default:
-            case FLUSH_CACHE_BOTH:
-              __asm__ __volatile__ (".chip 68060\n\t"
-                                    "cpushl %%bc,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            }
-          if (!--i && len)
-            {
-
-              /*
-               * We just want to jump to the first cache line
-               * in the next page.
-               */
-              addr += PAGE_SIZE;
-              addr &= PAGE_MASK;
-
-              i = PAGE_SIZE / 16;
-              /* Recompute physical address when crossing a page
-                 boundary. */
-              for (;;)
-                {
-                  if ((paddr = virt_to_phys_060(addr)))
-                    break;
-                  if (len <= i)
-                    return 0;
-                  len -= i;
-                  addr += PAGE_SIZE;
-                }
-            }
-          else
-            paddr += 16;
-        }
-      break;
-
-    default:
-    case FLUSH_SCOPE_PAGE:
-      len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
-      addr &= PAGE_MASK;        /* Workaround for bug in some
-                                   revisions of the 68060 */
-      for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
-        {
-          if (!(paddr = virt_to_phys_060(addr)))
-            continue;
-          switch (cache)
-            {
-            case FLUSH_CACHE_DATA:
-              __asm__ __volatile__ (".chip 68060\n\t"
-                                    "cpushp %%dc,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            case FLUSH_CACHE_INSN:
-              __asm__ __volatile__ (".chip 68060\n\t"
-                                    "cpushp %%ic,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            default:
-            case FLUSH_CACHE_BOTH:
-              __asm__ __volatile__ (".chip 68060\n\t"
-                                    "cpushp %%bc,(%0)\n\t"
-                                    ".chip 68k"
-                                    : : "a" (paddr));
-              break;
-            }
-        }
-      break;
-    }
-  return 0;
-}
-
-/* sys_cacheflush -- flush (part of) the processor cache.  */
-asmlinkage int
-sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
-{
-        struct vm_area_struct *vma;
-        int ret = -EINVAL;
-
-        if (scope < FLUSH_SCOPE_LINE || scope > FLUSH_SCOPE_ALL ||
-            cache & ~FLUSH_CACHE_BOTH)
-                goto out;
-
-        if (scope == FLUSH_SCOPE_ALL) {
-                /* Only the superuser may explicitly flush the whole cache. */
-                ret = -EPERM;
-                if (!capable(CAP_SYS_ADMIN))
-                        goto out;
-        } else {
-                /*
-                 * Verify that the specified address region actually belongs
-                 * to this process.
-                 */
-                vma = find_vma (current->mm, addr);
-                ret = -EINVAL;
-                /* Check for overflow.  */
-                if (addr + len < addr)
-                        goto out;
-                if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end)
-                        goto out;
-        }
-
-        if (CPU_IS_020_OR_030) {
-                if (scope == FLUSH_SCOPE_LINE && len < 256) {
-                        unsigned long cacr;
-                        __asm__ ("movec %%cacr, %0" : "=r" (cacr));
-                        if (cache & FLUSH_CACHE_INSN)
-                                cacr |= 4;
-                        if (cache & FLUSH_CACHE_DATA)
-                                cacr |= 0x400;
-                        len >>= 2;
-                        while (len--) {
-                                __asm__ __volatile__ ("movec %1, %%caar\n\t"
-                                                      "movec %0, %%cacr"
-                                                      : /* no outputs */
-                                                      : "r" (cacr), "r" (addr));
-                                addr += 4;
-                        }
-                } else {
-                        /* Flush the whole cache, even if page granularity requested. */
-                        unsigned long cacr;
-                        __asm__ ("movec %%cacr, %0" : "=r" (cacr));
-                        if (cache & FLUSH_CACHE_INSN)
-                                cacr |= 8;
-                        if (cache & FLUSH_CACHE_DATA)
-                                cacr |= 0x800;
-                        __asm__ __volatile__ ("movec %0, %%cacr" : : "r" (cacr));
-                }
-                ret = 0;
-                goto out;
-        } else {
-            /*
-             * 040 or 060: don't blindly trust 'scope', someone could
-             * try to flush a few megs of memory.
-             */
-
-            if (len>=3*PAGE_SIZE && scope<FLUSH_SCOPE_PAGE)
-                scope=FLUSH_SCOPE_PAGE;
-            if (len>=10*PAGE_SIZE && scope<FLUSH_SCOPE_ALL)
-                scope=FLUSH_SCOPE_ALL;
-            if (CPU_IS_040) {
-                ret = cache_flush_040 (addr, scope, cache, len);
-            } else if (CPU_IS_060) {
-                ret = cache_flush_060 (addr, scope, cache, len);
-            }
-        }
-out:
-        return ret;
-}
-
-asmlinkage int sys_getpagesize(void)
-{
-        return PAGE_SIZE;
-}
-
-/*
- * Do a system call from kernel instead of calling sys_execve so we
- * end up with proper pt_regs.
- */
-int kernel_execve(const char *filename,
-                  const char *const argv[],
-                  const char *const envp[])
-{
-        register long __res asm ("%d0") = __NR_execve;
-        register long __a asm ("%d1") = (long)(filename);
-        register long __b asm ("%d2") = (long)(argv);
-        register long __c asm ("%d3") = (long)(envp);
-        asm volatile ("trap  #0" : "+d" (__res)
-                        : "d" (__a), "d" (__b), "d" (__c));
-        return __res;
-}
-
-asmlinkage unsigned long sys_get_thread_area(void)
-{
-        return current_thread_info()->tp_value;
-}
-
-asmlinkage int sys_set_thread_area(unsigned long tp)
-{
-        current_thread_info()->tp_value = tp;
-        return 0;
-}
-
-/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
-   D1 (newval).  */
-asmlinkage int
-sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
-                      unsigned long __user * mem)
-{
-        /* This was borrowed from ARM's implementation.  */
-        for (;;) {
-                struct mm_struct *mm = current->mm;
-                pgd_t *pgd;
-                pmd_t *pmd;
-                pte_t *pte;
-                spinlock_t *ptl;
-                unsigned long mem_value;
-
-                down_read(&mm->mmap_sem);
-                pgd = pgd_offset(mm, (unsigned long)mem);
-                if (!pgd_present(*pgd))
-                        goto bad_access;
-                pmd = pmd_offset(pgd, (unsigned long)mem);
-                if (!pmd_present(*pmd))
-                        goto bad_access;
-                pte = pte_offset_map_lock(mm, pmd, (unsigned long)mem, &ptl);
-                if (!pte_present(*pte) || !pte_dirty(*pte)
-                    || !pte_write(*pte)) {
-                        pte_unmap_unlock(pte, ptl);
-                        goto bad_access;
-                }
-
-                mem_value = *mem;
-                if (mem_value == oldval)
-                        *mem = newval;
-
-                pte_unmap_unlock(pte, ptl);
-                up_read(&mm->mmap_sem);
-                return mem_value;
-
-              bad_access:
-                up_read(&mm->mmap_sem);
-                /* This is not necessarily a bad access, we can get here if
-                   a memory we're trying to write to should be copied-on-write.
-                   Make the kernel do the necessary page stuff, then re-iterate.
-                   Simulate a write access fault to do that.  */
-                {
-                        /* The first argument of the function corresponds to
-                           D1, which is the first field of struct pt_regs.  */
-                        struct pt_regs *fp = (struct pt_regs *)&newval;
-
-                        /* '3' is an RMW flag.  */
-                        if (do_page_fault(fp, (unsigned long)mem, 3))
-                                /* If the do_page_fault() failed, we don't
-                                   have anything meaningful to return.
-                                   There should be a SIGSEGV pending for
-                                   the process.  */
-                                return 0xdeadbeef;
-                }
-        }
-}
-
-asmlinkage int sys_atomic_barrier(void)
-{
-        /* no code needed for uniprocs */
-        return 0;
-}
+#ifdef CONFIG_MMU
+#include "sys_m68k_mm.c"
+#else
+#include "sys_m68k_no.c"
+#endif
diff --git a/arch/m68k/kernel/sys_m68k_mm.c b/arch/m68k/kernel/sys_m68k_mm.c
new file mode 100644
index 000000000000..3db2e7f902aa
--- /dev/null
+++ b/arch/m68k/kernel/sys_m68k_mm.c
@@ -0,0 +1,546 @@
+/*
+ * linux/arch/m68k/kernel/sys_m68k.c
+ *
+ * This file contains various random system calls that
+ * have a non-standard calling sequence on the Linux/m68k
+ * platform.
+ */
+
+#include <linux/capability.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/fs.h>
+#include <linux/smp.h>
+#include <linux/sem.h>
+#include <linux/msg.h>
+#include <linux/shm.h>
+#include <linux/stat.h>
+#include <linux/syscalls.h>
+#include <linux/mman.h>
+#include <linux/file.h>
+#include <linux/ipc.h>
+
+#include <asm/setup.h>
+#include <asm/uaccess.h>
+#include <asm/cachectl.h>
+#include <asm/traps.h>
+#include <asm/page.h>
+#include <asm/unistd.h>
+#include <linux/elf.h>
+#include <asm/tlb.h>
+
+asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
+                             unsigned long error_code);
+
+asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
+        unsigned long prot, unsigned long flags,
+        unsigned long fd, unsigned long pgoff)
+{
+        /*
+         * This is wrong for sun3 - there PAGE_SIZE is 8Kb,
+         * so we need to shift the argument down by 1; m68k mmap64(3)
+         * (in libc) expects the last argument of mmap2 in 4Kb units.
+         */
+        return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
+}
+
+/* Convert virtual (user) address VADDR to physical address PADDR */
+#define virt_to_phys_040(vaddr)                                         \
+({                                                                      \
+  unsigned long _mmusr, _paddr;                                         \
+                                                                        \
+  __asm__ __volatile__ (".chip 68040\n\t"                               \
+                        "ptestr (%1)\n\t"                               \
+                        "movec %%mmusr,%0\n\t"                          \
+                        ".chip 68k"                                     \
+                        : "=r" (_mmusr)                                 \
+                        : "a" (vaddr));                                 \
+  _paddr = (_mmusr & MMU_R_040) ? (_mmusr & PAGE_MASK) : 0;             \
+  _paddr;                                                               \
+})
+
+static inline int
+cache_flush_040 (unsigned long addr, int scope, int cache, unsigned long len)
+{
+  unsigned long paddr, i;
+
+  switch (scope)
+    {
+    case FLUSH_SCOPE_ALL:
+      switch (cache)
+        {
+        case FLUSH_CACHE_DATA:
+          /* This nop is needed for some broken versions of the 68040.  */
+          __asm__ __volatile__ ("nop\n\t"
+                                ".chip 68040\n\t"
+                                "cpusha %dc\n\t"
+                                ".chip 68k");
+          break;
+        case FLUSH_CACHE_INSN:
+          __asm__ __volatile__ ("nop\n\t"
+                                ".chip 68040\n\t"
+                                "cpusha %ic\n\t"
+                                ".chip 68k");
+          break;
+        default:
+        case FLUSH_CACHE_BOTH:
+          __asm__ __volatile__ ("nop\n\t"
+                                ".chip 68040\n\t"
+                                "cpusha %bc\n\t"
+                                ".chip 68k");
+          break;
+        }
+      break;
+
+    case FLUSH_SCOPE_LINE:
+      /* Find the physical address of the first mapped page in the
+         address range.  */
+      if ((paddr = virt_to_phys_040(addr))) {
+        paddr += addr & ~(PAGE_MASK | 15);
+        len = (len + (addr & 15) + 15) >> 4;
+      } else {
+        unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
+
+        if (len <= tmp)
+          return 0;
+        addr += tmp;
+        len -= tmp;
+        tmp = PAGE_SIZE;
+        for (;;)
+          {
+            if ((paddr = virt_to_phys_040(addr)))
+              break;
+            if (len <= tmp)
+              return 0;
+            addr += tmp;
+            len -= tmp;
+          }
+        len = (len + 15) >> 4;
+      }
+      i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
+      while (len--)
+        {
+          switch (cache)
+            {
+            case FLUSH_CACHE_DATA:
+              __asm__ __volatile__ ("nop\n\t"
+                                    ".chip 68040\n\t"
+                                    "cpushl %%dc,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            case FLUSH_CACHE_INSN:
+              __asm__ __volatile__ ("nop\n\t"
+                                    ".chip 68040\n\t"
+                                    "cpushl %%ic,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            default:
+            case FLUSH_CACHE_BOTH:
+              __asm__ __volatile__ ("nop\n\t"
+                                    ".chip 68040\n\t"
+                                    "cpushl %%bc,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            }
+          if (!--i && len)
+            {
+              /*
+               * No need to page align here since it is done by
+               * virt_to_phys_040().
+               */
+              addr += PAGE_SIZE;
+              i = PAGE_SIZE / 16;
+              /* Recompute physical address when crossing a page
+                 boundary. */
+              for (;;)
+                {
+                  if ((paddr = virt_to_phys_040(addr)))
+                    break;
+                  if (len <= i)
+                    return 0;
+                  len -= i;
+                  addr += PAGE_SIZE;
+                }
+            }
+          else
+            paddr += 16;
+        }
+      break;
+
+    default:
+    case FLUSH_SCOPE_PAGE:
+      len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
+      for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
+        {
+          if (!(paddr = virt_to_phys_040(addr)))
+            continue;
+          switch (cache)
+            {
+            case FLUSH_CACHE_DATA:
+              __asm__ __volatile__ ("nop\n\t"
+                                    ".chip 68040\n\t"
+                                    "cpushp %%dc,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            case FLUSH_CACHE_INSN:
+              __asm__ __volatile__ ("nop\n\t"
+                                    ".chip 68040\n\t"
+                                    "cpushp %%ic,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            default:
+            case FLUSH_CACHE_BOTH:
+              __asm__ __volatile__ ("nop\n\t"
+                                    ".chip 68040\n\t"
+                                    "cpushp %%bc,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            }
+        }
+      break;
+    }
+  return 0;
+}
+
+#define virt_to_phys_060(vaddr)                         \
+({                                                      \
+  unsigned long paddr;                                  \
+  __asm__ __volatile__ (".chip 68060\n\t"               \
+                        "plpar (%0)\n\t"                \
+                        ".chip 68k"                     \
+                        : "=a" (paddr)                  \
+                        : "0" (vaddr));                 \
+  (paddr); /* XXX */                                    \
+})
+
+static inline int
+cache_flush_060 (unsigned long addr, int scope, int cache, unsigned long len)
+{
+  unsigned long paddr, i;
+
+  /*
+   * 68060 manual says:
+   *  cpush %dc : flush DC, remains valid (with our %cacr setup)
+   *  cpush %ic : invalidate IC
+   *  cpush %bc : flush DC + invalidate IC
+   */
+  switch (scope)
+    {
+    case FLUSH_SCOPE_ALL:
+      switch (cache)
+        {
+        case FLUSH_CACHE_DATA:
+          __asm__ __volatile__ (".chip 68060\n\t"
+                                "cpusha %dc\n\t"
+                                ".chip 68k");
+          break;
+        case FLUSH_CACHE_INSN:
+          __asm__ __volatile__ (".chip 68060\n\t"
+                                "cpusha %ic\n\t"
+                                ".chip 68k");
+          break;
+        default:
+        case FLUSH_CACHE_BOTH:
+          __asm__ __volatile__ (".chip 68060\n\t"
+                                "cpusha %bc\n\t"
+                                ".chip 68k");
+          break;
+        }
+      break;
+
+    case FLUSH_SCOPE_LINE:
+      /* Find the physical address of the first mapped page in the
+         address range.  */
+      len += addr & 15;
+      addr &= -16;
+      if (!(paddr = virt_to_phys_060(addr))) {
+        unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);
+
+        if (len <= tmp)
+          return 0;
+        addr += tmp;
+        len -= tmp;
+        tmp = PAGE_SIZE;
+        for (;;)
+          {
+            if ((paddr = virt_to_phys_060(addr)))
+              break;
+            if (len <= tmp)
+              return 0;
+            addr += tmp;
+            len -= tmp;
+          }
+      }
+      len = (len + 15) >> 4;
+      i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
+      while (len--)
+        {
+          switch (cache)
+            {
+            case FLUSH_CACHE_DATA:
+              __asm__ __volatile__ (".chip 68060\n\t"
+                                    "cpushl %%dc,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            case FLUSH_CACHE_INSN:
+              __asm__ __volatile__ (".chip 68060\n\t"
+                                    "cpushl %%ic,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            default:
+            case FLUSH_CACHE_BOTH:
+              __asm__ __volatile__ (".chip 68060\n\t"
+                                    "cpushl %%bc,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            }
+          if (!--i && len)
+            {
+
+              /*
+               * We just want to jump to the first cache line
+               * in the next page.
+               */
+              addr += PAGE_SIZE;
+              addr &= PAGE_MASK;
+
+              i = PAGE_SIZE / 16;
+              /* Recompute physical address when crossing a page
+                 boundary. */
+              for (;;)
+                {
+                  if ((paddr = virt_to_phys_060(addr)))
+                    break;
+                  if (len <= i)
+                    return 0;
+                  len -= i;
+                  addr += PAGE_SIZE;
+                }
+            }
+          else
+            paddr += 16;
+        }
+      break;
+
+    default:
+    case FLUSH_SCOPE_PAGE:
+      len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
+      addr &= PAGE_MASK;        /* Workaround for bug in some
+                                   revisions of the 68060 */
+      for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
+        {
+          if (!(paddr = virt_to_phys_060(addr)))
+            continue;
+          switch (cache)
+            {
+            case FLUSH_CACHE_DATA:
+              __asm__ __volatile__ (".chip 68060\n\t"
+                                    "cpushp %%dc,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            case FLUSH_CACHE_INSN:
+              __asm__ __volatile__ (".chip 68060\n\t"
+                                    "cpushp %%ic,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            default:
+            case FLUSH_CACHE_BOTH:
+              __asm__ __volatile__ (".chip 68060\n\t"
+                                    "cpushp %%bc,(%0)\n\t"
+                                    ".chip 68k"
+                                    : : "a" (paddr));
+              break;
+            }
+        }
+      break;
+    }
+  return 0;
+}
+
+/* sys_cacheflush -- flush (part of) the processor cache.  */
+asmlinkage int
+sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
+{
+        struct vm_area_struct *vma;
+        int ret = -EINVAL;
+
+        if (scope < FLUSH_SCOPE_LINE || scope > FLUSH_SCOPE_ALL ||
+            cache & ~FLUSH_CACHE_BOTH)
+                goto out;
+
+        if (scope == FLUSH_SCOPE_ALL) {
+                /* Only the superuser may explicitly flush the whole cache. */
+                ret = -EPERM;
+                if (!capable(CAP_SYS_ADMIN))
+                        goto out;
+        } else {
+                /*
+                 * Verify that the specified address region actually belongs
+                 * to this process.
+                 */
+                vma = find_vma (current->mm, addr);
+                ret = -EINVAL;
+                /* Check for overflow.  */
+                if (addr + len < addr)
+                        goto out;
+                if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end)
+                        goto out;
+        }
+
+        if (CPU_IS_020_OR_030) {
+                if (scope == FLUSH_SCOPE_LINE && len < 256) {
+                        unsigned long cacr;
+                        __asm__ ("movec %%cacr, %0" : "=r" (cacr));
+                        if (cache & FLUSH_CACHE_INSN)
+                                cacr |= 4;
+                        if (cache & FLUSH_CACHE_DATA)
+                                cacr |= 0x400;
+                        len >>= 2;
+                        while (len--) {
+                                __asm__ __volatile__ ("movec %1, %%caar\n\t"
+                                                      "movec %0, %%cacr"
+                                                      : /* no outputs */
+                                                      : "r" (cacr), "r" (addr));
+                                addr += 4;
+                        }
+                } else {
+                        /* Flush the whole cache, even if page granularity requested. */
+                        unsigned long cacr;
+                        __asm__ ("movec %%cacr, %0" : "=r" (cacr));
+                        if (cache & FLUSH_CACHE_INSN)
+                                cacr |= 8;
+                        if (cache & FLUSH_CACHE_DATA)
+                                cacr |= 0x800;
+                        __asm__ __volatile__ ("movec %0, %%cacr" : : "r" (cacr));
+                }
+                ret = 0;
+                goto out;
+        } else {
+            /*
+             * 040 or 060: don't blindly trust 'scope', someone could
+             * try to flush a few megs of memory.
+             */
+
+            if (len>=3*PAGE_SIZE && scope<FLUSH_SCOPE_PAGE)
+                scope=FLUSH_SCOPE_PAGE;
+            if (len>=10*PAGE_SIZE && scope<FLUSH_SCOPE_ALL)
+                scope=FLUSH_SCOPE_ALL;
+            if (CPU_IS_040) {
+                ret = cache_flush_040 (addr, scope, cache, len);
+            } else if (CPU_IS_060) {
+                ret = cache_flush_060 (addr, scope, cache, len);
+            }
+        }
+out:
+        return ret;
+}
+
+asmlinkage int sys_getpagesize(void)
+{
+        return PAGE_SIZE;
+}
+
+/*
+ * Do a system call from kernel instead of calling sys_execve so we
+ * end up with proper pt_regs.
+ */
+int kernel_execve(const char *filename,
+                  const char *const argv[],
+                  const char *const envp[])
+{
+        register long __res asm ("%d0") = __NR_execve;
+        register long __a asm ("%d1") = (long)(filename);
+        register long __b asm ("%d2") = (long)(argv);
+        register long __c asm ("%d3") = (long)(envp);
+        asm volatile ("trap  #0" : "+d" (__res)
+                        : "d" (__a), "d" (__b), "d" (__c));
+        return __res;
+}
+
+asmlinkage unsigned long sys_get_thread_area(void)
+{
+        return current_thread_info()->tp_value;
+}
+
+asmlinkage int sys_set_thread_area(unsigned long tp)
+{
+        current_thread_info()->tp_value = tp;
+        return 0;
+}
+
+/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
+   D1 (newval).  */
+asmlinkage int
+sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
+                      unsigned long __user * mem)
+{
+        /* This was borrowed from ARM's implementation.  */
+        for (;;) {
+                struct mm_struct *mm = current->mm;
+                pgd_t *pgd;
+                pmd_t *pmd;
+                pte_t *pte;
+                spinlock_t *ptl;
+                unsigned long mem_value;
+
+                down_read(&mm->mmap_sem);
+                pgd = pgd_offset(mm, (unsigned long)mem);
+                if (!pgd_present(*pgd))
+                        goto bad_access;
+                pmd = pmd_offset(pgd, (unsigned long)mem);
+                if (!pmd_present(*pmd))
+                        goto bad_access;
+                pte = pte_offset_map_lock(mm, pmd, (unsigned long)mem, &ptl);
+                if (!pte_present(*pte) || !pte_dirty(*pte)
+                    || !pte_write(*pte)) {
+                        pte_unmap_unlock(pte, ptl);
+                        goto bad_access;
+                }
+
+                mem_value = *mem;
+                if (mem_value == oldval)
+                        *mem = newval;
+
+                pte_unmap_unlock(pte, ptl);
+                up_read(&mm->mmap_sem);
+                return mem_value;
+
+              bad_access:
+                up_read(&mm->mmap_sem);
+                /* This is not necessarily a bad access, we can get here if
+                   a memory we're trying to write to should be copied-on-write.
+                   Make the kernel do the necessary page stuff, then re-iterate.
+                   Simulate a write access fault to do that.  */
+                {
+                        /* The first argument of the function corresponds to
+                           D1, which is the first field of struct pt_regs.  */
+                        struct pt_regs *fp = (struct pt_regs *)&newval;
+
+                        /* '3' is an RMW flag.  */
+                        if (do_page_fault(fp, (unsigned long)mem, 3))
+                                /* If the do_page_fault() failed, we don't
+                                   have anything meaningful to return.
+                                   There should be a SIGSEGV pending for
+                                   the process.  */
+                                return 0xdeadbeef;
+                }
+        }
+}
+
+asmlinkage int sys_atomic_barrier(void)
+{
+        /* no code needed for uniprocs */
+        return 0;
+}
diff --git a/arch/m68k/kernel/sys_m68k_no.c b/arch/m68k/kernel/sys_m68k_no.c
new file mode 100644
index 000000000000..68488ae47f0a
--- /dev/null
+++ b/arch/m68k/kernel/sys_m68k_no.c
@@ -0,0 +1,94 @@
+/*
+ * linux/arch/m68knommu/kernel/sys_m68k.c
+ *
+ * This file contains various random system calls that
+ * have a non-standard calling sequence on the Linux/m68k
+ * platform.
+ */
+
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/smp.h>
+#include <linux/sem.h>
+#include <linux/msg.h>
+#include <linux/shm.h>
+#include <linux/stat.h>
+#include <linux/syscalls.h>
+#include <linux/mman.h>
+#include <linux/file.h>
+#include <linux/ipc.h>
+#include <linux/fs.h>
+
+#include <asm/setup.h>
+#include <asm/uaccess.h>
+#include <asm/cachectl.h>
+#include <asm/traps.h>
+#include <asm/cacheflush.h>
+#include <asm/unistd.h>
+
+/* sys_cacheflush -- flush (part of) the processor cache.  */
+asmlinkage int
+sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
+{
+        flush_cache_all();
+        return(0);
+}
+
+asmlinkage int sys_getpagesize(void)
+{
+        return PAGE_SIZE;
+}
+
+/*
+ * Do a system call from kernel instead of calling sys_execve so we
+ * end up with proper pt_regs.
+ */
+int kernel_execve(const char *filename,
+                  const char *const argv[],
+                  const char *const envp[])
+{
+        register long __res asm ("%d0") = __NR_execve;
+        register long __a asm ("%d1") = (long)(filename);
+        register long __b asm ("%d2") = (long)(argv);
+        register long __c asm ("%d3") = (long)(envp);
+        asm volatile ("trap  #0" : "+d" (__res)
+                        : "d" (__a), "d" (__b), "d" (__c));
+        return __res;
+}
+
+asmlinkage unsigned long sys_get_thread_area(void)
+{
+        return current_thread_info()->tp_value;
+}
+
+asmlinkage int sys_set_thread_area(unsigned long tp)
+{
+        current_thread_info()->tp_value = tp;
+        return 0;
+}
+
+/* This syscall gets its arguments in A0 (mem), D2 (oldval) and
+   D1 (newval).  */
+asmlinkage int
+sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
+                      unsigned long __user * mem)
+{
+        struct mm_struct *mm = current->mm;
+        unsigned long mem_value;
+
+        down_read(&mm->mmap_sem);
+
+        mem_value = *mem;
+        if (mem_value == oldval)
+                *mem = newval;
+
+        up_read(&mm->mmap_sem);
+        return mem_value;
+}
+
+asmlinkage int sys_atomic_barrier(void)
+{
+        /* no code needed for uniprocs */
+        return 0;
+}
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
new file mode 100644
index 000000000000..79b1ed198c07
--- /dev/null
+++ b/arch/m68k/kernel/syscalltable.S
@@ -0,0 +1,365 @@
+/*
+ *  linux/arch/m68knommu/kernel/syscalltable.S
+ *
+ *  Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
+ *
+ *  Based on older entry.S files, the following copyrights apply:
+ *
+ *  Copyright (C) 1998  D. Jeff Dionne <jeff@lineo.ca>,
+ *                      Kenneth Albanowski <kjahds@kjahds.com>,
+ *  Copyright (C) 2000  Lineo Inc. (www.lineo.com) 
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ */
+
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/unistd.h>
+
+.text
+ALIGN
+ENTRY(sys_call_table)
+        .long sys_restart_syscall       /* 0  -  old "setup()" system call */
+        .long sys_exit
+        .long sys_fork
+        .long sys_read
+        .long sys_write
+        .long sys_open          /* 5 */
+        .long sys_close
+        .long sys_waitpid
+        .long sys_creat
+        .long sys_link
+        .long sys_unlink        /* 10 */
+        .long sys_execve
+        .long sys_chdir
+        .long sys_time
+        .long sys_mknod
+        .long sys_chmod         /* 15 */
+        .long sys_chown16
+        .long sys_ni_syscall    /* old break syscall holder */
+        .long sys_stat
+        .long sys_lseek
+        .long sys_getpid        /* 20 */
+        .long sys_mount
+        .long sys_oldumount
+        .long sys_setuid16
+        .long sys_getuid16
+        .long sys_stime         /* 25 */
+        .long sys_ptrace
+        .long sys_alarm
+        .long sys_fstat
+        .long sys_pause
+        .long sys_utime         /* 30 */
+        .long sys_ni_syscall    /* old stty syscall holder */
+        .long sys_ni_syscall    /* old gtty syscall holder */
+        .long sys_access
+        .long sys_nice
+        .long sys_ni_syscall    /* 35 */ /* old ftime syscall holder */
+        .long sys_sync
+        .long sys_kill
+        .long sys_rename
+        .long sys_mkdir
+        .long sys_rmdir         /* 40 */
+        .long sys_dup
+        .long sys_pipe
+        .long sys_times
+        .long sys_ni_syscall    /* old prof syscall holder */
+        .long sys_brk           /* 45 */
+        .long sys_setgid16
+        .long sys_getgid16
+        .long sys_signal
+        .long sys_geteuid16
+        .long sys_getegid16     /* 50 */
+        .long sys_acct
+        .long sys_umount        /* recycled never used phys() */
+        .long sys_ni_syscall    /* old lock syscall holder */
+        .long sys_ioctl
+        .long sys_fcntl         /* 55 */
+        .long sys_ni_syscall    /* old mpx syscall holder */
+        .long sys_setpgid
+        .long sys_ni_syscall    /* old ulimit syscall holder */
+        .long sys_ni_syscall
+        .long sys_umask         /* 60 */
+        .long sys_chroot
+        .long sys_ustat
+        .long sys_dup2
+        .long sys_getppid
+        .long sys_getpgrp       /* 65 */
+        .long sys_setsid
+        .long sys_sigaction
+        .long sys_sgetmask
+        .long sys_ssetmask
+        .long sys_setreuid16    /* 70 */
+        .long sys_setregid16
+        .long sys_sigsuspend
+        .long sys_sigpending
+        .long sys_sethostname
+        .long sys_setrlimit     /* 75 */
+        .long sys_old_getrlimit
+        .long sys_getrusage
+        .long sys_gettimeofday
+        .long sys_settimeofday
+        .long sys_getgroups16   /* 80 */
+        .long sys_setgroups16
+        .long sys_old_select
+        .long sys_symlink
+        .long sys_lstat
+        .long sys_readlink      /* 85 */
+        .long sys_uselib
+        .long sys_ni_syscall    /* sys_swapon */
+        .long sys_reboot
+        .long sys_old_readdir
+        .long sys_old_mmap      /* 90 */
+        .long sys_munmap
+        .long sys_truncate
+        .long sys_ftruncate
+        .long sys_fchmod
+        .long sys_fchown16      /* 95 */
+        .long sys_getpriority
+        .long sys_setpriority
+        .long sys_ni_syscall    /* old profil syscall holder */
+        .long sys_statfs
+        .long sys_fstatfs       /* 100 */
+        .long sys_ni_syscall    /* ioperm for i386 */
+        .long sys_socketcall
+        .long sys_syslog
+        .long sys_setitimer
+        .long sys_getitimer     /* 105 */
+        .long sys_newstat
+        .long sys_newlstat
+        .long sys_newfstat
+        .long sys_ni_syscall
+        .long sys_ni_syscall    /* iopl for i386 */ /* 110 */
+        .long sys_vhangup
+        .long sys_ni_syscall    /* obsolete idle() syscall */
+        .long sys_ni_syscall    /* vm86old for i386 */
+        .long sys_wait4
+        .long sys_ni_syscall    /* 115 */ /* sys_swapoff */
+        .long sys_sysinfo
+        .long sys_ipc
+        .long sys_fsync
+        .long sys_sigreturn
+        .long sys_clone         /* 120 */
+        .long sys_setdomainname
+        .long sys_newuname
+        .long sys_cacheflush    /* modify_ldt for i386 */
+        .long sys_adjtimex
+        .long sys_ni_syscall    /* 125 */ /* sys_mprotect */
+        .long sys_sigprocmask
+        .long sys_ni_syscall    /* old "creat_module" */
+        .long sys_init_module
+        .long sys_delete_module
+        .long sys_ni_syscall    /* 130: old "get_kernel_syms" */
+        .long sys_quotactl
+        .long sys_getpgid
+        .long sys_fchdir
+        .long sys_bdflush
+        .long sys_sysfs         /* 135 */
+        .long sys_personality
+        .long sys_ni_syscall    /* for afs_syscall */
+        .long sys_setfsuid16
+        .long sys_setfsgid16
+        .long sys_llseek        /* 140 */
+        .long sys_getdents
+        .long sys_select
+        .long sys_flock
+        .long sys_ni_syscall    /* sys_msync */
+        .long sys_readv         /* 145 */
+        .long sys_writev
+        .long sys_getsid
+        .long sys_fdatasync
+        .long sys_sysctl
+        .long sys_ni_syscall    /* 150 */ /* sys_mlock */
+        .long sys_ni_syscall    /* sys_munlock */
+        .long sys_ni_syscall    /* sys_mlockall */
+        .long sys_ni_syscall    /* sys_munlockall */
+        .long sys_sched_setparam
+        .long sys_sched_getparam /* 155 */
+        .long sys_sched_setscheduler
+        .long sys_sched_getscheduler
+        .long sys_sched_yield
+        .long sys_sched_get_priority_max
+        .long sys_sched_get_priority_min  /* 160 */
+        .long sys_sched_rr_get_interval
+        .long sys_nanosleep
+        .long sys_ni_syscall    /* sys_mremap */
+        .long sys_setresuid16
+        .long sys_getresuid16   /* 165 */
+        .long sys_getpagesize   /* sys_getpagesize */
+        .long sys_ni_syscall    /* old "query_module" */
+        .long sys_poll
+        .long sys_ni_syscall    /* sys_nfsservctl */
+        .long sys_setresgid16   /* 170 */
+        .long sys_getresgid16
+        .long sys_prctl
+        .long sys_rt_sigreturn
+        .long sys_rt_sigaction
+        .long sys_rt_sigprocmask /* 175 */
+        .long sys_rt_sigpending
+        .long sys_rt_sigtimedwait
+        .long sys_rt_sigqueueinfo
+        .long sys_rt_sigsuspend
+        .long sys_pread64       /* 180 */
+        .long sys_pwrite64
+        .long sys_lchown16
+        .long sys_getcwd
+        .long sys_capget
+        .long sys_capset        /* 185 */
+        .long sys_sigaltstack
+        .long sys_sendfile
+        .long sys_ni_syscall    /* streams1 */
+        .long sys_ni_syscall    /* streams2 */
+        .long sys_vfork         /* 190 */
+        .long sys_getrlimit
+        .long sys_mmap_pgoff
+        .long sys_truncate64
+        .long sys_ftruncate64
+        .long sys_stat64        /* 195 */
+        .long sys_lstat64
+        .long sys_fstat64
+        .long sys_chown
+        .long sys_getuid
+        .long sys_getgid        /* 200 */
+        .long sys_geteuid
+        .long sys_getegid
+        .long sys_setreuid
+        .long sys_setregid
+        .long sys_getgroups     /* 205 */
+        .long sys_setgroups
+        .long sys_fchown
+        .long sys_setresuid
+        .long sys_getresuid
+        .long sys_setresgid     /* 210 */
+        .long sys_getresgid
+        .long sys_lchown
+        .long sys_setuid
+        .long sys_setgid
+        .long sys_setfsuid      /* 215 */
+        .long sys_setfsgid
+        .long sys_pivot_root
+        .long sys_ni_syscall
+        .long sys_ni_syscall
+        .long sys_getdents64    /* 220 */
+        .long sys_gettid
+        .long sys_tkill
+        .long sys_setxattr
+        .long sys_lsetxattr
+        .long sys_fsetxattr     /* 225 */
+        .long sys_getxattr
+        .long sys_lgetxattr
+        .long sys_fgetxattr
+        .long sys_listxattr
+        .long sys_llistxattr    /* 230 */
+        .long sys_flistxattr
+        .long sys_removexattr
+        .long sys_lremovexattr
+        .long sys_fremovexattr
+        .long sys_futex         /* 235 */
+        .long sys_sendfile64
+        .long sys_ni_syscall    /* sys_mincore */
+        .long sys_ni_syscall    /* sys_madvise */
+        .long sys_fcntl64
+        .long sys_readahead     /* 240 */
+        .long sys_io_setup
+        .long sys_io_destroy
+        .long sys_io_getevents
+        .long sys_io_submit
+        .long sys_io_cancel     /* 245 */
+        .long sys_fadvise64
+        .long sys_exit_group
+        .long sys_lookup_dcookie
+        .long sys_epoll_create
+        .long sys_epoll_ctl     /* 250 */
+        .long sys_epoll_wait
+        .long sys_ni_syscall    /* sys_remap_file_pages */
+        .long sys_set_tid_address
+        .long sys_timer_create
+        .long sys_timer_settime /* 255 */
+        .long sys_timer_gettime
+        .long sys_timer_getoverrun
+        .long sys_timer_delete
+        .long sys_clock_settime
+        .long sys_clock_gettime /* 260 */
+        .long sys_clock_getres
+        .long sys_clock_nanosleep
+        .long sys_statfs64
+        .long sys_fstatfs64
+        .long sys_tgkill        /* 265 */
+        .long sys_utimes
+        .long sys_fadvise64_64
+        .long sys_mbind 
+        .long sys_get_mempolicy
+        .long sys_set_mempolicy /* 270 */
+        .long sys_mq_open
+        .long sys_mq_unlink
+        .long sys_mq_timedsend
+        .long sys_mq_timedreceive
+        .long sys_mq_notify     /* 275 */
+        .long sys_mq_getsetattr
+        .long sys_waitid
+        .long sys_ni_syscall    /* for sys_vserver */
+        .long sys_add_key
+        .long sys_request_key   /* 280 */
+        .long sys_keyctl
+        .long sys_ioprio_set
+        .long sys_ioprio_get
+        .long sys_inotify_init
+        .long sys_inotify_add_watch     /* 285 */
+        .long sys_inotify_rm_watch
+        .long sys_migrate_pages
+        .long sys_openat
+        .long sys_mkdirat
+        .long sys_mknodat               /* 290 */
+        .long sys_fchownat
+        .long sys_futimesat
+        .long sys_fstatat64
+        .long sys_unlinkat
+        .long sys_renameat              /* 295 */
+        .long sys_linkat
+        .long sys_symlinkat
+        .long sys_readlinkat
+        .long sys_fchmodat
+        .long sys_faccessat             /* 300 */
+        .long sys_ni_syscall            /* Reserved for pselect6 */
+        .long sys_ni_syscall            /* Reserved for ppoll */
+        .long sys_unshare
+        .long sys_set_robust_list
+        .long sys_get_robust_list       /* 305 */
+        .long sys_splice
+        .long sys_sync_file_range
+        .long sys_tee
+        .long sys_vmsplice
+        .long sys_move_pages            /* 310 */
+        .long sys_sched_setaffinity
+        .long sys_sched_getaffinity
+        .long sys_kexec_load
+        .long sys_getcpu
+        .long sys_epoll_pwait           /* 315 */
+        .long sys_utimensat
+        .long sys_signalfd
+        .long sys_timerfd_create
+        .long sys_eventfd
+        .long sys_fallocate             /* 320 */
+        .long sys_timerfd_settime
+        .long sys_timerfd_gettime
+        .long sys_signalfd4
+        .long sys_eventfd2
+        .long sys_epoll_create1         /* 325 */
+        .long sys_dup3
+        .long sys_pipe2
+        .long sys_inotify_init1
+        .long sys_preadv
+        .long sys_pwritev               /* 330 */
+        .long sys_rt_tgsigqueueinfo
+        .long sys_perf_event_open
+        .long sys_get_thread_area
+        .long sys_set_thread_area
+        .long sys_atomic_cmpxchg_32     /* 335 */
+        .long sys_atomic_barrier
+        .long sys_fanotify_init
+        .long sys_fanotify_mark
+        .long sys_prlimit64
+
+        .rept NR_syscalls-(.-sys_call_table)/4
+                .long sys_ni_syscall
+        .endr
+
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index 18b34ee5db3b..a5cf40c26de5 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -1,114 +1,5 @@
-/*
- *  linux/arch/m68k/kernel/time.c
- *
- *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
- *
- * This file contains the m68k-specific time handling details.
- * Most of the stuff is located in the machine specific files.
- *
- * 1997-09-10   Updated NTP code according to technical memorandum Jan '96
- *              "A Kernel Model for Precision Timekeeping" by Dave Mills
- */
-
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/rtc.h>
-#include <linux/platform_device.h>
-
-#include <asm/machdep.h>
-#include <asm/io.h>
-#include <asm/irq_regs.h>
-
-#include <linux/time.h>
-#include <linux/timex.h>
-#include <linux/profile.h>
-
-static inline int set_rtc_mmss(unsigned long nowtime)
-{
-  if (mach_set_clock_mmss)
-    return mach_set_clock_mmss (nowtime);
-  return -1;
-}
-
-/*
- * timer_interrupt() needs to keep up the real-time clock,
- * as well as call the "xtime_update()" routine every clocktick
- */
-static irqreturn_t timer_interrupt(int irq, void *dummy)
-{
-        xtime_update(1);
-        update_process_times(user_mode(get_irq_regs()));
-        profile_tick(CPU_PROFILING);
-
-#ifdef CONFIG_HEARTBEAT
-        /* use power LED as a heartbeat instead -- much more useful
-           for debugging -- based on the version for PReP by Cort */
-        /* acts like an actual heart beat -- ie thump-thump-pause... */
-        if (mach_heartbeat) {
-            static unsigned cnt = 0, period = 0, dist = 0;
-
-            if (cnt == 0 || cnt == dist)
-                mach_heartbeat( 1 );
-            else if (cnt == 7 || cnt == dist+7)
-                mach_heartbeat( 0 );
-
-            if (++cnt > period) {
-                cnt = 0;
-                /* The hyperbolic function below modifies the heartbeat period
-                 * length in dependency of the current (5min) load. It goes
-                 * through the points f(0)=126, f(1)=86, f(5)=51,
-                 * f(inf)->30. */
-                period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
-                dist = period / 4;
-            }
-        }
-#endif /* CONFIG_HEARTBEAT */
-        return IRQ_HANDLED;
-}
-
-void read_persistent_clock(struct timespec *ts)
-{
-        struct rtc_time time;
-        ts->tv_sec = 0;
-        ts->tv_nsec = 0;
-
-        if (mach_hwclk) {
-                mach_hwclk(0, &time);
-
-                if ((time.tm_year += 1900) < 1970)
-                        time.tm_year += 100;
-                ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday,
-                                      time.tm_hour, time.tm_min, time.tm_sec);
-        }
-}
-
-void __init time_init(void)
-{
-        mach_sched_init(timer_interrupt);
-}
-
-u32 arch_gettimeoffset(void)
-{
-        return mach_gettimeoffset() * 1000;
-}
-
-static int __init rtc_init(void)
-{
-        struct platform_device *pdev;
-
-        if (!mach_hwclk)
-                return -ENODEV;
-
-        pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0);
-        if (IS_ERR(pdev))
-                return PTR_ERR(pdev);
-
-        return 0;
-}
-
-module_init(rtc_init);
+#ifdef CONFIG_MMU
+#include "time_mm.c"
+#else
+#include "time_no.c"
+#endif
diff --git a/arch/m68k/kernel/time_mm.c b/arch/m68k/kernel/time_mm.c
new file mode 100644
index 000000000000..18b34ee5db3b
--- /dev/null
+++ b/arch/m68k/kernel/time_mm.c
@@ -0,0 +1,114 @@
+/*
+ *  linux/arch/m68k/kernel/time.c
+ *
+ *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
+ *
+ * This file contains the m68k-specific time handling details.
+ * Most of the stuff is located in the machine specific files.
+ *
+ * 1997-09-10   Updated NTP code according to technical memorandum Jan '96
+ *              "A Kernel Model for Precision Timekeeping" by Dave Mills
+ */
+
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/rtc.h>
+#include <linux/platform_device.h>
+
+#include <asm/machdep.h>
+#include <asm/io.h>
+#include <asm/irq_regs.h>
+
+#include <linux/time.h>
+#include <linux/timex.h>
+#include <linux/profile.h>
+
+static inline int set_rtc_mmss(unsigned long nowtime)
+{
+  if (mach_set_clock_mmss)
+    return mach_set_clock_mmss (nowtime);
+  return -1;
+}
+
+/*
+ * timer_interrupt() needs to keep up the real-time clock,
+ * as well as call the "xtime_update()" routine every clocktick
+ */
+static irqreturn_t timer_interrupt(int irq, void *dummy)
+{
+        xtime_update(1);
+        update_process_times(user_mode(get_irq_regs()));
+        profile_tick(CPU_PROFILING);
+
+#ifdef CONFIG_HEARTBEAT
+        /* use power LED as a heartbeat instead -- much more useful
+           for debugging -- based on the version for PReP by Cort */
+        /* acts like an actual heart beat -- ie thump-thump-pause... */
+        if (mach_heartbeat) {
+            static unsigned cnt = 0, period = 0, dist = 0;
+
+            if (cnt == 0 || cnt == dist)
+                mach_heartbeat( 1 );
+            else if (cnt == 7 || cnt == dist+7)
+                mach_heartbeat( 0 );
+
+            if (++cnt > period) {
+                cnt = 0;
+                /* The hyperbolic function below modifies the heartbeat period
+                 * length in dependency of the current (5min) load. It goes
+                 * through the points f(0)=126, f(1)=86, f(5)=51,
+                 * f(inf)->30. */
+                period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
+                dist = period / 4;
+            }
+        }
+#endif /* CONFIG_HEARTBEAT */
+        return IRQ_HANDLED;
+}
+
+void read_persistent_clock(struct timespec *ts)
+{
+        struct rtc_time time;
+        ts->tv_sec = 0;
+        ts->tv_nsec = 0;
+
+        if (mach_hwclk) {
+                mach_hwclk(0, &time);
+
+                if ((time.tm_year += 1900) < 1970)
+                        time.tm_year += 100;
+                ts->tv_sec = mktime(time.tm_year, time.tm_mon, time.tm_mday,
+                                      time.tm_hour, time.tm_min, time.tm_sec);
+        }
+}
+
+void __init time_init(void)
+{
+        mach_sched_init(timer_interrupt);
+}
+
+u32 arch_gettimeoffset(void)
+{
+        return mach_gettimeoffset() * 1000;
+}
+
+static int __init rtc_init(void)
+{
+        struct platform_device *pdev;
+
+        if (!mach_hwclk)
+                return -ENODEV;
+
+        pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0);
+        if (IS_ERR(pdev))
+                return PTR_ERR(pdev);
+
+        return 0;
+}
+
+module_init(rtc_init);
diff --git a/arch/m68k/kernel/time_no.c b/arch/m68k/kernel/time_no.c
new file mode 100644
index 000000000000..6623909f70e6
--- /dev/null
+++ b/arch/m68k/kernel/time_no.c
@@ -0,0 +1,87 @@
+/*
+ *  linux/arch/m68knommu/kernel/time.c
+ *
+ *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
+ *
+ * This file contains the m68k-specific time handling details.
+ * Most of the stuff is located in the machine specific files.
+ *
+ * 1997-09-10   Updated NTP code according to technical memorandum Jan '96
+ *              "A Kernel Model for Precision Timekeeping" by Dave Mills
+ */
+
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/profile.h>
+#include <linux/time.h>
+#include <linux/timex.h>
+
+#include <asm/machdep.h>
+#include <asm/irq_regs.h>
+
+#define TICK_SIZE (tick_nsec / 1000)
+
+static inline int set_rtc_mmss(unsigned long nowtime)
+{
+        if (mach_set_clock_mmss)
+                return mach_set_clock_mmss (nowtime);
+        return -1;
+}
+
+#ifndef CONFIG_GENERIC_CLOCKEVENTS
+/*
+ * timer_interrupt() needs to keep up the real-time clock,
+ * as well as call the "xtime_update()" routine every clocktick
+ */
+irqreturn_t arch_timer_interrupt(int irq, void *dummy)
+{
+
+        if (current->pid)
+                profile_tick(CPU_PROFILING);
+
+        xtime_update(1);
+
+        update_process_times(user_mode(get_irq_regs()));
+
+        return(IRQ_HANDLED);
+}
+#endif
+
+static unsigned long read_rtc_mmss(void)
+{
+        unsigned int year, mon, day, hour, min, sec;
+
+        if (mach_gettod) {
+                mach_gettod(&year, &mon, &day, &hour, &min, &sec);
+                if ((year += 1900) < 1970)
+                        year += 100;
+        } else {
+                year = 1970;
+                mon = day = 1;
+                hour = min = sec = 0;
+        }
+
+
+        return  mktime(year, mon, day, hour, min, sec);
+}
+
+void read_persistent_clock(struct timespec *ts)
+{
+        ts->tv_sec = read_rtc_mmss();
+        ts->tv_nsec = 0;
+}
+
+int update_persistent_clock(struct timespec now)
+{
+        return set_rtc_mmss(now.tv_sec);
+}
+
+void time_init(void)
+{
+        hw_timer_init();
+}
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index 4022bbc28878..c98add3f5f0f 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -1,1207 +1,5 @@
-/*
- *  linux/arch/m68k/kernel/traps.c
- *
- *  Copyright (C) 1993, 1994 by Hamish Macdonald
- *
- *  68040 fixes by Michael Rausch
- *  68040 fixes by Martin Apel
- *  68040 fixes and writeback by Richard Zidlicky
- *  68060 fixes by Roman Hodek
- *  68060 fixes by Jesper Skov
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-/*
- * Sets up all exception vectors
- */
-
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/user.h>
-#include <linux/string.h>
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <linux/ptrace.h>
-#include <linux/kallsyms.h>
-
-#include <asm/setup.h>
-#include <asm/fpu.h>
-#include <asm/system.h>
-#include <asm/uaccess.h>
-#include <asm/traps.h>
-#include <asm/pgalloc.h>
-#include <asm/machdep.h>
-#include <asm/siginfo.h>
-
-/* assembler routines */
-asmlinkage void system_call(void);
-asmlinkage void buserr(void);
-asmlinkage void trap(void);
-asmlinkage void nmihandler(void);
-#ifdef CONFIG_M68KFPU_EMU
-asmlinkage void fpu_emu(void);
-#endif
-
-e_vector vectors[256];
-
-/* nmi handler for the Amiga */
-asm(".text\n"
-    __ALIGN_STR "\n"
-    "nmihandler: rte");
-
-/*
- * this must be called very early as the kernel might
- * use some instruction that are emulated on the 060
- * and so we're prepared for early probe attempts (e.g. nf_init).
- */
-void __init base_trap_init(void)
-{
-        if (MACH_IS_SUN3X) {
-                extern e_vector *sun3x_prom_vbr;
-
-                __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
-        }
-
-        /* setup the exception vector table */
-        __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
-
-        if (CPU_IS_060) {
-                /* set up ISP entry points */
-                asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
-
-                vectors[VEC_UNIMPII] = unimp_vec;
-        }
-
-        vectors[VEC_BUSERR] = buserr;
-        vectors[VEC_ILLEGAL] = trap;
-        vectors[VEC_SYS] = system_call;
-}
-
-void __init trap_init (void)
-{
-        int i;
-
-        for (i = VEC_SPUR; i <= VEC_INT7; i++)
-                vectors[i] = bad_inthandler;
-
-        for (i = 0; i < VEC_USER; i++)
-                if (!vectors[i])
-                        vectors[i] = trap;
-
-        for (i = VEC_USER; i < 256; i++)
-                vectors[i] = bad_inthandler;
-
-#ifdef CONFIG_M68KFPU_EMU
-        if (FPU_IS_EMU)
-                vectors[VEC_LINE11] = fpu_emu;
-#endif
-
-        if (CPU_IS_040 && !FPU_IS_EMU) {
-                /* set up FPSP entry points */
-                asmlinkage void dz_vec(void) asm ("dz");
-                asmlinkage void inex_vec(void) asm ("inex");
-                asmlinkage void ovfl_vec(void) asm ("ovfl");
-                asmlinkage void unfl_vec(void) asm ("unfl");
-                asmlinkage void snan_vec(void) asm ("snan");
-                asmlinkage void operr_vec(void) asm ("operr");
-                asmlinkage void bsun_vec(void) asm ("bsun");
-                asmlinkage void fline_vec(void) asm ("fline");
-                asmlinkage void unsupp_vec(void) asm ("unsupp");
-
-                vectors[VEC_FPDIVZ] = dz_vec;
-                vectors[VEC_FPIR] = inex_vec;
-                vectors[VEC_FPOVER] = ovfl_vec;
-                vectors[VEC_FPUNDER] = unfl_vec;
-                vectors[VEC_FPNAN] = snan_vec;
-                vectors[VEC_FPOE] = operr_vec;
-                vectors[VEC_FPBRUC] = bsun_vec;
-                vectors[VEC_LINE11] = fline_vec;
-                vectors[VEC_FPUNSUP] = unsupp_vec;
-        }
-
-        if (CPU_IS_060 && !FPU_IS_EMU) {
-                /* set up IFPSP entry points */
-                asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
-                asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
-                asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
-                asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
-                asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
-                asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
-                asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
-                asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
-                asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
-
-                vectors[VEC_FPNAN] = snan_vec6;
-                vectors[VEC_FPOE] = operr_vec6;
-                vectors[VEC_FPOVER] = ovfl_vec6;
-                vectors[VEC_FPUNDER] = unfl_vec6;
-                vectors[VEC_FPDIVZ] = dz_vec6;
-                vectors[VEC_FPIR] = inex_vec6;
-                vectors[VEC_LINE11] = fline_vec6;
-                vectors[VEC_FPUNSUP] = unsupp_vec6;
-                vectors[VEC_UNIMPEA] = effadd_vec6;
-        }
-
-        /* if running on an amiga, make the NMI interrupt do nothing */
-        if (MACH_IS_AMIGA) {
-                vectors[VEC_INT7] = nmihandler;
-        }
-}
-
-
-static const char *vec_names[] = {
-        [VEC_RESETSP]   = "RESET SP",
-        [VEC_RESETPC]   = "RESET PC",
-        [VEC_BUSERR]    = "BUS ERROR",
-        [VEC_ADDRERR]   = "ADDRESS ERROR",
-        [VEC_ILLEGAL]   = "ILLEGAL INSTRUCTION",
-        [VEC_ZERODIV]   = "ZERO DIVIDE",
-        [VEC_CHK]       = "CHK",
-        [VEC_TRAP]      = "TRAPcc",
-        [VEC_PRIV]      = "PRIVILEGE VIOLATION",
-        [VEC_TRACE]     = "TRACE",
-        [VEC_LINE10]    = "LINE 1010",
-        [VEC_LINE11]    = "LINE 1111",
-        [VEC_RESV12]    = "UNASSIGNED RESERVED 12",
-        [VEC_COPROC]    = "COPROCESSOR PROTOCOL VIOLATION",
-        [VEC_FORMAT]    = "FORMAT ERROR",
-        [VEC_UNINT]     = "UNINITIALIZED INTERRUPT",
-        [VEC_RESV16]    = "UNASSIGNED RESERVED 16",
-        [VEC_RESV17]    = "UNASSIGNED RESERVED 17",
-        [VEC_RESV18]    = "UNASSIGNED RESERVED 18",
-        [VEC_RESV19]    = "UNASSIGNED RESERVED 19",
-        [VEC_RESV20]    = "UNASSIGNED RESERVED 20",
-        [VEC_RESV21]    = "UNASSIGNED RESERVED 21",
-        [VEC_RESV22]    = "UNASSIGNED RESERVED 22",
-        [VEC_RESV23]    = "UNASSIGNED RESERVED 23",
-        [VEC_SPUR]      = "SPURIOUS INTERRUPT",
-        [VEC_INT1]      = "LEVEL 1 INT",
-        [VEC_INT2]      = "LEVEL 2 INT",
-        [VEC_INT3]      = "LEVEL 3 INT",
-        [VEC_INT4]      = "LEVEL 4 INT",
-        [VEC_INT5]      = "LEVEL 5 INT",
-        [VEC_INT6]      = "LEVEL 6 INT",
-        [VEC_INT7]      = "LEVEL 7 INT",
-        [VEC_SYS]       = "SYSCALL",
-        [VEC_TRAP1]     = "TRAP #1",
-        [VEC_TRAP2]     = "TRAP #2",
-        [VEC_TRAP3]     = "TRAP #3",
-        [VEC_TRAP4]     = "TRAP #4",
-        [VEC_TRAP5]     = "TRAP #5",
-        [VEC_TRAP6]     = "TRAP #6",
-        [VEC_TRAP7]     = "TRAP #7",
-        [VEC_TRAP8]     = "TRAP #8",
-        [VEC_TRAP9]     = "TRAP #9",
-        [VEC_TRAP10]    = "TRAP #10",
-        [VEC_TRAP11]    = "TRAP #11",
-        [VEC_TRAP12]    = "TRAP #12",
-        [VEC_TRAP13]    = "TRAP #13",
-        [VEC_TRAP14]    = "TRAP #14",
-        [VEC_TRAP15]    = "TRAP #15",
-        [VEC_FPBRUC]    = "FPCP BSUN",
-        [VEC_FPIR]      = "FPCP INEXACT",
-        [VEC_FPDIVZ]    = "FPCP DIV BY 0",
-        [VEC_FPUNDER]   = "FPCP UNDERFLOW",
-        [VEC_FPOE]      = "FPCP OPERAND ERROR",
-        [VEC_FPOVER]    = "FPCP OVERFLOW",
-        [VEC_FPNAN]     = "FPCP SNAN",
-        [VEC_FPUNSUP]   = "FPCP UNSUPPORTED OPERATION",
-        [VEC_MMUCFG]    = "MMU CONFIGURATION ERROR",
-        [VEC_MMUILL]    = "MMU ILLEGAL OPERATION ERROR",
-        [VEC_MMUACC]    = "MMU ACCESS LEVEL VIOLATION ERROR",
-        [VEC_RESV59]    = "UNASSIGNED RESERVED 59",
-        [VEC_UNIMPEA]   = "UNASSIGNED RESERVED 60",
-        [VEC_UNIMPII]   = "UNASSIGNED RESERVED 61",
-        [VEC_RESV62]    = "UNASSIGNED RESERVED 62",
-        [VEC_RESV63]    = "UNASSIGNED RESERVED 63",
-};
-
-static const char *space_names[] = {
-        [0]             = "Space 0",
-        [USER_DATA]     = "User Data",
-        [USER_PROGRAM]  = "User Program",
-#ifndef CONFIG_SUN3
-        [3]             = "Space 3",
+#ifdef CONFIG_MMU
+#include "traps_mm.c"
 #else
-        [FC_CONTROL]    = "Control",
-#endif
-        [4]             = "Space 4",
-        [SUPER_DATA]    = "Super Data",
-        [SUPER_PROGRAM] = "Super Program",
-        [CPU_SPACE]     = "CPU"
-};
-
-void die_if_kernel(char *,struct pt_regs *,int);
-asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
-                             unsigned long error_code);
-int send_fault_sig(struct pt_regs *regs);
-
-asmlinkage void trap_c(struct frame *fp);
-
-#if defined (CONFIG_M68060)
-static inline void access_error060 (struct frame *fp)
-{
-        unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
-
-#ifdef DEBUG
-        printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
-#endif
-
-        if (fslw & MMU060_BPE) {
-                /* branch prediction error -> clear branch cache */
-                __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
-                                      "orl   #0x00400000,%/d0\n\t"
-                                      "movec %/d0,%/cacr"
-                                      : : : "d0" );
-                /* return if there's no other error */
-                if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
-                        return;
-        }
-
-        if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
-                unsigned long errorcode;
-                unsigned long addr = fp->un.fmt4.effaddr;
-
-                if (fslw & MMU060_MA)
-                        addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
-
-                errorcode = 1;
-                if (fslw & MMU060_DESC_ERR) {
-                        __flush_tlb040_one(addr);
-                        errorcode = 0;
-                }
-                if (fslw & MMU060_W)
-                        errorcode |= 2;
-#ifdef DEBUG
-                printk("errorcode = %d\n", errorcode );
-#endif
-                do_page_fault(&fp->ptregs, addr, errorcode);
-        } else if (fslw & (MMU060_SEE)){
-                /* Software Emulation Error.
-                 * fault during mem_read/mem_write in ifpsp060/os.S
-                 */
-                send_fault_sig(&fp->ptregs);
-        } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
-                   send_fault_sig(&fp->ptregs) > 0) {
-                printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
-                printk( "68060 access error, fslw=%lx\n", fslw );
-                trap_c( fp );
-        }
-}
-#endif /* CONFIG_M68060 */
-
-#if defined (CONFIG_M68040)
-static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
-{
-        unsigned long mmusr;
-        mm_segment_t old_fs = get_fs();
-
-        set_fs(MAKE_MM_SEG(wbs));
-
-        if (iswrite)
-                asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
-        else
-                asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
-
-        asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
-
-        set_fs(old_fs);
-
-        return mmusr;
-}
-
-static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
-                                   unsigned long wbd)
-{
-        int res = 0;
-        mm_segment_t old_fs = get_fs();
-
-        /* set_fs can not be moved, otherwise put_user() may oops */
-        set_fs(MAKE_MM_SEG(wbs));
-
-        switch (wbs & WBSIZ_040) {
-        case BA_SIZE_BYTE:
-                res = put_user(wbd & 0xff, (char __user *)wba);
-                break;
-        case BA_SIZE_WORD:
-                res = put_user(wbd & 0xffff, (short __user *)wba);
-                break;
-        case BA_SIZE_LONG:
-                res = put_user(wbd, (int __user *)wba);
-                break;
-        }
-
-        /* set_fs can not be moved, otherwise put_user() may oops */
-        set_fs(old_fs);
-
-
-#ifdef DEBUG
-        printk("do_040writeback1, res=%d\n",res);
-#endif
-
-        return res;
-}
-
-/* after an exception in a writeback the stack frame corresponding
- * to that exception is discarded, set a few bits in the old frame
- * to simulate what it should look like
- */
-static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
-{
-        fp->un.fmt7.faddr = wba;
-        fp->un.fmt7.ssw = wbs & 0xff;
-        if (wba != current->thread.faddr)
-            fp->un.fmt7.ssw |= MA_040;
-}
-
-static inline void do_040writebacks(struct frame *fp)
-{
-        int res = 0;
-#if 0
-        if (fp->un.fmt7.wb1s & WBV_040)
-                printk("access_error040: cannot handle 1st writeback. oops.\n");
-#endif
-
-        if ((fp->un.fmt7.wb2s & WBV_040) &&
-            !(fp->un.fmt7.wb2s & WBTT_040)) {
-                res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
-                                       fp->un.fmt7.wb2d);
-                if (res)
-                        fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
-                else
-                        fp->un.fmt7.wb2s = 0;
-        }
-
-        /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
-        if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
-                res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
-                                       fp->un.fmt7.wb3d);
-                if (res)
-                    {
-                        fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
-
-                        fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
-                        fp->un.fmt7.wb3s &= (~WBV_040);
-                        fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
-                        fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
-                    }
-                else
-                        fp->un.fmt7.wb3s = 0;
-        }
-
-        if (res)
-                send_fault_sig(&fp->ptregs);
-}
-
-/*
- * called from sigreturn(), must ensure userspace code didn't
- * manipulate exception frame to circumvent protection, then complete
- * pending writebacks
- * we just clear TM2 to turn it into a userspace access
- */
-asmlinkage void berr_040cleanup(struct frame *fp)
-{
-        fp->un.fmt7.wb2s &= ~4;
-        fp->un.fmt7.wb3s &= ~4;
-
-        do_040writebacks(fp);
-}
-
-static inline void access_error040(struct frame *fp)
-{
-        unsigned short ssw = fp->un.fmt7.ssw;
-        unsigned long mmusr;
-
-#ifdef DEBUG
-        printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
-        printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
-                fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
-        printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
-                fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
-                fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
-#endif
-
-        if (ssw & ATC_040) {
-                unsigned long addr = fp->un.fmt7.faddr;
-                unsigned long errorcode;
-
-                /*
-                 * The MMU status has to be determined AFTER the address
-                 * has been corrected if there was a misaligned access (MA).
-                 */
-                if (ssw & MA_040)
-                        addr = (addr + 7) & -8;
-
-                /* MMU error, get the MMUSR info for this access */
-                mmusr = probe040(!(ssw & RW_040), addr, ssw);
-#ifdef DEBUG
-                printk("mmusr = %lx\n", mmusr);
-#endif
-                errorcode = 1;
-                if (!(mmusr & MMU_R_040)) {
-                        /* clear the invalid atc entry */
-                        __flush_tlb040_one(addr);
-                        errorcode = 0;
-                }
-
-                /* despite what documentation seems to say, RMW
-                 * accesses have always both the LK and RW bits set */
-                if (!(ssw & RW_040) || (ssw & LK_040))
-                        errorcode |= 2;
-
-                if (do_page_fault(&fp->ptregs, addr, errorcode)) {
-#ifdef DEBUG
-                        printk("do_page_fault() !=0\n");
-#endif
-                        if (user_mode(&fp->ptregs)){
-                                /* delay writebacks after signal delivery */
-#ifdef DEBUG
-                                printk(".. was usermode - return\n");
-#endif
-                                return;
-                        }
-                        /* disable writeback into user space from kernel
-                         * (if do_page_fault didn't fix the mapping,
-                         * the writeback won't do good)
-                         */
-disable_wb:
-#ifdef DEBUG
-                        printk(".. disabling wb2\n");
-#endif
-                        if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
-                                fp->un.fmt7.wb2s &= ~WBV_040;
-                        if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
-                                fp->un.fmt7.wb3s &= ~WBV_040;
-                }
-        } else {
-                /* In case of a bus error we either kill the process or expect
-                 * the kernel to catch the fault, which then is also responsible
-                 * for cleaning up the mess.
-                 */
-                current->thread.signo = SIGBUS;
-                current->thread.faddr = fp->un.fmt7.faddr;
-                if (send_fault_sig(&fp->ptregs) >= 0)
-                        printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
-                               fp->un.fmt7.faddr);
-                goto disable_wb;
-        }
-
-        do_040writebacks(fp);
-}
-#endif /* CONFIG_M68040 */
-
-#if defined(CONFIG_SUN3)
-#include <asm/sun3mmu.h>
-
-extern int mmu_emu_handle_fault (unsigned long, int, int);
-
-/* sun3 version of bus_error030 */
-
-static inline void bus_error030 (struct frame *fp)
-{
-        unsigned char buserr_type = sun3_get_buserr ();
-        unsigned long addr, errorcode;
-        unsigned short ssw = fp->un.fmtb.ssw;
-        extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
-
-#ifdef DEBUG
-        if (ssw & (FC | FB))
-                printk ("Instruction fault at %#010lx\n",
-                        ssw & FC ?
-                        fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
-                        :
-                        fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
-        if (ssw & DF)
-                printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
-                        ssw & RW ? "read" : "write",
-                        fp->un.fmtb.daddr,
-                        space_names[ssw & DFC], fp->ptregs.pc);
-#endif
-
-        /*
-         * Check if this page should be demand-mapped. This needs to go before
-         * the testing for a bad kernel-space access (demand-mapping applies
-         * to kernel accesses too).
-         */
-
-        if ((ssw & DF)
-            && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
-                if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
-                        return;
-        }
-
-        /* Check for kernel-space pagefault (BAD). */
-        if (fp->ptregs.sr & PS_S) {
-                /* kernel fault must be a data fault to user space */
-                if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
-                     // try checking the kernel mappings before surrender
-                     if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
-                          return;
-                        /* instruction fault or kernel data fault! */
-                        if (ssw & (FC | FB))
-                                printk ("Instruction fault at %#010lx\n",
-                                        fp->ptregs.pc);
-                        if (ssw & DF) {
-                                /* was this fault incurred testing bus mappings? */
-                                if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
-                                   (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
-                                        send_fault_sig(&fp->ptregs);
-                                        return;
-                                }
-
-                                printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
-                                        ssw & RW ? "read" : "write",
-                                        fp->un.fmtb.daddr,
-                                        space_names[ssw & DFC], fp->ptregs.pc);
-                        }
-                        printk ("BAD KERNEL BUSERR\n");
-
-                        die_if_kernel("Oops", &fp->ptregs,0);
-                        force_sig(SIGKILL, current);
-                        return;
-                }
-        } else {
-                /* user fault */
-                if (!(ssw & (FC | FB)) && !(ssw & DF))
-                        /* not an instruction fault or data fault! BAD */
-                        panic ("USER BUSERR w/o instruction or data fault");
-        }
-
-
-        /* First handle the data fault, if any.  */
-        if (ssw & DF) {
-                addr = fp->un.fmtb.daddr;
-
-// errorcode bit 0:     0 -> no page            1 -> protection fault
-// errorcode bit 1:     0 -> read fault         1 -> write fault
-
-// (buserr_type & SUN3_BUSERR_PROTERR)  -> protection fault
-// (buserr_type & SUN3_BUSERR_INVALID)  -> invalid page fault
-
-                if (buserr_type & SUN3_BUSERR_PROTERR)
-                        errorcode = 0x01;
-                else if (buserr_type & SUN3_BUSERR_INVALID)
-                        errorcode = 0x00;
-                else {
-#ifdef DEBUG
-                        printk ("*** unexpected busfault type=%#04x\n", buserr_type);
-                        printk ("invalid %s access at %#lx from pc %#lx\n",
-                                !(ssw & RW) ? "write" : "read", addr,
-                                fp->ptregs.pc);
-#endif
-                        die_if_kernel ("Oops", &fp->ptregs, buserr_type);
-                        force_sig (SIGBUS, current);
-                        return;
-                }
-
-//todo: wtf is RM bit? --m
-                if (!(ssw & RW) || ssw & RM)
-                        errorcode |= 0x02;
-
-                /* Handle page fault. */
-                do_page_fault (&fp->ptregs, addr, errorcode);
-
-                /* Retry the data fault now. */
-                return;
-        }
-
-        /* Now handle the instruction fault. */
-
-        /* Get the fault address. */
-        if (fp->ptregs.format == 0xA)
-                addr = fp->ptregs.pc + 4;
-        else
-                addr = fp->un.fmtb.baddr;
-        if (ssw & FC)
-                addr -= 2;
-
-        if (buserr_type & SUN3_BUSERR_INVALID) {
-                if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
-                        do_page_fault (&fp->ptregs, addr, 0);
-       } else {
-#ifdef DEBUG
-                printk ("protection fault on insn access (segv).\n");
-#endif
-                force_sig (SIGSEGV, current);
-       }
-}
-#else
-#if defined(CPU_M68020_OR_M68030)
-static inline void bus_error030 (struct frame *fp)
-{
-        volatile unsigned short temp;
-        unsigned short mmusr;
-        unsigned long addr, errorcode;
-        unsigned short ssw = fp->un.fmtb.ssw;
-#ifdef DEBUG
-        unsigned long desc;
-
-        printk ("pid = %x  ", current->pid);
-        printk ("SSW=%#06x  ", ssw);
-
-        if (ssw & (FC | FB))
-                printk ("Instruction fault at %#010lx\n",
-                        ssw & FC ?
-                        fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
-                        :
-                        fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
-        if (ssw & DF)
-                printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
-                        ssw & RW ? "read" : "write",
-                        fp->un.fmtb.daddr,
-                        space_names[ssw & DFC], fp->ptregs.pc);
-#endif
-
-        /* ++andreas: If a data fault and an instruction fault happen
-           at the same time map in both pages.  */
-
-        /* First handle the data fault, if any.  */
-        if (ssw & DF) {
-                addr = fp->un.fmtb.daddr;
-
-#ifdef DEBUG
-                asm volatile ("ptestr %3,%2@,#7,%0\n\t"
-                              "pmove %%psr,%1@"
-                              : "=a&" (desc)
-                              : "a" (&temp), "a" (addr), "d" (ssw));
-#else
-                asm volatile ("ptestr %2,%1@,#7\n\t"
-                              "pmove %%psr,%0@"
-                              : : "a" (&temp), "a" (addr), "d" (ssw));
-#endif
-                mmusr = temp;
-
-#ifdef DEBUG
-                printk("mmusr is %#x for addr %#lx in task %p\n",
-                       mmusr, addr, current);
-                printk("descriptor address is %#lx, contents %#lx\n",
-                       __va(desc), *(unsigned long *)__va(desc));
-#endif
-
-                errorcode = (mmusr & MMU_I) ? 0 : 1;
-                if (!(ssw & RW) || (ssw & RM))
-                        errorcode |= 2;
-
-                if (mmusr & (MMU_I | MMU_WP)) {
-                        if (ssw & 4) {
-                                printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
-                                       ssw & RW ? "read" : "write",
-                                       fp->un.fmtb.daddr,
-                                       space_names[ssw & DFC], fp->ptregs.pc);
-                                goto buserr;
-                        }
-                        /* Don't try to do anything further if an exception was
-                           handled. */
-                        if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
-                                return;
-                } else if (!(mmusr & MMU_I)) {
-                        /* probably a 020 cas fault */
-                        if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
-                                printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
-                } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
-                        printk("invalid %s access at %#lx from pc %#lx\n",
-                               !(ssw & RW) ? "write" : "read", addr,
-                               fp->ptregs.pc);
-                        die_if_kernel("Oops",&fp->ptregs,mmusr);
-                        force_sig(SIGSEGV, current);
-                        return;
-                } else {
-#if 0
-                        static volatile long tlong;
-#endif
-
-                        printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
-                               !(ssw & RW) ? "write" : "read", addr,
-                               fp->ptregs.pc, ssw);
-                        asm volatile ("ptestr #1,%1@,#0\n\t"
-                                      "pmove %%psr,%0@"
-                                      : /* no outputs */
-                                      : "a" (&temp), "a" (addr));
-                        mmusr = temp;
-
-                        printk ("level 0 mmusr is %#x\n", mmusr);
-#if 0
-                        asm volatile ("pmove %%tt0,%0@"
-                                      : /* no outputs */
-                                      : "a" (&tlong));
-                        printk("tt0 is %#lx, ", tlong);
-                        asm volatile ("pmove %%tt1,%0@"
-                                      : /* no outputs */
-                                      : "a" (&tlong));
-                        printk("tt1 is %#lx\n", tlong);
-#endif
-#ifdef DEBUG
-                        printk("Unknown SIGSEGV - 1\n");
-#endif
-                        die_if_kernel("Oops",&fp->ptregs,mmusr);
-                        force_sig(SIGSEGV, current);
-                        return;
-                }
-
-                /* setup an ATC entry for the access about to be retried */
-                if (!(ssw & RW) || (ssw & RM))
-                        asm volatile ("ploadw %1,%0@" : /* no outputs */
-                                      : "a" (addr), "d" (ssw));
-                else
-                        asm volatile ("ploadr %1,%0@" : /* no outputs */
-                                      : "a" (addr), "d" (ssw));
-        }
-
-        /* Now handle the instruction fault. */
-
-        if (!(ssw & (FC|FB)))
-                return;
-
-        if (fp->ptregs.sr & PS_S) {
-                printk("Instruction fault at %#010lx\n",
-                        fp->ptregs.pc);
-        buserr:
-                printk ("BAD KERNEL BUSERR\n");
-                die_if_kernel("Oops",&fp->ptregs,0);
-                force_sig(SIGKILL, current);
-                return;
-        }
-
-        /* get the fault address */
-        if (fp->ptregs.format == 10)
-                addr = fp->ptregs.pc + 4;
-        else
-                addr = fp->un.fmtb.baddr;
-        if (ssw & FC)
-                addr -= 2;
-
-        if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
-                /* Insn fault on same page as data fault.  But we
-                   should still create the ATC entry.  */
-                goto create_atc_entry;
-
-#ifdef DEBUG
-        asm volatile ("ptestr #1,%2@,#7,%0\n\t"
-                      "pmove %%psr,%1@"
-                      : "=a&" (desc)
-                      : "a" (&temp), "a" (addr));
-#else
-        asm volatile ("ptestr #1,%1@,#7\n\t"
-                      "pmove %%psr,%0@"
-                      : : "a" (&temp), "a" (addr));
-#endif
-        mmusr = temp;
-
-#ifdef DEBUG
-        printk ("mmusr is %#x for addr %#lx in task %p\n",
-                mmusr, addr, current);
-        printk ("descriptor address is %#lx, contents %#lx\n",
-                __va(desc), *(unsigned long *)__va(desc));
-#endif
-
-        if (mmusr & MMU_I)
-                do_page_fault (&fp->ptregs, addr, 0);
-        else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
-                printk ("invalid insn access at %#lx from pc %#lx\n",
-                        addr, fp->ptregs.pc);
-#ifdef DEBUG
-                printk("Unknown SIGSEGV - 2\n");
-#endif
-                die_if_kernel("Oops",&fp->ptregs,mmusr);
-                force_sig(SIGSEGV, current);
-                return;
-        }
-
-create_atc_entry:
-        /* setup an ATC entry for the access about to be retried */
-        asm volatile ("ploadr #2,%0@" : /* no outputs */
-                      : "a" (addr));
-}
-#endif /* CPU_M68020_OR_M68030 */
-#endif /* !CONFIG_SUN3 */
-
-asmlinkage void buserr_c(struct frame *fp)
-{
-        /* Only set esp0 if coming from user mode */
-        if (user_mode(&fp->ptregs))
-                current->thread.esp0 = (unsigned long) fp;
-
-#ifdef DEBUG
-        printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
-#endif
-
-        switch (fp->ptregs.format) {
-#if defined (CONFIG_M68060)
-        case 4:                         /* 68060 access error */
-          access_error060 (fp);
-          break;
-#endif
-#if defined (CONFIG_M68040)
-        case 0x7:                       /* 68040 access error */
-          access_error040 (fp);
-          break;
-#endif
-#if defined (CPU_M68020_OR_M68030)
-        case 0xa:
-        case 0xb:
-          bus_error030 (fp);
-          break;
-#endif
-        default:
-          die_if_kernel("bad frame format",&fp->ptregs,0);
-#ifdef DEBUG
-          printk("Unknown SIGSEGV - 4\n");
-#endif
-          force_sig(SIGSEGV, current);
-        }
-}
-
-
-static int kstack_depth_to_print = 48;
-
-void show_trace(unsigned long *stack)
-{
-        unsigned long *endstack;
-        unsigned long addr;
-        int i;
-
-        printk("Call Trace:");
-        addr = (unsigned long)stack + THREAD_SIZE - 1;
-        endstack = (unsigned long *)(addr & -THREAD_SIZE);
-        i = 0;
-        while (stack + 1 <= endstack) {
-                addr = *stack++;
-                /*
-                 * If the address is either in the text segment of the
-                 * kernel, or in the region which contains vmalloc'ed
-                 * memory, it *may* be the address of a calling
-                 * routine; if so, print it so that someone tracing
-                 * down the cause of the crash will be able to figure
-                 * out the call path that was taken.
-                 */
-                if (__kernel_text_address(addr)) {
-#ifndef CONFIG_KALLSYMS
-                        if (i % 5 == 0)
-                                printk("\n       ");
-#endif
-                        printk(" [<%08lx>] %pS\n", addr, (void *)addr);
-                        i++;
-                }
-        }
-        printk("\n");
-}
-
-void show_registers(struct pt_regs *regs)
-{
-        struct frame *fp = (struct frame *)regs;
-        mm_segment_t old_fs = get_fs();
-        u16 c, *cp;
-        unsigned long addr;
-        int i;
-
-        print_modules();
-        printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
-        printk("SR: %04x  SP: %p  a2: %08lx\n", regs->sr, regs, regs->a2);
-        printk("d0: %08lx    d1: %08lx    d2: %08lx    d3: %08lx\n",
-               regs->d0, regs->d1, regs->d2, regs->d3);
-        printk("d4: %08lx    d5: %08lx    a0: %08lx    a1: %08lx\n",
-               regs->d4, regs->d5, regs->a0, regs->a1);
-
-        printk("Process %s (pid: %d, task=%p)\n",
-                current->comm, task_pid_nr(current), current);
-        addr = (unsigned long)&fp->un;
-        printk("Frame format=%X ", regs->format);
-        switch (regs->format) {
-        case 0x2:
-                printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
-                addr += sizeof(fp->un.fmt2);
-                break;
-        case 0x3:
-                printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
-                addr += sizeof(fp->un.fmt3);
-                break;
-        case 0x4:
-                printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
-                        : "eff addr=%08lx pc=%08lx\n"),
-                        fp->un.fmt4.effaddr, fp->un.fmt4.pc);
-                addr += sizeof(fp->un.fmt4);
-                break;
-        case 0x7:
-                printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
-                        fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
-                printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
-                        fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
-                printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
-                        fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
-                printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
-                        fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
-                printk("push data: %08lx %08lx %08lx %08lx\n",
-                        fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
-                        fp->un.fmt7.pd3);
-                addr += sizeof(fp->un.fmt7);
-                break;
-        case 0x9:
-                printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
-                addr += sizeof(fp->un.fmt9);
-                break;
-        case 0xa:
-                printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
-                        fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
-                        fp->un.fmta.daddr, fp->un.fmta.dobuf);
-                addr += sizeof(fp->un.fmta);
-                break;
-        case 0xb:
-                printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
-                        fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
-                        fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
-                printk("baddr=%08lx dibuf=%08lx ver=%x\n",
-                        fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
-                addr += sizeof(fp->un.fmtb);
-                break;
-        default:
-                printk("\n");
-        }
-        show_stack(NULL, (unsigned long *)addr);
-
-        printk("Code:");
-        set_fs(KERNEL_DS);
-        cp = (u16 *)regs->pc;
-        for (i = -8; i < 16; i++) {
-                if (get_user(c, cp + i) && i >= 0) {
-                        printk(" Bad PC value.");
-                        break;
-                }
-                printk(i ? " %04x" : " <%04x>", c);
-        }
-        set_fs(old_fs);
-        printk ("\n");
-}
-
-void show_stack(struct task_struct *task, unsigned long *stack)
-{
-        unsigned long *p;
-        unsigned long *endstack;
-        int i;
-
-        if (!stack) {
-                if (task)
-                        stack = (unsigned long *)task->thread.esp0;
-                else
-                        stack = (unsigned long *)&stack;
-        }
-        endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
-
-        printk("Stack from %08lx:", (unsigned long)stack);
-        p = stack;
-        for (i = 0; i < kstack_depth_to_print; i++) {
-                if (p + 1 > endstack)
-                        break;
-                if (i % 8 == 0)
-                        printk("\n       ");
-                printk(" %08lx", *p++);
-        }
-        printk("\n");
-        show_trace(stack);
-}
-
-/*
- * The architecture-independent backtrace generator
- */
-void dump_stack(void)
-{
-        unsigned long stack;
-
-        show_trace(&stack);
-}
-
-EXPORT_SYMBOL(dump_stack);
-
-void bad_super_trap (struct frame *fp)
-{
-        console_verbose();
-        if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names))
-                printk ("*** %s ***   FORMAT=%X\n",
-                        vec_names[(fp->ptregs.vector) >> 2],
-                        fp->ptregs.format);
-        else
-                printk ("*** Exception %d ***   FORMAT=%X\n",
-                        (fp->ptregs.vector) >> 2,
-                        fp->ptregs.format);
-        if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
-                unsigned short ssw = fp->un.fmtb.ssw;
-
-                printk ("SSW=%#06x  ", ssw);
-
-                if (ssw & RC)
-                        printk ("Pipe stage C instruction fault at %#010lx\n",
-                                (fp->ptregs.format) == 0xA ?
-                                fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
-                if (ssw & RB)
-                        printk ("Pipe stage B instruction fault at %#010lx\n",
-                                (fp->ptregs.format) == 0xA ?
-                                fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
-                if (ssw & DF)
-                        printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
-                                ssw & RW ? "read" : "write",
-                                fp->un.fmtb.daddr, space_names[ssw & DFC],
-                                fp->ptregs.pc);
-        }
-        printk ("Current process id is %d\n", task_pid_nr(current));
-        die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
-}
-
-asmlinkage void trap_c(struct frame *fp)
-{
-        int sig;
-        siginfo_t info;
-
-        if (fp->ptregs.sr & PS_S) {
-                if (fp->ptregs.vector == VEC_TRACE << 2) {
-                        /* traced a trapping instruction on a 68020/30,
-                         * real exception will be executed afterwards.
-                         */
-                } else if (!handle_kernel_fault(&fp->ptregs))
-                        bad_super_trap(fp);
-                return;
-        }
-
-        /* send the appropriate signal to the user program */
-        switch ((fp->ptregs.vector) >> 2) {
-            case VEC_ADDRERR:
-                info.si_code = BUS_ADRALN;
-                sig = SIGBUS;
-                break;
-            case VEC_ILLEGAL:
-            case VEC_LINE10:
-            case VEC_LINE11:
-                info.si_code = ILL_ILLOPC;
-                sig = SIGILL;
-                break;
-            case VEC_PRIV:
-                info.si_code = ILL_PRVOPC;
-                sig = SIGILL;
-                break;
-            case VEC_COPROC:
-                info.si_code = ILL_COPROC;
-                sig = SIGILL;
-                break;
-            case VEC_TRAP1:
-            case VEC_TRAP2:
-            case VEC_TRAP3:
-            case VEC_TRAP4:
-            case VEC_TRAP5:
-            case VEC_TRAP6:
-            case VEC_TRAP7:
-            case VEC_TRAP8:
-            case VEC_TRAP9:
-            case VEC_TRAP10:
-            case VEC_TRAP11:
-            case VEC_TRAP12:
-            case VEC_TRAP13:
-            case VEC_TRAP14:
-                info.si_code = ILL_ILLTRP;
-                sig = SIGILL;
-                break;
-            case VEC_FPBRUC:
-            case VEC_FPOE:
-            case VEC_FPNAN:
-                info.si_code = FPE_FLTINV;
-                sig = SIGFPE;
-                break;
-            case VEC_FPIR:
-                info.si_code = FPE_FLTRES;
-                sig = SIGFPE;
-                break;
-            case VEC_FPDIVZ:
-                info.si_code = FPE_FLTDIV;
-                sig = SIGFPE;
-                break;
-            case VEC_FPUNDER:
-                info.si_code = FPE_FLTUND;
-                sig = SIGFPE;
-                break;
-            case VEC_FPOVER:
-                info.si_code = FPE_FLTOVF;
-                sig = SIGFPE;
-                break;
-            case VEC_ZERODIV:
-                info.si_code = FPE_INTDIV;
-                sig = SIGFPE;
-                break;
-            case VEC_CHK:
-            case VEC_TRAP:
-                info.si_code = FPE_INTOVF;
-                sig = SIGFPE;
-                break;
-            case VEC_TRACE:             /* ptrace single step */
-                info.si_code = TRAP_TRACE;
-                sig = SIGTRAP;
-                break;
-            case VEC_TRAP15:            /* breakpoint */
-                info.si_code = TRAP_BRKPT;
-                sig = SIGTRAP;
-                break;
-            default:
-                info.si_code = ILL_ILLOPC;
-                sig = SIGILL;
-                break;
-        }
-        info.si_signo = sig;
-        info.si_errno = 0;
-        switch (fp->ptregs.format) {
-            default:
-                info.si_addr = (void *) fp->ptregs.pc;
-                break;
-            case 2:
-                info.si_addr = (void *) fp->un.fmt2.iaddr;
-                break;
-            case 7:
-                info.si_addr = (void *) fp->un.fmt7.effaddr;
-                break;
-            case 9:
-                info.si_addr = (void *) fp->un.fmt9.iaddr;
-                break;
-            case 10:
-                info.si_addr = (void *) fp->un.fmta.daddr;
-                break;
-            case 11:
-                info.si_addr = (void *) fp->un.fmtb.daddr;
-                break;
-        }
-        force_sig_info (sig, &info, current);
-}
-
-void die_if_kernel (char *str, struct pt_regs *fp, int nr)
-{
-        if (!(fp->sr & PS_S))
-                return;
-
-        console_verbose();
-        printk("%s: %08x\n",str,nr);
-        show_registers(fp);
-        add_taint(TAINT_DIE);
-        do_exit(SIGSEGV);
-}
-
-/*
- * This function is called if an error occur while accessing
- * user-space from the fpsp040 code.
- */
-asmlinkage void fpsp040_die(void)
-{
-        do_exit(SIGSEGV);
-}
-
-#ifdef CONFIG_M68KFPU_EMU
-asmlinkage void fpemu_signal(int signal, int code, void *addr)
-{
-        siginfo_t info;
-
-        info.si_signo = signal;
-        info.si_errno = 0;
-        info.si_code = code;
-        info.si_addr = addr;
-        force_sig_info(signal, &info, current);
-}
+#include "traps_no.c"
 #endif
diff --git a/arch/m68k/kernel/traps_mm.c b/arch/m68k/kernel/traps_mm.c
new file mode 100644
index 000000000000..4022bbc28878
--- /dev/null
+++ b/arch/m68k/kernel/traps_mm.c
@@ -0,0 +1,1207 @@
+/*
+ *  linux/arch/m68k/kernel/traps.c
+ *
+ *  Copyright (C) 1993, 1994 by Hamish Macdonald
+ *
+ *  68040 fixes by Michael Rausch
+ *  68040 fixes by Martin Apel
+ *  68040 fixes and writeback by Richard Zidlicky
+ *  68060 fixes by Roman Hodek
+ *  68060 fixes by Jesper Skov
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+/*
+ * Sets up all exception vectors
+ */
+
+#include <linux/sched.h>
+#include <linux/signal.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/user.h>
+#include <linux/string.h>
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <linux/ptrace.h>
+#include <linux/kallsyms.h>
+
+#include <asm/setup.h>
+#include <asm/fpu.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
+#include <asm/traps.h>
+#include <asm/pgalloc.h>
+#include <asm/machdep.h>
+#include <asm/siginfo.h>
+
+/* assembler routines */
+asmlinkage void system_call(void);
+asmlinkage void buserr(void);
+asmlinkage void trap(void);
+asmlinkage void nmihandler(void);
+#ifdef CONFIG_M68KFPU_EMU
+asmlinkage void fpu_emu(void);
+#endif
+
+e_vector vectors[256];
+
+/* nmi handler for the Amiga */
+asm(".text\n"
+    __ALIGN_STR "\n"
+    "nmihandler: rte");
+
+/*
+ * this must be called very early as the kernel might
+ * use some instruction that are emulated on the 060
+ * and so we're prepared for early probe attempts (e.g. nf_init).
+ */
+void __init base_trap_init(void)
+{
+        if (MACH_IS_SUN3X) {
+                extern e_vector *sun3x_prom_vbr;
+
+                __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
+        }
+
+        /* setup the exception vector table */
+        __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
+
+        if (CPU_IS_060) {
+                /* set up ISP entry points */
+                asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
+
+                vectors[VEC_UNIMPII] = unimp_vec;
+        }
+
+        vectors[VEC_BUSERR] = buserr;
+        vectors[VEC_ILLEGAL] = trap;
+        vectors[VEC_SYS] = system_call;
+}
+
+void __init trap_init (void)
+{
+        int i;
+
+        for (i = VEC_SPUR; i <= VEC_INT7; i++)
+                vectors[i] = bad_inthandler;
+
+        for (i = 0; i < VEC_USER; i++)
+                if (!vectors[i])
+                        vectors[i] = trap;
+
+        for (i = VEC_USER; i < 256; i++)
+                vectors[i] = bad_inthandler;
+
+#ifdef CONFIG_M68KFPU_EMU
+        if (FPU_IS_EMU)
+                vectors[VEC_LINE11] = fpu_emu;
+#endif
+
+        if (CPU_IS_040 && !FPU_IS_EMU) {
+                /* set up FPSP entry points */
+                asmlinkage void dz_vec(void) asm ("dz");
+                asmlinkage void inex_vec(void) asm ("inex");
+                asmlinkage void ovfl_vec(void) asm ("ovfl");
+                asmlinkage void unfl_vec(void) asm ("unfl");
+                asmlinkage void snan_vec(void) asm ("snan");
+                asmlinkage void operr_vec(void) asm ("operr");
+                asmlinkage void bsun_vec(void) asm ("bsun");
+                asmlinkage void fline_vec(void) asm ("fline");
+                asmlinkage void unsupp_vec(void) asm ("unsupp");
+
+                vectors[VEC_FPDIVZ] = dz_vec;
+                vectors[VEC_FPIR] = inex_vec;
+                vectors[VEC_FPOVER] = ovfl_vec;
+                vectors[VEC_FPUNDER] = unfl_vec;
+                vectors[VEC_FPNAN] = snan_vec;
+                vectors[VEC_FPOE] = operr_vec;
+                vectors[VEC_FPBRUC] = bsun_vec;
+                vectors[VEC_LINE11] = fline_vec;
+                vectors[VEC_FPUNSUP] = unsupp_vec;
+        }
+
+        if (CPU_IS_060 && !FPU_IS_EMU) {
+                /* set up IFPSP entry points */
+                asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
+                asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
+                asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
+                asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
+                asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
+                asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
+                asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
+                asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
+                asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
+
+                vectors[VEC_FPNAN] = snan_vec6;
+                vectors[VEC_FPOE] = operr_vec6;
+                vectors[VEC_FPOVER] = ovfl_vec6;
+                vectors[VEC_FPUNDER] = unfl_vec6;
+                vectors[VEC_FPDIVZ] = dz_vec6;
+                vectors[VEC_FPIR] = inex_vec6;
+                vectors[VEC_LINE11] = fline_vec6;
+                vectors[VEC_FPUNSUP] = unsupp_vec6;
+                vectors[VEC_UNIMPEA] = effadd_vec6;
+        }
+
+        /* if running on an amiga, make the NMI interrupt do nothing */
+        if (MACH_IS_AMIGA) {
+                vectors[VEC_INT7] = nmihandler;
+        }
+}
+
+
+static const char *vec_names[] = {
+        [VEC_RESETSP]   = "RESET SP",
+        [VEC_RESETPC]   = "RESET PC",
+        [VEC_BUSERR]    = "BUS ERROR",
+        [VEC_ADDRERR]   = "ADDRESS ERROR",
+        [VEC_ILLEGAL]   = "ILLEGAL INSTRUCTION",
+        [VEC_ZERODIV]   = "ZERO DIVIDE",
+        [VEC_CHK]       = "CHK",
+        [VEC_TRAP]      = "TRAPcc",
+        [VEC_PRIV]      = "PRIVILEGE VIOLATION",
+        [VEC_TRACE]     = "TRACE",
+        [VEC_LINE10]    = "LINE 1010",
+        [VEC_LINE11]    = "LINE 1111",
+        [VEC_RESV12]    = "UNASSIGNED RESERVED 12",
+        [VEC_COPROC]    = "COPROCESSOR PROTOCOL VIOLATION",
+        [VEC_FORMAT]    = "FORMAT ERROR",
+        [VEC_UNINT]     = "UNINITIALIZED INTERRUPT",
+        [VEC_RESV16]    = "UNASSIGNED RESERVED 16",
+        [VEC_RESV17]    = "UNASSIGNED RESERVED 17",
+        [VEC_RESV18]    = "UNASSIGNED RESERVED 18",
+        [VEC_RESV19]    = "UNASSIGNED RESERVED 19",
+        [VEC_RESV20]    = "UNASSIGNED RESERVED 20",
+        [VEC_RESV21]    = "UNASSIGNED RESERVED 21",
+        [VEC_RESV22]    = "UNASSIGNED RESERVED 22",
+        [VEC_RESV23]    = "UNASSIGNED RESERVED 23",
+        [VEC_SPUR]      = "SPURIOUS INTERRUPT",
+        [VEC_INT1]      = "LEVEL 1 INT",
+        [VEC_INT2]      = "LEVEL 2 INT",
+        [VEC_INT3]      = "LEVEL 3 INT",
+        [VEC_INT4]      = "LEVEL 4 INT",
+        [VEC_INT5]      = "LEVEL 5 INT",
+        [VEC_INT6]      = "LEVEL 6 INT",
+        [VEC_INT7]      = "LEVEL 7 INT",
+        [VEC_SYS]       = "SYSCALL",
+        [VEC_TRAP1]     = "TRAP #1",
+        [VEC_TRAP2]     = "TRAP #2",
+        [VEC_TRAP3]     = "TRAP #3",
+        [VEC_TRAP4]     = "TRAP #4",
+        [VEC_TRAP5]     = "TRAP #5",
+        [VEC_TRAP6]     = "TRAP #6",
+        [VEC_TRAP7]     = "TRAP #7",
+        [VEC_TRAP8]     = "TRAP #8",
+        [VEC_TRAP9]     = "TRAP #9",
+        [VEC_TRAP10]    = "TRAP #10",
+        [VEC_TRAP11]    = "TRAP #11",
+        [VEC_TRAP12]    = "TRAP #12",
+        [VEC_TRAP13]    = "TRAP #13",
+        [VEC_TRAP14]    = "TRAP #14",
+        [VEC_TRAP15]    = "TRAP #15",
+        [VEC_FPBRUC]    = "FPCP BSUN",
+        [VEC_FPIR]      = "FPCP INEXACT",
+        [VEC_FPDIVZ]    = "FPCP DIV BY 0",
+        [VEC_FPUNDER]   = "FPCP UNDERFLOW",
+        [VEC_FPOE]      = "FPCP OPERAND ERROR",
+        [VEC_FPOVER]    = "FPCP OVERFLOW",
+        [VEC_FPNAN]     = "FPCP SNAN",
+        [VEC_FPUNSUP]   = "FPCP UNSUPPORTED OPERATION",
+        [VEC_MMUCFG]    = "MMU CONFIGURATION ERROR",
+        [VEC_MMUILL]    = "MMU ILLEGAL OPERATION ERROR",
+        [VEC_MMUACC]    = "MMU ACCESS LEVEL VIOLATION ERROR",
+        [VEC_RESV59]    = "UNASSIGNED RESERVED 59",
+        [VEC_UNIMPEA]   = "UNASSIGNED RESERVED 60",
+        [VEC_UNIMPII]   = "UNASSIGNED RESERVED 61",
+        [VEC_RESV62]    = "UNASSIGNED RESERVED 62",
+        [VEC_RESV63]    = "UNASSIGNED RESERVED 63",
+};
+
+static const char *space_names[] = {
+        [0]             = "Space 0",
+        [USER_DATA]     = "User Data",
+        [USER_PROGRAM]  = "User Program",
+#ifndef CONFIG_SUN3
+        [3]             = "Space 3",
+#else
+        [FC_CONTROL]    = "Control",
+#endif
+        [4]             = "Space 4",
+        [SUPER_DATA]    = "Super Data",
+        [SUPER_PROGRAM] = "Super Program",
+        [CPU_SPACE]     = "CPU"
+};
+
+void die_if_kernel(char *,struct pt_regs *,int);
+asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
+                             unsigned long error_code);
+int send_fault_sig(struct pt_regs *regs);
+
+asmlinkage void trap_c(struct frame *fp);
+
+#if defined (CONFIG_M68060)
+static inline void access_error060 (struct frame *fp)
+{
+        unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
+
+#ifdef DEBUG
+        printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
+#endif
+
+        if (fslw & MMU060_BPE) {
+                /* branch prediction error -> clear branch cache */
+                __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
+                                      "orl   #0x00400000,%/d0\n\t"
+                                      "movec %/d0,%/cacr"
+                                      : : : "d0" );
+                /* return if there's no other error */
+                if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
+                        return;
+        }
+
+        if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
+                unsigned long errorcode;
+                unsigned long addr = fp->un.fmt4.effaddr;
+
+                if (fslw & MMU060_MA)
+                        addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
+
+                errorcode = 1;
+                if (fslw & MMU060_DESC_ERR) {
+                        __flush_tlb040_one(addr);
+                        errorcode = 0;
+                }
+                if (fslw & MMU060_W)
+                        errorcode |= 2;
+#ifdef DEBUG
+                printk("errorcode = %d\n", errorcode );
+#endif
+                do_page_fault(&fp->ptregs, addr, errorcode);
+        } else if (fslw & (MMU060_SEE)){
+                /* Software Emulation Error.
+                 * fault during mem_read/mem_write in ifpsp060/os.S
+                 */
+                send_fault_sig(&fp->ptregs);
+        } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
+                   send_fault_sig(&fp->ptregs) > 0) {
+                printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
+                printk( "68060 access error, fslw=%lx\n", fslw );
+                trap_c( fp );
+        }
+}
+#endif /* CONFIG_M68060 */
+
+#if defined (CONFIG_M68040)
+static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
+{
+        unsigned long mmusr;
+        mm_segment_t old_fs = get_fs();
+
+        set_fs(MAKE_MM_SEG(wbs));
+
+        if (iswrite)
+                asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
+        else
+                asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
+
+        asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
+
+        set_fs(old_fs);
+
+        return mmusr;
+}
+
+static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
+                                   unsigned long wbd)
+{
+        int res = 0;
+        mm_segment_t old_fs = get_fs();
+
+        /* set_fs can not be moved, otherwise put_user() may oops */
+        set_fs(MAKE_MM_SEG(wbs));
+
+        switch (wbs & WBSIZ_040) {
+        case BA_SIZE_BYTE:
+                res = put_user(wbd & 0xff, (char __user *)wba);
+                break;
+        case BA_SIZE_WORD:
+                res = put_user(wbd & 0xffff, (short __user *)wba);
+                break;
+        case BA_SIZE_LONG:
+                res = put_user(wbd, (int __user *)wba);
+                break;
+        }
+
+        /* set_fs can not be moved, otherwise put_user() may oops */
+        set_fs(old_fs);
+
+
+#ifdef DEBUG
+        printk("do_040writeback1, res=%d\n",res);
+#endif
+
+        return res;
+}
+
+/* after an exception in a writeback the stack frame corresponding
+ * to that exception is discarded, set a few bits in the old frame
+ * to simulate what it should look like
+ */
+static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
+{
+        fp->un.fmt7.faddr = wba;
+        fp->un.fmt7.ssw = wbs & 0xff;
+        if (wba != current->thread.faddr)
+            fp->un.fmt7.ssw |= MA_040;
+}
+
+static inline void do_040writebacks(struct frame *fp)
+{
+        int res = 0;
+#if 0
+        if (fp->un.fmt7.wb1s & WBV_040)
+                printk("access_error040: cannot handle 1st writeback. oops.\n");
+#endif
+
+        if ((fp->un.fmt7.wb2s & WBV_040) &&
+            !(fp->un.fmt7.wb2s & WBTT_040)) {
+                res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
+                                       fp->un.fmt7.wb2d);
+                if (res)
+                        fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
+                else
+                        fp->un.fmt7.wb2s = 0;
+        }
+
+        /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
+        if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
+                res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
+                                       fp->un.fmt7.wb3d);
+                if (res)
+                    {
+                        fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
+
+                        fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
+                        fp->un.fmt7.wb3s &= (~WBV_040);
+                        fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
+                        fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
+                    }
+                else
+                        fp->un.fmt7.wb3s = 0;
+        }
+
+        if (res)
+                send_fault_sig(&fp->ptregs);
+}
+
+/*
+ * called from sigreturn(), must ensure userspace code didn't
+ * manipulate exception frame to circumvent protection, then complete
+ * pending writebacks
+ * we just clear TM2 to turn it into a userspace access
+ */
+asmlinkage void berr_040cleanup(struct frame *fp)
+{
+        fp->un.fmt7.wb2s &= ~4;
+        fp->un.fmt7.wb3s &= ~4;
+
+        do_040writebacks(fp);
+}
+
+static inline void access_error040(struct frame *fp)
+{
+        unsigned short ssw = fp->un.fmt7.ssw;
+        unsigned long mmusr;
+
+#ifdef DEBUG
+        printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
+        printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
+                fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
+        printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
+                fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
+                fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
+#endif
+
+        if (ssw & ATC_040) {
+                unsigned long addr = fp->un.fmt7.faddr;
+                unsigned long errorcode;
+
+                /*
+                 * The MMU status has to be determined AFTER the address
+                 * has been corrected if there was a misaligned access (MA).
+                 */
+                if (ssw & MA_040)
+                        addr = (addr + 7) & -8;
+
+                /* MMU error, get the MMUSR info for this access */
+                mmusr = probe040(!(ssw & RW_040), addr, ssw);
+#ifdef DEBUG
+                printk("mmusr = %lx\n", mmusr);
+#endif
+                errorcode = 1;
+                if (!(mmusr & MMU_R_040)) {
+                        /* clear the invalid atc entry */
+                        __flush_tlb040_one(addr);
+                        errorcode = 0;
+                }
+
+                /* despite what documentation seems to say, RMW
+                 * accesses have always both the LK and RW bits set */
+                if (!(ssw & RW_040) || (ssw & LK_040))
+                        errorcode |= 2;
+
+                if (do_page_fault(&fp->ptregs, addr, errorcode)) {
+#ifdef DEBUG
+                        printk("do_page_fault() !=0\n");
+#endif
+                        if (user_mode(&fp->ptregs)){
+                                /* delay writebacks after signal delivery */
+#ifdef DEBUG
+                                printk(".. was usermode - return\n");
+#endif
+                                return;
+                        }
+                        /* disable writeback into user space from kernel
+                         * (if do_page_fault didn't fix the mapping,
+                         * the writeback won't do good)
+                         */
+disable_wb:
+#ifdef DEBUG
+                        printk(".. disabling wb2\n");
+#endif
+                        if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
+                                fp->un.fmt7.wb2s &= ~WBV_040;
+                        if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
+                                fp->un.fmt7.wb3s &= ~WBV_040;
+                }
+        } else {
+                /* In case of a bus error we either kill the process or expect
+                 * the kernel to catch the fault, which then is also responsible
+                 * for cleaning up the mess.
+                 */
+                current->thread.signo = SIGBUS;
+                current->thread.faddr = fp->un.fmt7.faddr;
+                if (send_fault_sig(&fp->ptregs) >= 0)
+                        printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
+                               fp->un.fmt7.faddr);
+                goto disable_wb;
+        }
+
+        do_040writebacks(fp);
+}
+#endif /* CONFIG_M68040 */
+
+#if defined(CONFIG_SUN3)
+#include <asm/sun3mmu.h>
+
+extern int mmu_emu_handle_fault (unsigned long, int, int);
+
+/* sun3 version of bus_error030 */
+
+static inline void bus_error030 (struct frame *fp)
+{
+        unsigned char buserr_type = sun3_get_buserr ();
+        unsigned long addr, errorcode;
+        unsigned short ssw = fp->un.fmtb.ssw;
+        extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
+
+#ifdef DEBUG
+        if (ssw & (FC | FB))
+                printk ("Instruction fault at %#010lx\n",
+                        ssw & FC ?
+                        fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
+                        :
+                        fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
+        if (ssw & DF)
+                printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
+                        ssw & RW ? "read" : "write",
+                        fp->un.fmtb.daddr,
+                        space_names[ssw & DFC], fp->ptregs.pc);
+#endif
+
+        /*
+         * Check if this page should be demand-mapped. This needs to go before
+         * the testing for a bad kernel-space access (demand-mapping applies
+         * to kernel accesses too).
+         */
+
+        if ((ssw & DF)
+            && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
+                if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
+                        return;
+        }
+
+        /* Check for kernel-space pagefault (BAD). */
+        if (fp->ptregs.sr & PS_S) {
+                /* kernel fault must be a data fault to user space */
+                if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
+                     // try checking the kernel mappings before surrender
+                     if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
+                          return;
+                        /* instruction fault or kernel data fault! */
+                        if (ssw & (FC | FB))
+                                printk ("Instruction fault at %#010lx\n",
+                                        fp->ptregs.pc);
+                        if (ssw & DF) {
+                                /* was this fault incurred testing bus mappings? */
+                                if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
+                                   (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
+                                        send_fault_sig(&fp->ptregs);
+                                        return;
+                                }
+
+                                printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
+                                        ssw & RW ? "read" : "write",
+                                        fp->un.fmtb.daddr,
+                                        space_names[ssw & DFC], fp->ptregs.pc);
+                        }
+                        printk ("BAD KERNEL BUSERR\n");
+
+                        die_if_kernel("Oops", &fp->ptregs,0);
+                        force_sig(SIGKILL, current);
+                        return;
+                }
+        } else {
+                /* user fault */
+                if (!(ssw & (FC | FB)) && !(ssw & DF))
+                        /* not an instruction fault or data fault! BAD */
+                        panic ("USER BUSERR w/o instruction or data fault");
+        }
+
+
+        /* First handle the data fault, if any.  */
+        if (ssw & DF) {
+                addr = fp->un.fmtb.daddr;
+
+// errorcode bit 0:     0 -> no page            1 -> protection fault
+// errorcode bit 1:     0 -> read fault         1 -> write fault
+
+// (buserr_type & SUN3_BUSERR_PROTERR)  -> protection fault
+// (buserr_type & SUN3_BUSERR_INVALID)  -> invalid page fault
+
+                if (buserr_type & SUN3_BUSERR_PROTERR)
+                        errorcode = 0x01;
+                else if (buserr_type & SUN3_BUSERR_INVALID)
+                        errorcode = 0x00;
+                else {
+#ifdef DEBUG
+                        printk ("*** unexpected busfault type=%#04x\n", buserr_type);
+                        printk ("invalid %s access at %#lx from pc %#lx\n",
+                                !(ssw & RW) ? "write" : "read", addr,
+                                fp->ptregs.pc);
+#endif
+                        die_if_kernel ("Oops", &fp->ptregs, buserr_type);
+                        force_sig (SIGBUS, current);
+                        return;
+                }
+
+//todo: wtf is RM bit? --m
+                if (!(ssw & RW) || ssw & RM)
+                        errorcode |= 0x02;
+
+                /* Handle page fault. */
+                do_page_fault (&fp->ptregs, addr, errorcode);
+
+                /* Retry the data fault now. */
+                return;
+        }
+
+        /* Now handle the instruction fault. */
+
+        /* Get the fault address. */
+        if (fp->ptregs.format == 0xA)
+                addr = fp->ptregs.pc + 4;
+        else
+                addr = fp->un.fmtb.baddr;
+        if (ssw & FC)
+                addr -= 2;
+
+        if (buserr_type & SUN3_BUSERR_INVALID) {
+                if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
+                        do_page_fault (&fp->ptregs, addr, 0);
+       } else {
+#ifdef DEBUG
+                printk ("protection fault on insn access (segv).\n");
+#endif
+                force_sig (SIGSEGV, current);
+       }
+}
+#else
+#if defined(CPU_M68020_OR_M68030)
+static inline void bus_error030 (struct frame *fp)
+{
+        volatile unsigned short temp;
+        unsigned short mmusr;
+        unsigned long addr, errorcode;
+        unsigned short ssw = fp->un.fmtb.ssw;
+#ifdef DEBUG
+        unsigned long desc;
+
+        printk ("pid = %x  ", current->pid);
+        printk ("SSW=%#06x  ", ssw);
+
+        if (ssw & (FC | FB))
+                printk ("Instruction fault at %#010lx\n",
+                        ssw & FC ?
+                        fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
+                        :
+                        fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
+        if (ssw & DF)
+                printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
+                        ssw & RW ? "read" : "write",
+                        fp->un.fmtb.daddr,
+                        space_names[ssw & DFC], fp->ptregs.pc);
+#endif
+
+        /* ++andreas: If a data fault and an instruction fault happen
+           at the same time map in both pages.  */
+
+        /* First handle the data fault, if any.  */
+        if (ssw & DF) {
+                addr = fp->un.fmtb.daddr;
+
+#ifdef DEBUG
+                asm volatile ("ptestr %3,%2@,#7,%0\n\t"
+                              "pmove %%psr,%1@"
+                              : "=a&" (desc)
+                              : "a" (&temp), "a" (addr), "d" (ssw));
+#else
+                asm volatile ("ptestr %2,%1@,#7\n\t"
+                              "pmove %%psr,%0@"
+                              : : "a" (&temp), "a" (addr), "d" (ssw));
+#endif
+                mmusr = temp;
+
+#ifdef DEBUG
+                printk("mmusr is %#x for addr %#lx in task %p\n",
+                       mmusr, addr, current);
+                printk("descriptor address is %#lx, contents %#lx\n",
+                       __va(desc), *(unsigned long *)__va(desc));
+#endif
+
+                errorcode = (mmusr & MMU_I) ? 0 : 1;
+                if (!(ssw & RW) || (ssw & RM))
+                        errorcode |= 2;
+
+                if (mmusr & (MMU_I | MMU_WP)) {
+                        if (ssw & 4) {
+                                printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
+                                       ssw & RW ? "read" : "write",
+                                       fp->un.fmtb.daddr,
+                                       space_names[ssw & DFC], fp->ptregs.pc);
+                                goto buserr;
+                        }
+                        /* Don't try to do anything further if an exception was
+                           handled. */
+                        if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
+                                return;
+                } else if (!(mmusr & MMU_I)) {
+                        /* probably a 020 cas fault */
+                        if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
+                                printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
+                } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
+                        printk("invalid %s access at %#lx from pc %#lx\n",
+                               !(ssw & RW) ? "write" : "read", addr,
+                               fp->ptregs.pc);
+                        die_if_kernel("Oops",&fp->ptregs,mmusr);
+                        force_sig(SIGSEGV, current);
+                        return;
+                } else {
+#if 0
+                        static volatile long tlong;
+#endif
+
+                        printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
+                               !(ssw & RW) ? "write" : "read", addr,
+                               fp->ptregs.pc, ssw);
+                        asm volatile ("ptestr #1,%1@,#0\n\t"
+                                      "pmove %%psr,%0@"
+                                      : /* no outputs */
+                                      : "a" (&temp), "a" (addr));
+                        mmusr = temp;
+
+                        printk ("level 0 mmusr is %#x\n", mmusr);
+#if 0
+                        asm volatile ("pmove %%tt0,%0@"
+                                      : /* no outputs */
+                                      : "a" (&tlong));
+                        printk("tt0 is %#lx, ", tlong);
+                        asm volatile ("pmove %%tt1,%0@"
+                                      : /* no outputs */
+                                      : "a" (&tlong));
+                        printk("tt1 is %#lx\n", tlong);
+#endif
+#ifdef DEBUG
+                        printk("Unknown SIGSEGV - 1\n");
+#endif
+                        die_if_kernel("Oops",&fp->ptregs,mmusr);
+                        force_sig(SIGSEGV, current);
+                        return;
+                }
+
+                /* setup an ATC entry for the access about to be retried */
+                if (!(ssw & RW) || (ssw & RM))
+                        asm volatile ("ploadw %1,%0@" : /* no outputs */
+                                      : "a" (addr), "d" (ssw));
+                else
+                        asm volatile ("ploadr %1,%0@" : /* no outputs */
+                                      : "a" (addr), "d" (ssw));
+        }
+
+        /* Now handle the instruction fault. */
+
+        if (!(ssw & (FC|FB)))
+                return;
+
+        if (fp->ptregs.sr & PS_S) {
+                printk("Instruction fault at %#010lx\n",
+                        fp->ptregs.pc);
+        buserr:
+                printk ("BAD KERNEL BUSERR\n");
+                die_if_kernel("Oops",&fp->ptregs,0);
+                force_sig(SIGKILL, current);
+                return;
+        }
+
+        /* get the fault address */
+        if (fp->ptregs.format == 10)
+                addr = fp->ptregs.pc + 4;
+        else
+                addr = fp->un.fmtb.baddr;
+        if (ssw & FC)
+                addr -= 2;
+
+        if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
+                /* Insn fault on same page as data fault.  But we
+                   should still create the ATC entry.  */
+                goto create_atc_entry;
+
+#ifdef DEBUG
+        asm volatile ("ptestr #1,%2@,#7,%0\n\t"
+                      "pmove %%psr,%1@"
+                      : "=a&" (desc)
+                      : "a" (&temp), "a" (addr));
+#else
+        asm volatile ("ptestr #1,%1@,#7\n\t"
+                      "pmove %%psr,%0@"
+                      : : "a" (&temp), "a" (addr));
+#endif
+        mmusr = temp;
+
+#ifdef DEBUG
+        printk ("mmusr is %#x for addr %#lx in task %p\n",
+                mmusr, addr, current);
+        printk ("descriptor address is %#lx, contents %#lx\n",
+                __va(desc), *(unsigned long *)__va(desc));
+#endif
+
+        if (mmusr & MMU_I)
+                do_page_fault (&fp->ptregs, addr, 0);
+        else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
+                printk ("invalid insn access at %#lx from pc %#lx\n",
+                        addr, fp->ptregs.pc);
+#ifdef DEBUG
+                printk("Unknown SIGSEGV - 2\n");
+#endif
+                die_if_kernel("Oops",&fp->ptregs,mmusr);
+                force_sig(SIGSEGV, current);
+                return;
+        }
+
+create_atc_entry:
+        /* setup an ATC entry for the access about to be retried */
+        asm volatile ("ploadr #2,%0@" : /* no outputs */
+                      : "a" (addr));
+}
+#endif /* CPU_M68020_OR_M68030 */
+#endif /* !CONFIG_SUN3 */
+
+asmlinkage void buserr_c(struct frame *fp)
+{
+        /* Only set esp0 if coming from user mode */
+        if (user_mode(&fp->ptregs))
+                current->thread.esp0 = (unsigned long) fp;
+
+#ifdef DEBUG
+        printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
+#endif
+
+        switch (fp->ptregs.format) {
+#if defined (CONFIG_M68060)
+        case 4:                         /* 68060 access error */
+          access_error060 (fp);
+          break;
+#endif
+#if defined (CONFIG_M68040)
+        case 0x7:                       /* 68040 access error */
+          access_error040 (fp);
+          break;
+#endif
+#if defined (CPU_M68020_OR_M68030)
+        case 0xa:
+        case 0xb:
+          bus_error030 (fp);
+          break;
+#endif
+        default:
+          die_if_kernel("bad frame format",&fp->ptregs,0);
+#ifdef DEBUG
+          printk("Unknown SIGSEGV - 4\n");
+#endif
+          force_sig(SIGSEGV, current);
+        }
+}
+
+
+static int kstack_depth_to_print = 48;
+
+void show_trace(unsigned long *stack)
+{
+        unsigned long *endstack;
+        unsigned long addr;
+        int i;
+
+        printk("Call Trace:");
+        addr = (unsigned long)stack + THREAD_SIZE - 1;
+        endstack = (unsigned long *)(addr & -THREAD_SIZE);
+        i = 0;
+        while (stack + 1 <= endstack) {
+                addr = *stack++;
+                /*
+                 * If the address is either in the text segment of the
+                 * kernel, or in the region which contains vmalloc'ed
+                 * memory, it *may* be the address of a calling
+                 * routine; if so, print it so that someone tracing
+                 * down the cause of the crash will be able to figure
+                 * out the call path that was taken.
+                 */
+                if (__kernel_text_address(addr)) {
+#ifndef CONFIG_KALLSYMS
+                        if (i % 5 == 0)
+                                printk("\n       ");
+#endif
+                        printk(" [<%08lx>] %pS\n", addr, (void *)addr);
+                        i++;
+                }
+        }
+        printk("\n");
+}
+
+void show_registers(struct pt_regs *regs)
+{
+        struct frame *fp = (struct frame *)regs;
+        mm_segment_t old_fs = get_fs();
+        u16 c, *cp;
+        unsigned long addr;
+        int i;
+
+        print_modules();
+        printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc);
+        printk("SR: %04x  SP: %p  a2: %08lx\n", regs->sr, regs, regs->a2);
+        printk("d0: %08lx    d1: %08lx    d2: %08lx    d3: %08lx\n",
+               regs->d0, regs->d1, regs->d2, regs->d3);
+        printk("d4: %08lx    d5: %08lx    a0: %08lx    a1: %08lx\n",
+               regs->d4, regs->d5, regs->a0, regs->a1);
+
+        printk("Process %s (pid: %d, task=%p)\n",
+                current->comm, task_pid_nr(current), current);
+        addr = (unsigned long)&fp->un;
+        printk("Frame format=%X ", regs->format);
+        switch (regs->format) {
+        case 0x2:
+                printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
+                addr += sizeof(fp->un.fmt2);
+                break;
+        case 0x3:
+                printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
+                addr += sizeof(fp->un.fmt3);
+                break;
+        case 0x4:
+                printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
+                        : "eff addr=%08lx pc=%08lx\n"),
+                        fp->un.fmt4.effaddr, fp->un.fmt4.pc);
+                addr += sizeof(fp->un.fmt4);
+                break;
+        case 0x7:
+                printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
+                        fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
+                printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
+                        fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
+                printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
+                        fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
+                printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
+                        fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
+                printk("push data: %08lx %08lx %08lx %08lx\n",
+                        fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
+                        fp->un.fmt7.pd3);
+                addr += sizeof(fp->un.fmt7);
+                break;
+        case 0x9:
+                printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
+                addr += sizeof(fp->un.fmt9);
+                break;
+        case 0xa:
+                printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
+                        fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
+                        fp->un.fmta.daddr, fp->un.fmta.dobuf);
+                addr += sizeof(fp->un.fmta);
+                break;
+        case 0xb:
+                printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
+                        fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
+                        fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
+                printk("baddr=%08lx dibuf=%08lx ver=%x\n",
+                        fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
+                addr += sizeof(fp->un.fmtb);
+                break;
+        default:
+                printk("\n");
+        }
+        show_stack(NULL, (unsigned long *)addr);
+
+        printk("Code:");
+        set_fs(KERNEL_DS);
+        cp = (u16 *)regs->pc;
+        for (i = -8; i < 16; i++) {
+                if (get_user(c, cp + i) && i >= 0) {
+                        printk(" Bad PC value.");
+                        break;
+                }
+                printk(i ? " %04x" : " <%04x>", c);
+        }
+        set_fs(old_fs);
+        printk ("\n");
+}
+
+void show_stack(struct task_struct *task, unsigned long *stack)
+{
+        unsigned long *p;
+        unsigned long *endstack;
+        int i;
+
+        if (!stack) {
+                if (task)
+                        stack = (unsigned long *)task->thread.esp0;
+                else
+                        stack = (unsigned long *)&stack;
+        }
+        endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
+
+        printk("Stack from %08lx:", (unsigned long)stack);
+        p = stack;
+        for (i = 0; i < kstack_depth_to_print; i++) {
+                if (p + 1 > endstack)
+                        break;
+                if (i % 8 == 0)
+                        printk("\n       ");
+                printk(" %08lx", *p++);
+        }
+        printk("\n");
+        show_trace(stack);
+}
+
+/*
+ * The architecture-independent backtrace generator
+ */
+void dump_stack(void)
+{
+        unsigned long stack;
+
+        show_trace(&stack);
+}
+
+EXPORT_SYMBOL(dump_stack);
+
+void bad_super_trap (struct frame *fp)
+{
+        console_verbose();
+        if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names))
+                printk ("*** %s ***   FORMAT=%X\n",
+                        vec_names[(fp->ptregs.vector) >> 2],
+                        fp->ptregs.format);
+        else
+                printk ("*** Exception %d ***   FORMAT=%X\n",
+                        (fp->ptregs.vector) >> 2,
+                        fp->ptregs.format);
+        if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
+                unsigned short ssw = fp->un.fmtb.ssw;
+
+                printk ("SSW=%#06x  ", ssw);
+
+                if (ssw & RC)
+                        printk ("Pipe stage C instruction fault at %#010lx\n",
+                                (fp->ptregs.format) == 0xA ?
+                                fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
+                if (ssw & RB)
+                        printk ("Pipe stage B instruction fault at %#010lx\n",
+                                (fp->ptregs.format) == 0xA ?
+                                fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
+                if (ssw & DF)
+                        printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
+                                ssw & RW ? "read" : "write",
+                                fp->un.fmtb.daddr, space_names[ssw & DFC],
+                                fp->ptregs.pc);
+        }
+        printk ("Current process id is %d\n", task_pid_nr(current));
+        die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
+}
+
+asmlinkage void trap_c(struct frame *fp)
+{
+        int sig;
+        siginfo_t info;
+
+        if (fp->ptregs.sr & PS_S) {
+                if (fp->ptregs.vector == VEC_TRACE << 2) {
+                        /* traced a trapping instruction on a 68020/30,
+                         * real exception will be executed afterwards.
+                         */
+                } else if (!handle_kernel_fault(&fp->ptregs))
+                        bad_super_trap(fp);
+                return;
+        }
+
+        /* send the appropriate signal to the user program */
+        switch ((fp->ptregs.vector) >> 2) {
+            case VEC_ADDRERR:
+                info.si_code = BUS_ADRALN;
+                sig = SIGBUS;
+                break;
+            case VEC_ILLEGAL:
+            case VEC_LINE10:
+            case VEC_LINE11:
+                info.si_code = ILL_ILLOPC;
+                sig = SIGILL;
+                break;
+            case VEC_PRIV:
+                info.si_code = ILL_PRVOPC;
+                sig = SIGILL;
+                break;
+            case VEC_COPROC:
+                info.si_code = ILL_COPROC;
+                sig = SIGILL;
+                break;
+            case VEC_TRAP1:
+            case VEC_TRAP2:
+            case VEC_TRAP3:
+            case VEC_TRAP4:
+            case VEC_TRAP5:
+            case VEC_TRAP6:
+            case VEC_TRAP7:
+            case VEC_TRAP8:
+            case VEC_TRAP9:
+            case VEC_TRAP10:
+            case VEC_TRAP11:
+            case VEC_TRAP12:
+            case VEC_TRAP13:
+            case VEC_TRAP14:
+                info.si_code = ILL_ILLTRP;
+                sig = SIGILL;
+                break;
+            case VEC_FPBRUC:
+            case VEC_FPOE:
+            case VEC_FPNAN:
+                info.si_code = FPE_FLTINV;
+                sig = SIGFPE;
+                break;
+            case VEC_FPIR:
+                info.si_code = FPE_FLTRES;
+                sig = SIGFPE;
+                break;
+            case VEC_FPDIVZ:
+                info.si_code = FPE_FLTDIV;
+                sig = SIGFPE;
+                break;
+            case VEC_FPUNDER:
+                info.si_code = FPE_FLTUND;
+                sig = SIGFPE;
+                break;
+            case VEC_FPOVER:
+                info.si_code = FPE_FLTOVF;
+                sig = SIGFPE;
+                break;
+            case VEC_ZERODIV:
+                info.si_code = FPE_INTDIV;
+                sig = SIGFPE;
+                break;
+            case VEC_CHK:
+            case VEC_TRAP:
+                info.si_code = FPE_INTOVF;
+                sig = SIGFPE;
+                break;
+            case VEC_TRACE:             /* ptrace single step */
+                info.si_code = TRAP_TRACE;
+                sig = SIGTRAP;
+                break;
+            case VEC_TRAP15:            /* breakpoint */
+                info.si_code = TRAP_BRKPT;
+                sig = SIGTRAP;
+                break;
+            default:
+                info.si_code = ILL_ILLOPC;
+                sig = SIGILL;
+                break;
+        }
+        info.si_signo = sig;
+        info.si_errno = 0;
+        switch (fp->ptregs.format) {
+            default:
+                info.si_addr = (void *) fp->ptregs.pc;
+                break;
+            case 2:
+                info.si_addr = (void *) fp->un.fmt2.iaddr;
+                break;
+            case 7:
+                info.si_addr = (void *) fp->un.fmt7.effaddr;
+                break;
+            case 9:
+                info.si_addr = (void *) fp->un.fmt9.iaddr;
+                break;
+            case 10:
+                info.si_addr = (void *) fp->un.fmta.daddr;
+                break;
+            case 11:
+                info.si_addr = (void *) fp->un.fmtb.daddr;
+                break;
+        }
+        force_sig_info (sig, &info, current);
+}
+
+void die_if_kernel (char *str, struct pt_regs *fp, int nr)
+{
+        if (!(fp->sr & PS_S))
+                return;
+
+        console_verbose();
+        printk("%s: %08x\n",str,nr);
+        show_registers(fp);
+        add_taint(TAINT_DIE);
+        do_exit(SIGSEGV);
+}
+
+/*
+ * This function is called if an error occur while accessing
+ * user-space from the fpsp040 code.
+ */
+asmlinkage void fpsp040_die(void)
+{
+        do_exit(SIGSEGV);
+}
+
+#ifdef CONFIG_M68KFPU_EMU
+asmlinkage void fpemu_signal(int signal, int code, void *addr)
+{
+        siginfo_t info;
+
+        info.si_signo = signal;
+        info.si_errno = 0;
+        info.si_code = code;
+        info.si_addr = addr;
+        force_sig_info(signal, &info, current);
+}
+#endif
diff --git a/arch/m68k/kernel/traps_no.c b/arch/m68k/kernel/traps_no.c
new file mode 100644
index 000000000000..a768008dfd06
--- /dev/null
+++ b/arch/m68k/kernel/traps_no.c
@@ -0,0 +1,365 @@
+/*
+ *  linux/arch/m68knommu/kernel/traps.c
+ *
+ *  Copyright (C) 1993, 1994 by Hamish Macdonald
+ *
+ *  68040 fixes by Michael Rausch
+ *  68040 fixes by Martin Apel
+ *  68060 fixes by Roman Hodek
+ *  68060 fixes by Jesper Skov
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+/*
+ * Sets up all exception vectors
+ */
+#include <linux/sched.h>
+#include <linux/signal.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/user.h>
+#include <linux/string.h>
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <linux/ptrace.h>
+#include <linux/kallsyms.h>
+
+#include <asm/setup.h>
+#include <asm/fpu.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
+#include <asm/traps.h>
+#include <asm/pgtable.h>
+#include <asm/machdep.h>
+#include <asm/siginfo.h>
+
+static char const * const vec_names[] = {
+        "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR",
+        "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc",
+        "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111",
+        "UNASSIGNED RESERVED 12", "COPROCESSOR PROTOCOL VIOLATION",
+        "FORMAT ERROR", "UNINITIALIZED INTERRUPT",
+        "UNASSIGNED RESERVED 16", "UNASSIGNED RESERVED 17",
+        "UNASSIGNED RESERVED 18", "UNASSIGNED RESERVED 19",
+        "UNASSIGNED RESERVED 20", "UNASSIGNED RESERVED 21",
+        "UNASSIGNED RESERVED 22", "UNASSIGNED RESERVED 23",
+        "SPURIOUS INTERRUPT", "LEVEL 1 INT", "LEVEL 2 INT", "LEVEL 3 INT",
+        "LEVEL 4 INT", "LEVEL 5 INT", "LEVEL 6 INT", "LEVEL 7 INT",
+        "SYSCALL", "TRAP #1", "TRAP #2", "TRAP #3",
+        "TRAP #4", "TRAP #5", "TRAP #6", "TRAP #7",
+        "TRAP #8", "TRAP #9", "TRAP #10", "TRAP #11",
+        "TRAP #12", "TRAP #13", "TRAP #14", "TRAP #15",
+        "FPCP BSUN", "FPCP INEXACT", "FPCP DIV BY 0", "FPCP UNDERFLOW",
+        "FPCP OPERAND ERROR", "FPCP OVERFLOW", "FPCP SNAN",
+        "FPCP UNSUPPORTED OPERATION",
+        "MMU CONFIGURATION ERROR"
+};
+
+void __init trap_init(void)
+{
+}
+
+void die_if_kernel(char *str, struct pt_regs *fp, int nr)
+{
+        if (!(fp->sr & PS_S))
+                return;
+
+        console_verbose();
+        printk(KERN_EMERG "%s: %08x\n",str,nr);
+        printk(KERN_EMERG "PC: [<%08lx>]\nSR: %04x  SP: %p  a2: %08lx\n",
+               fp->pc, fp->sr, fp, fp->a2);
+        printk(KERN_EMERG "d0: %08lx    d1: %08lx    d2: %08lx    d3: %08lx\n",
+               fp->d0, fp->d1, fp->d2, fp->d3);
+        printk(KERN_EMERG "d4: %08lx    d5: %08lx    a0: %08lx    a1: %08lx\n",
+               fp->d4, fp->d5, fp->a0, fp->a1);
+
+        printk(KERN_EMERG "Process %s (pid: %d, stackpage=%08lx)\n",
+                current->comm, current->pid, PAGE_SIZE+(unsigned long)current);
+        show_stack(NULL, (unsigned long *)(fp + 1));
+        add_taint(TAINT_DIE);
+        do_exit(SIGSEGV);
+}
+
+asmlinkage void buserr_c(struct frame *fp)
+{
+        /* Only set esp0 if coming from user mode */
+        if (user_mode(&fp->ptregs))
+                current->thread.esp0 = (unsigned long) fp;
+
+#if defined(DEBUG)
+        printk (KERN_DEBUG "*** Bus Error *** Format is %x\n", fp->ptregs.format);
+#endif
+
+        die_if_kernel("bad frame format",&fp->ptregs,0);
+#if defined(DEBUG)
+        printk(KERN_DEBUG "Unknown SIGSEGV - 4\n");
+#endif
+        force_sig(SIGSEGV, current);
+}
+
+static void print_this_address(unsigned long addr, int i)
+{
+#ifdef CONFIG_KALLSYMS
+        printk(KERN_EMERG " [%08lx] ", addr);
+        print_symbol(KERN_CONT "%s\n", addr);
+#else
+        if (i % 5)
+                printk(KERN_CONT " [%08lx] ", addr);
+        else
+                printk(KERN_EMERG " [%08lx] ", addr);
+        i++;
+#endif
+}
+
+int kstack_depth_to_print = 48;
+
+static void __show_stack(struct task_struct *task, unsigned long *stack)
+{
+        unsigned long *endstack, addr;
+#ifdef CONFIG_FRAME_POINTER
+        unsigned long *last_stack;
+#endif
+        int i;
+
+        if (!stack)
+                stack = (unsigned long *)task->thread.ksp;
+
+        addr = (unsigned long) stack;
+        endstack = (unsigned long *) PAGE_ALIGN(addr);
+
+        printk(KERN_EMERG "Stack from %08lx:", (unsigned long)stack);
+        for (i = 0; i < kstack_depth_to_print; i++) {
+                if (stack + 1 + i > endstack)
+                        break;
+                if (i % 8 == 0)
+                        printk(KERN_EMERG "       ");
+                printk(KERN_CONT " %08lx", *(stack + i));
+        }
+        printk("\n");
+        i = 0;
+
+#ifdef CONFIG_FRAME_POINTER
+        printk(KERN_EMERG "Call Trace:\n");
+
+        last_stack = stack - 1;
+        while (stack <= endstack && stack > last_stack) {
+
+                addr = *(stack + 1);
+                print_this_address(addr, i);
+                i++;
+
+                last_stack = stack;
+                stack = (unsigned long *)*stack;
+        }
+        printk("\n");
+#else
+        printk(KERN_EMERG "Call Trace with CONFIG_FRAME_POINTER disabled:\n");
+        while (stack <= endstack) {
+                addr = *stack++;
+                /*
+                 * If the address is either in the text segment of the kernel,
+                 * or in a region which is occupied by a module then it *may*
+                 * be the address of a calling routine; if so, print it so that
+                 * someone tracing down the cause of the crash will be able to
+                 * figure out the call path that was taken.
+                 */
+                if (__kernel_text_address(addr)) {
+                        print_this_address(addr, i);
+                        i++;
+                }
+        }
+        printk(KERN_CONT "\n");
+#endif
+}
+
+void bad_super_trap(struct frame *fp)
+{
+        int vector = (fp->ptregs.vector >> 2) & 0xff;
+
+        console_verbose();
+        if (vector < ARRAY_SIZE(vec_names))
+                printk (KERN_WARNING "*** %s ***   FORMAT=%X\n",
+                        vec_names[vector],
+                        fp->ptregs.format);
+        else
+                printk (KERN_WARNING "*** Exception %d ***   FORMAT=%X\n",
+                        vector,
+                        fp->ptregs.format);
+        printk (KERN_WARNING "Current process id is %d\n", current->pid);
+        die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
+}
+
+asmlinkage void trap_c(struct frame *fp)
+{
+        int sig;
+        int vector = (fp->ptregs.vector >> 2) & 0xff;
+        siginfo_t info;
+
+        if (fp->ptregs.sr & PS_S) {
+                if (vector == VEC_TRACE) {
+                        /* traced a trapping instruction */
+                } else
+                        bad_super_trap(fp);
+                return;
+        }
+
+        /* send the appropriate signal to the user program */
+        switch (vector) {
+            case VEC_ADDRERR:
+                info.si_code = BUS_ADRALN;
+                sig = SIGBUS;
+                break;
+            case VEC_ILLEGAL:
+            case VEC_LINE10:
+            case VEC_LINE11:
+                info.si_code = ILL_ILLOPC;
+                sig = SIGILL;
+                break;
+            case VEC_PRIV:
+                info.si_code = ILL_PRVOPC;
+                sig = SIGILL;
+                break;
+            case VEC_COPROC:
+                info.si_code = ILL_COPROC;
+                sig = SIGILL;
+                break;
+            case VEC_TRAP1: /* gdbserver breakpoint */
+                fp->ptregs.pc -= 2;
+                info.si_code = TRAP_TRACE;
+                sig = SIGTRAP;
+                break;
+            case VEC_TRAP2:
+            case VEC_TRAP3:
+            case VEC_TRAP4:
+            case VEC_TRAP5:
+            case VEC_TRAP6:
+            case VEC_TRAP7:
+            case VEC_TRAP8:
+            case VEC_TRAP9:
+            case VEC_TRAP10:
+            case VEC_TRAP11:
+            case VEC_TRAP12:
+            case VEC_TRAP13:
+            case VEC_TRAP14:
+                info.si_code = ILL_ILLTRP;
+                sig = SIGILL;
+                break;
+            case VEC_FPBRUC:
+            case VEC_FPOE:
+            case VEC_FPNAN:
+                info.si_code = FPE_FLTINV;
+                sig = SIGFPE;
+                break;
+            case VEC_FPIR:
+                info.si_code = FPE_FLTRES;
+                sig = SIGFPE;
+                break;
+            case VEC_FPDIVZ:
+                info.si_code = FPE_FLTDIV;
+                sig = SIGFPE;
+                break;
+            case VEC_FPUNDER:
+                info.si_code = FPE_FLTUND;
+                sig = SIGFPE;
+                break;
+            case VEC_FPOVER:
+                info.si_code = FPE_FLTOVF;
+                sig = SIGFPE;
+                break;
+            case VEC_ZERODIV:
+                info.si_code = FPE_INTDIV;
+                sig = SIGFPE;
+                break;
+            case VEC_CHK:
+            case VEC_TRAP:
+                info.si_code = FPE_INTOVF;
+                sig = SIGFPE;
+                break;
+            case VEC_TRACE:             /* ptrace single step */
+                info.si_code = TRAP_TRACE;
+                sig = SIGTRAP;
+                break;
+            case VEC_TRAP15:            /* breakpoint */
+                info.si_code = TRAP_BRKPT;
+                sig = SIGTRAP;
+                break;
+            default:
+                info.si_code = ILL_ILLOPC;
+                sig = SIGILL;
+                break;
+        }
+        info.si_signo = sig;
+        info.si_errno = 0;
+        switch (fp->ptregs.format) {
+            default:
+                info.si_addr = (void *) fp->ptregs.pc;
+                break;
+            case 2:
+                info.si_addr = (void *) fp->un.fmt2.iaddr;
+                break;
+            case 7:
+                info.si_addr = (void *) fp->un.fmt7.effaddr;
+                break;
+            case 9:
+                info.si_addr = (void *) fp->un.fmt9.iaddr;
+                break;
+            case 10:
+                info.si_addr = (void *) fp->un.fmta.daddr;
+                break;
+            case 11:
+                info.si_addr = (void *) fp->un.fmtb.daddr;
+                break;
+        }
+        force_sig_info (sig, &info, current);
+}
+
+asmlinkage void set_esp0(unsigned long ssp)
+{
+        current->thread.esp0 = ssp;
+}
+
+/*
+ * The architecture-independent backtrace generator
+ */
+void dump_stack(void)
+{
+        /*
+         * We need frame pointers for this little trick, which works as follows:
+         *
+         * +------------+ 0x00
+         * | Next SP    |       -> 0x0c
+         * +------------+ 0x04
+         * | Caller     |
+         * +------------+ 0x08
+         * | Local vars |       -> our stack var
+         * +------------+ 0x0c
+         * | Next SP    |       -> 0x18, that is what we pass to show_stack()
+         * +------------+ 0x10
+         * | Caller     |
+         * +------------+ 0x14
+         * | Local vars |
+         * +------------+ 0x18
+         * | ...        |
+         * +------------+
+         */
+
+        unsigned long *stack;
+
+        stack = (unsigned long *)&stack;
+        stack++;
+        __show_stack(current, stack);
+}
+EXPORT_SYMBOL(dump_stack);
+
+void show_stack(struct task_struct *task, unsigned long *stack)
+{
+        if (!stack && !task)
+                dump_stack();
+        else
+                __show_stack(task, stack);
+}
diff --git a/arch/m68k/kernel/vmlinux.lds.S b/arch/m68k/kernel/vmlinux.lds.S
index 99ba315bd0a8..030dabf0bc53 100644
--- a/arch/m68k/kernel/vmlinux.lds.S
+++ b/arch/m68k/kernel/vmlinux.lds.S
@@ -1,10 +1,5 @@
-PHDRS
-{
-  text PT_LOAD FILEHDR PHDRS FLAGS (7);
-  data PT_LOAD FLAGS (7);
-}
-#ifdef CONFIG_SUN3
-#include "vmlinux-sun3.lds"
+#ifdef CONFIG_MMU
+#include "vmlinux.lds_mm.S"
 #else
-#include "vmlinux-std.lds"
+#include "vmlinux.lds_no.S"
 #endif
diff --git a/arch/m68k/kernel/vmlinux.lds_mm.S b/arch/m68k/kernel/vmlinux.lds_mm.S
new file mode 100644
index 000000000000..99ba315bd0a8
--- /dev/null
+++ b/arch/m68k/kernel/vmlinux.lds_mm.S
@@ -0,0 +1,10 @@
+PHDRS
+{
+  text PT_LOAD FILEHDR PHDRS FLAGS (7);
+  data PT_LOAD FLAGS (7);
+}
+#ifdef CONFIG_SUN3
+#include "vmlinux-sun3.lds"
+#else
+#include "vmlinux-std.lds"
+#endif
diff --git a/arch/m68k/kernel/vmlinux.lds_no.S b/arch/m68k/kernel/vmlinux.lds_no.S
new file mode 100644
index 000000000000..47e15ebfd893
--- /dev/null
+++ b/arch/m68k/kernel/vmlinux.lds_no.S
@@ -0,0 +1,188 @@
+/*
+ *      vmlinux.lds.S -- master linker script for m68knommu arch
+ *
+ *      (C) Copyright 2002-2006, Greg Ungerer <gerg@snapgear.com>
+ *
+ *      This linker script is equiped to build either ROM loaded or RAM
+ *      run kernels.
+ */
+
+#include <asm-generic/vmlinux.lds.h>
+#include <asm/page.h>
+#include <asm/thread_info.h>
+
+#if defined(CONFIG_RAMKERNEL)
+#define RAM_START       CONFIG_KERNELBASE
+#define RAM_LENGTH      (CONFIG_RAMBASE + CONFIG_RAMSIZE - CONFIG_KERNELBASE)
+#define TEXT            ram
+#define DATA            ram
+#define INIT            ram
+#define BSSS            ram
+#endif
+#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL)
+#define RAM_START       CONFIG_RAMBASE
+#define RAM_LENGTH      CONFIG_RAMSIZE
+#define ROMVEC_START    CONFIG_ROMVEC
+#define ROMVEC_LENGTH   CONFIG_ROMVECSIZE
+#define ROM_START       CONFIG_ROMSTART
+#define ROM_LENGTH      CONFIG_ROMSIZE
+#define TEXT            rom
+#define DATA            ram
+#define INIT            ram
+#define BSSS            ram
+#endif
+
+#ifndef DATA_ADDR
+#define DATA_ADDR
+#endif
+
+
+OUTPUT_ARCH(m68k)
+ENTRY(_start)
+
+MEMORY {
+        ram     : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
+#ifdef ROM_START
+        romvec  : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH
+        rom     : ORIGIN = ROM_START, LENGTH = ROM_LENGTH
+#endif
+}
+
+jiffies = jiffies_64 + 4;
+
+SECTIONS {
+
+#ifdef ROMVEC_START
+        . = ROMVEC_START ;
+        .romvec : {
+                __rom_start = . ;
+                _romvec = .;
+                *(.data..initvect)
+        } > romvec
+#endif
+
+        .text : {
+                _text = .;
+                _stext = . ;
+                HEAD_TEXT
+                TEXT_TEXT
+                SCHED_TEXT
+                LOCK_TEXT
+                *(.text..lock)
+
+                . = ALIGN(16);          /* Exception table              */
+                __start___ex_table = .;
+                *(__ex_table)
+                __stop___ex_table = .;
+
+                *(.rodata) *(.rodata.*)
+                *(__vermagic)           /* Kernel version magic */
+                *(__markers_strings)
+                *(.rodata1)
+                *(.rodata.str1.1)
+
+                /* Kernel symbol table: Normal symbols */
+                . = ALIGN(4);
+                __start___ksymtab = .;
+                *(__ksymtab)
+                __stop___ksymtab = .;
+
+                /* Kernel symbol table: GPL-only symbols */
+                __start___ksymtab_gpl = .;
+                *(__ksymtab_gpl)
+                __stop___ksymtab_gpl = .;
+
+                /* Kernel symbol table: Normal unused symbols */
+                __start___ksymtab_unused = .;
+                *(__ksymtab_unused)
+                __stop___ksymtab_unused = .;
+
+                /* Kernel symbol table: GPL-only unused symbols */
+                __start___ksymtab_unused_gpl = .;
+                *(__ksymtab_unused_gpl)
+                __stop___ksymtab_unused_gpl = .;
+
+                /* Kernel symbol table: GPL-future symbols */
+                __start___ksymtab_gpl_future = .;
+                *(__ksymtab_gpl_future)
+                __stop___ksymtab_gpl_future = .;
+
+                /* Kernel symbol table: Normal symbols */
+                __start___kcrctab = .;
+                *(__kcrctab)
+                __stop___kcrctab = .;
+
+                /* Kernel symbol table: GPL-only symbols */
+                __start___kcrctab_gpl = .;
+                *(__kcrctab_gpl)
+                __stop___kcrctab_gpl = .;
+
+                /* Kernel symbol table: Normal unused symbols */
+                __start___kcrctab_unused = .;
+                *(__kcrctab_unused)
+                __stop___kcrctab_unused = .;
+
+                /* Kernel symbol table: GPL-only unused symbols */
+                __start___kcrctab_unused_gpl = .;
+                *(__kcrctab_unused_gpl)
+                __stop___kcrctab_unused_gpl = .;
+
+                /* Kernel symbol table: GPL-future symbols */
+                __start___kcrctab_gpl_future = .;
+                *(__kcrctab_gpl_future)
+                __stop___kcrctab_gpl_future = .;
+
+                /* Kernel symbol table: strings */
+                *(__ksymtab_strings)
+
+                /* Built-in module parameters */
+                . = ALIGN(4) ;
+                __start___param = .;
+                *(__param)
+                __stop___param = .;
+
+                /* Built-in module versions */
+                . = ALIGN(4) ;
+                __start___modver = .;
+                *(__modver)
+                __stop___modver = .;
+
+                . = ALIGN(4) ;
+                _etext = . ;
+        } > TEXT
+
+        .data DATA_ADDR : {
+                . = ALIGN(4);
+                _sdata = . ;
+                DATA_DATA
+                CACHELINE_ALIGNED_DATA(32)
+                PAGE_ALIGNED_DATA(PAGE_SIZE)
+                *(.data..shared_aligned)
+                INIT_TASK_DATA(THREAD_SIZE)
+                _edata = . ;
+        } > DATA
+
+        .init.text : {
+                . = ALIGN(PAGE_SIZE);
+                __init_begin = .;
+        } > INIT
+        INIT_TEXT_SECTION(PAGE_SIZE) > INIT
+        INIT_DATA_SECTION(16) > INIT
+        .init.data : {
+                . = ALIGN(PAGE_SIZE);
+                __init_end = .;
+        } > INIT
+
+        .bss : {
+                . = ALIGN(4);
+                _sbss = . ;
+                *(.bss)
+                *(COMMON)
+                . = ALIGN(4) ;
+                _ebss = . ;
+                _end = . ;
+        } > BSSS
+
+        DISCARDS
+}
+
diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile
index af9abf8d9d98..1f95881d8437 100644
--- a/arch/m68k/lib/Makefile
+++ b/arch/m68k/lib/Makefile
@@ -1,6 +1,5 @@
-#
-# Makefile for m68k-specific library files..
-#
-
-lib-y   := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
-           checksum.o string.o uaccess.o
+ifdef CONFIG_MMU
+include arch/m68k/lib/Makefile_mm
+else
+include arch/m68k/lib/Makefile_no
+endif
diff --git a/arch/m68k/lib/Makefile_mm b/arch/m68k/lib/Makefile_mm
new file mode 100644
index 000000000000..af9abf8d9d98
--- /dev/null
+++ b/arch/m68k/lib/Makefile_mm
@@ -0,0 +1,6 @@
+#
+# Makefile for m68k-specific library files..
+#
+
+lib-y   := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
+           checksum.o string.o uaccess.o
diff --git a/arch/m68k/lib/Makefile_no b/arch/m68k/lib/Makefile_no
new file mode 100644
index 000000000000..32d852e586d7
--- /dev/null
+++ b/arch/m68k/lib/Makefile_no
@@ -0,0 +1,7 @@
+#
+# Makefile for m68knommu specific library files..
+#
+
+lib-y   := ashldi3.o ashrdi3.o lshrdi3.o \
+           muldi3.o mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o \
+           checksum.o memcpy.o memmove.o memset.o delay.o
diff --git a/arch/m68k/lib/checksum.c b/arch/m68k/lib/checksum.c
index 6216f12a756b..1297536060de 100644
--- a/arch/m68k/lib/checksum.c
+++ b/arch/m68k/lib/checksum.c
@@ -1,425 +1,5 @@
-/*
- * INET         An implementation of the TCP/IP protocol suite for the LINUX
- *              operating system.  INET is implemented using the  BSD Socket
- *              interface as the means of communication with the user level.
- *
- *              IP/TCP/UDP checksumming routines
- *
- * Authors:     Jorge Cwik, <jorge@laser.satlink.net>
- *              Arnt Gulbrandsen, <agulbra@nvg.unit.no>
- *              Tom May, <ftom@netcom.com>
- *              Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
- *              Lots of code moved from tcp.c and ip.c; see those files
- *              for more names.
- *
- * 03/02/96     Jes Sorensen, Andreas Schwab, Roman Hodek:
- *              Fixed some nasty bugs, causing some horrible crashes.
- *              A: At some points, the sum (%0) was used as
- *              length-counter instead of the length counter
- *              (%1). Thanks to Roman Hodek for pointing this out.
- *              B: GCC seems to mess up if one uses too many
- *              data-registers to hold input values and one tries to
- *              specify d0 and d1 as scratch registers. Letting gcc
- *              choose these registers itself solves the problem.
- *
- *              This program is free software; you can redistribute it and/or
- *              modify it under the terms of the GNU General Public License
- *              as published by the Free Software Foundation; either version
- *              2 of the License, or (at your option) any later version.
- *
- * 1998/8/31    Andreas Schwab:
- *              Zero out rest of buffer on exception in
- *              csum_partial_copy_from_user.
- */
-
-#include <linux/module.h>
-#include <net/checksum.h>
-
-/*
- * computes a partial checksum, e.g. for TCP/UDP fragments
- */
-
-__wsum csum_partial(const void *buff, int len, __wsum sum)
-{
-        unsigned long tmp1, tmp2;
-          /*
-           * Experiments with ethernet and slip connections show that buff
-           * is aligned on either a 2-byte or 4-byte boundary.
-           */
-        __asm__("movel %2,%3\n\t"
-                "btst #1,%3\n\t"        /* Check alignment */
-                "jeq 2f\n\t"
-                "subql #2,%1\n\t"       /* buff%4==2: treat first word */
-                "jgt 1f\n\t"
-                "addql #2,%1\n\t"       /* len was == 2, treat only rest */
-                "jra 4f\n"
-             "1:\t"
-                "addw %2@+,%0\n\t"      /* add first word to sum */
-                "clrl %3\n\t"
-                "addxl %3,%0\n"         /* add X bit */
-             "2:\t"
-                /* unrolled loop for the main part: do 8 longs at once */
-                "movel %1,%3\n\t"       /* save len in tmp1 */
-                "lsrl #5,%1\n\t"        /* len/32 */
-                "jeq 2f\n\t"            /* not enough... */
-                "subql #1,%1\n"
-             "1:\t"
-                "movel %2@+,%4\n\t"
-                "addxl %4,%0\n\t"
-                "movel %2@+,%4\n\t"
-                "addxl %4,%0\n\t"
-                "movel %2@+,%4\n\t"
-                "addxl %4,%0\n\t"
-                "movel %2@+,%4\n\t"
-                "addxl %4,%0\n\t"
-                "movel %2@+,%4\n\t"
-                "addxl %4,%0\n\t"
-                "movel %2@+,%4\n\t"
-                "addxl %4,%0\n\t"
-                "movel %2@+,%4\n\t"
-                "addxl %4,%0\n\t"
-                "movel %2@+,%4\n\t"
-                "addxl %4,%0\n\t"
-                "dbra %1,1b\n\t"
-                "clrl %4\n\t"
-                "addxl %4,%0\n\t"       /* add X bit */
-                "clrw %1\n\t"
-                "subql #1,%1\n\t"
-                "jcc 1b\n"
-             "2:\t"
-                "movel %3,%1\n\t"       /* restore len from tmp1 */
-                "andw #0x1c,%3\n\t"     /* number of rest longs */
-                "jeq 4f\n\t"
-                "lsrw #2,%3\n\t"
-                "subqw #1,%3\n"
-             "3:\t"
-                /* loop for rest longs */
-                "movel %2@+,%4\n\t"
-                "addxl %4,%0\n\t"
-                "dbra %3,3b\n\t"
-                "clrl %4\n\t"
-                "addxl %4,%0\n"         /* add X bit */
-             "4:\t"
-                /* now check for rest bytes that do not fit into longs */
-                "andw #3,%1\n\t"
-                "jeq 7f\n\t"
-                "clrl %4\n\t"           /* clear tmp2 for rest bytes */
-                "subqw #2,%1\n\t"
-                "jlt 5f\n\t"
-                "movew %2@+,%4\n\t"     /* have rest >= 2: get word */
-                "swap %4\n\t"           /* into bits 16..31 */
-                "tstw %1\n\t"           /* another byte? */
-                "jeq 6f\n"
-             "5:\t"
-                "moveb %2@,%4\n\t"      /* have odd rest: get byte */
-                "lslw #8,%4\n\t"        /* into bits 8..15; 16..31 untouched */
-             "6:\t"
-                "addl %4,%0\n\t"        /* now add rest long to sum */
-                "clrl %4\n\t"
-                "addxl %4,%0\n"         /* add X bit */
-             "7:\t"
-                : "=d" (sum), "=d" (len), "=a" (buff),
-                  "=&d" (tmp1), "=&d" (tmp2)
-                : "0" (sum), "1" (len), "2" (buff)
-            );
-        return(sum);
-}
-
-EXPORT_SYMBOL(csum_partial);
-
-
-/*
- * copy from user space while checksumming, with exception handling.
- */
-
-__wsum
-csum_partial_copy_from_user(const void __user *src, void *dst,
-                            int len, __wsum sum, int *csum_err)
-{
-        /*
-         * GCC doesn't like more than 10 operands for the asm
-         * statements so we have to use tmp2 for the error
-         * code.
-         */
-        unsigned long tmp1, tmp2;
-
-        __asm__("movel %2,%4\n\t"
-                "btst #1,%4\n\t"        /* Check alignment */
-                "jeq 2f\n\t"
-                "subql #2,%1\n\t"       /* buff%4==2: treat first word */
-                "jgt 1f\n\t"
-                "addql #2,%1\n\t"       /* len was == 2, treat only rest */
-                "jra 4f\n"
-             "1:\n"
-             "10:\t"
-                "movesw %2@+,%4\n\t"    /* add first word to sum */
-                "addw %4,%0\n\t"
-                "movew %4,%3@+\n\t"
-                "clrl %4\n\t"
-                "addxl %4,%0\n"         /* add X bit */
-             "2:\t"
-                /* unrolled loop for the main part: do 8 longs at once */
-                "movel %1,%4\n\t"       /* save len in tmp1 */
-                "lsrl #5,%1\n\t"        /* len/32 */
-                "jeq 2f\n\t"            /* not enough... */
-                "subql #1,%1\n"
-             "1:\n"
-             "11:\t"
-                "movesl %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-             "12:\t"
-                "movesl %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-             "13:\t"
-                "movesl %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-             "14:\t"
-                "movesl %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-             "15:\t"
-                "movesl %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-             "16:\t"
-                "movesl %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-             "17:\t"
-                "movesl %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-             "18:\t"
-                "movesl %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "dbra %1,1b\n\t"
-                "clrl %5\n\t"
-                "addxl %5,%0\n\t"       /* add X bit */
-                "clrw %1\n\t"
-                "subql #1,%1\n\t"
-                "jcc 1b\n"
-             "2:\t"
-                "movel %4,%1\n\t"       /* restore len from tmp1 */
-                "andw #0x1c,%4\n\t"     /* number of rest longs */
-                "jeq 4f\n\t"
-                "lsrw #2,%4\n\t"
-                "subqw #1,%4\n"
-             "3:\n"
-                /* loop for rest longs */
-             "19:\t"
-                "movesl %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "dbra %4,3b\n\t"
-                "clrl %5\n\t"
-                "addxl %5,%0\n"         /* add X bit */
-             "4:\t"
-                /* now check for rest bytes that do not fit into longs */
-                "andw #3,%1\n\t"
-                "jeq 7f\n\t"
-                "clrl %5\n\t"           /* clear tmp2 for rest bytes */
-                "subqw #2,%1\n\t"
-                "jlt 5f\n\t"
-             "20:\t"
-                "movesw %2@+,%5\n\t"    /* have rest >= 2: get word */
-                "movew %5,%3@+\n\t"
-                "swap %5\n\t"           /* into bits 16..31 */
-                "tstw %1\n\t"           /* another byte? */
-                "jeq 6f\n"
-             "5:\n"
-             "21:\t"
-                "movesb %2@,%5\n\t"     /* have odd rest: get byte */
-                "moveb %5,%3@+\n\t"
-                "lslw #8,%5\n\t"        /* into bits 8..15; 16..31 untouched */
-             "6:\t"
-                "addl %5,%0\n\t"        /* now add rest long to sum */
-                "clrl %5\n\t"
-                "addxl %5,%0\n\t"       /* add X bit */
-             "7:\t"
-                "clrl %5\n"             /* no error - clear return value */
-             "8:\n"
-                ".section .fixup,\"ax\"\n"
-                ".even\n"
-                /* If any exception occurs zero out the rest.
-                   Similarities with the code above are intentional :-) */
-             "90:\t"
-                "clrw %3@+\n\t"
-                "movel %1,%4\n\t"
-                "lsrl #5,%1\n\t"
-                "jeq 1f\n\t"
-                "subql #1,%1\n"
-             "91:\t"
-                "clrl %3@+\n"
-             "92:\t"
-                "clrl %3@+\n"
-             "93:\t"
-                "clrl %3@+\n"
-             "94:\t"
-                "clrl %3@+\n"
-             "95:\t"
-                "clrl %3@+\n"
-             "96:\t"
-                "clrl %3@+\n"
-             "97:\t"
-                "clrl %3@+\n"
-             "98:\t"
-                "clrl %3@+\n\t"
-                "dbra %1,91b\n\t"
-                "clrw %1\n\t"
-                "subql #1,%1\n\t"
-                "jcc 91b\n"
-             "1:\t"
-                "movel %4,%1\n\t"
-                "andw #0x1c,%4\n\t"
-                "jeq 1f\n\t"
-                "lsrw #2,%4\n\t"
-                "subqw #1,%4\n"
-             "99:\t"
-                "clrl %3@+\n\t"
-                "dbra %4,99b\n\t"
-             "1:\t"
-                "andw #3,%1\n\t"
-                "jeq 9f\n"
-             "100:\t"
-                "clrw %3@+\n\t"
-                "tstw %1\n\t"
-                "jeq 9f\n"
-             "101:\t"
-                "clrb %3@+\n"
-             "9:\t"
-#define STR(X) STR1(X)
-#define STR1(X) #X
-                "moveq #-" STR(EFAULT) ",%5\n\t"
-                "jra 8b\n"
-                ".previous\n"
-                ".section __ex_table,\"a\"\n"
-                ".long 10b,90b\n"
-                ".long 11b,91b\n"
-                ".long 12b,92b\n"
-                ".long 13b,93b\n"
-                ".long 14b,94b\n"
-                ".long 15b,95b\n"
-                ".long 16b,96b\n"
-                ".long 17b,97b\n"
-                ".long 18b,98b\n"
-                ".long 19b,99b\n"
-                ".long 20b,100b\n"
-                ".long 21b,101b\n"
-                ".previous"
-                : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
-                  "=&d" (tmp1), "=d" (tmp2)
-                : "0" (sum), "1" (len), "2" (src), "3" (dst)
-            );
-
-        *csum_err = tmp2;
-
-        return(sum);
-}
-
-EXPORT_SYMBOL(csum_partial_copy_from_user);
-
-
-/*
- * copy from kernel space while checksumming, otherwise like csum_partial
- */
-
-__wsum
-csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
-{
-        unsigned long tmp1, tmp2;
-        __asm__("movel %2,%4\n\t"
-                "btst #1,%4\n\t"        /* Check alignment */
-                "jeq 2f\n\t"
-                "subql #2,%1\n\t"       /* buff%4==2: treat first word */
-                "jgt 1f\n\t"
-                "addql #2,%1\n\t"       /* len was == 2, treat only rest */
-                "jra 4f\n"
-             "1:\t"
-                "movew %2@+,%4\n\t"     /* add first word to sum */
-                "addw %4,%0\n\t"
-                "movew %4,%3@+\n\t"
-                "clrl %4\n\t"
-                "addxl %4,%0\n"         /* add X bit */
-             "2:\t"
-                /* unrolled loop for the main part: do 8 longs at once */
-                "movel %1,%4\n\t"       /* save len in tmp1 */
-                "lsrl #5,%1\n\t"        /* len/32 */
-                "jeq 2f\n\t"            /* not enough... */
-                "subql #1,%1\n"
-             "1:\t"
-                "movel %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "movel %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "movel %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "movel %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "movel %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "movel %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "movel %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "movel %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "dbra %1,1b\n\t"
-                "clrl %5\n\t"
-                "addxl %5,%0\n\t"       /* add X bit */
-                "clrw %1\n\t"
-                "subql #1,%1\n\t"
-                "jcc 1b\n"
-             "2:\t"
-                "movel %4,%1\n\t"       /* restore len from tmp1 */
-                "andw #0x1c,%4\n\t"     /* number of rest longs */
-                "jeq 4f\n\t"
-                "lsrw #2,%4\n\t"
-                "subqw #1,%4\n"
-             "3:\t"
-                /* loop for rest longs */
-                "movel %2@+,%5\n\t"
-                "addxl %5,%0\n\t"
-                "movel %5,%3@+\n\t"
-                "dbra %4,3b\n\t"
-                "clrl %5\n\t"
-                "addxl %5,%0\n"         /* add X bit */
-             "4:\t"
-                /* now check for rest bytes that do not fit into longs */
-                "andw #3,%1\n\t"
-                "jeq 7f\n\t"
-                "clrl %5\n\t"           /* clear tmp2 for rest bytes */
-                "subqw #2,%1\n\t"
-                "jlt 5f\n\t"
-                "movew %2@+,%5\n\t"     /* have rest >= 2: get word */
-                "movew %5,%3@+\n\t"
-                "swap %5\n\t"           /* into bits 16..31 */
-                "tstw %1\n\t"           /* another byte? */
-                "jeq 6f\n"
-             "5:\t"
-                "moveb %2@,%5\n\t"      /* have odd rest: get byte */
-                "moveb %5,%3@+\n\t"
-                "lslw #8,%5\n"          /* into bits 8..15; 16..31 untouched */
-             "6:\t"
-                "addl %5,%0\n\t"        /* now add rest long to sum */
-                "clrl %5\n\t"
-                "addxl %5,%0\n"         /* add X bit */
-             "7:\t"
-                : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
-                  "=&d" (tmp1), "=&d" (tmp2)
-                : "0" (sum), "1" (len), "2" (src), "3" (dst)
-            );
-    return(sum);
-}
-EXPORT_SYMBOL(csum_partial_copy_nocheck);
+#ifdef CONFIG_MMU
+#include "checksum_mm.c"
+#else
+#include "checksum_no.c"
+#endif
diff --git a/arch/m68k/lib/checksum_mm.c b/arch/m68k/lib/checksum_mm.c
new file mode 100644
index 000000000000..6216f12a756b
--- /dev/null
+++ b/arch/m68k/lib/checksum_mm.c
@@ -0,0 +1,425 @@
+/*
+ * INET         An implementation of the TCP/IP protocol suite for the LINUX
+ *              operating system.  INET is implemented using the  BSD Socket
+ *              interface as the means of communication with the user level.
+ *
+ *              IP/TCP/UDP checksumming routines
+ *
+ * Authors:     Jorge Cwik, <jorge@laser.satlink.net>
+ *              Arnt Gulbrandsen, <agulbra@nvg.unit.no>
+ *              Tom May, <ftom@netcom.com>
+ *              Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
+ *              Lots of code moved from tcp.c and ip.c; see those files
+ *              for more names.
+ *
+ * 03/02/96     Jes Sorensen, Andreas Schwab, Roman Hodek:
+ *              Fixed some nasty bugs, causing some horrible crashes.
+ *              A: At some points, the sum (%0) was used as
+ *              length-counter instead of the length counter
+ *              (%1). Thanks to Roman Hodek for pointing this out.
+ *              B: GCC seems to mess up if one uses too many
+ *              data-registers to hold input values and one tries to
+ *              specify d0 and d1 as scratch registers. Letting gcc
+ *              choose these registers itself solves the problem.
+ *
+ *              This program is free software; you can redistribute it and/or
+ *              modify it under the terms of the GNU General Public License
+ *              as published by the Free Software Foundation; either version
+ *              2 of the License, or (at your option) any later version.
+ *
+ * 1998/8/31    Andreas Schwab:
+ *              Zero out rest of buffer on exception in
+ *              csum_partial_copy_from_user.
+ */
+
+#include <linux/module.h>
+#include <net/checksum.h>
+
+/*
+ * computes a partial checksum, e.g. for TCP/UDP fragments
+ */
+
+__wsum csum_partial(const void *buff, int len, __wsum sum)
+{
+        unsigned long tmp1, tmp2;
+          /*
+           * Experiments with ethernet and slip connections show that buff
+           * is aligned on either a 2-byte or 4-byte boundary.
+           */
+        __asm__("movel %2,%3\n\t"
+                "btst #1,%3\n\t"        /* Check alignment */
+                "jeq 2f\n\t"
+                "subql #2,%1\n\t"       /* buff%4==2: treat first word */
+                "jgt 1f\n\t"
+                "addql #2,%1\n\t"       /* len was == 2, treat only rest */
+                "jra 4f\n"
+             "1:\t"
+                "addw %2@+,%0\n\t"      /* add first word to sum */
+                "clrl %3\n\t"
+                "addxl %3,%0\n"         /* add X bit */
+             "2:\t"
+                /* unrolled loop for the main part: do 8 longs at once */
+                "movel %1,%3\n\t"       /* save len in tmp1 */
+                "lsrl #5,%1\n\t"        /* len/32 */
+                "jeq 2f\n\t"            /* not enough... */
+                "subql #1,%1\n"
+             "1:\t"
+                "movel %2@+,%4\n\t"
+                "addxl %4,%0\n\t"
+                "movel %2@+,%4\n\t"
+                "addxl %4,%0\n\t"
+                "movel %2@+,%4\n\t"
+                "addxl %4,%0\n\t"
+                "movel %2@+,%4\n\t"
+                "addxl %4,%0\n\t"
+                "movel %2@+,%4\n\t"
+                "addxl %4,%0\n\t"
+                "movel %2@+,%4\n\t"
+                "addxl %4,%0\n\t"
+                "movel %2@+,%4\n\t"
+                "addxl %4,%0\n\t"
+                "movel %2@+,%4\n\t"
+                "addxl %4,%0\n\t"
+                "dbra %1,1b\n\t"
+                "clrl %4\n\t"
+                "addxl %4,%0\n\t"       /* add X bit */
+                "clrw %1\n\t"
+                "subql #1,%1\n\t"
+                "jcc 1b\n"
+             "2:\t"
+                "movel %3,%1\n\t"       /* restore len from tmp1 */
+                "andw #0x1c,%3\n\t"     /* number of rest longs */
+                "jeq 4f\n\t"
+                "lsrw #2,%3\n\t"
+                "subqw #1,%3\n"
+             "3:\t"
+                /* loop for rest longs */
+                "movel %2@+,%4\n\t"
+                "addxl %4,%0\n\t"
+                "dbra %3,3b\n\t"
+                "clrl %4\n\t"
+                "addxl %4,%0\n"         /* add X bit */
+             "4:\t"
+                /* now check for rest bytes that do not fit into longs */
+                "andw #3,%1\n\t"
+                "jeq 7f\n\t"
+                "clrl %4\n\t"           /* clear tmp2 for rest bytes */
+                "subqw #2,%1\n\t"
+                "jlt 5f\n\t"
+                "movew %2@+,%4\n\t"     /* have rest >= 2: get word */
+                "swap %4\n\t"           /* into bits 16..31 */
+                "tstw %1\n\t"           /* another byte? */
+                "jeq 6f\n"
+             "5:\t"
+                "moveb %2@,%4\n\t"      /* have odd rest: get byte */
+                "lslw #8,%4\n\t"        /* into bits 8..15; 16..31 untouched */
+             "6:\t"
+                "addl %4,%0\n\t"        /* now add rest long to sum */
+                "clrl %4\n\t"
+                "addxl %4,%0\n"         /* add X bit */
+             "7:\t"
+                : "=d" (sum), "=d" (len), "=a" (buff),
+                  "=&d" (tmp1), "=&d" (tmp2)
+                : "0" (sum), "1" (len), "2" (buff)
+            );
+        return(sum);
+}
+
+EXPORT_SYMBOL(csum_partial);
+
+
+/*
+ * copy from user space while checksumming, with exception handling.
+ */
+
+__wsum
+csum_partial_copy_from_user(const void __user *src, void *dst,
+                            int len, __wsum sum, int *csum_err)
+{
+        /*
+         * GCC doesn't like more than 10 operands for the asm
+         * statements so we have to use tmp2 for the error
+         * code.
+         */
+        unsigned long tmp1, tmp2;
+
+        __asm__("movel %2,%4\n\t"
+                "btst #1,%4\n\t"        /* Check alignment */
+                "jeq 2f\n\t"
+                "subql #2,%1\n\t"       /* buff%4==2: treat first word */
+                "jgt 1f\n\t"
+                "addql #2,%1\n\t"       /* len was == 2, treat only rest */
+                "jra 4f\n"
+             "1:\n"
+             "10:\t"
+                "movesw %2@+,%4\n\t"    /* add first word to sum */
+                "addw %4,%0\n\t"
+                "movew %4,%3@+\n\t"
+                "clrl %4\n\t"
+                "addxl %4,%0\n"         /* add X bit */
+             "2:\t"
+                /* unrolled loop for the main part: do 8 longs at once */
+                "movel %1,%4\n\t"       /* save len in tmp1 */
+                "lsrl #5,%1\n\t"        /* len/32 */
+                "jeq 2f\n\t"            /* not enough... */
+                "subql #1,%1\n"
+             "1:\n"
+             "11:\t"
+                "movesl %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+             "12:\t"
+                "movesl %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+             "13:\t"
+                "movesl %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+             "14:\t"
+                "movesl %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+             "15:\t"
+                "movesl %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+             "16:\t"
+                "movesl %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+             "17:\t"
+                "movesl %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+             "18:\t"
+                "movesl %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "dbra %1,1b\n\t"
+                "clrl %5\n\t"
+                "addxl %5,%0\n\t"       /* add X bit */
+                "clrw %1\n\t"
+                "subql #1,%1\n\t"
+                "jcc 1b\n"
+             "2:\t"
+                "movel %4,%1\n\t"       /* restore len from tmp1 */
+                "andw #0x1c,%4\n\t"     /* number of rest longs */
+                "jeq 4f\n\t"
+                "lsrw #2,%4\n\t"
+                "subqw #1,%4\n"
+             "3:\n"
+                /* loop for rest longs */
+             "19:\t"
+                "movesl %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "dbra %4,3b\n\t"
+                "clrl %5\n\t"
+                "addxl %5,%0\n"         /* add X bit */
+             "4:\t"
+                /* now check for rest bytes that do not fit into longs */
+                "andw #3,%1\n\t"
+                "jeq 7f\n\t"
+                "clrl %5\n\t"           /* clear tmp2 for rest bytes */
+                "subqw #2,%1\n\t"
+                "jlt 5f\n\t"
+             "20:\t"
+                "movesw %2@+,%5\n\t"    /* have rest >= 2: get word */
+                "movew %5,%3@+\n\t"
+                "swap %5\n\t"           /* into bits 16..31 */
+                "tstw %1\n\t"           /* another byte? */
+                "jeq 6f\n"
+             "5:\n"
+             "21:\t"
+                "movesb %2@,%5\n\t"     /* have odd rest: get byte */
+                "moveb %5,%3@+\n\t"
+                "lslw #8,%5\n\t"        /* into bits 8..15; 16..31 untouched */
+             "6:\t"
+                "addl %5,%0\n\t"        /* now add rest long to sum */
+                "clrl %5\n\t"
+                "addxl %5,%0\n\t"       /* add X bit */
+             "7:\t"
+                "clrl %5\n"             /* no error - clear return value */
+             "8:\n"
+                ".section .fixup,\"ax\"\n"
+                ".even\n"
+                /* If any exception occurs zero out the rest.
+                   Similarities with the code above are intentional :-) */
+             "90:\t"
+                "clrw %3@+\n\t"
+                "movel %1,%4\n\t"
+                "lsrl #5,%1\n\t"
+                "jeq 1f\n\t"
+                "subql #1,%1\n"
+             "91:\t"
+                "clrl %3@+\n"
+             "92:\t"
+                "clrl %3@+\n"
+             "93:\t"
+                "clrl %3@+\n"
+             "94:\t"
+                "clrl %3@+\n"
+             "95:\t"
+                "clrl %3@+\n"
+             "96:\t"
+                "clrl %3@+\n"
+             "97:\t"
+                "clrl %3@+\n"
+             "98:\t"
+                "clrl %3@+\n\t"
+                "dbra %1,91b\n\t"
+                "clrw %1\n\t"
+                "subql #1,%1\n\t"
+                "jcc 91b\n"
+             "1:\t"
+                "movel %4,%1\n\t"
+                "andw #0x1c,%4\n\t"
+                "jeq 1f\n\t"
+                "lsrw #2,%4\n\t"
+                "subqw #1,%4\n"
+             "99:\t"
+                "clrl %3@+\n\t"
+                "dbra %4,99b\n\t"
+             "1:\t"
+                "andw #3,%1\n\t"
+                "jeq 9f\n"
+             "100:\t"
+                "clrw %3@+\n\t"
+                "tstw %1\n\t"
+                "jeq 9f\n"
+             "101:\t"
+                "clrb %3@+\n"
+             "9:\t"
+#define STR(X) STR1(X)
+#define STR1(X) #X
+                "moveq #-" STR(EFAULT) ",%5\n\t"
+                "jra 8b\n"
+                ".previous\n"
+                ".section __ex_table,\"a\"\n"
+                ".long 10b,90b\n"
+                ".long 11b,91b\n"
+                ".long 12b,92b\n"
+                ".long 13b,93b\n"
+                ".long 14b,94b\n"
+                ".long 15b,95b\n"
+                ".long 16b,96b\n"
+                ".long 17b,97b\n"
+                ".long 18b,98b\n"
+                ".long 19b,99b\n"
+                ".long 20b,100b\n"
+                ".long 21b,101b\n"
+                ".previous"
+                : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
+                  "=&d" (tmp1), "=d" (tmp2)
+                : "0" (sum), "1" (len), "2" (src), "3" (dst)
+            );
+
+        *csum_err = tmp2;
+
+        return(sum);
+}
+
+EXPORT_SYMBOL(csum_partial_copy_from_user);
+
+
+/*
+ * copy from kernel space while checksumming, otherwise like csum_partial
+ */
+
+__wsum
+csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
+{
+        unsigned long tmp1, tmp2;
+        __asm__("movel %2,%4\n\t"
+                "btst #1,%4\n\t"        /* Check alignment */
+                "jeq 2f\n\t"
+                "subql #2,%1\n\t"       /* buff%4==2: treat first word */
+                "jgt 1f\n\t"
+                "addql #2,%1\n\t"       /* len was == 2, treat only rest */
+                "jra 4f\n"
+             "1:\t"
+                "movew %2@+,%4\n\t"     /* add first word to sum */
+                "addw %4,%0\n\t"
+                "movew %4,%3@+\n\t"
+                "clrl %4\n\t"
+                "addxl %4,%0\n"         /* add X bit */
+             "2:\t"
+                /* unrolled loop for the main part: do 8 longs at once */
+                "movel %1,%4\n\t"       /* save len in tmp1 */
+                "lsrl #5,%1\n\t"        /* len/32 */
+                "jeq 2f\n\t"            /* not enough... */
+                "subql #1,%1\n"
+             "1:\t"
+                "movel %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "movel %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "movel %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "movel %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "movel %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "movel %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "movel %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "movel %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "dbra %1,1b\n\t"
+                "clrl %5\n\t"
+                "addxl %5,%0\n\t"       /* add X bit */
+                "clrw %1\n\t"
+                "subql #1,%1\n\t"
+                "jcc 1b\n"
+             "2:\t"
+                "movel %4,%1\n\t"       /* restore len from tmp1 */
+                "andw #0x1c,%4\n\t"     /* number of rest longs */
+                "jeq 4f\n\t"
+                "lsrw #2,%4\n\t"
+                "subqw #1,%4\n"
+             "3:\t"
+                /* loop for rest longs */
+                "movel %2@+,%5\n\t"
+                "addxl %5,%0\n\t"
+                "movel %5,%3@+\n\t"
+                "dbra %4,3b\n\t"
+                "clrl %5\n\t"
+                "addxl %5,%0\n"         /* add X bit */
+             "4:\t"
+                /* now check for rest bytes that do not fit into longs */
+                "andw #3,%1\n\t"
+                "jeq 7f\n\t"
+                "clrl %5\n\t"           /* clear tmp2 for rest bytes */
+                "subqw #2,%1\n\t"
+                "jlt 5f\n\t"
+                "movew %2@+,%5\n\t"     /* have rest >= 2: get word */
+                "movew %5,%3@+\n\t"
+                "swap %5\n\t"           /* into bits 16..31 */
+                "tstw %1\n\t"           /* another byte? */
+                "jeq 6f\n"
+             "5:\t"
+                "moveb %2@,%5\n\t"      /* have odd rest: get byte */
+                "moveb %5,%3@+\n\t"
+                "lslw #8,%5\n"          /* into bits 8..15; 16..31 untouched */
+             "6:\t"
+                "addl %5,%0\n\t"        /* now add rest long to sum */
+                "clrl %5\n\t"
+                "addxl %5,%0\n"         /* add X bit */
+             "7:\t"
+                : "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
+                  "=&d" (tmp1), "=&d" (tmp2)
+                : "0" (sum), "1" (len), "2" (src), "3" (dst)
+            );
+    return(sum);
+}
+EXPORT_SYMBOL(csum_partial_copy_nocheck);
diff --git a/arch/m68k/lib/checksum_no.c b/arch/m68k/lib/checksum_no.c
new file mode 100644
index 000000000000..eccf25d3d73e
--- /dev/null
+++ b/arch/m68k/lib/checksum_no.c
@@ -0,0 +1,153 @@
+/*
+ * INET         An implementation of the TCP/IP protocol suite for the LINUX
+ *              operating system.  INET is implemented using the  BSD Socket
+ *              interface as the means of communication with the user level.
+ *
+ *              IP/TCP/UDP checksumming routines
+ *
+ * Authors:     Jorge Cwik, <jorge@laser.satlink.net>
+ *              Arnt Gulbrandsen, <agulbra@nvg.unit.no>
+ *              Tom May, <ftom@netcom.com>
+ *              Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
+ *              Lots of code moved from tcp.c and ip.c; see those files
+ *              for more names.
+ *
+ * 03/02/96     Jes Sorensen, Andreas Schwab, Roman Hodek:
+ *              Fixed some nasty bugs, causing some horrible crashes.
+ *              A: At some points, the sum (%0) was used as
+ *              length-counter instead of the length counter
+ *              (%1). Thanks to Roman Hodek for pointing this out.
+ *              B: GCC seems to mess up if one uses too many
+ *              data-registers to hold input values and one tries to
+ *              specify d0 and d1 as scratch registers. Letting gcc choose these
+ *      registers itself solves the problem.
+ *
+ *              This program is free software; you can redistribute it and/or
+ *              modify it under the terms of the GNU General Public License
+ *              as published by the Free Software Foundation; either version
+ *              2 of the License, or (at your option) any later version.
+ */
+ 
+/* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access kills, so most
+   of the assembly has to go. */
+
+#include <linux/module.h>
+#include <net/checksum.h>
+
+static inline unsigned short from32to16(unsigned long x)
+{
+        /* add up 16-bit and 16-bit for 16+c bit */
+        x = (x & 0xffff) + (x >> 16);
+        /* add up carry.. */
+        x = (x & 0xffff) + (x >> 16);
+        return x;
+}
+
+static unsigned long do_csum(const unsigned char * buff, int len)
+{
+        int odd, count;
+        unsigned long result = 0;
+
+        if (len <= 0)
+                goto out;
+        odd = 1 & (unsigned long) buff;
+        if (odd) {
+                result = *buff;
+                len--;
+                buff++;
+        }
+        count = len >> 1;               /* nr of 16-bit words.. */
+        if (count) {
+                if (2 & (unsigned long) buff) {
+                        result += *(unsigned short *) buff;
+                        count--;
+                        len -= 2;
+                        buff += 2;
+                }
+                count >>= 1;            /* nr of 32-bit words.. */
+                if (count) {
+                        unsigned long carry = 0;
+                        do {
+                                unsigned long w = *(unsigned long *) buff;
+                                count--;
+                                buff += 4;
+                                result += carry;
+                                result += w;
+                                carry = (w > result);
+                        } while (count);
+                        result += carry;
+                        result = (result & 0xffff) + (result >> 16);
+                }
+                if (len & 2) {
+                        result += *(unsigned short *) buff;
+                        buff += 2;
+                }
+        }
+        if (len & 1)
+                result += (*buff << 8);
+        result = from32to16(result);
+        if (odd)
+                result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
+out:
+        return result;
+}
+
+#ifdef CONFIG_COLDFIRE
+/*
+ *      This is a version of ip_compute_csum() optimized for IP headers,
+ *      which always checksum on 4 octet boundaries.
+ */
+__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
+{
+        return (__force __sum16)~do_csum(iph,ihl*4);
+}
+#endif
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+__wsum csum_partial(const void *buff, int len, __wsum sum)
+{
+        unsigned int result = do_csum(buff, len);
+
+        /* add in old sum, and carry.. */
+        result += (__force u32)sum;
+        if ((__force u32)sum > result)
+                result += 1;
+        return (__force __wsum)result;
+}
+
+EXPORT_SYMBOL(csum_partial);
+
+/*
+ * copy from fs while checksumming, otherwise like csum_partial
+ */
+
+__wsum
+csum_partial_copy_from_user(const void __user *src, void *dst,
+                            int len, __wsum sum, int *csum_err)
+{
+        if (csum_err) *csum_err = 0;
+        memcpy(dst, (__force const void *)src, len);
+        return csum_partial(dst, len, sum);
+}
+
+/*
+ * copy from ds while checksumming, otherwise like csum_partial
+ */
+
+__wsum
+csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
+{
+        memcpy(dst, src, len);
+        return csum_partial(dst, len, sum);
+}
diff --git a/arch/m68k/lib/delay.c b/arch/m68k/lib/delay.c
new file mode 100644
index 000000000000..5bd5472d38a0
--- /dev/null
+++ b/arch/m68k/lib/delay.c
@@ -0,0 +1,21 @@
+/*
+ *      arch/m68knommu/lib/delay.c
+ *
+ *      (C) Copyright 2004, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <asm/param.h>
+#include <asm/delay.h>
+
+EXPORT_SYMBOL(udelay);
+
+void udelay(unsigned long usecs)
+{
+        _udelay(usecs);
+}
+
diff --git a/arch/m68k/lib/divsi3.S b/arch/m68k/lib/divsi3.S
new file mode 100644
index 000000000000..ec307b61991e
--- /dev/null
+++ b/arch/m68k/lib/divsi3.S
@@ -0,0 +1,125 @@
+/* libgcc1 routines for 68000 w/o floating-point hardware.
+   Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file with other programs, and to distribute
+those programs without any restriction coming from the use of this
+file.  (The General Public License restrictions do apply in other
+respects; for example, they cover modification of the file, and
+distribution when not linked into another program.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* As a special exception, if you link this library with files
+   compiled with GCC to produce an executable, this does not cause
+   the resulting executable to be covered by the GNU General Public License.
+   This exception does not however invalidate any other reasons why
+   the executable file might be covered by the GNU General Public License.  */
+
+/* Use this one for any 680x0; assumes no floating point hardware.
+   The trailing " '" appearing on some lines is for ANSI preprocessors.  Yuk.
+   Some of this code comes from MINIX, via the folks at ericsson.
+   D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
+*/
+
+/* These are predefined by new versions of GNU cpp.  */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+#ifndef __IMMEDIATE_PREFIX__
+#define __IMMEDIATE_PREFIX__ #
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/* Use the right prefix for immediate values.  */
+
+#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
+
+#define d0 REG (d0)
+#define d1 REG (d1)
+#define d2 REG (d2)
+#define d3 REG (d3)
+#define d4 REG (d4)
+#define d5 REG (d5)
+#define d6 REG (d6)
+#define d7 REG (d7)
+#define a0 REG (a0)
+#define a1 REG (a1)
+#define a2 REG (a2)
+#define a3 REG (a3)
+#define a4 REG (a4)
+#define a5 REG (a5)
+#define a6 REG (a6)
+#define fp REG (fp)
+#define sp REG (sp)
+
+        .text
+        .proc
+        .globl  SYM (__divsi3)
+SYM (__divsi3):
+        movel   d2, sp@-
+
+        moveq   IMM (1), d2     /* sign of result stored in d2 (=1 or =-1) */
+        movel   sp@(12), d1     /* d1 = divisor */
+        jpl     L1
+        negl    d1
+#if !(defined(__mcf5200__) || defined(__mcoldfire__))
+        negb    d2              /* change sign because divisor <0  */
+#else
+        negl    d2              /* change sign because divisor <0  */
+#endif
+L1:     movel   sp@(8), d0      /* d0 = dividend */
+        jpl     L2
+        negl    d0
+#if !(defined(__mcf5200__) || defined(__mcoldfire__))
+        negb    d2
+#else
+        negl    d2
+#endif
+
+L2:     movel   d1, sp@-
+        movel   d0, sp@-
+        jbsr    SYM (__udivsi3) /* divide abs(dividend) by abs(divisor) */
+        addql   IMM (8), sp
+
+        tstb    d2
+        jpl     L3
+        negl    d0
+
+L3:     movel   sp@+, d2
+        rts
+
diff --git a/arch/m68k/lib/memcpy.c b/arch/m68k/lib/memcpy.c
new file mode 100644
index 000000000000..b50dbcad4746
--- /dev/null
+++ b/arch/m68k/lib/memcpy.c
@@ -0,0 +1,62 @@
+
+#include <linux/types.h>
+
+void * memcpy(void * to, const void * from, size_t n)
+{
+#ifdef CONFIG_COLDFIRE
+  void *xto = to;
+  size_t temp;
+
+  if (!n)
+    return xto;
+  if ((long) to & 1)
+    {
+      char *cto = to;
+      const char *cfrom = from;
+      *cto++ = *cfrom++;
+      to = cto;
+      from = cfrom;
+      n--;
+    }
+  if (n > 2 && (long) to & 2)
+    {
+      short *sto = to;
+      const short *sfrom = from;
+      *sto++ = *sfrom++;
+      to = sto;
+      from = sfrom;
+      n -= 2;
+    }
+  temp = n >> 2;
+  if (temp)
+    {
+      long *lto = to;
+      const long *lfrom = from;
+      for (; temp; temp--)
+        *lto++ = *lfrom++;
+      to = lto;
+      from = lfrom;
+    }
+  if (n & 2)
+    {
+      short *sto = to;
+      const short *sfrom = from;
+      *sto++ = *sfrom++;
+      to = sto;
+      from = sfrom;
+    }
+  if (n & 1)
+    {
+      char *cto = to;
+      const char *cfrom = from;
+      *cto = *cfrom;
+    }
+  return xto;
+#else
+  const char *c_from = from;
+  char *c_to = to;
+  while (n-- > 0)
+    *c_to++ = *c_from++;
+  return((void *) to);
+#endif
+}
diff --git a/arch/m68k/lib/memmove.c b/arch/m68k/lib/memmove.c
new file mode 100644
index 000000000000..b3dcfe9dab7e
--- /dev/null
+++ b/arch/m68k/lib/memmove.c
@@ -0,0 +1,105 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#define __IN_STRING_C
+
+#include <linux/module.h>
+#include <linux/string.h>
+
+void *memmove(void *dest, const void *src, size_t n)
+{
+        void *xdest = dest;
+        size_t temp;
+
+        if (!n)
+                return xdest;
+
+        if (dest < src) {
+                if ((long)dest & 1) {
+                        char *cdest = dest;
+                        const char *csrc = src;
+                        *cdest++ = *csrc++;
+                        dest = cdest;
+                        src = csrc;
+                        n--;
+                }
+                if (n > 2 && (long)dest & 2) {
+                        short *sdest = dest;
+                        const short *ssrc = src;
+                        *sdest++ = *ssrc++;
+                        dest = sdest;
+                        src = ssrc;
+                        n -= 2;
+                }
+                temp = n >> 2;
+                if (temp) {
+                        long *ldest = dest;
+                        const long *lsrc = src;
+                        temp--;
+                        do
+                                *ldest++ = *lsrc++;
+                        while (temp--);
+                        dest = ldest;
+                        src = lsrc;
+                }
+                if (n & 2) {
+                        short *sdest = dest;
+                        const short *ssrc = src;
+                        *sdest++ = *ssrc++;
+                        dest = sdest;
+                        src = ssrc;
+                }
+                if (n & 1) {
+                        char *cdest = dest;
+                        const char *csrc = src;
+                        *cdest = *csrc;
+                }
+        } else {
+                dest = (char *)dest + n;
+                src = (const char *)src + n;
+                if ((long)dest & 1) {
+                        char *cdest = dest;
+                        const char *csrc = src;
+                        *--cdest = *--csrc;
+                        dest = cdest;
+                        src = csrc;
+                        n--;
+                }
+                if (n > 2 && (long)dest & 2) {
+                        short *sdest = dest;
+                        const short *ssrc = src;
+                        *--sdest = *--ssrc;
+                        dest = sdest;
+                        src = ssrc;
+                        n -= 2;
+                }
+                temp = n >> 2;
+                if (temp) {
+                        long *ldest = dest;
+                        const long *lsrc = src;
+                        temp--;
+                        do
+                                *--ldest = *--lsrc;
+                        while (temp--);
+                        dest = ldest;
+                        src = lsrc;
+                }
+                if (n & 2) {
+                        short *sdest = dest;
+                        const short *ssrc = src;
+                        *--sdest = *--ssrc;
+                        dest = sdest;
+                        src = ssrc;
+                }
+                if (n & 1) {
+                        char *cdest = dest;
+                        const char *csrc = src;
+                        *--cdest = *--csrc;
+                }
+        }
+        return xdest;
+}
+EXPORT_SYMBOL(memmove);
diff --git a/arch/m68k/lib/memset.c b/arch/m68k/lib/memset.c
new file mode 100644
index 000000000000..1389bf455633
--- /dev/null
+++ b/arch/m68k/lib/memset.c
@@ -0,0 +1,47 @@
+#include <linux/types.h>
+
+void * memset(void * s, int c, size_t count)
+{
+  void *xs = s;
+  size_t temp;
+
+  if (!count)
+    return xs;
+  c &= 0xff;
+  c |= c << 8;
+  c |= c << 16;
+  if ((long) s & 1)
+    {
+      char *cs = s;
+      *cs++ = c;
+      s = cs;
+      count--;
+    }
+  if (count > 2 && (long) s & 2)
+    {
+      short *ss = s;
+      *ss++ = c;
+      s = ss;
+      count -= 2;
+    }
+  temp = count >> 2;
+  if (temp)
+    {
+      long *ls = s;
+      for (; temp; temp--)
+        *ls++ = c;
+      s = ls;
+    }
+  if (count & 2)
+    {
+      short *ss = s;
+      *ss++ = c;
+      s = ss;
+    }
+  if (count & 1)
+    {
+      char *cs = s;
+      *cs = c;
+    }
+  return xs;
+}
diff --git a/arch/m68k/lib/modsi3.S b/arch/m68k/lib/modsi3.S
new file mode 100644
index 000000000000..ef3849435768
--- /dev/null
+++ b/arch/m68k/lib/modsi3.S
@@ -0,0 +1,113 @@
+/* libgcc1 routines for 68000 w/o floating-point hardware.
+   Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file with other programs, and to distribute
+those programs without any restriction coming from the use of this
+file.  (The General Public License restrictions do apply in other
+respects; for example, they cover modification of the file, and
+distribution when not linked into another program.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* As a special exception, if you link this library with files
+   compiled with GCC to produce an executable, this does not cause
+   the resulting executable to be covered by the GNU General Public License.
+   This exception does not however invalidate any other reasons why
+   the executable file might be covered by the GNU General Public License.  */
+
+/* Use this one for any 680x0; assumes no floating point hardware.
+   The trailing " '" appearing on some lines is for ANSI preprocessors.  Yuk.
+   Some of this code comes from MINIX, via the folks at ericsson.
+   D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
+*/
+
+/* These are predefined by new versions of GNU cpp.  */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+#ifndef __IMMEDIATE_PREFIX__
+#define __IMMEDIATE_PREFIX__ #
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/* Use the right prefix for immediate values.  */
+
+#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
+
+#define d0 REG (d0)
+#define d1 REG (d1)
+#define d2 REG (d2)
+#define d3 REG (d3)
+#define d4 REG (d4)
+#define d5 REG (d5)
+#define d6 REG (d6)
+#define d7 REG (d7)
+#define a0 REG (a0)
+#define a1 REG (a1)
+#define a2 REG (a2)
+#define a3 REG (a3)
+#define a4 REG (a4)
+#define a5 REG (a5)
+#define a6 REG (a6)
+#define fp REG (fp)
+#define sp REG (sp)
+
+        .text
+        .proc
+        .globl  SYM (__modsi3)
+SYM (__modsi3):
+        movel   sp@(8), d1      /* d1 = divisor */
+        movel   sp@(4), d0      /* d0 = dividend */
+        movel   d1, sp@-
+        movel   d0, sp@-
+        jbsr    SYM (__divsi3)
+        addql   IMM (8), sp
+        movel   sp@(8), d1      /* d1 = divisor */
+#if !(defined(__mcf5200__) || defined(__mcoldfire__))
+        movel   d1, sp@-
+        movel   d0, sp@-
+        jbsr    SYM (__mulsi3)  /* d0 = (a/b)*b */
+        addql   IMM (8), sp
+#else
+        mulsl   d1,d0
+#endif
+        movel   sp@(4), d1      /* d1 = dividend */
+        subl    d0, d1          /* d1 = a - (a/b)*b */
+        movel   d1, d0
+        rts
+
diff --git a/arch/m68k/lib/muldi3.c b/arch/m68k/lib/muldi3.c
index be4f275649e3..16e0eb338ee0 100644
--- a/arch/m68k/lib/muldi3.c
+++ b/arch/m68k/lib/muldi3.c
@@ -1,63 +1,5 @@
-/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and
-                           gcc-2.7.2.3/longlong.h which is: */
-/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
-
-This file is part of GNU CC.
-
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING.  If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA.  */
-
-#define BITS_PER_UNIT 8
-
-#define umul_ppmm(w1, w0, u, v) \
-  __asm__ ("mulu%.l %3,%1:%0"                                           \
-           : "=d" ((USItype)(w0)),                                      \
-             "=d" ((USItype)(w1))                                       \
-           : "%0" ((USItype)(u)),                                       \
-             "dmi" ((USItype)(v)))
-
-#define __umulsidi3(u, v) \
-  ({DIunion __w;                                                        \
-    umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
-    __w.ll; })
-
-typedef          int SItype     __attribute__ ((mode (SI)));
-typedef unsigned int USItype    __attribute__ ((mode (SI)));
-typedef          int DItype     __attribute__ ((mode (DI)));
-typedef int word_type __attribute__ ((mode (__word__)));
-
-struct DIstruct {SItype high, low;};
-
-typedef union
-{
-  struct DIstruct s;
-  DItype ll;
-} DIunion;
-
-DItype
-__muldi3 (DItype u, DItype v)
-{
-  DIunion w;
-  DIunion uu, vv;
-
-  uu.ll = u,
-  vv.ll = v;
-
-  w.ll = __umulsidi3 (uu.s.low, vv.s.low);
-  w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
-               + (USItype) uu.s.high * (USItype) vv.s.low);
-
-  return w.ll;
-}
+#ifdef CONFIG_MMU
+#include "muldi3_mm.c"
+#else
+#include "muldi3_no.c"
+#endif
diff --git a/arch/m68k/lib/muldi3_mm.c b/arch/m68k/lib/muldi3_mm.c
new file mode 100644
index 000000000000..be4f275649e3
--- /dev/null
+++ b/arch/m68k/lib/muldi3_mm.c
@@ -0,0 +1,63 @@
+/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and
+                           gcc-2.7.2.3/longlong.h which is: */
+/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+#define BITS_PER_UNIT 8
+
+#define umul_ppmm(w1, w0, u, v) \
+  __asm__ ("mulu%.l %3,%1:%0"                                           \
+           : "=d" ((USItype)(w0)),                                      \
+             "=d" ((USItype)(w1))                                       \
+           : "%0" ((USItype)(u)),                                       \
+             "dmi" ((USItype)(v)))
+
+#define __umulsidi3(u, v) \
+  ({DIunion __w;                                                        \
+    umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
+    __w.ll; })
+
+typedef          int SItype     __attribute__ ((mode (SI)));
+typedef unsigned int USItype    __attribute__ ((mode (SI)));
+typedef          int DItype     __attribute__ ((mode (DI)));
+typedef int word_type __attribute__ ((mode (__word__)));
+
+struct DIstruct {SItype high, low;};
+
+typedef union
+{
+  struct DIstruct s;
+  DItype ll;
+} DIunion;
+
+DItype
+__muldi3 (DItype u, DItype v)
+{
+  DIunion w;
+  DIunion uu, vv;
+
+  uu.ll = u,
+  vv.ll = v;
+
+  w.ll = __umulsidi3 (uu.s.low, vv.s.low);
+  w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
+               + (USItype) uu.s.high * (USItype) vv.s.low);
+
+  return w.ll;
+}
diff --git a/arch/m68k/lib/muldi3_no.c b/arch/m68k/lib/muldi3_no.c
new file mode 100644
index 000000000000..34af72c30303
--- /dev/null
+++ b/arch/m68k/lib/muldi3_no.c
@@ -0,0 +1,86 @@
+/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and 
+                           gcc-2.7.2.3/longlong.h which is: */
+/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+#define BITS_PER_UNIT 8
+#define SI_TYPE_SIZE 32
+
+#define __BITS4 (SI_TYPE_SIZE / 4)
+#define __ll_B (1L << (SI_TYPE_SIZE / 2))
+#define __ll_lowpart(t) ((USItype) (t) % __ll_B)
+#define __ll_highpart(t) ((USItype) (t) / __ll_B)
+
+#define umul_ppmm(w1, w0, u, v)                                         \
+  do {                                                                  \
+    USItype __x0, __x1, __x2, __x3;                                     \
+    USItype __ul, __vl, __uh, __vh;                                     \
+                                                                        \
+    __ul = __ll_lowpart (u);                                            \
+    __uh = __ll_highpart (u);                                           \
+    __vl = __ll_lowpart (v);                                            \
+    __vh = __ll_highpart (v);                                           \
+                                                                        \
+    __x0 = (USItype) __ul * __vl;                                       \
+    __x1 = (USItype) __ul * __vh;                                       \
+    __x2 = (USItype) __uh * __vl;                                       \
+    __x3 = (USItype) __uh * __vh;                                       \
+                                                                        \
+    __x1 += __ll_highpart (__x0);/* this can't give carry */            \
+    __x1 += __x2;               /* but this indeed can */               \
+    if (__x1 < __x2)            /* did we get it? */                    \
+      __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
+                                                                        \
+    (w1) = __x3 + __ll_highpart (__x1);                                 \
+    (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
+  } while (0)
+
+#define __umulsidi3(u, v) \
+  ({DIunion __w;                                                        \
+    umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
+    __w.ll; })
+
+typedef          int SItype     __attribute__ ((mode (SI)));
+typedef unsigned int USItype    __attribute__ ((mode (SI)));
+typedef          int DItype     __attribute__ ((mode (DI)));
+typedef int word_type __attribute__ ((mode (__word__)));
+
+struct DIstruct {SItype high, low;};
+
+typedef union
+{
+  struct DIstruct s;
+  DItype ll;
+} DIunion;
+
+DItype
+__muldi3 (DItype u, DItype v)
+{
+  DIunion w;
+  DIunion uu, vv;
+
+  uu.ll = u,
+  vv.ll = v;
+
+  w.ll = __umulsidi3 (uu.s.low, vv.s.low);
+  w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
+               + (USItype) uu.s.high * (USItype) vv.s.low);
+
+  return w.ll;
+}
diff --git a/arch/m68k/lib/mulsi3.S b/arch/m68k/lib/mulsi3.S
new file mode 100644
index 000000000000..ce29ea37b45f
--- /dev/null
+++ b/arch/m68k/lib/mulsi3.S
@@ -0,0 +1,110 @@
+/* libgcc1 routines for 68000 w/o floating-point hardware.
+   Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file with other programs, and to distribute
+those programs without any restriction coming from the use of this
+file.  (The General Public License restrictions do apply in other
+respects; for example, they cover modification of the file, and
+distribution when not linked into another program.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* As a special exception, if you link this library with files
+   compiled with GCC to produce an executable, this does not cause
+   the resulting executable to be covered by the GNU General Public License.
+   This exception does not however invalidate any other reasons why
+   the executable file might be covered by the GNU General Public License.  */
+
+/* Use this one for any 680x0; assumes no floating point hardware.
+   The trailing " '" appearing on some lines is for ANSI preprocessors.  Yuk.
+   Some of this code comes from MINIX, via the folks at ericsson.
+   D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
+*/
+
+/* These are predefined by new versions of GNU cpp.  */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+#ifndef __IMMEDIATE_PREFIX__
+#define __IMMEDIATE_PREFIX__ #
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/* Use the right prefix for immediate values.  */
+
+#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
+
+#define d0 REG (d0)
+#define d1 REG (d1)
+#define d2 REG (d2)
+#define d3 REG (d3)
+#define d4 REG (d4)
+#define d5 REG (d5)
+#define d6 REG (d6)
+#define d7 REG (d7)
+#define a0 REG (a0)
+#define a1 REG (a1)
+#define a2 REG (a2)
+#define a3 REG (a3)
+#define a4 REG (a4)
+#define a5 REG (a5)
+#define a6 REG (a6)
+#define fp REG (fp)
+#define sp REG (sp)
+
+        .text
+        .proc
+        .globl  SYM (__mulsi3)
+SYM (__mulsi3):
+        movew   sp@(4), d0      /* x0 -> d0 */
+        muluw   sp@(10), d0     /* x0*y1 */
+        movew   sp@(6), d1      /* x1 -> d1 */
+        muluw   sp@(8), d1      /* x1*y0 */
+#if !(defined(__mcf5200__) || defined(__mcoldfire__))
+        addw    d1, d0
+#else
+        addl    d1, d0
+#endif
+        swap    d0
+        clrw    d0
+        movew   sp@(6), d1      /* x1 -> d1 */
+        muluw   sp@(10), d1     /* x1*y1 */
+        addl    d1, d0
+
+        rts
+
diff --git a/arch/m68k/lib/udivsi3.S b/arch/m68k/lib/udivsi3.S
new file mode 100644
index 000000000000..c424c4a1f0a3
--- /dev/null
+++ b/arch/m68k/lib/udivsi3.S
@@ -0,0 +1,162 @@
+/* libgcc1 routines for 68000 w/o floating-point hardware.
+   Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file with other programs, and to distribute
+those programs without any restriction coming from the use of this
+file.  (The General Public License restrictions do apply in other
+respects; for example, they cover modification of the file, and
+distribution when not linked into another program.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* As a special exception, if you link this library with files
+   compiled with GCC to produce an executable, this does not cause
+   the resulting executable to be covered by the GNU General Public License.
+   This exception does not however invalidate any other reasons why
+   the executable file might be covered by the GNU General Public License.  */
+
+/* Use this one for any 680x0; assumes no floating point hardware.
+   The trailing " '" appearing on some lines is for ANSI preprocessors.  Yuk.
+   Some of this code comes from MINIX, via the folks at ericsson.
+   D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
+*/
+
+/* These are predefined by new versions of GNU cpp.  */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+#ifndef __IMMEDIATE_PREFIX__
+#define __IMMEDIATE_PREFIX__ #
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/* Use the right prefix for immediate values.  */
+
+#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
+
+#define d0 REG (d0)
+#define d1 REG (d1)
+#define d2 REG (d2)
+#define d3 REG (d3)
+#define d4 REG (d4)
+#define d5 REG (d5)
+#define d6 REG (d6)
+#define d7 REG (d7)
+#define a0 REG (a0)
+#define a1 REG (a1)
+#define a2 REG (a2)
+#define a3 REG (a3)
+#define a4 REG (a4)
+#define a5 REG (a5)
+#define a6 REG (a6)
+#define fp REG (fp)
+#define sp REG (sp)
+
+        .text
+        .proc
+        .globl  SYM (__udivsi3)
+SYM (__udivsi3):
+#if !(defined(__mcf5200__) || defined(__mcoldfire__))
+        movel   d2, sp@-
+        movel   sp@(12), d1     /* d1 = divisor */
+        movel   sp@(8), d0      /* d0 = dividend */
+
+        cmpl    IMM (0x10000), d1 /* divisor >= 2 ^ 16 ?   */
+        jcc     L3              /* then try next algorithm */
+        movel   d0, d2
+        clrw    d2
+        swap    d2
+        divu    d1, d2          /* high quotient in lower word */
+        movew   d2, d0          /* save high quotient */
+        swap    d0
+        movew   sp@(10), d2     /* get low dividend + high rest */
+        divu    d1, d2          /* low quotient */
+        movew   d2, d0
+        jra     L6
+
+L3:     movel   d1, d2          /* use d2 as divisor backup */
+L4:     lsrl    IMM (1), d1     /* shift divisor */
+        lsrl    IMM (1), d0     /* shift dividend */
+        cmpl    IMM (0x10000), d1 /* still divisor >= 2 ^ 16 ?  */
+        jcc     L4
+        divu    d1, d0          /* now we have 16 bit divisor */
+        andl    IMM (0xffff), d0 /* mask out divisor, ignore remainder */
+
+/* Multiply the 16 bit tentative quotient with the 32 bit divisor.  Because of
+   the operand ranges, this might give a 33 bit product.  If this product is
+   greater than the dividend, the tentative quotient was too large. */
+        movel   d2, d1
+        mulu    d0, d1          /* low part, 32 bits */
+        swap    d2
+        mulu    d0, d2          /* high part, at most 17 bits */
+        swap    d2              /* align high part with low part */
+        tstw    d2              /* high part 17 bits? */
+        jne     L5              /* if 17 bits, quotient was too large */
+        addl    d2, d1          /* add parts */
+        jcs     L5              /* if sum is 33 bits, quotient was too large */
+        cmpl    sp@(8), d1      /* compare the sum with the dividend */
+        jls     L6              /* if sum > dividend, quotient was too large */
+L5:     subql   IMM (1), d0     /* adjust quotient */
+
+L6:     movel   sp@+, d2
+        rts
+
+#else /* __mcf5200__ || __mcoldfire__ */
+
+/* Coldfire implementation of non-restoring division algorithm from
+   Hennessy & Patterson, Appendix A. */
+        link    a6,IMM (-12)
+        moveml  d2-d4,sp@
+        movel   a6@(8),d0
+        movel   a6@(12),d1
+        clrl    d2              | clear p
+        moveq   IMM (31),d4
+L1:     addl    d0,d0           | shift reg pair (p,a) one bit left
+        addxl   d2,d2
+        movl    d2,d3           | subtract b from p, store in tmp.
+        subl    d1,d3
+        jcs     L2              | if no carry,
+        bset    IMM (0),d0      | set the low order bit of a to 1,
+        movl    d3,d2           | and store tmp in p.
+L2:     subql   IMM (1),d4
+        jcc     L1
+        moveml  sp@,d2-d4       | restore data registers
+        unlk    a6              | and return
+        rts
+#endif /* __mcf5200__ || __mcoldfire__ */
+
diff --git a/arch/m68k/lib/umodsi3.S b/arch/m68k/lib/umodsi3.S
new file mode 100644
index 000000000000..5def5f626478
--- /dev/null
+++ b/arch/m68k/lib/umodsi3.S
@@ -0,0 +1,113 @@
+/* libgcc1 routines for 68000 w/o floating-point hardware.
+   Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 2, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file with other programs, and to distribute
+those programs without any restriction coming from the use of this
+file.  (The General Public License restrictions do apply in other
+respects; for example, they cover modification of the file, and
+distribution when not linked into another program.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* As a special exception, if you link this library with files
+   compiled with GCC to produce an executable, this does not cause
+   the resulting executable to be covered by the GNU General Public License.
+   This exception does not however invalidate any other reasons why
+   the executable file might be covered by the GNU General Public License.  */
+
+/* Use this one for any 680x0; assumes no floating point hardware.
+   The trailing " '" appearing on some lines is for ANSI preprocessors.  Yuk.
+   Some of this code comes from MINIX, via the folks at ericsson.
+   D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
+*/
+
+/* These are predefined by new versions of GNU cpp.  */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+#ifndef __IMMEDIATE_PREFIX__
+#define __IMMEDIATE_PREFIX__ #
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/* Use the right prefix for immediate values.  */
+
+#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
+
+#define d0 REG (d0)
+#define d1 REG (d1)
+#define d2 REG (d2)
+#define d3 REG (d3)
+#define d4 REG (d4)
+#define d5 REG (d5)
+#define d6 REG (d6)
+#define d7 REG (d7)
+#define a0 REG (a0)
+#define a1 REG (a1)
+#define a2 REG (a2)
+#define a3 REG (a3)
+#define a4 REG (a4)
+#define a5 REG (a5)
+#define a6 REG (a6)
+#define fp REG (fp)
+#define sp REG (sp)
+
+        .text
+        .proc
+        .globl  SYM (__umodsi3)
+SYM (__umodsi3):
+        movel   sp@(8), d1      /* d1 = divisor */
+        movel   sp@(4), d0      /* d0 = dividend */
+        movel   d1, sp@-
+        movel   d0, sp@-
+        jbsr    SYM (__udivsi3)
+        addql   IMM (8), sp
+        movel   sp@(8), d1      /* d1 = divisor */
+#if !(defined(__mcf5200__) || defined(__mcoldfire__))
+        movel   d1, sp@-
+        movel   d0, sp@-
+        jbsr    SYM (__mulsi3)  /* d0 = (a/b)*b */
+        addql   IMM (8), sp
+#else
+        mulsl   d1,d0
+#endif
+        movel   sp@(4), d1      /* d1 = dividend */
+        subl    d0, d1          /* d1 = a - (a/b)*b */
+        movel   d1, d0
+        rts
+
diff --git a/arch/m68k/mm/Makefile b/arch/m68k/mm/Makefile
index 5eaa43c4cb3c..b60270e4954b 100644
--- a/arch/m68k/mm/Makefile
+++ b/arch/m68k/mm/Makefile
@@ -1,8 +1,5 @@
-#
-# Makefile for the linux m68k-specific parts of the memory manager.
-#
-
-obj-y           := cache.o init.o fault.o hwtest.o
-
-obj-$(CONFIG_MMU_MOTOROLA)      += kmap.o memory.o motorola.o
-obj-$(CONFIG_MMU_SUN3)          += sun3kmap.o sun3mmu.o
+ifdef CONFIG_MMU
+include arch/m68k/mm/Makefile_mm
+else
+include arch/m68k/mm/Makefile_no
+endif
diff --git a/arch/m68k/mm/Makefile_mm b/arch/m68k/mm/Makefile_mm
new file mode 100644
index 000000000000..5eaa43c4cb3c
--- /dev/null
+++ b/arch/m68k/mm/Makefile_mm
@@ -0,0 +1,8 @@
+#
+# Makefile for the linux m68k-specific parts of the memory manager.
+#
+
+obj-y           := cache.o init.o fault.o hwtest.o
+
+obj-$(CONFIG_MMU_MOTOROLA)      += kmap.o memory.o motorola.o
+obj-$(CONFIG_MMU_SUN3)          += sun3kmap.o sun3mmu.o
diff --git a/arch/m68k/mm/Makefile_no b/arch/m68k/mm/Makefile_no
new file mode 100644
index 000000000000..b54ab6b4b523
--- /dev/null
+++ b/arch/m68k/mm/Makefile_no
@@ -0,0 +1,5 @@
+#
+# Makefile for the linux m68knommu specific parts of the memory manager.
+#
+
+obj-y += init.o kmap.o
diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c
index 8bc842554e5b..27b5ce089a34 100644
--- a/arch/m68k/mm/init.c
+++ b/arch/m68k/mm/init.c
@@ -1,150 +1,5 @@
-/*
- *  linux/arch/m68k/mm/init.c
- *
- *  Copyright (C) 1995  Hamish Macdonald
- *
- *  Contains common initialization routines, specific init code moved
- *  to motorola.c and sun3mmu.c
- */
-
-#include <linux/module.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/bootmem.h>
-#include <linux/gfp.h>
-
-#include <asm/setup.h>
-#include <asm/uaccess.h>
-#include <asm/page.h>
-#include <asm/pgalloc.h>
-#include <asm/system.h>
-#include <asm/machdep.h>
-#include <asm/io.h>
-#ifdef CONFIG_ATARI
-#include <asm/atari_stram.h>
-#endif
-#include <asm/sections.h>
-#include <asm/tlb.h>
-
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-
-pg_data_t pg_data_map[MAX_NUMNODES];
-EXPORT_SYMBOL(pg_data_map);
-
-int m68k_virt_to_node_shift;
-
-#ifndef CONFIG_SINGLE_MEMORY_CHUNK
-pg_data_t *pg_data_table[65];
-EXPORT_SYMBOL(pg_data_table);
-#endif
-
-void __init m68k_setup_node(int node)
-{
-#ifndef CONFIG_SINGLE_MEMORY_CHUNK
-        struct mem_info *info = m68k_memory + node;
-        int i, end;
-
-        i = (unsigned long)phys_to_virt(info->addr) >> __virt_to_node_shift();
-        end = (unsigned long)phys_to_virt(info->addr + info->size - 1) >> __virt_to_node_shift();
-        for (; i <= end; i++) {
-                if (pg_data_table[i])
-                        printk("overlap at %u for chunk %u\n", i, node);
-                pg_data_table[i] = pg_data_map + node;
-        }
-#endif
-        pg_data_map[node].bdata = bootmem_node_data + node;
-        node_set_online(node);
-}
-
-
-/*
- * ZERO_PAGE is a special page that is used for zero-initialized
- * data and COW.
- */
-
-void *empty_zero_page;
-EXPORT_SYMBOL(empty_zero_page);
-
-extern void init_pointer_table(unsigned long ptable);
-
-/* References to section boundaries */
-
-extern pmd_t *zero_pgtable;
-
-void __init mem_init(void)
-{
-        pg_data_t *pgdat;
-        int codepages = 0;
-        int datapages = 0;
-        int initpages = 0;
-        int i;
-
-#ifdef CONFIG_ATARI
-        if (MACH_IS_ATARI)
-                atari_stram_mem_init_hook();
-#endif
-
-        /* this will put all memory onto the freelists */
-        totalram_pages = num_physpages = 0;
-        for_each_online_pgdat(pgdat) {
-                num_physpages += pgdat->node_present_pages;
-
-                totalram_pages += free_all_bootmem_node(pgdat);
-                for (i = 0; i < pgdat->node_spanned_pages; i++) {
-                        struct page *page = pgdat->node_mem_map + i;
-                        char *addr = page_to_virt(page);
-
-                        if (!PageReserved(page))
-                                continue;
-                        if (addr >= _text &&
-                            addr < _etext)
-                                codepages++;
-                        else if (addr >= __init_begin &&
-                                 addr < __init_end)
-                                initpages++;
-                        else
-                                datapages++;
-                }
-        }
-
-#ifndef CONFIG_SUN3
-        /* insert pointer tables allocated so far into the tablelist */
-        init_pointer_table((unsigned long)kernel_pg_dir);
-        for (i = 0; i < PTRS_PER_PGD; i++) {
-                if (pgd_present(kernel_pg_dir[i]))
-                        init_pointer_table(__pgd_page(kernel_pg_dir[i]));
-        }
-
-        /* insert also pointer table that we used to unmap the zero page */
-        if (zero_pgtable)
-                init_pointer_table((unsigned long)zero_pgtable);
-#endif
-
-        printk("Memory: %luk/%luk available (%dk kernel code, %dk data, %dk init)\n",
-               nr_free_pages() << (PAGE_SHIFT-10),
-               totalram_pages << (PAGE_SHIFT-10),
-               codepages << (PAGE_SHIFT-10),
-               datapages << (PAGE_SHIFT-10),
-               initpages << (PAGE_SHIFT-10));
-}
-
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
-        int pages = 0;
-        for (; start < end; start += PAGE_SIZE) {
-                ClearPageReserved(virt_to_page(start));
-                init_page_count(virt_to_page(start));
-                free_page(start);
-                totalram_pages++;
-                pages++;
-        }
-        printk ("Freeing initrd memory: %dk freed\n", pages);
-}
+#ifdef CONFIG_MMU
+#include "init_mm.c"
+#else
+#include "init_no.c"
 #endif
diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c
new file mode 100644
index 000000000000..8bc842554e5b
--- /dev/null
+++ b/arch/m68k/mm/init_mm.c
@@ -0,0 +1,150 @@
+/*
+ *  linux/arch/m68k/mm/init.c
+ *
+ *  Copyright (C) 1995  Hamish Macdonald
+ *
+ *  Contains common initialization routines, specific init code moved
+ *  to motorola.c and sun3mmu.c
+ */
+
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/gfp.h>
+
+#include <asm/setup.h>
+#include <asm/uaccess.h>
+#include <asm/page.h>
+#include <asm/pgalloc.h>
+#include <asm/system.h>
+#include <asm/machdep.h>
+#include <asm/io.h>
+#ifdef CONFIG_ATARI
+#include <asm/atari_stram.h>
+#endif
+#include <asm/sections.h>
+#include <asm/tlb.h>
+
+DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
+
+pg_data_t pg_data_map[MAX_NUMNODES];
+EXPORT_SYMBOL(pg_data_map);
+
+int m68k_virt_to_node_shift;
+
+#ifndef CONFIG_SINGLE_MEMORY_CHUNK
+pg_data_t *pg_data_table[65];
+EXPORT_SYMBOL(pg_data_table);
+#endif
+
+void __init m68k_setup_node(int node)
+{
+#ifndef CONFIG_SINGLE_MEMORY_CHUNK
+        struct mem_info *info = m68k_memory + node;
+        int i, end;
+
+        i = (unsigned long)phys_to_virt(info->addr) >> __virt_to_node_shift();
+        end = (unsigned long)phys_to_virt(info->addr + info->size - 1) >> __virt_to_node_shift();
+        for (; i <= end; i++) {
+                if (pg_data_table[i])
+                        printk("overlap at %u for chunk %u\n", i, node);
+                pg_data_table[i] = pg_data_map + node;
+        }
+#endif
+        pg_data_map[node].bdata = bootmem_node_data + node;
+        node_set_online(node);
+}
+
+
+/*
+ * ZERO_PAGE is a special page that is used for zero-initialized
+ * data and COW.
+ */
+
+void *empty_zero_page;
+EXPORT_SYMBOL(empty_zero_page);
+
+extern void init_pointer_table(unsigned long ptable);
+
+/* References to section boundaries */
+
+extern pmd_t *zero_pgtable;
+
+void __init mem_init(void)
+{
+        pg_data_t *pgdat;
+        int codepages = 0;
+        int datapages = 0;
+        int initpages = 0;
+        int i;
+
+#ifdef CONFIG_ATARI
+        if (MACH_IS_ATARI)
+                atari_stram_mem_init_hook();
+#endif
+
+        /* this will put all memory onto the freelists */
+        totalram_pages = num_physpages = 0;
+        for_each_online_pgdat(pgdat) {
+                num_physpages += pgdat->node_present_pages;
+
+                totalram_pages += free_all_bootmem_node(pgdat);
+                for (i = 0; i < pgdat->node_spanned_pages; i++) {
+                        struct page *page = pgdat->node_mem_map + i;
+                        char *addr = page_to_virt(page);
+
+                        if (!PageReserved(page))
+                                continue;
+                        if (addr >= _text &&
+                            addr < _etext)
+                                codepages++;
+                        else if (addr >= __init_begin &&
+                                 addr < __init_end)
+                                initpages++;
+                        else
+                                datapages++;
+                }
+        }
+
+#ifndef CONFIG_SUN3
+        /* insert pointer tables allocated so far into the tablelist */
+        init_pointer_table((unsigned long)kernel_pg_dir);
+        for (i = 0; i < PTRS_PER_PGD; i++) {
+                if (pgd_present(kernel_pg_dir[i]))
+                        init_pointer_table(__pgd_page(kernel_pg_dir[i]));
+        }
+
+        /* insert also pointer table that we used to unmap the zero page */
+        if (zero_pgtable)
+                init_pointer_table((unsigned long)zero_pgtable);
+#endif
+
+        printk("Memory: %luk/%luk available (%dk kernel code, %dk data, %dk init)\n",
+               nr_free_pages() << (PAGE_SHIFT-10),
+               totalram_pages << (PAGE_SHIFT-10),
+               codepages << (PAGE_SHIFT-10),
+               datapages << (PAGE_SHIFT-10),
+               initpages << (PAGE_SHIFT-10));
+}
+
+#ifdef CONFIG_BLK_DEV_INITRD
+void free_initrd_mem(unsigned long start, unsigned long end)
+{
+        int pages = 0;
+        for (; start < end; start += PAGE_SIZE) {
+                ClearPageReserved(virt_to_page(start));
+                init_page_count(virt_to_page(start));
+                free_page(start);
+                totalram_pages++;
+                pages++;
+        }
+        printk ("Freeing initrd memory: %dk freed\n", pages);
+}
+#endif
diff --git a/arch/m68k/mm/init_no.c b/arch/m68k/mm/init_no.c
new file mode 100644
index 000000000000..8a6653f56bd8
--- /dev/null
+++ b/arch/m68k/mm/init_no.c
@@ -0,0 +1,193 @@
+/*
+ *  linux/arch/m68knommu/mm/init.c
+ *
+ *  Copyright (C) 1998  D. Jeff Dionne <jeff@lineo.ca>,
+ *                      Kenneth Albanowski <kjahds@kjahds.com>,
+ *  Copyright (C) 2000  Lineo, Inc.  (www.lineo.com) 
+ *
+ *  Based on:
+ *
+ *  linux/arch/m68k/mm/init.c
+ *
+ *  Copyright (C) 1995  Hamish Macdonald
+ *
+ *  JAN/1999 -- hacked to support ColdFire (gerg@snapgear.com)
+ *  DEC/2000 -- linux 2.4 support <davidm@snapgear.com>
+ */
+
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/swap.h>
+#include <linux/init.h>
+#include <linux/highmem.h>
+#include <linux/pagemap.h>
+#include <linux/bootmem.h>
+#include <linux/gfp.h>
+
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/machdep.h>
+
+#undef DEBUG
+
+extern void die_if_kernel(char *,struct pt_regs *,long);
+extern void free_initmem(void);
+
+/*
+ * BAD_PAGE is the page that is used for page faults when linux
+ * is out-of-memory. Older versions of linux just did a
+ * do_exit(), but using this instead means there is less risk
+ * for a process dying in kernel mode, possibly leaving a inode
+ * unused etc..
+ *
+ * BAD_PAGETABLE is the accompanying page-table: it is initialized
+ * to point to BAD_PAGE entries.
+ *
+ * ZERO_PAGE is a special page that is used for zero-initialized
+ * data and COW.
+ */
+static unsigned long empty_bad_page_table;
+
+static unsigned long empty_bad_page;
+
+unsigned long empty_zero_page;
+
+extern unsigned long memory_start;
+extern unsigned long memory_end;
+
+/*
+ * paging_init() continues the virtual memory environment setup which
+ * was begun by the code in arch/head.S.
+ * The parameters are pointers to where to stick the starting and ending
+ * addresses of available kernel virtual memory.
+ */
+void __init paging_init(void)
+{
+        /*
+         * Make sure start_mem is page aligned, otherwise bootmem and
+         * page_alloc get different views of the world.
+         */
+#ifdef DEBUG
+        unsigned long start_mem = PAGE_ALIGN(memory_start);
+#endif
+        unsigned long end_mem   = memory_end & PAGE_MASK;
+
+#ifdef DEBUG
+        printk (KERN_DEBUG "start_mem is %#lx\nvirtual_end is %#lx\n",
+                start_mem, end_mem);
+#endif
+
+        /*
+         * Initialize the bad page table and bad page to point
+         * to a couple of allocated pages.
+         */
+        empty_bad_page_table = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
+        empty_bad_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
+        empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
+        memset((void *)empty_zero_page, 0, PAGE_SIZE);
+
+        /*
+         * Set up SFC/DFC registers (user data space).
+         */
+        set_fs (USER_DS);
+
+#ifdef DEBUG
+        printk (KERN_DEBUG "before free_area_init\n");
+
+        printk (KERN_DEBUG "free_area_init -> start_mem is %#lx\nvirtual_end is %#lx\n",
+                start_mem, end_mem);
+#endif
+
+        {
+                unsigned long zones_size[MAX_NR_ZONES] = {0, };
+
+                zones_size[ZONE_DMA] = (end_mem - PAGE_OFFSET) >> PAGE_SHIFT;
+                free_area_init(zones_size);
+        }
+}
+
+void __init mem_init(void)
+{
+        int codek = 0, datak = 0, initk = 0;
+        unsigned long tmp;
+        extern char _etext, _stext, _sdata, _ebss, __init_begin, __init_end;
+        extern unsigned int _ramend, _rambase;
+        unsigned long len = _ramend - _rambase;
+        unsigned long start_mem = memory_start; /* DAVIDM - these must start at end of kernel */
+        unsigned long end_mem   = memory_end; /* DAVIDM - this must not include kernel stack at top */
+
+        pr_debug("Mem_init: start=%lx, end=%lx\n", start_mem, end_mem);
+
+        end_mem &= PAGE_MASK;
+        high_memory = (void *) end_mem;
+
+        start_mem = PAGE_ALIGN(start_mem);
+        max_mapnr = num_physpages = (((unsigned long) high_memory) - PAGE_OFFSET) >> PAGE_SHIFT;
+
+        /* this will put all memory onto the freelists */
+        totalram_pages = free_all_bootmem();
+
+        codek = (&_etext - &_stext) >> 10;
+        datak = (&_ebss - &_sdata) >> 10;
+        initk = (&__init_begin - &__init_end) >> 10;
+
+        tmp = nr_free_pages() << PAGE_SHIFT;
+        printk(KERN_INFO "Memory available: %luk/%luk RAM, (%dk kernel code, %dk data)\n",
+               tmp >> 10,
+               len >> 10,
+               codek,
+               datak
+               );
+}
+
+
+#ifdef CONFIG_BLK_DEV_INITRD
+void free_initrd_mem(unsigned long start, unsigned long end)
+{
+        int pages = 0;
+        for (; start < end; start += PAGE_SIZE) {
+                ClearPageReserved(virt_to_page(start));
+                init_page_count(virt_to_page(start));
+                free_page(start);
+                totalram_pages++;
+                pages++;
+        }
+        printk (KERN_NOTICE "Freeing initrd memory: %dk freed\n", pages * (PAGE_SIZE / 1024));
+}
+#endif
+
+void
+free_initmem()
+{
+#ifdef CONFIG_RAMKERNEL
+        unsigned long addr;
+        extern char __init_begin, __init_end;
+        /*
+         * The following code should be cool even if these sections
+         * are not page aligned.
+         */
+        addr = PAGE_ALIGN((unsigned long)(&__init_begin));
+        /* next to check that the page we free is not a partial page */
+        for (; addr + PAGE_SIZE < (unsigned long)(&__init_end); addr +=PAGE_SIZE) {
+                ClearPageReserved(virt_to_page(addr));
+                init_page_count(virt_to_page(addr));
+                free_page(addr);
+                totalram_pages++;
+        }
+        printk(KERN_NOTICE "Freeing unused kernel memory: %ldk freed (0x%x - 0x%x)\n",
+                        (addr - PAGE_ALIGN((long) &__init_begin)) >> 10,
+                        (int)(PAGE_ALIGN((unsigned long)(&__init_begin))),
+                        (int)(addr - PAGE_SIZE));
+#endif
+}
+
diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index 69345849454b..a373d136b2b2 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -1,367 +1,5 @@
-/*
- *  linux/arch/m68k/mm/kmap.c
- *
- *  Copyright (C) 1997 Roman Hodek
- *
- *  10/01/99 cleaned up the code and changing to the same interface
- *           used by other architectures                /Roman Zippel
- */
-
-#include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/vmalloc.h>
-
-#include <asm/setup.h>
-#include <asm/segment.h>
-#include <asm/page.h>
-#include <asm/pgalloc.h>
-#include <asm/io.h>
-#include <asm/system.h>
-
-#undef DEBUG
-
-#define PTRTREESIZE     (256*1024)
-
-/*
- * For 040/060 we can use the virtual memory area like other architectures,
- * but for 020/030 we want to use early termination page descriptor and we
- * can't mix this with normal page descriptors, so we have to copy that code
- * (mm/vmalloc.c) and return appriorate aligned addresses.
- */
-
-#ifdef CPU_M68040_OR_M68060_ONLY
-
-#define IO_SIZE         PAGE_SIZE
-
-static inline struct vm_struct *get_io_area(unsigned long size)
-{
-        return get_vm_area(size, VM_IOREMAP);
-}
-
-
-static inline void free_io_area(void *addr)
-{
-        vfree((void *)(PAGE_MASK & (unsigned long)addr));
-}
-
+#ifdef CONFIG_MMU
+#include "kmap_mm.c"
 #else
-
-#define IO_SIZE         (256*1024)
-
-static struct vm_struct *iolist;
-
-static struct vm_struct *get_io_area(unsigned long size)
-{
-        unsigned long addr;
-        struct vm_struct **p, *tmp, *area;
-
-        area = kmalloc(sizeof(*area), GFP_KERNEL);
-        if (!area)
-                return NULL;
-        addr = KMAP_START;
-        for (p = &iolist; (tmp = *p) ; p = &tmp->next) {
-                if (size + addr < (unsigned long)tmp->addr)
-                        break;
-                if (addr > KMAP_END-size) {
-                        kfree(area);
-                        return NULL;
-                }
-                addr = tmp->size + (unsigned long)tmp->addr;
-        }
-        area->addr = (void *)addr;
-        area->size = size + IO_SIZE;
-        area->next = *p;
-        *p = area;
-        return area;
-}
-
-static inline void free_io_area(void *addr)
-{
-        struct vm_struct **p, *tmp;
-
-        if (!addr)
-                return;
-        addr = (void *)((unsigned long)addr & -IO_SIZE);
-        for (p = &iolist ; (tmp = *p) ; p = &tmp->next) {
-                if (tmp->addr == addr) {
-                        *p = tmp->next;
-                        __iounmap(tmp->addr, tmp->size);
-                        kfree(tmp);
-                        return;
-                }
-        }
-}
-
+#include "kmap_no.c"
 #endif
-
-/*
- * Map some physical address range into the kernel address space.
- */
-/* Rewritten by Andreas Schwab to remove all races. */
-
-void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
-{
-        struct vm_struct *area;
-        unsigned long virtaddr, retaddr;
-        long offset;
-        pgd_t *pgd_dir;
-        pmd_t *pmd_dir;
-        pte_t *pte_dir;
-
-        /*
-         * Don't allow mappings that wrap..
-         */
-        if (!size || physaddr > (unsigned long)(-size))
-                return NULL;
-
-#ifdef CONFIG_AMIGA
-        if (MACH_IS_AMIGA) {
-                if ((physaddr >= 0x40000000) && (physaddr + size < 0x60000000)
-                    && (cacheflag == IOMAP_NOCACHE_SER))
-                        return (void __iomem *)physaddr;
-        }
-#endif
-
-#ifdef DEBUG
-        printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag);
-#endif
-        /*
-         * Mappings have to be aligned
-         */
-        offset = physaddr & (IO_SIZE - 1);
-        physaddr &= -IO_SIZE;
-        size = (size + offset + IO_SIZE - 1) & -IO_SIZE;
-
-        /*
-         * Ok, go for it..
-         */
-        area = get_io_area(size);
-        if (!area)
-                return NULL;
-
-        virtaddr = (unsigned long)area->addr;
-        retaddr = virtaddr + offset;
-#ifdef DEBUG
-        printk("0x%lx,0x%lx,0x%lx", physaddr, virtaddr, retaddr);
-#endif
-
-        /*
-         * add cache and table flags to physical address
-         */
-        if (CPU_IS_040_OR_060) {
-                physaddr |= (_PAGE_PRESENT | _PAGE_GLOBAL040 |
-                             _PAGE_ACCESSED | _PAGE_DIRTY);
-                switch (cacheflag) {
-                case IOMAP_FULL_CACHING:
-                        physaddr |= _PAGE_CACHE040;
-                        break;
-                case IOMAP_NOCACHE_SER:
-                default:
-                        physaddr |= _PAGE_NOCACHE_S;
-                        break;
-                case IOMAP_NOCACHE_NONSER:
-                        physaddr |= _PAGE_NOCACHE;
-                        break;
-                case IOMAP_WRITETHROUGH:
-                        physaddr |= _PAGE_CACHE040W;
-                        break;
-                }
-        } else {
-                physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
-                switch (cacheflag) {
-                case IOMAP_NOCACHE_SER:
-                case IOMAP_NOCACHE_NONSER:
-                default:
-                        physaddr |= _PAGE_NOCACHE030;
-                        break;
-                case IOMAP_FULL_CACHING:
-                case IOMAP_WRITETHROUGH:
-                        break;
-                }
-        }
-
-        while ((long)size > 0) {
-#ifdef DEBUG
-                if (!(virtaddr & (PTRTREESIZE-1)))
-                        printk ("\npa=%#lx va=%#lx ", physaddr, virtaddr);
-#endif
-                pgd_dir = pgd_offset_k(virtaddr);
-                pmd_dir = pmd_alloc(&init_mm, pgd_dir, virtaddr);
-                if (!pmd_dir) {
-                        printk("ioremap: no mem for pmd_dir\n");
-                        return NULL;
-                }
-
-                if (CPU_IS_020_OR_030) {
-                        pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr;
-                        physaddr += PTRTREESIZE;
-                        virtaddr += PTRTREESIZE;
-                        size -= PTRTREESIZE;
-                } else {
-                        pte_dir = pte_alloc_kernel(pmd_dir, virtaddr);
-                        if (!pte_dir) {
-                                printk("ioremap: no mem for pte_dir\n");
-                                return NULL;
-                        }
-
-                        pte_val(*pte_dir) = physaddr;
-                        virtaddr += PAGE_SIZE;
-                        physaddr += PAGE_SIZE;
-                        size -= PAGE_SIZE;
-                }
-        }
-#ifdef DEBUG
-        printk("\n");
-#endif
-        flush_tlb_all();
-
-        return (void __iomem *)retaddr;
-}
-EXPORT_SYMBOL(__ioremap);
-
-/*
- * Unmap a ioremap()ed region again
- */
-void iounmap(void __iomem *addr)
-{
-#ifdef CONFIG_AMIGA
-        if ((!MACH_IS_AMIGA) ||
-            (((unsigned long)addr < 0x40000000) ||
-             ((unsigned long)addr > 0x60000000)))
-                        free_io_area((__force void *)addr);
-#else
-        free_io_area((__force void *)addr);
-#endif
-}
-EXPORT_SYMBOL(iounmap);
-
-/*
- * __iounmap unmaps nearly everything, so be careful
- * it doesn't free currently pointer/page tables anymore but it
- * wans't used anyway and might be added later.
- */
-void __iounmap(void *addr, unsigned long size)
-{
-        unsigned long virtaddr = (unsigned long)addr;
-        pgd_t *pgd_dir;
-        pmd_t *pmd_dir;
-        pte_t *pte_dir;
-
-        while ((long)size > 0) {
-                pgd_dir = pgd_offset_k(virtaddr);
-                if (pgd_bad(*pgd_dir)) {
-                        printk("iounmap: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
-                        pgd_clear(pgd_dir);
-                        return;
-                }
-                pmd_dir = pmd_offset(pgd_dir, virtaddr);
-
-                if (CPU_IS_020_OR_030) {
-                        int pmd_off = (virtaddr/PTRTREESIZE) & 15;
-                        int pmd_type = pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK;
-
-                        if (pmd_type == _PAGE_PRESENT) {
-                                pmd_dir->pmd[pmd_off] = 0;
-                                virtaddr += PTRTREESIZE;
-                                size -= PTRTREESIZE;
-                                continue;
-                        } else if (pmd_type == 0)
-                                continue;
-                }
-
-                if (pmd_bad(*pmd_dir)) {
-                        printk("iounmap: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
-                        pmd_clear(pmd_dir);
-                        return;
-                }
-                pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
-
-                pte_val(*pte_dir) = 0;
-                virtaddr += PAGE_SIZE;
-                size -= PAGE_SIZE;
-        }
-
-        flush_tlb_all();
-}
-
-/*
- * Set new cache mode for some kernel address space.
- * The caller must push data for that range itself, if such data may already
- * be in the cache.
- */
-void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
-{
-        unsigned long virtaddr = (unsigned long)addr;
-        pgd_t *pgd_dir;
-        pmd_t *pmd_dir;
-        pte_t *pte_dir;
-
-        if (CPU_IS_040_OR_060) {
-                switch (cmode) {
-                case IOMAP_FULL_CACHING:
-                        cmode = _PAGE_CACHE040;
-                        break;
-                case IOMAP_NOCACHE_SER:
-                default:
-                        cmode = _PAGE_NOCACHE_S;
-                        break;
-                case IOMAP_NOCACHE_NONSER:
-                        cmode = _PAGE_NOCACHE;
-                        break;
-                case IOMAP_WRITETHROUGH:
-                        cmode = _PAGE_CACHE040W;
-                        break;
-                }
-        } else {
-                switch (cmode) {
-                case IOMAP_NOCACHE_SER:
-                case IOMAP_NOCACHE_NONSER:
-                default:
-                        cmode = _PAGE_NOCACHE030;
-                        break;
-                case IOMAP_FULL_CACHING:
-                case IOMAP_WRITETHROUGH:
-                        cmode = 0;
-                }
-        }
-
-        while ((long)size > 0) {
-                pgd_dir = pgd_offset_k(virtaddr);
-                if (pgd_bad(*pgd_dir)) {
-                        printk("iocachemode: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
-                        pgd_clear(pgd_dir);
-                        return;
-                }
-                pmd_dir = pmd_offset(pgd_dir, virtaddr);
-
-                if (CPU_IS_020_OR_030) {
-                        int pmd_off = (virtaddr/PTRTREESIZE) & 15;
-
-                        if ((pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK) == _PAGE_PRESENT) {
-                                pmd_dir->pmd[pmd_off] = (pmd_dir->pmd[pmd_off] &
-                                                         _CACHEMASK040) | cmode;
-                                virtaddr += PTRTREESIZE;
-                                size -= PTRTREESIZE;
-                                continue;
-                        }
-                }
-
-                if (pmd_bad(*pmd_dir)) {
-                        printk("iocachemode: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
-                        pmd_clear(pmd_dir);
-                        return;
-                }
-                pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
-
-                pte_val(*pte_dir) = (pte_val(*pte_dir) & _CACHEMASK040) | cmode;
-                virtaddr += PAGE_SIZE;
-                size -= PAGE_SIZE;
-        }
-
-        flush_tlb_all();
-}
-EXPORT_SYMBOL(kernel_set_cachemode);
diff --git a/arch/m68k/mm/kmap_mm.c b/arch/m68k/mm/kmap_mm.c
new file mode 100644
index 000000000000..69345849454b
--- /dev/null
+++ b/arch/m68k/mm/kmap_mm.c
@@ -0,0 +1,367 @@
+/*
+ *  linux/arch/m68k/mm/kmap.c
+ *
+ *  Copyright (C) 1997 Roman Hodek
+ *
+ *  10/01/99 cleaned up the code and changing to the same interface
+ *           used by other architectures                /Roman Zippel
+ */
+
+#include <linux/module.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/vmalloc.h>
+
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/page.h>
+#include <asm/pgalloc.h>
+#include <asm/io.h>
+#include <asm/system.h>
+
+#undef DEBUG
+
+#define PTRTREESIZE     (256*1024)
+
+/*
+ * For 040/060 we can use the virtual memory area like other architectures,
+ * but for 020/030 we want to use early termination page descriptor and we
+ * can't mix this with normal page descriptors, so we have to copy that code
+ * (mm/vmalloc.c) and return appriorate aligned addresses.
+ */
+
+#ifdef CPU_M68040_OR_M68060_ONLY
+
+#define IO_SIZE         PAGE_SIZE
+
+static inline struct vm_struct *get_io_area(unsigned long size)
+{
+        return get_vm_area(size, VM_IOREMAP);
+}
+
+
+static inline void free_io_area(void *addr)
+{
+        vfree((void *)(PAGE_MASK & (unsigned long)addr));
+}
+
+#else
+
+#define IO_SIZE         (256*1024)
+
+static struct vm_struct *iolist;
+
+static struct vm_struct *get_io_area(unsigned long size)
+{
+        unsigned long addr;
+        struct vm_struct **p, *tmp, *area;
+
+        area = kmalloc(sizeof(*area), GFP_KERNEL);
+        if (!area)
+                return NULL;
+        addr = KMAP_START;
+        for (p = &iolist; (tmp = *p) ; p = &tmp->next) {
+                if (size + addr < (unsigned long)tmp->addr)
+                        break;
+                if (addr > KMAP_END-size) {
+                        kfree(area);
+                        return NULL;
+                }
+                addr = tmp->size + (unsigned long)tmp->addr;
+        }
+        area->addr = (void *)addr;
+        area->size = size + IO_SIZE;
+        area->next = *p;
+        *p = area;
+        return area;
+}
+
+static inline void free_io_area(void *addr)
+{
+        struct vm_struct **p, *tmp;
+
+        if (!addr)
+                return;
+        addr = (void *)((unsigned long)addr & -IO_SIZE);
+        for (p = &iolist ; (tmp = *p) ; p = &tmp->next) {
+                if (tmp->addr == addr) {
+                        *p = tmp->next;
+                        __iounmap(tmp->addr, tmp->size);
+                        kfree(tmp);
+                        return;
+                }
+        }
+}
+
+#endif
+
+/*
+ * Map some physical address range into the kernel address space.
+ */
+/* Rewritten by Andreas Schwab to remove all races. */
+
+void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
+{
+        struct vm_struct *area;
+        unsigned long virtaddr, retaddr;
+        long offset;
+        pgd_t *pgd_dir;
+        pmd_t *pmd_dir;
+        pte_t *pte_dir;
+
+        /*
+         * Don't allow mappings that wrap..
+         */
+        if (!size || physaddr > (unsigned long)(-size))
+                return NULL;
+
+#ifdef CONFIG_AMIGA
+        if (MACH_IS_AMIGA) {
+                if ((physaddr >= 0x40000000) && (physaddr + size < 0x60000000)
+                    && (cacheflag == IOMAP_NOCACHE_SER))
+                        return (void __iomem *)physaddr;
+        }
+#endif
+
+#ifdef DEBUG
+        printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag);
+#endif
+        /*
+         * Mappings have to be aligned
+         */
+        offset = physaddr & (IO_SIZE - 1);
+        physaddr &= -IO_SIZE;
+        size = (size + offset + IO_SIZE - 1) & -IO_SIZE;
+
+        /*
+         * Ok, go for it..
+         */
+        area = get_io_area(size);
+        if (!area)
+                return NULL;
+
+        virtaddr = (unsigned long)area->addr;
+        retaddr = virtaddr + offset;
+#ifdef DEBUG
+        printk("0x%lx,0x%lx,0x%lx", physaddr, virtaddr, retaddr);
+#endif
+
+        /*
+         * add cache and table flags to physical address
+         */
+        if (CPU_IS_040_OR_060) {
+                physaddr |= (_PAGE_PRESENT | _PAGE_GLOBAL040 |
+                             _PAGE_ACCESSED | _PAGE_DIRTY);
+                switch (cacheflag) {
+                case IOMAP_FULL_CACHING:
+                        physaddr |= _PAGE_CACHE040;
+                        break;
+                case IOMAP_NOCACHE_SER:
+                default:
+                        physaddr |= _PAGE_NOCACHE_S;
+                        break;
+                case IOMAP_NOCACHE_NONSER:
+                        physaddr |= _PAGE_NOCACHE;
+                        break;
+                case IOMAP_WRITETHROUGH:
+                        physaddr |= _PAGE_CACHE040W;
+                        break;
+                }
+        } else {
+                physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
+                switch (cacheflag) {
+                case IOMAP_NOCACHE_SER:
+                case IOMAP_NOCACHE_NONSER:
+                default:
+                        physaddr |= _PAGE_NOCACHE030;
+                        break;
+                case IOMAP_FULL_CACHING:
+                case IOMAP_WRITETHROUGH:
+                        break;
+                }
+        }
+
+        while ((long)size > 0) {
+#ifdef DEBUG
+                if (!(virtaddr & (PTRTREESIZE-1)))
+                        printk ("\npa=%#lx va=%#lx ", physaddr, virtaddr);
+#endif
+                pgd_dir = pgd_offset_k(virtaddr);
+                pmd_dir = pmd_alloc(&init_mm, pgd_dir, virtaddr);
+                if (!pmd_dir) {
+                        printk("ioremap: no mem for pmd_dir\n");
+                        return NULL;
+                }
+
+                if (CPU_IS_020_OR_030) {
+                        pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr;
+                        physaddr += PTRTREESIZE;
+                        virtaddr += PTRTREESIZE;
+                        size -= PTRTREESIZE;
+                } else {
+                        pte_dir = pte_alloc_kernel(pmd_dir, virtaddr);
+                        if (!pte_dir) {
+                                printk("ioremap: no mem for pte_dir\n");
+                                return NULL;
+                        }
+
+                        pte_val(*pte_dir) = physaddr;
+                        virtaddr += PAGE_SIZE;
+                        physaddr += PAGE_SIZE;
+                        size -= PAGE_SIZE;
+                }
+        }
+#ifdef DEBUG
+        printk("\n");
+#endif
+        flush_tlb_all();
+
+        return (void __iomem *)retaddr;
+}
+EXPORT_SYMBOL(__ioremap);
+
+/*
+ * Unmap a ioremap()ed region again
+ */
+void iounmap(void __iomem *addr)
+{
+#ifdef CONFIG_AMIGA
+        if ((!MACH_IS_AMIGA) ||
+            (((unsigned long)addr < 0x40000000) ||
+             ((unsigned long)addr > 0x60000000)))
+                        free_io_area((__force void *)addr);
+#else
+        free_io_area((__force void *)addr);
+#endif
+}
+EXPORT_SYMBOL(iounmap);
+
+/*
+ * __iounmap unmaps nearly everything, so be careful
+ * it doesn't free currently pointer/page tables anymore but it
+ * wans't used anyway and might be added later.
+ */
+void __iounmap(void *addr, unsigned long size)
+{
+        unsigned long virtaddr = (unsigned long)addr;
+        pgd_t *pgd_dir;
+        pmd_t *pmd_dir;
+        pte_t *pte_dir;
+
+        while ((long)size > 0) {
+                pgd_dir = pgd_offset_k(virtaddr);
+                if (pgd_bad(*pgd_dir)) {
+                        printk("iounmap: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
+                        pgd_clear(pgd_dir);
+                        return;
+                }
+                pmd_dir = pmd_offset(pgd_dir, virtaddr);
+
+                if (CPU_IS_020_OR_030) {
+                        int pmd_off = (virtaddr/PTRTREESIZE) & 15;
+                        int pmd_type = pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK;
+
+                        if (pmd_type == _PAGE_PRESENT) {
+                                pmd_dir->pmd[pmd_off] = 0;
+                                virtaddr += PTRTREESIZE;
+                                size -= PTRTREESIZE;
+                                continue;
+                        } else if (pmd_type == 0)
+                                continue;
+                }
+
+                if (pmd_bad(*pmd_dir)) {
+                        printk("iounmap: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
+                        pmd_clear(pmd_dir);
+                        return;
+                }
+                pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
+
+                pte_val(*pte_dir) = 0;
+                virtaddr += PAGE_SIZE;
+                size -= PAGE_SIZE;
+        }
+
+        flush_tlb_all();
+}
+
+/*
+ * Set new cache mode for some kernel address space.
+ * The caller must push data for that range itself, if such data may already
+ * be in the cache.
+ */
+void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
+{
+        unsigned long virtaddr = (unsigned long)addr;
+        pgd_t *pgd_dir;
+        pmd_t *pmd_dir;
+        pte_t *pte_dir;
+
+        if (CPU_IS_040_OR_060) {
+                switch (cmode) {
+                case IOMAP_FULL_CACHING:
+                        cmode = _PAGE_CACHE040;
+                        break;
+                case IOMAP_NOCACHE_SER:
+                default:
+                        cmode = _PAGE_NOCACHE_S;
+                        break;
+                case IOMAP_NOCACHE_NONSER:
+                        cmode = _PAGE_NOCACHE;
+                        break;
+                case IOMAP_WRITETHROUGH:
+                        cmode = _PAGE_CACHE040W;
+                        break;
+                }
+        } else {
+                switch (cmode) {
+                case IOMAP_NOCACHE_SER:
+                case IOMAP_NOCACHE_NONSER:
+                default:
+                        cmode = _PAGE_NOCACHE030;
+                        break;
+                case IOMAP_FULL_CACHING:
+                case IOMAP_WRITETHROUGH:
+                        cmode = 0;
+                }
+        }
+
+        while ((long)size > 0) {
+                pgd_dir = pgd_offset_k(virtaddr);
+                if (pgd_bad(*pgd_dir)) {
+                        printk("iocachemode: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
+                        pgd_clear(pgd_dir);
+                        return;
+                }
+                pmd_dir = pmd_offset(pgd_dir, virtaddr);
+
+                if (CPU_IS_020_OR_030) {
+                        int pmd_off = (virtaddr/PTRTREESIZE) & 15;
+
+                        if ((pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK) == _PAGE_PRESENT) {
+                                pmd_dir->pmd[pmd_off] = (pmd_dir->pmd[pmd_off] &
+                                                         _CACHEMASK040) | cmode;
+                                virtaddr += PTRTREESIZE;
+                                size -= PTRTREESIZE;
+                                continue;
+                        }
+                }
+
+                if (pmd_bad(*pmd_dir)) {
+                        printk("iocachemode: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
+                        pmd_clear(pmd_dir);
+                        return;
+                }
+                pte_dir = pte_offset_kernel(pmd_dir, virtaddr);
+
+                pte_val(*pte_dir) = (pte_val(*pte_dir) & _CACHEMASK040) | cmode;
+                virtaddr += PAGE_SIZE;
+                size -= PAGE_SIZE;
+        }
+
+        flush_tlb_all();
+}
+EXPORT_SYMBOL(kernel_set_cachemode);
diff --git a/arch/m68k/mm/kmap_no.c b/arch/m68k/mm/kmap_no.c
new file mode 100644
index 000000000000..ece8d5ad4e6c
--- /dev/null
+++ b/arch/m68k/mm/kmap_no.c
@@ -0,0 +1,45 @@
+/*
+ *  linux/arch/m68knommu/mm/kmap.c
+ *
+ *  Copyright (C) 2000 Lineo, <davidm@snapgear.com>
+ *  Copyright (C) 2000-2002 David McCullough <davidm@snapgear.com>
+ */
+
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/vmalloc.h>
+
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/page.h>
+#include <asm/pgalloc.h>
+#include <asm/io.h>
+#include <asm/system.h>
+
+#undef DEBUG
+
+/*
+ * Map some physical address range into the kernel address space.
+ */
+void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
+{
+        return (void *)physaddr;
+}
+
+/*
+ * Unmap a ioremap()ed region again.
+ */
+void iounmap(void *addr)
+{
+}
+
+/*
+ * Set new cache mode for some kernel address space.
+ * The caller must push data for that range itself, if such data may already
+ * be in the cache.
+ */
+void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
+{
+}
diff --git a/arch/m68k/platform/5206/Makefile b/arch/m68k/platform/5206/Makefile
new file mode 100644
index 000000000000..b5db05625cfa
--- /dev/null
+++ b/arch/m68k/platform/5206/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for the m68knommu linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs.  You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y := config.o gpio.o
+
diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c
new file mode 100644
index 000000000000..9c335465e66d
--- /dev/null
+++ b/arch/m68k/platform/5206/config.c
@@ -0,0 +1,121 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/5206/config.c
+ *
+ *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
+ *      Copyright (C) 2000-2001, Lineo Inc. (www.lineo.com) 
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m5206_uart_platform[] = {
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE1,
+                .irq            = 73,
+        },
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE2,
+                .irq            = 74,
+        },
+        { },
+};
+
+static struct platform_device m5206_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m5206_uart_platform,
+};
+
+static struct platform_device *m5206_devices[] __initdata = {
+        &m5206_uart,
+};
+
+/***************************************************************************/
+
+static void __init m5206_uart_init_line(int line, int irq)
+{
+        if (line == 0) {
+                writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
+                writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
+                mcf_mapirq2imr(irq, MCFINTC_UART0);
+        } else if (line == 1) {
+                writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
+                writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
+                mcf_mapirq2imr(irq, MCFINTC_UART1);
+        }
+}
+
+static void __init m5206_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m5206_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m5206_uart_init_line(line, m5206_uart_platform[line].irq);
+}
+
+/***************************************************************************/
+
+static void __init m5206_timers_init(void)
+{
+        /* Timer1 is always used as system timer */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER1ICR);
+        mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+        /* Timer2 is to be used as a high speed profile timer  */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER2ICR);
+        mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
+}
+
+/***************************************************************************/
+
+void m5206_cpu_reset(void)
+{
+        local_irq_disable();
+        /* Set watchdog to soft reset, and enabled */
+        __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+        mach_reset = m5206_cpu_reset;
+        m5206_timers_init();
+        m5206_uarts_init();
+
+        /* Only support the external interrupts on their primary level */
+        mcf_mapirq2imr(25, MCFINTC_EINT1);
+        mcf_mapirq2imr(28, MCFINTC_EINT4);
+        mcf_mapirq2imr(31, MCFINTC_EINT7);
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/5206/gpio.c b/arch/m68k/platform/5206/gpio.c
new file mode 100644
index 000000000000..b9ab4a120f28
--- /dev/null
+++ b/arch/m68k/platform/5206/gpio.c
@@ -0,0 +1,49 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PP",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFSIM_PADDR,
+                .podr                           = (void __iomem *) MCFSIM_PADAT,
+                .ppdr                           = (void __iomem *) MCFSIM_PADAT,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5206e/Makefile b/arch/m68k/platform/5206e/Makefile
new file mode 100644
index 000000000000..b5db05625cfa
--- /dev/null
+++ b/arch/m68k/platform/5206e/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for the m68knommu linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs.  You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y := config.o gpio.o
+
diff --git a/arch/m68k/platform/5206e/config.c b/arch/m68k/platform/5206e/config.c
new file mode 100644
index 000000000000..942397984c66
--- /dev/null
+++ b/arch/m68k/platform/5206e/config.c
@@ -0,0 +1,127 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/5206e/config.c
+ *
+ *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+#include <asm/mcfdma.h>
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m5206e_uart_platform[] = {
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE1,
+                .irq            = 73,
+        },
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE2,
+                .irq            = 74,
+        },
+        { },
+};
+
+static struct platform_device m5206e_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m5206e_uart_platform,
+};
+
+static struct platform_device *m5206e_devices[] __initdata = {
+        &m5206e_uart,
+};
+
+/***************************************************************************/
+
+static void __init m5206e_uart_init_line(int line, int irq)
+{
+        if (line == 0) {
+                writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
+                writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
+                mcf_mapirq2imr(irq, MCFINTC_UART0);
+        } else if (line == 1) {
+                writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
+                writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
+                mcf_mapirq2imr(irq, MCFINTC_UART1);
+        }
+}
+
+static void __init m5206e_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
+}
+
+/***************************************************************************/
+
+static void __init m5206e_timers_init(void)
+{
+        /* Timer1 is always used as system timer */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER1ICR);
+        mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+        /* Timer2 is to be used as a high speed profile timer  */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER2ICR);
+        mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
+}
+
+/***************************************************************************/
+
+void m5206e_cpu_reset(void)
+{
+        local_irq_disable();
+        /* Set watchdog to soft reset, and enabled */
+        __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+#if defined(CONFIG_NETtel)
+        /* Copy command line from FLASH to local buffer... */
+        memcpy(commandp, (char *) 0xf0004000, size);
+        commandp[size-1] = 0;
+#endif /* CONFIG_NETtel */
+
+        mach_reset = m5206e_cpu_reset;
+        m5206e_timers_init();
+        m5206e_uarts_init();
+
+        /* Only support the external interrupts on their primary level */
+        mcf_mapirq2imr(25, MCFINTC_EINT1);
+        mcf_mapirq2imr(28, MCFINTC_EINT4);
+        mcf_mapirq2imr(31, MCFINTC_EINT7);
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/5206e/gpio.c b/arch/m68k/platform/5206e/gpio.c
new file mode 100644
index 000000000000..b9ab4a120f28
--- /dev/null
+++ b/arch/m68k/platform/5206e/gpio.c
@@ -0,0 +1,49 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PP",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFSIM_PADDR,
+                .podr                           = (void __iomem *) MCFSIM_PADAT,
+                .ppdr                           = (void __iomem *) MCFSIM_PADAT,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/520x/Makefile b/arch/m68k/platform/520x/Makefile
new file mode 100644
index 000000000000..ad3f4e5a57ce
--- /dev/null
+++ b/arch/m68k/platform/520x/Makefile
@@ -0,0 +1,17 @@
+#
+# Makefile for the M5208 specific file.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs.  You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y := config.o gpio.o
diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c
new file mode 100644
index 000000000000..621238f1a219
--- /dev/null
+++ b/arch/m68k/platform/520x/config.c
@@ -0,0 +1,311 @@
+/***************************************************************************/
+
+/*
+ *  linux/arch/m68knommu/platform/520x/config.c
+ *
+ *  Copyright (C) 2005,      Freescale (www.freescale.com)
+ *  Copyright (C) 2005,      Intec Automation (mike@steroidmicros.com)
+ *  Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
+ *  Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+#include <asm/mcfqspi.h>
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m520x_uart_platform[] = {
+        {
+                .mapbase        = MCFUART_BASE1,
+                .irq            = MCFINT_VECBASE + MCFINT_UART0,
+        },
+        {
+                .mapbase        = MCFUART_BASE2,
+                .irq            = MCFINT_VECBASE + MCFINT_UART1,
+        },
+        {
+                .mapbase        = MCFUART_BASE3,
+                .irq            = MCFINT_VECBASE + MCFINT_UART2,
+        },
+        { },
+};
+
+static struct platform_device m520x_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m520x_uart_platform,
+};
+
+static struct resource m520x_fec_resources[] = {
+        {
+                .start          = MCFFEC_BASE,
+                .end            = MCFFEC_BASE + MCFFEC_SIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 36,
+                .end            = 64 + 36,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 40,
+                .end            = 64 + 40,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 42,
+                .end            = 64 + 42,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m520x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m520x_fec_resources),
+        .resource               = m520x_fec_resources,
+};
+
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+static struct resource m520x_qspi_resources[] = {
+        {
+                .start          = MCFQSPI_IOBASE,
+                .end            = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = MCFINT_VECBASE + MCFINT_QSPI,
+                .end            = MCFINT_VECBASE + MCFINT_QSPI,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+#define MCFQSPI_CS0    62
+#define MCFQSPI_CS1    63
+#define MCFQSPI_CS2    44
+
+static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control)
+{
+        int status;
+
+        status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
+                goto fail0;
+        }
+        status = gpio_direction_output(MCFQSPI_CS0, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
+                goto fail1;
+        }
+
+        status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
+                goto fail1;
+        }
+        status = gpio_direction_output(MCFQSPI_CS1, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
+                goto fail2;
+        }
+
+        status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
+                goto fail2;
+        }
+        status = gpio_direction_output(MCFQSPI_CS2, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
+                goto fail3;
+        }
+
+        return 0;
+
+fail3:
+        gpio_free(MCFQSPI_CS2);
+fail2:
+        gpio_free(MCFQSPI_CS1);
+fail1:
+        gpio_free(MCFQSPI_CS0);
+fail0:
+        return status;
+}
+
+static void m520x_cs_teardown(struct mcfqspi_cs_control *cs_control)
+{
+        gpio_free(MCFQSPI_CS2);
+        gpio_free(MCFQSPI_CS1);
+        gpio_free(MCFQSPI_CS0);
+}
+
+static void m520x_cs_select(struct mcfqspi_cs_control *cs_control,
+                            u8 chip_select, bool cs_high)
+{
+        switch (chip_select) {
+        case 0:
+                gpio_set_value(MCFQSPI_CS0, cs_high);
+                break;
+        case 1:
+                gpio_set_value(MCFQSPI_CS1, cs_high);
+                break;
+        case 2:
+                gpio_set_value(MCFQSPI_CS2, cs_high);
+                break;
+        }
+}
+
+static void m520x_cs_deselect(struct mcfqspi_cs_control *cs_control,
+                              u8 chip_select, bool cs_high)
+{
+        switch (chip_select) {
+        case 0:
+                gpio_set_value(MCFQSPI_CS0, !cs_high);
+                break;
+        case 1:
+                gpio_set_value(MCFQSPI_CS1, !cs_high);
+                break;
+        case 2:
+                gpio_set_value(MCFQSPI_CS2, !cs_high);
+                break;
+        }
+}
+
+static struct mcfqspi_cs_control m520x_cs_control = {
+        .setup                  = m520x_cs_setup,
+        .teardown               = m520x_cs_teardown,
+        .select                 = m520x_cs_select,
+        .deselect               = m520x_cs_deselect,
+};
+
+static struct mcfqspi_platform_data m520x_qspi_data = {
+        .bus_num                = 0,
+        .num_chipselect         = 3,
+        .cs_control             = &m520x_cs_control,
+};
+
+static struct platform_device m520x_qspi = {
+        .name                   = "mcfqspi",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m520x_qspi_resources),
+        .resource               = m520x_qspi_resources,
+        .dev.platform_data      = &m520x_qspi_data,
+};
+
+static void __init m520x_qspi_init(void)
+{
+        u16 par;
+        /* setup Port QS for QSPI with gpio CS control */
+        writeb(0x3f, MCF_GPIO_PAR_QSPI);
+        /* make U1CTS and U2RTS gpio for cs_control */
+        par = readw(MCF_GPIO_PAR_UART);
+        par &= 0x00ff;
+        writew(par, MCF_GPIO_PAR_UART);
+}
+#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
+
+
+static struct platform_device *m520x_devices[] __initdata = {
+        &m520x_uart,
+        &m520x_fec,
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        &m520x_qspi,
+#endif
+};
+
+/***************************************************************************/
+
+static void __init m520x_uart_init_line(int line, int irq)
+{
+        u16 par;
+        u8 par2;
+
+        switch (line) {
+        case 0:
+                par = readw(MCF_GPIO_PAR_UART);
+                par |= MCF_GPIO_PAR_UART_PAR_UTXD0 |
+                       MCF_GPIO_PAR_UART_PAR_URXD0;
+                writew(par, MCF_GPIO_PAR_UART);
+                break;
+        case 1:
+                par = readw(MCF_GPIO_PAR_UART);
+                par |= MCF_GPIO_PAR_UART_PAR_UTXD1 |
+                       MCF_GPIO_PAR_UART_PAR_URXD1;
+                writew(par, MCF_GPIO_PAR_UART);
+                break;
+        case 2:
+                par2 = readb(MCF_GPIO_PAR_FECI2C);
+                par2 &= ~0x0F;
+                par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 |
+                        MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2;
+                writeb(par2, MCF_GPIO_PAR_FECI2C);
+                break;
+        }
+}
+
+static void __init m520x_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m520x_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m520x_uart_init_line(line, m520x_uart_platform[line].irq);
+}
+
+/***************************************************************************/
+
+static void __init m520x_fec_init(void)
+{
+        u8 v;
+
+        /* Set multi-function pins to ethernet mode */
+        v = readb(MCF_GPIO_PAR_FEC);
+        writeb(v | 0xf0, MCF_GPIO_PAR_FEC);
+
+        v = readb(MCF_GPIO_PAR_FECI2C);
+        writeb(v | 0x0f, MCF_GPIO_PAR_FECI2C);
+}
+
+/***************************************************************************/
+
+static void m520x_cpu_reset(void)
+{
+        local_irq_disable();
+        __raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+        mach_reset = m520x_cpu_reset;
+        m520x_uarts_init();
+        m520x_fec_init();
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        m520x_qspi_init();
+#endif
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/520x/gpio.c b/arch/m68k/platform/520x/gpio.c
new file mode 100644
index 000000000000..d757328563d1
--- /dev/null
+++ b/arch/m68k/platform/520x/gpio.c
@@ -0,0 +1,211 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PIRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFEPORT_EPDDR,
+                .podr                           = (void __iomem *) MCFEPORT_EPDR,
+                .ppdr                           = (void __iomem *) MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BUSCTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 8,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_BUSCTL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BE",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 16,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_BE,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_BE,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_BE,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_BE,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_BE,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "CS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 25,
+                        .ngpio                  = 3,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_CS,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_CS,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_CS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECI2C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECI2C,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FECI2C,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QSPI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_QSPI,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_QSPI,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_QSPI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMER",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 48,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_TIMER,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_TIMER,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_TIMER,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UART",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 56,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_UART,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_UART,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_UART,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_UART,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_UART,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FECH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FECL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECL,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/523x/Makefile b/arch/m68k/platform/523x/Makefile
new file mode 100644
index 000000000000..c04b8f71c88c
--- /dev/null
+++ b/arch/m68k/platform/523x/Makefile
@@ -0,0 +1,17 @@
+#
+# Makefile for the m68knommu linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs.  You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y := config.o gpio.o
diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c
new file mode 100644
index 000000000000..418a76feb1e3
--- /dev/null
+++ b/arch/m68k/platform/523x/config.c
@@ -0,0 +1,293 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/523x/config.c
+ *
+ *      Sub-architcture dependant initialization code for the Freescale
+ *      523x CPUs.
+ *
+ *      Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
+ *      Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+#include <asm/mcfqspi.h>
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m523x_uart_platform[] = {
+        {
+                .mapbase        = MCFUART_BASE1,
+                .irq            = MCFINT_VECBASE + MCFINT_UART0,
+        },
+        {
+                .mapbase        = MCFUART_BASE2,
+                .irq            = MCFINT_VECBASE + MCFINT_UART0 + 1,
+        },
+        {
+                .mapbase        = MCFUART_BASE3,
+                .irq            = MCFINT_VECBASE + MCFINT_UART0 + 2,
+        },
+        { },
+};
+
+static struct platform_device m523x_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m523x_uart_platform,
+};
+
+static struct resource m523x_fec_resources[] = {
+        {
+                .start          = MCFFEC_BASE,
+                .end            = MCFFEC_BASE + MCFFEC_SIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 23,
+                .end            = 64 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 27,
+                .end            = 64 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 29,
+                .end            = 64 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m523x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m523x_fec_resources),
+        .resource               = m523x_fec_resources,
+};
+
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+static struct resource m523x_qspi_resources[] = {
+        {
+                .start          = MCFQSPI_IOBASE,
+                .end            = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = MCFINT_VECBASE + MCFINT_QSPI,
+                .end            = MCFINT_VECBASE + MCFINT_QSPI,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+#define MCFQSPI_CS0    91
+#define MCFQSPI_CS1    92
+#define MCFQSPI_CS2    103
+#define MCFQSPI_CS3    99
+
+static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control)
+{
+        int status;
+
+        status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
+                goto fail0;
+        }
+        status = gpio_direction_output(MCFQSPI_CS0, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
+                goto fail1;
+        }
+
+        status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
+                goto fail1;
+        }
+        status = gpio_direction_output(MCFQSPI_CS1, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
+                goto fail2;
+        }
+
+        status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
+                goto fail2;
+        }
+        status = gpio_direction_output(MCFQSPI_CS2, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
+                goto fail3;
+        }
+
+        status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
+                goto fail3;
+        }
+        status = gpio_direction_output(MCFQSPI_CS3, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
+                goto fail4;
+        }
+
+        return 0;
+
+fail4:
+        gpio_free(MCFQSPI_CS3);
+fail3:
+        gpio_free(MCFQSPI_CS2);
+fail2:
+        gpio_free(MCFQSPI_CS1);
+fail1:
+        gpio_free(MCFQSPI_CS0);
+fail0:
+        return status;
+}
+
+static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control)
+{
+        gpio_free(MCFQSPI_CS3);
+        gpio_free(MCFQSPI_CS2);
+        gpio_free(MCFQSPI_CS1);
+        gpio_free(MCFQSPI_CS0);
+}
+
+static void m523x_cs_select(struct mcfqspi_cs_control *cs_control,
+                            u8 chip_select, bool cs_high)
+{
+        switch (chip_select) {
+        case 0:
+                gpio_set_value(MCFQSPI_CS0, cs_high);
+                break;
+        case 1:
+                gpio_set_value(MCFQSPI_CS1, cs_high);
+                break;
+        case 2:
+                gpio_set_value(MCFQSPI_CS2, cs_high);
+                break;
+        case 3:
+                gpio_set_value(MCFQSPI_CS3, cs_high);
+                break;
+        }
+}
+
+static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control,
+                              u8 chip_select, bool cs_high)
+{
+        switch (chip_select) {
+        case 0:
+                gpio_set_value(MCFQSPI_CS0, !cs_high);
+                break;
+        case 1:
+                gpio_set_value(MCFQSPI_CS1, !cs_high);
+                break;
+        case 2:
+                gpio_set_value(MCFQSPI_CS2, !cs_high);
+                break;
+        case 3:
+                gpio_set_value(MCFQSPI_CS3, !cs_high);
+                break;
+        }
+}
+
+static struct mcfqspi_cs_control m523x_cs_control = {
+        .setup                  = m523x_cs_setup,
+        .teardown               = m523x_cs_teardown,
+        .select                 = m523x_cs_select,
+        .deselect               = m523x_cs_deselect,
+};
+
+static struct mcfqspi_platform_data m523x_qspi_data = {
+        .bus_num                = 0,
+        .num_chipselect         = 4,
+        .cs_control             = &m523x_cs_control,
+};
+
+static struct platform_device m523x_qspi = {
+        .name                   = "mcfqspi",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m523x_qspi_resources),
+        .resource               = m523x_qspi_resources,
+        .dev.platform_data      = &m523x_qspi_data,
+};
+
+static void __init m523x_qspi_init(void)
+{
+        u16 par;
+
+        /* setup QSPS pins for QSPI with gpio CS control */
+        writeb(0x1f, MCFGPIO_PAR_QSPI);
+        /* and CS2 & CS3 as gpio */
+        par = readw(MCFGPIO_PAR_TIMER);
+        par &= 0x3f3f;
+        writew(par, MCFGPIO_PAR_TIMER);
+}
+#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
+
+static struct platform_device *m523x_devices[] __initdata = {
+        &m523x_uart,
+        &m523x_fec,
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        &m523x_qspi,
+#endif
+};
+
+/***************************************************************************/
+
+static void __init m523x_fec_init(void)
+{
+        u16 par;
+        u8 v;
+
+        /* Set multi-function pins to ethernet use */
+        par = readw(MCF_IPSBAR + 0x100082);
+        writew(par | 0xf00, MCF_IPSBAR + 0x100082);
+        v = readb(MCF_IPSBAR + 0x100078);
+        writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
+}
+
+/***************************************************************************/
+
+static void m523x_cpu_reset(void)
+{
+        local_irq_disable();
+        __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+        mach_reset = m523x_cpu_reset;
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        m523x_fec_init();
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        m523x_qspi_init();
+#endif
+        platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/523x/gpio.c b/arch/m68k/platform/523x/gpio.c
new file mode 100644
index 000000000000..327ebf142c8e
--- /dev/null
+++ b/arch/m68k/platform/523x/gpio.c
@@ -0,0 +1,284 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PIRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 1,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = (void __iomem *) MCFEPORT_EPDDR,
+                .podr                           = (void __iomem *) MCFEPORT_EPDR,
+                .ppdr                           = (void __iomem *) MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "ADDR",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 13,
+                        .ngpio                  = 3,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_ADDR,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_ADDR,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_ADDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "DATAH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 16,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_DATAH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_DATAH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_DATAH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "DATAL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 24,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_DATAL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_DATAL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_DATAL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BUSCTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_BUSCTL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_BS,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_BS,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_BS,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_BS,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_BS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "CS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 49,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_CS,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_CS,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_CS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "SDRAM",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 56,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_SDRAM,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_SDRAM,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECI2C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECI2C,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FECI2C,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 2,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_UARTH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_UARTH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_UARTH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 80,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_UARTL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_UARTL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_UARTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QSPI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 88,
+                        .ngpio                  = 5,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_QSPI,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_QSPI,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_QSPI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMER",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 96,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_TIMER,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_TIMER,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_TIMER,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "ETPU",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 104,
+                        .ngpio                  = 3,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_ETPU,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_ETPU,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_ETPU,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_ETPU,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_ETPU,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5249/Makefile b/arch/m68k/platform/5249/Makefile
new file mode 100644
index 000000000000..4bed30fd0073
--- /dev/null
+++ b/arch/m68k/platform/5249/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for the m68knommu linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs.  You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y := config.o gpio.o intc2.o
+
diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c
new file mode 100644
index 000000000000..ceb31e5744a6
--- /dev/null
+++ b/arch/m68k/platform/5249/config.c
@@ -0,0 +1,330 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/5249/config.c
+ *
+ *      Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+#include <asm/mcfqspi.h>
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m5249_uart_platform[] = {
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE1,
+                .irq            = 73,
+        },
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE2,
+                .irq            = 74,
+        },
+        { },
+};
+
+static struct platform_device m5249_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m5249_uart_platform,
+};
+
+#ifdef CONFIG_M5249C3
+
+static struct resource m5249_smc91x_resources[] = {
+        {
+                .start          = 0xe0000300,
+                .end            = 0xe0000300 + 0x100,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = MCFINTC2_GPIOIRQ6,
+                .end            = MCFINTC2_GPIOIRQ6,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m5249_smc91x = {
+        .name                   = "smc91x",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m5249_smc91x_resources),
+        .resource               = m5249_smc91x_resources,
+};
+
+#endif /* CONFIG_M5249C3 */
+
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+static struct resource m5249_qspi_resources[] = {
+        {
+                .start          = MCFQSPI_IOBASE,
+                .end            = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = MCF_IRQ_QSPI,
+                .end            = MCF_IRQ_QSPI,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+#define MCFQSPI_CS0    29
+#define MCFQSPI_CS1    24
+#define MCFQSPI_CS2    21
+#define MCFQSPI_CS3    22
+
+static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control)
+{
+        int status;
+
+        status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
+                goto fail0;
+        }
+        status = gpio_direction_output(MCFQSPI_CS0, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
+                goto fail1;
+        }
+
+        status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
+                goto fail1;
+        }
+        status = gpio_direction_output(MCFQSPI_CS1, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
+                goto fail2;
+        }
+
+        status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
+                goto fail2;
+        }
+        status = gpio_direction_output(MCFQSPI_CS2, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
+                goto fail3;
+        }
+
+        status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
+                goto fail3;
+        }
+        status = gpio_direction_output(MCFQSPI_CS3, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
+                goto fail4;
+        }
+
+        return 0;
+
+fail4:
+        gpio_free(MCFQSPI_CS3);
+fail3:
+        gpio_free(MCFQSPI_CS2);
+fail2:
+        gpio_free(MCFQSPI_CS1);
+fail1:
+        gpio_free(MCFQSPI_CS0);
+fail0:
+        return status;
+}
+
+static void m5249_cs_teardown(struct mcfqspi_cs_control *cs_control)
+{
+        gpio_free(MCFQSPI_CS3);
+        gpio_free(MCFQSPI_CS2);
+        gpio_free(MCFQSPI_CS1);
+        gpio_free(MCFQSPI_CS0);
+}
+
+static void m5249_cs_select(struct mcfqspi_cs_control *cs_control,
+                            u8 chip_select, bool cs_high)
+{
+        switch (chip_select) {
+        case 0:
+                gpio_set_value(MCFQSPI_CS0, cs_high);
+                break;
+        case 1:
+                gpio_set_value(MCFQSPI_CS1, cs_high);
+                break;
+        case 2:
+                gpio_set_value(MCFQSPI_CS2, cs_high);
+                break;
+        case 3:
+                gpio_set_value(MCFQSPI_CS3, cs_high);
+                break;
+        }
+}
+
+static void m5249_cs_deselect(struct mcfqspi_cs_control *cs_control,
+                              u8 chip_select, bool cs_high)
+{
+        switch (chip_select) {
+        case 0:
+                gpio_set_value(MCFQSPI_CS0, !cs_high);
+                break;
+        case 1:
+                gpio_set_value(MCFQSPI_CS1, !cs_high);
+                break;
+        case 2:
+                gpio_set_value(MCFQSPI_CS2, !cs_high);
+                break;
+        case 3:
+                gpio_set_value(MCFQSPI_CS3, !cs_high);
+                break;
+        }
+}
+
+static struct mcfqspi_cs_control m5249_cs_control = {
+        .setup                  = m5249_cs_setup,
+        .teardown               = m5249_cs_teardown,
+        .select                 = m5249_cs_select,
+        .deselect               = m5249_cs_deselect,
+};
+
+static struct mcfqspi_platform_data m5249_qspi_data = {
+        .bus_num                = 0,
+        .num_chipselect         = 4,
+        .cs_control             = &m5249_cs_control,
+};
+
+static struct platform_device m5249_qspi = {
+        .name                   = "mcfqspi",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m5249_qspi_resources),
+        .resource               = m5249_qspi_resources,
+        .dev.platform_data      = &m5249_qspi_data,
+};
+
+static void __init m5249_qspi_init(void)
+{
+        /* QSPI irq setup */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0,
+               MCF_MBAR + MCFSIM_QSPIICR);
+        mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
+}
+#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
+
+
+static struct platform_device *m5249_devices[] __initdata = {
+        &m5249_uart,
+#ifdef CONFIG_M5249C3
+        &m5249_smc91x,
+#endif
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        &m5249_qspi,
+#endif
+};
+
+/***************************************************************************/
+
+static void __init m5249_uart_init_line(int line, int irq)
+{
+        if (line == 0) {
+                writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
+                writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
+                mcf_mapirq2imr(irq, MCFINTC_UART0);
+        } else if (line == 1) {
+                writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
+                writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
+                mcf_mapirq2imr(irq, MCFINTC_UART1);
+        }
+}
+
+static void __init m5249_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m5249_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m5249_uart_init_line(line, m5249_uart_platform[line].irq);
+}
+
+/***************************************************************************/
+
+#ifdef CONFIG_M5249C3
+
+static void __init m5249_smc91x_init(void)
+{
+        u32  gpio;
+
+        /* Set the GPIO line as interrupt source for smc91x device */
+        gpio = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
+        writel(gpio | 0x40, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
+
+        gpio = readl(MCF_MBAR2 + MCFSIM2_INTLEVEL5);
+        writel(gpio | 0x04000000, MCF_MBAR2 + MCFSIM2_INTLEVEL5);
+}
+
+#endif /* CONFIG_M5249C3 */
+
+/***************************************************************************/
+
+static void __init m5249_timers_init(void)
+{
+        /* Timer1 is always used as system timer */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER1ICR);
+        mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+        /* Timer2 is to be used as a high speed profile timer  */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER2ICR);
+        mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
+}
+
+/***************************************************************************/
+
+void m5249_cpu_reset(void)
+{
+        local_irq_disable();
+        /* Set watchdog to soft reset, and enabled */
+        __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+        mach_reset = m5249_cpu_reset;
+        m5249_timers_init();
+        m5249_uarts_init();
+#ifdef CONFIG_M5249C3
+        m5249_smc91x_init();
+#endif
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        m5249_qspi_init();
+#endif
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/5249/gpio.c b/arch/m68k/platform/5249/gpio.c
new file mode 100644
index 000000000000..2b56c6ef65bf
--- /dev/null
+++ b/arch/m68k/platform/5249/gpio.c
@@ -0,0 +1,65 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "GPIO0",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 32,
+                },
+                .pddr                           = (void __iomem *) MCFSIM2_GPIOENABLE,
+                .podr                           = (void __iomem *) MCFSIM2_GPIOWRITE,
+                .ppdr                           = (void __iomem *) MCFSIM2_GPIOREAD,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "GPIO1",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 32,
+                        .ngpio                  = 32,
+                },
+                .pddr                           = (void __iomem *) MCFSIM2_GPIO1ENABLE,
+                .podr                           = (void __iomem *) MCFSIM2_GPIO1WRITE,
+                .ppdr                           = (void __iomem *) MCFSIM2_GPIO1READ,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5249/intc2.c b/arch/m68k/platform/5249/intc2.c
new file mode 100644
index 000000000000..8f4b63e17366
--- /dev/null
+++ b/arch/m68k/platform/5249/intc2.c
@@ -0,0 +1,61 @@
+/*
+ * intc2.c  -- support for the 2nd INTC controller of the 5249
+ *
+ * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+static void intc2_irq_gpio_mask(struct irq_data *d)
+{
+        u32 imr;
+        imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
+        imr &= ~(0x1 << (d->irq - MCFINTC2_GPIOIRQ0));
+        writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
+}
+
+static void intc2_irq_gpio_unmask(struct irq_data *d)
+{
+        u32 imr;
+        imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
+        imr |= (0x1 << (d->irq - MCFINTC2_GPIOIRQ0));
+        writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
+}
+
+static void intc2_irq_gpio_ack(struct irq_data *d)
+{
+        writel(0x1 << (d->irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR);
+}
+
+static struct irq_chip intc2_irq_gpio_chip = {
+        .name           = "CF-INTC2",
+        .irq_mask       = intc2_irq_gpio_mask,
+        .irq_unmask     = intc2_irq_gpio_unmask,
+        .irq_ack        = intc2_irq_gpio_ack,
+};
+
+static int __init mcf_intc2_init(void)
+{
+        int irq;
+
+        /* GPIO interrupt sources */
+        for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) {
+                set_irq_chip(irq, &intc2_irq_gpio_chip);
+                set_irq_handler(irq, handle_edge_irq);
+        }
+
+        return 0;
+}
+
+arch_initcall(mcf_intc2_init);
diff --git a/arch/m68k/platform/5272/Makefile b/arch/m68k/platform/5272/Makefile
new file mode 100644
index 000000000000..34110fc14301
--- /dev/null
+++ b/arch/m68k/platform/5272/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for the linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs.  You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y := config.o gpio.o intc.o
+
diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/5272/config.c
new file mode 100644
index 000000000000..65bb582734e1
--- /dev/null
+++ b/arch/m68k/platform/5272/config.c
@@ -0,0 +1,176 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/5272/config.c
+ *
+ *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
+ *      Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/phy.h>
+#include <linux/phy_fixed.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+
+/***************************************************************************/
+
+/*
+ *      Some platforms need software versions of the GPIO data registers.
+ */
+unsigned short ppdata;
+unsigned char ledbank = 0xff;
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m5272_uart_platform[] = {
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE1,
+                .irq            = MCF_IRQ_UART1,
+        },
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE2,
+                .irq            = MCF_IRQ_UART2,
+        },
+        { },
+};
+
+static struct platform_device m5272_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m5272_uart_platform,
+};
+
+static struct resource m5272_fec_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x840,
+                .end            = MCF_MBAR + 0x840 + 0x1cf,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = MCF_IRQ_ERX,
+                .end            = MCF_IRQ_ERX,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = MCF_IRQ_ETX,
+                .end            = MCF_IRQ_ETX,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = MCF_IRQ_ENTC,
+                .end            = MCF_IRQ_ENTC,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m5272_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m5272_fec_resources),
+        .resource               = m5272_fec_resources,
+};
+
+static struct platform_device *m5272_devices[] __initdata = {
+        &m5272_uart,
+        &m5272_fec,
+};
+
+/***************************************************************************/
+
+static void __init m5272_uart_init_line(int line, int irq)
+{
+        u32 v;
+
+        if ((line >= 0) && (line < 2)) {
+                /* Enable the output lines for the serial ports */
+                v = readl(MCF_MBAR + MCFSIM_PBCNT);
+                v = (v & ~0x000000ff) | 0x00000055;
+                writel(v, MCF_MBAR + MCFSIM_PBCNT);
+
+                v = readl(MCF_MBAR + MCFSIM_PDCNT);
+                v = (v & ~0x000003fc) | 0x000002a8;
+                writel(v, MCF_MBAR + MCFSIM_PDCNT);
+        }
+}
+
+static void __init m5272_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m5272_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m5272_uart_init_line(line, m5272_uart_platform[line].irq);
+}
+
+/***************************************************************************/
+
+static void m5272_cpu_reset(void)
+{
+        local_irq_disable();
+        /* Set watchdog to reset, and enabled */
+        __raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
+        __raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
+        __raw_writew(0, MCF_MBAR + MCFSIM_WCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+#if defined (CONFIG_MOD5272)
+        volatile unsigned char  *pivrp;
+
+        /* Set base of device vectors to be 64 */
+        pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR);
+        *pivrp = 0x40;
+#endif
+
+#if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
+        /* Copy command line from FLASH to local buffer... */
+        memcpy(commandp, (char *) 0xf0004000, size);
+        commandp[size-1] = 0;
+#elif defined(CONFIG_CANCam)
+        /* Copy command line from FLASH to local buffer... */
+        memcpy(commandp, (char *) 0xf0010000, size);
+        commandp[size-1] = 0;
+#endif
+
+        mach_reset = m5272_cpu_reset;
+}
+
+/***************************************************************************/
+
+/*
+ * Some 5272 based boards have the FEC ethernet diectly connected to
+ * an ethernet switch. In this case we need to use the fixed phy type,
+ * and we need to declare it early in boot.
+ */
+static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
+        .link   = 1,
+        .speed  = 100,
+        .duplex = 0,
+};
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        m5272_uarts_init();
+        fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status);
+        platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/5272/gpio.c b/arch/m68k/platform/5272/gpio.c
new file mode 100644
index 000000000000..57ac10a5d7f7
--- /dev/null
+++ b/arch/m68k/platform/5272/gpio.c
@@ -0,0 +1,81 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PA",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 16,
+                },
+                .pddr                           = (void __iomem *) MCFSIM_PADDR,
+                .podr                           = (void __iomem *) MCFSIM_PADAT,
+                .ppdr                           = (void __iomem *) MCFSIM_PADAT,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "PB",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 16,
+                        .ngpio                  = 16,
+                },
+                .pddr                           = (void __iomem *) MCFSIM_PBDDR,
+                .podr                           = (void __iomem *) MCFSIM_PBDAT,
+                .ppdr                           = (void __iomem *) MCFSIM_PBDAT,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "PC",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 32,
+                        .ngpio                  = 16,
+                },
+                .pddr                           = (void __iomem *) MCFSIM_PCDDR,
+                .podr                           = (void __iomem *) MCFSIM_PCDAT,
+                .ppdr                           = (void __iomem *) MCFSIM_PCDAT,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5272/intc.c b/arch/m68k/platform/5272/intc.c
new file mode 100644
index 000000000000..969ff0a467c6
--- /dev/null
+++ b/arch/m68k/platform/5272/intc.c
@@ -0,0 +1,187 @@
+/*
+ * intc.c  --  interrupt controller or ColdFire 5272 SoC
+ *
+ * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/traps.h>
+
+/*
+ * The 5272 ColdFire interrupt controller is nothing like any other
+ * ColdFire interrupt controller - it truly is completely different.
+ * Given its age it is unlikely to be used on any other ColdFire CPU.
+ */
+
+/*
+ * The masking and priproty setting of interrupts on the 5272 is done
+ * via a set of 4 "Interrupt Controller Registers" (ICR). There is a
+ * loose mapping of vector number to register and internal bits, but
+ * a table is the easiest and quickest way to map them.
+ *
+ * Note that the external interrupts are edge triggered (unlike the
+ * internal interrupt sources which are level triggered). Which means
+ * they also need acknowledgeing via acknowledge bits.
+ */
+struct irqmap {
+        unsigned char   icr;
+        unsigned char   index;
+        unsigned char   ack;
+};
+
+static struct irqmap intc_irqmap[MCFINT_VECMAX - MCFINT_VECBASE] = {
+        /*MCF_IRQ_SPURIOUS*/    { .icr = 0,           .index = 0,  .ack = 0, },
+        /*MCF_IRQ_EINT1*/       { .icr = MCFSIM_ICR1, .index = 28, .ack = 1, },
+        /*MCF_IRQ_EINT2*/       { .icr = MCFSIM_ICR1, .index = 24, .ack = 1, },
+        /*MCF_IRQ_EINT3*/       { .icr = MCFSIM_ICR1, .index = 20, .ack = 1, },
+        /*MCF_IRQ_EINT4*/       { .icr = MCFSIM_ICR1, .index = 16, .ack = 1, },
+        /*MCF_IRQ_TIMER1*/      { .icr = MCFSIM_ICR1, .index = 12, .ack = 0, },
+        /*MCF_IRQ_TIMER2*/      { .icr = MCFSIM_ICR1, .index = 8,  .ack = 0, },
+        /*MCF_IRQ_TIMER3*/      { .icr = MCFSIM_ICR1, .index = 4,  .ack = 0, },
+        /*MCF_IRQ_TIMER4*/      { .icr = MCFSIM_ICR1, .index = 0,  .ack = 0, },
+        /*MCF_IRQ_UART1*/       { .icr = MCFSIM_ICR2, .index = 28, .ack = 0, },
+        /*MCF_IRQ_UART2*/       { .icr = MCFSIM_ICR2, .index = 24, .ack = 0, },
+        /*MCF_IRQ_PLIP*/        { .icr = MCFSIM_ICR2, .index = 20, .ack = 0, },
+        /*MCF_IRQ_PLIA*/        { .icr = MCFSIM_ICR2, .index = 16, .ack = 0, },
+        /*MCF_IRQ_USB0*/        { .icr = MCFSIM_ICR2, .index = 12, .ack = 0, },
+        /*MCF_IRQ_USB1*/        { .icr = MCFSIM_ICR2, .index = 8,  .ack = 0, },
+        /*MCF_IRQ_USB2*/        { .icr = MCFSIM_ICR2, .index = 4,  .ack = 0, },
+        /*MCF_IRQ_USB3*/        { .icr = MCFSIM_ICR2, .index = 0,  .ack = 0, },
+        /*MCF_IRQ_USB4*/        { .icr = MCFSIM_ICR3, .index = 28, .ack = 0, },
+        /*MCF_IRQ_USB5*/        { .icr = MCFSIM_ICR3, .index = 24, .ack = 0, },
+        /*MCF_IRQ_USB6*/        { .icr = MCFSIM_ICR3, .index = 20, .ack = 0, },
+        /*MCF_IRQ_USB7*/        { .icr = MCFSIM_ICR3, .index = 16, .ack = 0, },
+        /*MCF_IRQ_DMA*/         { .icr = MCFSIM_ICR3, .index = 12, .ack = 0, },
+        /*MCF_IRQ_ERX*/         { .icr = MCFSIM_ICR3, .index = 8,  .ack = 0, },
+        /*MCF_IRQ_ETX*/         { .icr = MCFSIM_ICR3, .index = 4,  .ack = 0, },
+        /*MCF_IRQ_ENTC*/        { .icr = MCFSIM_ICR3, .index = 0,  .ack = 0, },
+        /*MCF_IRQ_QSPI*/        { .icr = MCFSIM_ICR4, .index = 28, .ack = 0, },
+        /*MCF_IRQ_EINT5*/       { .icr = MCFSIM_ICR4, .index = 24, .ack = 1, },
+        /*MCF_IRQ_EINT6*/       { .icr = MCFSIM_ICR4, .index = 20, .ack = 1, },
+        /*MCF_IRQ_SWTO*/        { .icr = MCFSIM_ICR4, .index = 16, .ack = 0, },
+};
+
+/*
+ * The act of masking the interrupt also has a side effect of 'ack'ing
+ * an interrupt on this irq (for the external irqs). So this mask function
+ * is also an ack_mask function.
+ */
+static void intc_irq_mask(struct irq_data *d)
+{
+        unsigned int irq = d->irq;
+
+        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
+                u32 v;
+                irq -= MCFINT_VECBASE;
+                v = 0x8 << intc_irqmap[irq].index;
+                writel(v, MCF_MBAR + intc_irqmap[irq].icr);
+        }
+}
+
+static void intc_irq_unmask(struct irq_data *d)
+{
+        unsigned int irq = d->irq;
+
+        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
+                u32 v;
+                irq -= MCFINT_VECBASE;
+                v = 0xd << intc_irqmap[irq].index;
+                writel(v, MCF_MBAR + intc_irqmap[irq].icr);
+        }
+}
+
+static void intc_irq_ack(struct irq_data *d)
+{
+        unsigned int irq = d->irq;
+
+        /* Only external interrupts are acked */
+        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
+                irq -= MCFINT_VECBASE;
+                if (intc_irqmap[irq].ack) {
+                        u32 v;
+                        v = readl(MCF_MBAR + intc_irqmap[irq].icr);
+                        v &= (0x7 << intc_irqmap[irq].index);
+                        v |= (0x8 << intc_irqmap[irq].index);
+                        writel(v, MCF_MBAR + intc_irqmap[irq].icr);
+                }
+        }
+}
+
+static int intc_irq_set_type(struct irq_data *d, unsigned int type)
+{
+        unsigned int irq = d->irq;
+
+        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
+                irq -= MCFINT_VECBASE;
+                if (intc_irqmap[irq].ack) {
+                        u32 v;
+                        v = readl(MCF_MBAR + MCFSIM_PITR);
+                        if (type == IRQ_TYPE_EDGE_FALLING)
+                                v &= ~(0x1 << (32 - irq));
+                        else
+                                v |= (0x1 << (32 - irq));
+                        writel(v, MCF_MBAR + MCFSIM_PITR);
+                }
+        }
+        return 0;
+}
+
+/*
+ * Simple flow handler to deal with the external edge triggered interrupts.
+ * We need to be careful with the masking/acking due to the side effects
+ * of masking an interrupt.
+ */
+static void intc_external_irq(unsigned int irq, struct irq_desc *desc)
+{
+        get_irq_desc_chip(desc)->irq_ack(&desc->irq_data);
+        handle_simple_irq(irq, desc);
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "CF-INTC",
+        .irq_mask       = intc_irq_mask,
+        .irq_unmask     = intc_irq_unmask,
+        .irq_mask_ack   = intc_irq_mask,
+        .irq_ack        = intc_irq_ack,
+        .irq_set_type   = intc_irq_set_type,
+};
+
+void __init init_IRQ(void)
+{
+        int irq, edge;
+
+        init_vectors();
+
+        /* Mask all interrupt sources */
+        writel(0x88888888, MCF_MBAR + MCFSIM_ICR1);
+        writel(0x88888888, MCF_MBAR + MCFSIM_ICR2);
+        writel(0x88888888, MCF_MBAR + MCFSIM_ICR3);
+        writel(0x88888888, MCF_MBAR + MCFSIM_ICR4);
+
+        for (irq = 0; (irq < NR_IRQS); irq++) {
+                set_irq_chip(irq, &intc_irq_chip);
+                edge = 0;
+                if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX))
+                        edge = intc_irqmap[irq - MCFINT_VECBASE].ack;
+                if (edge) {
+                        set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
+                        set_irq_handler(irq, intc_external_irq);
+                } else {
+                        set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
+                        set_irq_handler(irq, handle_level_irq);
+                }
+        }
+}
+
diff --git a/arch/m68k/platform/527x/Makefile b/arch/m68k/platform/527x/Makefile
new file mode 100644
index 000000000000..6ac4b57370ea
--- /dev/null
+++ b/arch/m68k/platform/527x/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for the linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs.  You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y := config.o gpio.o
+
diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c
new file mode 100644
index 000000000000..fa359593b613
--- /dev/null
+++ b/arch/m68k/platform/527x/config.c
@@ -0,0 +1,384 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/527x/config.c
+ *
+ *      Sub-architcture dependant initialization code for the Freescale
+ *      5270/5271 CPUs.
+ *
+ *      Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com)
+ *      Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+#include <asm/mcfqspi.h>
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m527x_uart_platform[] = {
+        {
+                .mapbase        = MCFUART_BASE1,
+                .irq            = MCFINT_VECBASE + MCFINT_UART0,
+        },
+        {
+                .mapbase        = MCFUART_BASE2,
+                .irq            = MCFINT_VECBASE + MCFINT_UART1,
+        },
+        {
+                .mapbase        = MCFUART_BASE3,
+                .irq            = MCFINT_VECBASE + MCFINT_UART2,
+        },
+        { },
+};
+
+static struct platform_device m527x_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m527x_uart_platform,
+};
+
+static struct resource m527x_fec0_resources[] = {
+        {
+                .start          = MCFFEC_BASE0,
+                .end            = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 23,
+                .end            = 64 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 27,
+                .end            = 64 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 29,
+                .end            = 64 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct resource m527x_fec1_resources[] = {
+        {
+                .start          = MCFFEC_BASE1,
+                .end            = MCFFEC_BASE1 + MCFFEC_SIZE1 - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 128 + 23,
+                .end            = 128 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 128 + 27,
+                .end            = 128 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 128 + 29,
+                .end            = 128 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m527x_fec[] = {
+        {
+                .name           = "fec",
+                .id             = 0,
+                .num_resources  = ARRAY_SIZE(m527x_fec0_resources),
+                .resource       = m527x_fec0_resources,
+        },
+        {
+                .name           = "fec",
+                .id             = 1,
+                .num_resources  = ARRAY_SIZE(m527x_fec1_resources),
+                .resource       = m527x_fec1_resources,
+        },
+};
+
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+static struct resource m527x_qspi_resources[] = {
+        {
+                .start          = MCFQSPI_IOBASE,
+                .end            = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = MCFINT_VECBASE + MCFINT_QSPI,
+                .end            = MCFINT_VECBASE + MCFINT_QSPI,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+#if defined(CONFIG_M5271)
+#define MCFQSPI_CS0    91
+#define MCFQSPI_CS1    92
+#define MCFQSPI_CS2    99
+#define MCFQSPI_CS3    103
+#elif defined(CONFIG_M5275)
+#define MCFQSPI_CS0    59
+#define MCFQSPI_CS1    60
+#define MCFQSPI_CS2    61
+#define MCFQSPI_CS3    62
+#endif
+
+static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control)
+{
+        int status;
+
+        status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
+                goto fail0;
+        }
+        status = gpio_direction_output(MCFQSPI_CS0, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
+                goto fail1;
+        }
+
+        status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
+                goto fail1;
+        }
+        status = gpio_direction_output(MCFQSPI_CS1, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
+                goto fail2;
+        }
+
+        status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
+                goto fail2;
+        }
+        status = gpio_direction_output(MCFQSPI_CS2, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
+                goto fail3;
+        }
+
+        status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
+                goto fail3;
+        }
+        status = gpio_direction_output(MCFQSPI_CS3, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
+                goto fail4;
+        }
+
+        return 0;
+
+fail4:
+        gpio_free(MCFQSPI_CS3);
+fail3:
+        gpio_free(MCFQSPI_CS2);
+fail2:
+        gpio_free(MCFQSPI_CS1);
+fail1:
+        gpio_free(MCFQSPI_CS0);
+fail0:
+        return status;
+}
+
+static void m527x_cs_teardown(struct mcfqspi_cs_control *cs_control)
+{
+        gpio_free(MCFQSPI_CS3);
+        gpio_free(MCFQSPI_CS2);
+        gpio_free(MCFQSPI_CS1);
+        gpio_free(MCFQSPI_CS0);
+}
+
+static void m527x_cs_select(struct mcfqspi_cs_control *cs_control,
+                            u8 chip_select, bool cs_high)
+{
+        switch (chip_select) {
+        case 0:
+                gpio_set_value(MCFQSPI_CS0, cs_high);
+                break;
+        case 1:
+                gpio_set_value(MCFQSPI_CS1, cs_high);
+                break;
+        case 2:
+                gpio_set_value(MCFQSPI_CS2, cs_high);
+                break;
+        case 3:
+                gpio_set_value(MCFQSPI_CS3, cs_high);
+                break;
+        }
+}
+
+static void m527x_cs_deselect(struct mcfqspi_cs_control *cs_control,
+                              u8 chip_select, bool cs_high)
+{
+        switch (chip_select) {
+        case 0:
+                gpio_set_value(MCFQSPI_CS0, !cs_high);
+                break;
+        case 1:
+                gpio_set_value(MCFQSPI_CS1, !cs_high);
+                break;
+        case 2:
+                gpio_set_value(MCFQSPI_CS2, !cs_high);
+                break;
+        case 3:
+                gpio_set_value(MCFQSPI_CS3, !cs_high);
+                break;
+        }
+}
+
+static struct mcfqspi_cs_control m527x_cs_control = {
+        .setup                  = m527x_cs_setup,
+        .teardown               = m527x_cs_teardown,
+        .select                 = m527x_cs_select,
+        .deselect               = m527x_cs_deselect,
+};
+
+static struct mcfqspi_platform_data m527x_qspi_data = {
+        .bus_num                = 0,
+        .num_chipselect         = 4,
+        .cs_control             = &m527x_cs_control,
+};
+
+static struct platform_device m527x_qspi = {
+        .name                   = "mcfqspi",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m527x_qspi_resources),
+        .resource               = m527x_qspi_resources,
+        .dev.platform_data      = &m527x_qspi_data,
+};
+
+static void __init m527x_qspi_init(void)
+{
+#if defined(CONFIG_M5271)
+        u16 par;
+
+        /* setup QSPS pins for QSPI with gpio CS control */
+        writeb(0x1f, MCFGPIO_PAR_QSPI);
+        /* and CS2 & CS3 as gpio */
+        par = readw(MCFGPIO_PAR_TIMER);
+        par &= 0x3f3f;
+        writew(par, MCFGPIO_PAR_TIMER);
+#elif defined(CONFIG_M5275)
+        /* setup QSPS pins for QSPI with gpio CS control */
+        writew(0x003e, MCFGPIO_PAR_QSPI);
+#endif
+}
+#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
+
+static struct platform_device *m527x_devices[] __initdata = {
+        &m527x_uart,
+        &m527x_fec[0],
+#ifdef CONFIG_FEC2
+        &m527x_fec[1],
+#endif
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        &m527x_qspi,
+#endif
+};
+
+/***************************************************************************/
+
+static void __init m527x_uart_init_line(int line, int irq)
+{
+        u16 sepmask;
+
+        if ((line < 0) || (line > 2))
+                return;
+
+        /*
+         * External Pin Mask Setting & Enable External Pin for Interface
+         */
+        sepmask = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
+        if (line == 0)
+                sepmask |= UART0_ENABLE_MASK;
+        else if (line == 1)
+                sepmask |= UART1_ENABLE_MASK;
+        else if (line == 2)
+                sepmask |= UART2_ENABLE_MASK;
+        writew(sepmask, MCF_IPSBAR + MCF_GPIO_PAR_UART);
+}
+
+static void __init m527x_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m527x_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m527x_uart_init_line(line, m527x_uart_platform[line].irq);
+}
+
+/***************************************************************************/
+
+static void __init m527x_fec_init(void)
+{
+        u16 par;
+        u8 v;
+
+        /* Set multi-function pins to ethernet mode for fec0 */
+#if defined(CONFIG_M5271)
+        v = readb(MCF_IPSBAR + 0x100047);
+        writeb(v | 0xf0, MCF_IPSBAR + 0x100047);
+#else
+        par = readw(MCF_IPSBAR + 0x100082);
+        writew(par | 0xf00, MCF_IPSBAR + 0x100082);
+        v = readb(MCF_IPSBAR + 0x100078);
+        writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
+#endif
+
+#ifdef CONFIG_FEC2
+        /* Set multi-function pins to ethernet mode for fec1 */
+        par = readw(MCF_IPSBAR + 0x100082);
+        writew(par | 0xa0, MCF_IPSBAR + 0x100082);
+        v = readb(MCF_IPSBAR + 0x100079);
+        writeb(v | 0xc0, MCF_IPSBAR + 0x100079);
+#endif
+}
+
+/***************************************************************************/
+
+static void m527x_cpu_reset(void)
+{
+        local_irq_disable();
+        __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+        mach_reset = m527x_cpu_reset;
+        m527x_uarts_init();
+        m527x_fec_init();
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        m527x_qspi_init();
+#endif
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/527x/gpio.c b/arch/m68k/platform/527x/gpio.c
new file mode 100644
index 000000000000..205da0aa0f2d
--- /dev/null
+++ b/arch/m68k/platform/527x/gpio.c
@@ -0,0 +1,609 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+#if defined(CONFIG_M5271)
+        {
+                .gpio_chip                      = {
+                        .label                  = "PIRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 1,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = (void __iomem *) MCFEPORT_EPDDR,
+                .podr                           = (void __iomem *) MCFEPORT_EPDR,
+                .ppdr                           = (void __iomem *) MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "ADDR",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 13,
+                        .ngpio                  = 3,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_ADDR,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_ADDR,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_ADDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "DATAH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 16,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_DATAH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_DATAH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_DATAH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "DATAL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 24,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_DATAL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_DATAL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_DATAL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BUSCTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_BUSCTL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_BS,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_BS,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_BS,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_BS,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_BS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "CS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 49,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_CS,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_CS,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_CS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "SDRAM",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 56,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_SDRAM,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_SDRAM,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECI2C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECI2C,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FECI2C,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 2,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_UARTH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_UARTH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_UARTH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 80,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_UARTL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_UARTL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_UARTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QSPI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 88,
+                        .ngpio                  = 5,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_QSPI,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_QSPI,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_QSPI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMER",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 96,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_TIMER,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_TIMER,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_TIMER,
+        },
+#elif defined(CONFIG_M5275)
+        {
+                .gpio_chip                      = {
+                        .label                  = "PIRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 1,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = (void __iomem *) MCFEPORT_EPDDR,
+                .podr                           = (void __iomem *) MCFEPORT_EPDR,
+                .ppdr                           = (void __iomem *) MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BUSCTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 8,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_BUSCTL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "ADDR",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 21,
+                        .ngpio                  = 3,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_ADDR,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_ADDR,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_ADDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "CS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 25,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_CS,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_CS,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_CS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FEC0H",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FEC0H,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FEC0H,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FEC0H,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FEC0H,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FEC0H,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FEC0L",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FEC0L,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FEC0L,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FEC0L,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FEC0L,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FEC0L,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECI2C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 48,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECI2C,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FECI2C,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QSPI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 56,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_QSPI,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_QSPI,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_QSPI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "SDRAM",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_SDRAM,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_SDRAM,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMERH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_TIMERH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_TIMERH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMERH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMERH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_TIMERH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMERL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 80,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_TIMERL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_TIMERL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMERL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMERL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_TIMERL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 88,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_UARTL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_UARTL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_UARTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FEC1H",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 96,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FEC1H,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FEC1H,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FEC1H,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FEC1H,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FEC1H,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FEC1L",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 104,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FEC1L,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FEC1L,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FEC1L,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FEC1L,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FEC1L,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 114,
+                        .ngpio                  = 2,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_BS,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_BS,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_BS,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_BS,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_BS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "IRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 121,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_IRQ,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_IRQ,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_IRQ,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_IRQ,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_IRQ,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "USBH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 128,
+                        .ngpio                  = 1,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_USBH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_USBH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_USBH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_USBH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_USBH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "USBL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 136,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_USBL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_USBL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_USBL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_USBL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_USBL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 144,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_UARTH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_UARTH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_UARTH,
+        },
+#endif
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/528x/Makefile b/arch/m68k/platform/528x/Makefile
new file mode 100644
index 000000000000..6ac4b57370ea
--- /dev/null
+++ b/arch/m68k/platform/528x/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for the linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs.  You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y := config.o gpio.o
+
diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c
new file mode 100644
index 000000000000..ac39fc661219
--- /dev/null
+++ b/arch/m68k/platform/528x/config.c
@@ -0,0 +1,320 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/528x/config.c
+ *
+ *      Sub-architcture dependant initialization code for the Freescale
+ *      5280, 5281 and 5282 CPUs.
+ *
+ *      Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
+ *      Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+#include <asm/mcfqspi.h>
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m528x_uart_platform[] = {
+        {
+                .mapbase        = MCFUART_BASE1,
+                .irq            = MCFINT_VECBASE + MCFINT_UART0,
+        },
+        {
+                .mapbase        = MCFUART_BASE2,
+                .irq            = MCFINT_VECBASE + MCFINT_UART0 + 1,
+        },
+        {
+                .mapbase        = MCFUART_BASE3,
+                .irq            = MCFINT_VECBASE + MCFINT_UART0 + 2,
+        },
+        { },
+};
+
+static struct platform_device m528x_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m528x_uart_platform,
+};
+
+static struct resource m528x_fec_resources[] = {
+        {
+                .start          = MCFFEC_BASE,
+                .end            = MCFFEC_BASE + MCFFEC_SIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 23,
+                .end            = 64 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 27,
+                .end            = 64 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 29,
+                .end            = 64 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m528x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m528x_fec_resources),
+        .resource               = m528x_fec_resources,
+};
+
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+static struct resource m528x_qspi_resources[] = {
+        {
+                .start          = MCFQSPI_IOBASE,
+                .end            = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = MCFINT_VECBASE + MCFINT_QSPI,
+                .end            = MCFINT_VECBASE + MCFINT_QSPI,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+#define MCFQSPI_CS0    147
+#define MCFQSPI_CS1    148
+#define MCFQSPI_CS2    149
+#define MCFQSPI_CS3    150
+
+static int m528x_cs_setup(struct mcfqspi_cs_control *cs_control)
+{
+        int status;
+
+        status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
+                goto fail0;
+        }
+        status = gpio_direction_output(MCFQSPI_CS0, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
+                goto fail1;
+        }
+
+        status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
+                goto fail1;
+        }
+        status = gpio_direction_output(MCFQSPI_CS1, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
+                goto fail2;
+        }
+
+        status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
+                goto fail2;
+        }
+        status = gpio_direction_output(MCFQSPI_CS2, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
+                goto fail3;
+        }
+
+        status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
+                goto fail3;
+        }
+        status = gpio_direction_output(MCFQSPI_CS3, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
+                goto fail4;
+        }
+
+        return 0;
+
+fail4:
+        gpio_free(MCFQSPI_CS3);
+fail3:
+        gpio_free(MCFQSPI_CS2);
+fail2:
+        gpio_free(MCFQSPI_CS1);
+fail1:
+        gpio_free(MCFQSPI_CS0);
+fail0:
+        return status;
+}
+
+static void m528x_cs_teardown(struct mcfqspi_cs_control *cs_control)
+{
+        gpio_free(MCFQSPI_CS3);
+        gpio_free(MCFQSPI_CS2);
+        gpio_free(MCFQSPI_CS1);
+        gpio_free(MCFQSPI_CS0);
+}
+
+static void m528x_cs_select(struct mcfqspi_cs_control *cs_control,
+                            u8 chip_select, bool cs_high)
+{
+        gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high);
+}
+
+static void m528x_cs_deselect(struct mcfqspi_cs_control *cs_control,
+                              u8 chip_select, bool cs_high)
+{
+        gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high);
+}
+
+static struct mcfqspi_cs_control m528x_cs_control = {
+        .setup                  = m528x_cs_setup,
+        .teardown               = m528x_cs_teardown,
+        .select                 = m528x_cs_select,
+        .deselect               = m528x_cs_deselect,
+};
+
+static struct mcfqspi_platform_data m528x_qspi_data = {
+        .bus_num                = 0,
+        .num_chipselect         = 4,
+        .cs_control             = &m528x_cs_control,
+};
+
+static struct platform_device m528x_qspi = {
+        .name                   = "mcfqspi",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m528x_qspi_resources),
+        .resource               = m528x_qspi_resources,
+        .dev.platform_data      = &m528x_qspi_data,
+};
+
+static void __init m528x_qspi_init(void)
+{
+        /* setup Port QS for QSPI with gpio CS control */
+        __raw_writeb(0x07, MCFGPIO_PQSPAR);
+}
+#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
+
+static struct platform_device *m528x_devices[] __initdata = {
+        &m528x_uart,
+        &m528x_fec,
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        &m528x_qspi,
+#endif
+};
+
+/***************************************************************************/
+
+static void __init m528x_uart_init_line(int line, int irq)
+{
+        u8 port;
+
+        if ((line < 0) || (line > 2))
+                return;
+
+        /* make sure PUAPAR is set for UART0 and UART1 */
+        if (line < 2) {
+                port = readb(MCF5282_GPIO_PUAPAR);
+                port |= (0x03 << (line * 2));
+                writeb(port, MCF5282_GPIO_PUAPAR);
+        }
+}
+
+static void __init m528x_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m528x_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m528x_uart_init_line(line, m528x_uart_platform[line].irq);
+}
+
+/***************************************************************************/
+
+static void __init m528x_fec_init(void)
+{
+        u16 v16;
+
+        /* Set multi-function pins to ethernet mode for fec0 */
+        v16 = readw(MCF_IPSBAR + 0x100056);
+        writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
+        writeb(0xc0, MCF_IPSBAR + 0x100058);
+}
+
+/***************************************************************************/
+
+static void m528x_cpu_reset(void)
+{
+        local_irq_disable();
+        __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
+}
+
+/***************************************************************************/
+
+#ifdef CONFIG_WILDFIRE
+void wildfire_halt(void)
+{
+        writeb(0, 0x30000007);
+        writeb(0x2, 0x30000007);
+}
+#endif
+
+#ifdef CONFIG_WILDFIREMOD
+void wildfiremod_halt(void)
+{
+        printk(KERN_INFO "WildFireMod hibernating...\n");
+
+        /* Set portE.5 to Digital IO */
+        MCF5282_GPIO_PEPAR &= ~(1 << (5 * 2));
+
+        /* Make portE.5 an output */
+        MCF5282_GPIO_DDRE |= (1 << 5);
+
+        /* Now toggle portE.5 from low to high */
+        MCF5282_GPIO_PORTE &= ~(1 << 5);
+        MCF5282_GPIO_PORTE |= (1 << 5);
+
+        printk(KERN_EMERG "Failed to hibernate. Halting!\n");
+}
+#endif
+
+void __init config_BSP(char *commandp, int size)
+{
+#ifdef CONFIG_WILDFIRE
+        mach_halt = wildfire_halt;
+#endif
+#ifdef CONFIG_WILDFIREMOD
+        mach_halt = wildfiremod_halt;
+#endif
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        mach_reset = m528x_cpu_reset;
+        m528x_uarts_init();
+        m528x_fec_init();
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        m528x_qspi_init();
+#endif
+        platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/528x/gpio.c b/arch/m68k/platform/528x/gpio.c
new file mode 100644
index 000000000000..526db665d87e
--- /dev/null
+++ b/arch/m68k/platform/528x/gpio.c
@@ -0,0 +1,438 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "NQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 1,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = (void __iomem *)MCFEPORT_EPDDR,
+                .podr                           = (void __iomem *)MCFEPORT_EPDR,
+                .ppdr                           = (void __iomem *)MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TA",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 8,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *)MCFGPTA_GPTDDR,
+                .podr                           = (void __iomem *)MCFGPTA_GPTPORT,
+                .ppdr                           = (void __iomem *)MCFGPTB_GPTPORT,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TB",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 16,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *)MCFGPTB_GPTDDR,
+                .podr                           = (void __iomem *)MCFGPTB_GPTPORT,
+                .ppdr                           = (void __iomem *)MCFGPTB_GPTPORT,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QA",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 24,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *)MCFQADC_DDRQA,
+                .podr                           = (void __iomem *)MCFQADC_PORTQA,
+                .ppdr                           = (void __iomem *)MCFQADC_PORTQA,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QB",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *)MCFQADC_DDRQB,
+                .podr                           = (void __iomem *)MCFQADC_PORTQB,
+                .ppdr                           = (void __iomem *)MCFQADC_PORTQB,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "A",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRA,
+                .podr                           = (void __iomem *)MCFGPIO_PORTA,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTAP,
+                .setr                           = (void __iomem *)MCFGPIO_SETA,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRA,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "B",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 48,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRB,
+                .podr                           = (void __iomem *)MCFGPIO_PORTB,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTBP,
+                .setr                           = (void __iomem *)MCFGPIO_SETB,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRB,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 56,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRC,
+                .podr                           = (void __iomem *)MCFGPIO_PORTC,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTCP,
+                .setr                           = (void __iomem *)MCFGPIO_SETC,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRC,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "D",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRD,
+                .podr                           = (void __iomem *)MCFGPIO_PORTD,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTDP,
+                .setr                           = (void __iomem *)MCFGPIO_SETD,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRD,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "E",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRE,
+                .podr                           = (void __iomem *)MCFGPIO_PORTE,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTEP,
+                .setr                           = (void __iomem *)MCFGPIO_SETE,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRE,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "F",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 80,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRF,
+                .podr                           = (void __iomem *)MCFGPIO_PORTF,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTFP,
+                .setr                           = (void __iomem *)MCFGPIO_SETF,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRF,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "G",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 88,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRG,
+                .podr                           = (void __iomem *)MCFGPIO_PORTG,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTGP,
+                .setr                           = (void __iomem *)MCFGPIO_SETG,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRG,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "H",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 96,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRH,
+                .podr                           = (void __iomem *)MCFGPIO_PORTH,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTHP,
+                .setr                           = (void __iomem *)MCFGPIO_SETH,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "J",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 104,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRJ,
+                .podr                           = (void __iomem *)MCFGPIO_PORTJ,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTJP,
+                .setr                           = (void __iomem *)MCFGPIO_SETJ,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRJ,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "DD",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 112,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRDD,
+                .podr                           = (void __iomem *)MCFGPIO_PORTDD,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTDDP,
+                .setr                           = (void __iomem *)MCFGPIO_SETDD,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRDD,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "EH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 120,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDREH,
+                .podr                           = (void __iomem *)MCFGPIO_PORTEH,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTEHP,
+                .setr                           = (void __iomem *)MCFGPIO_SETEH,
+                .clrr                           = (void __iomem *)MCFGPIO_CLREH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "EL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 128,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDREL,
+                .podr                           = (void __iomem *)MCFGPIO_PORTEL,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTELP,
+                .setr                           = (void __iomem *)MCFGPIO_SETEL,
+                .clrr                           = (void __iomem *)MCFGPIO_CLREL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "AS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 136,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRAS,
+                .podr                           = (void __iomem *)MCFGPIO_PORTAS,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTASP,
+                .setr                           = (void __iomem *)MCFGPIO_SETAS,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRAS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 144,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRQS,
+                .podr                           = (void __iomem *)MCFGPIO_PORTQS,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTQSP,
+                .setr                           = (void __iomem *)MCFGPIO_SETQS,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRQS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "SD",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 152,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRSD,
+                .podr                           = (void __iomem *)MCFGPIO_PORTSD,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTSDP,
+                .setr                           = (void __iomem *)MCFGPIO_SETSD,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRSD,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TC",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 160,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRTC,
+                .podr                           = (void __iomem *)MCFGPIO_PORTTC,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTTCP,
+                .setr                           = (void __iomem *)MCFGPIO_SETTC,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRTC,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TD",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 168,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRTD,
+                .podr                           = (void __iomem *)MCFGPIO_PORTTD,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTTDP,
+                .setr                           = (void __iomem *)MCFGPIO_SETTD,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRTD,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UA",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 176,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *)MCFGPIO_DDRUA,
+                .podr                           = (void __iomem *)MCFGPIO_PORTUA,
+                .ppdr                           = (void __iomem *)MCFGPIO_PORTUAP,
+                .setr                           = (void __iomem *)MCFGPIO_SETUA,
+                .clrr                           = (void __iomem *)MCFGPIO_CLRUA,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5307/Makefile b/arch/m68k/platform/5307/Makefile
new file mode 100644
index 000000000000..d4293b791f2e
--- /dev/null
+++ b/arch/m68k/platform/5307/Makefile
@@ -0,0 +1,20 @@
+#
+# Makefile for the m68knommu kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs. You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y                   += config.o gpio.o
+obj-$(CONFIG_NETtel)    += nettel.o
+obj-$(CONFIG_CLEOPATRA) += nettel.o
+
diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c
new file mode 100644
index 000000000000..00900ac06a9c
--- /dev/null
+++ b/arch/m68k/platform/5307/config.c
@@ -0,0 +1,147 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/5307/config.c
+ *
+ *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
+ *      Copyright (C) 2000, Lineo (www.lineo.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+#include <asm/mcfwdebug.h>
+
+/***************************************************************************/
+
+/*
+ *      Some platforms need software versions of the GPIO data registers.
+ */
+unsigned short ppdata;
+unsigned char ledbank = 0xff;
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m5307_uart_platform[] = {
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE1,
+                .irq            = 73,
+        },
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE2,
+                .irq            = 74,
+        },
+        { },
+};
+
+static struct platform_device m5307_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m5307_uart_platform,
+};
+
+static struct platform_device *m5307_devices[] __initdata = {
+        &m5307_uart,
+};
+
+/***************************************************************************/
+
+static void __init m5307_uart_init_line(int line, int irq)
+{
+        if (line == 0) {
+                writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
+                writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
+                mcf_mapirq2imr(irq, MCFINTC_UART0);
+        } else if (line == 1) {
+                writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
+                writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
+                mcf_mapirq2imr(irq, MCFINTC_UART1);
+        }
+}
+
+static void __init m5307_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m5307_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m5307_uart_init_line(line, m5307_uart_platform[line].irq);
+}
+
+/***************************************************************************/
+
+static void __init m5307_timers_init(void)
+{
+        /* Timer1 is always used as system timer */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER1ICR);
+        mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+        /* Timer2 is to be used as a high speed profile timer  */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER2ICR);
+        mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
+}
+
+/***************************************************************************/
+
+void m5307_cpu_reset(void)
+{
+        local_irq_disable();
+        /* Set watchdog to soft reset, and enabled */
+        __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+#if defined(CONFIG_NETtel) || \
+    defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
+        /* Copy command line from FLASH to local buffer... */
+        memcpy(commandp, (char *) 0xf0004000, size);
+        commandp[size-1] = 0;
+#endif
+
+        mach_reset = m5307_cpu_reset;
+        m5307_timers_init();
+        m5307_uarts_init();
+
+        /* Only support the external interrupts on their primary level */
+        mcf_mapirq2imr(25, MCFINTC_EINT1);
+        mcf_mapirq2imr(27, MCFINTC_EINT3);
+        mcf_mapirq2imr(29, MCFINTC_EINT5);
+        mcf_mapirq2imr(31, MCFINTC_EINT7);
+
+#ifdef CONFIG_BDM_DISABLE
+        /*
+         * Disable the BDM clocking.  This also turns off most of the rest of
+         * the BDM device.  This is good for EMC reasons. This option is not
+         * incompatible with the memory protection option.
+         */
+        wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
+#endif
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/5307/gpio.c b/arch/m68k/platform/5307/gpio.c
new file mode 100644
index 000000000000..5850612b4a38
--- /dev/null
+++ b/arch/m68k/platform/5307/gpio.c
@@ -0,0 +1,49 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PP",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 16,
+                },
+                .pddr                           = (void __iomem *) MCFSIM_PADDR,
+                .podr                           = (void __iomem *) MCFSIM_PADAT,
+                .ppdr                           = (void __iomem *) MCFSIM_PADAT,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5307/nettel.c b/arch/m68k/platform/5307/nettel.c
new file mode 100644
index 000000000000..e925ea4602f8
--- /dev/null
+++ b/arch/m68k/platform/5307/nettel.c
@@ -0,0 +1,153 @@
+/***************************************************************************/
+
+/*
+ *      nettel.c -- startup code support for the NETtel boards
+ *
+ *      Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/nettel.h>
+
+/***************************************************************************/
+
+/*
+ * Define the IO and interrupt resources of the 2 SMC9196 interfaces.
+ */
+#define NETTEL_SMC0_ADDR        0x30600300
+#define NETTEL_SMC0_IRQ         29
+
+#define NETTEL_SMC1_ADDR        0x30600000
+#define NETTEL_SMC1_IRQ         27
+
+/*
+ * We need some access into the SMC9196 registers. Define those registers
+ * we will need here (including the smc91x.h doesn't seem to give us these
+ * in a simple form).
+ */
+#define SMC91xx_BANKSELECT      14
+#define SMC91xx_BASEADDR        2
+#define SMC91xx_BASEMAC         4
+
+/***************************************************************************/
+
+static struct resource nettel_smc91x_0_resources[] = {
+        {
+                .start          = NETTEL_SMC0_ADDR,
+                .end            = NETTEL_SMC0_ADDR + 0x20,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = NETTEL_SMC0_IRQ,
+                .end            = NETTEL_SMC0_IRQ,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct resource nettel_smc91x_1_resources[] = {
+        {
+                .start          = NETTEL_SMC1_ADDR,
+                .end            = NETTEL_SMC1_ADDR + 0x20,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = NETTEL_SMC1_IRQ,
+                .end            = NETTEL_SMC1_IRQ,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device nettel_smc91x[] = {
+        {
+                .name                   = "smc91x",
+                .id                     = 0,
+                .num_resources          = ARRAY_SIZE(nettel_smc91x_0_resources),
+                .resource               = nettel_smc91x_0_resources,
+        },
+        {
+                .name                   = "smc91x",
+                .id                     = 1,
+                .num_resources          = ARRAY_SIZE(nettel_smc91x_1_resources),
+                .resource               = nettel_smc91x_1_resources,
+        },
+};
+
+static struct platform_device *nettel_devices[] __initdata = {
+        &nettel_smc91x[0],
+        &nettel_smc91x[1],
+};
+
+/***************************************************************************/
+
+static u8 nettel_macdefault[] __initdata = {
+        0x00, 0xd0, 0xcf, 0x00, 0x00, 0x01,
+};
+
+/*
+ * Set flash contained MAC address into SMC9196 core. Make sure the flash
+ * MAC address is sane, and not an empty flash. If no good use the Moreton
+ * Bay default MAC address instead.
+ */
+
+static void __init nettel_smc91x_setmac(unsigned int ioaddr, unsigned int flashaddr)
+{
+        u16 *macp;
+
+        macp = (u16 *) flashaddr;
+        if ((macp[0] == 0xffff) && (macp[1] == 0xffff) && (macp[2] == 0xffff))
+                macp = (u16 *) &nettel_macdefault[0];
+
+        writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
+        writew(macp[0], ioaddr + SMC91xx_BASEMAC);
+        writew(macp[1], ioaddr + SMC91xx_BASEMAC + 2);
+        writew(macp[2], ioaddr + SMC91xx_BASEMAC + 4);
+}
+
+/***************************************************************************/
+
+/*
+ * Re-map the address space of at least one of the SMC ethernet
+ * parts. Both parts power up decoding the same address, so we
+ * need to move one of them first, before doing anything else.
+ */
+
+static void __init nettel_smc91x_init(void)
+{
+        writew(0x00ec, MCF_MBAR + MCFSIM_PADDR);
+        mcf_setppdata(0, 0x0080);
+        writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
+        writew(0x0067, NETTEL_SMC0_ADDR + SMC91xx_BASEADDR);
+        mcf_setppdata(0x0080, 0);
+
+        /* Set correct chip select timing for SMC9196 accesses */
+        writew(0x1180, MCF_MBAR + MCFSIM_CSCR3);
+
+        /* Set the SMC interrupts to be auto-vectored */
+        mcf_autovector(NETTEL_SMC0_IRQ);
+        mcf_autovector(NETTEL_SMC1_IRQ);
+
+        /* Set MAC addresses from flash for both interfaces */
+        nettel_smc91x_setmac(NETTEL_SMC0_ADDR, 0xf0006000);
+        nettel_smc91x_setmac(NETTEL_SMC1_ADDR, 0xf0006006);
+}
+
+/***************************************************************************/
+
+static int __init init_nettel(void)
+{
+        nettel_smc91x_init();
+        platform_add_devices(nettel_devices, ARRAY_SIZE(nettel_devices));
+        return 0;
+}
+
+arch_initcall(init_nettel);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/532x/Makefile b/arch/m68k/platform/532x/Makefile
new file mode 100644
index 000000000000..ce01669399c6
--- /dev/null
+++ b/arch/m68k/platform/532x/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for the m68knommu linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs. You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+#obj-y := config.o usb-mcf532x.o spi-mcf532x.o
+obj-y := config.o gpio.o
diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c
new file mode 100644
index 000000000000..ca51323f957b
--- /dev/null
+++ b/arch/m68k/platform/532x/config.c
@@ -0,0 +1,648 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/532x/config.c
+ *
+ *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
+ *      Copyright (C) 2000, Lineo (www.lineo.com)
+ *      Yaroslav Vinogradov yaroslav.vinogradov@freescale.com
+ *      Copyright Freescale Semiconductor, Inc 2006
+ *      Copyright (c) 2006, emlix, Sebastian Hess <sh@emlix.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+#include <asm/mcfdma.h>
+#include <asm/mcfwdebug.h>
+#include <asm/mcfqspi.h>
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m532x_uart_platform[] = {
+        {
+                .mapbase        = MCFUART_BASE1,
+                .irq            = MCFINT_VECBASE + MCFINT_UART0,
+        },
+        {
+                .mapbase        = MCFUART_BASE2,
+                .irq            = MCFINT_VECBASE + MCFINT_UART1,
+        },
+        {
+                .mapbase        = MCFUART_BASE3,
+                .irq            = MCFINT_VECBASE + MCFINT_UART2,
+        },
+        { },
+};
+
+static struct platform_device m532x_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m532x_uart_platform,
+};
+
+static struct resource m532x_fec_resources[] = {
+        {
+                .start          = 0xfc030000,
+                .end            = 0xfc0307ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 36,
+                .end            = 64 + 36,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 40,
+                .end            = 64 + 40,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 42,
+                .end            = 64 + 42,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m532x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m532x_fec_resources),
+        .resource               = m532x_fec_resources,
+};
+
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+static struct resource m532x_qspi_resources[] = {
+        {
+                .start          = MCFQSPI_IOBASE,
+                .end            = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = MCFINT_VECBASE + MCFINT_QSPI,
+                .end            = MCFINT_VECBASE + MCFINT_QSPI,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+#define MCFQSPI_CS0    84
+#define MCFQSPI_CS1    85
+#define MCFQSPI_CS2    86
+
+static int m532x_cs_setup(struct mcfqspi_cs_control *cs_control)
+{
+        int status;
+
+        status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
+                goto fail0;
+        }
+        status = gpio_direction_output(MCFQSPI_CS0, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
+                goto fail1;
+        }
+
+        status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
+                goto fail1;
+        }
+        status = gpio_direction_output(MCFQSPI_CS1, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
+                goto fail2;
+        }
+
+        status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
+        if (status) {
+                pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
+                goto fail2;
+        }
+        status = gpio_direction_output(MCFQSPI_CS2, 1);
+        if (status) {
+                pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
+                goto fail3;
+        }
+
+        return 0;
+
+fail3:
+        gpio_free(MCFQSPI_CS2);
+fail2:
+        gpio_free(MCFQSPI_CS1);
+fail1:
+        gpio_free(MCFQSPI_CS0);
+fail0:
+        return status;
+}
+
+static void m532x_cs_teardown(struct mcfqspi_cs_control *cs_control)
+{
+        gpio_free(MCFQSPI_CS2);
+        gpio_free(MCFQSPI_CS1);
+        gpio_free(MCFQSPI_CS0);
+}
+
+static void m532x_cs_select(struct mcfqspi_cs_control *cs_control,
+                            u8 chip_select, bool cs_high)
+{
+        gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high);
+}
+
+static void m532x_cs_deselect(struct mcfqspi_cs_control *cs_control,
+                              u8 chip_select, bool cs_high)
+{
+        gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high);
+}
+
+static struct mcfqspi_cs_control m532x_cs_control = {
+        .setup                  = m532x_cs_setup,
+        .teardown               = m532x_cs_teardown,
+        .select                 = m532x_cs_select,
+        .deselect               = m532x_cs_deselect,
+};
+
+static struct mcfqspi_platform_data m532x_qspi_data = {
+        .bus_num                = 0,
+        .num_chipselect         = 3,
+        .cs_control             = &m532x_cs_control,
+};
+
+static struct platform_device m532x_qspi = {
+        .name                   = "mcfqspi",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m532x_qspi_resources),
+        .resource               = m532x_qspi_resources,
+        .dev.platform_data      = &m532x_qspi_data,
+};
+
+static void __init m532x_qspi_init(void)
+{
+        /* setup QSPS pins for QSPI with gpio CS control */
+        writew(0x01f0, MCF_GPIO_PAR_QSPI);
+}
+#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
+
+
+static struct platform_device *m532x_devices[] __initdata = {
+        &m532x_uart,
+        &m532x_fec,
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        &m532x_qspi,
+#endif
+};
+
+/***************************************************************************/
+
+static void __init m532x_uart_init_line(int line, int irq)
+{
+        if (line == 0) {
+                /* GPIO initialization */
+                MCF_GPIO_PAR_UART |= 0x000F;
+        } else if (line == 1) {
+                /* GPIO initialization */
+                MCF_GPIO_PAR_UART |= 0x0FF0;
+        }
+}
+
+static void __init m532x_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m532x_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m532x_uart_init_line(line, m532x_uart_platform[line].irq);
+}
+/***************************************************************************/
+
+static void __init m532x_fec_init(void)
+{
+        /* Set multi-function pins to ethernet mode for fec0 */
+        MCF_GPIO_PAR_FECI2C |= (MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC |
+                MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO);
+        MCF_GPIO_PAR_FEC = (MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC |
+                MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC);
+}
+
+/***************************************************************************/
+
+static void m532x_cpu_reset(void)
+{
+        local_irq_disable();
+        __raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+#if !defined(CONFIG_BOOTPARAM)
+        /* Copy command line from FLASH to local buffer... */
+        memcpy(commandp, (char *) 0x4000, 4);
+        if(strncmp(commandp, "kcl ", 4) == 0){
+                memcpy(commandp, (char *) 0x4004, size);
+                commandp[size-1] = 0;
+        } else {
+                memset(commandp, 0, size);
+        }
+#endif
+
+#ifdef CONFIG_BDM_DISABLE
+        /*
+         * Disable the BDM clocking.  This also turns off most of the rest of
+         * the BDM device.  This is good for EMC reasons. This option is not
+         * incompatible with the memory protection option.
+         */
+        wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
+#endif
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        m532x_uarts_init();
+        m532x_fec_init();
+#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
+        m532x_qspi_init();
+#endif
+        platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
+/* Board initialization */
+/***************************************************************************/
+/* 
+ * PLL min/max specifications
+ */
+#define MAX_FVCO        500000  /* KHz */
+#define MAX_FSYS        80000   /* KHz */
+#define MIN_FSYS        58333   /* KHz */
+#define FREF            16000   /* KHz */
+
+
+#define MAX_MFD         135     /* Multiplier */
+#define MIN_MFD         88      /* Multiplier */
+#define BUSDIV          6       /* Divider */
+
+/*
+ * Low Power Divider specifications
+ */
+#define MIN_LPD         (1 << 0)    /* Divider (not encoded) */
+#define MAX_LPD         (1 << 15)   /* Divider (not encoded) */
+#define DEFAULT_LPD     (1 << 1)        /* Divider (not encoded) */
+
+#define SYS_CLK_KHZ     80000
+#define SYSTEM_PERIOD   12.5
+/*
+ *  SDRAM Timing Parameters
+ */  
+#define SDRAM_BL        8       /* # of beats in a burst */
+#define SDRAM_TWR       2       /* in clocks */
+#define SDRAM_CASL      2.5     /* CASL in clocks */
+#define SDRAM_TRCD      2       /* in clocks */
+#define SDRAM_TRP       2       /* in clocks */
+#define SDRAM_TRFC      7       /* in clocks */
+#define SDRAM_TREFI     7800    /* in ns */
+
+#define EXT_SRAM_ADDRESS        (0xC0000000)
+#define FLASH_ADDRESS           (0x00000000)
+#define SDRAM_ADDRESS           (0x40000000)
+
+#define NAND_FLASH_ADDRESS      (0xD0000000)
+
+int sys_clk_khz = 0;
+int sys_clk_mhz = 0;
+
+void wtm_init(void);
+void scm_init(void);
+void gpio_init(void);
+void fbcs_init(void);
+void sdramc_init(void);
+int  clock_pll (int fsys, int flags);
+int  clock_limp (int);
+int  clock_exit_limp (void);
+int  get_sys_clock (void);
+
+asmlinkage void __init sysinit(void)
+{
+        sys_clk_khz = clock_pll(0, 0);
+        sys_clk_mhz = sys_clk_khz/1000;
+        
+        wtm_init();
+        scm_init();
+        gpio_init();
+        fbcs_init();
+        sdramc_init();
+}
+
+void wtm_init(void)
+{
+        /* Disable watchdog timer */
+        MCF_WTM_WCR = 0;
+}
+
+#define MCF_SCM_BCR_GBW         (0x00000100)
+#define MCF_SCM_BCR_GBR         (0x00000200)
+
+void scm_init(void)
+{
+        /* All masters are trusted */
+        MCF_SCM_MPR = 0x77777777;
+    
+        /* Allow supervisor/user, read/write, and trusted/untrusted
+           access to all slaves */
+        MCF_SCM_PACRA = 0;
+        MCF_SCM_PACRB = 0;
+        MCF_SCM_PACRC = 0;
+        MCF_SCM_PACRD = 0;
+        MCF_SCM_PACRE = 0;
+        MCF_SCM_PACRF = 0;
+
+        /* Enable bursts */
+        MCF_SCM_BCR = (MCF_SCM_BCR_GBR | MCF_SCM_BCR_GBW);
+}
+
+
+void fbcs_init(void)
+{
+        MCF_GPIO_PAR_CS = 0x0000003E;
+
+        /* Latch chip select */
+        MCF_FBCS1_CSAR = 0x10080000;
+
+        MCF_FBCS1_CSCR = 0x002A3780;
+        MCF_FBCS1_CSMR = (MCF_FBCS_CSMR_BAM_2M | MCF_FBCS_CSMR_V);
+
+        /* Initialize latch to drive signals to inactive states */
+        *((u16 *)(0x10080000)) = 0xFFFF;
+
+        /* External SRAM */
+        MCF_FBCS1_CSAR = EXT_SRAM_ADDRESS;
+        MCF_FBCS1_CSCR = (MCF_FBCS_CSCR_PS_16
+                        | MCF_FBCS_CSCR_AA
+                        | MCF_FBCS_CSCR_SBM
+                        | MCF_FBCS_CSCR_WS(1));
+        MCF_FBCS1_CSMR = (MCF_FBCS_CSMR_BAM_512K
+                        | MCF_FBCS_CSMR_V);
+
+        /* Boot Flash connected to FBCS0 */
+        MCF_FBCS0_CSAR = FLASH_ADDRESS;
+        MCF_FBCS0_CSCR = (MCF_FBCS_CSCR_PS_16
+                        | MCF_FBCS_CSCR_BEM
+                        | MCF_FBCS_CSCR_AA
+                        | MCF_FBCS_CSCR_SBM
+                        | MCF_FBCS_CSCR_WS(7));
+        MCF_FBCS0_CSMR = (MCF_FBCS_CSMR_BAM_32M
+                        | MCF_FBCS_CSMR_V);
+}
+
+void sdramc_init(void)
+{
+        /*
+         * Check to see if the SDRAM has already been initialized
+         * by a run control tool
+         */
+        if (!(MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)) {
+                /* SDRAM chip select initialization */
+                
+                /* Initialize SDRAM chip select */
+                MCF_SDRAMC_SDCS0 = (0
+                        | MCF_SDRAMC_SDCS_BA(SDRAM_ADDRESS)
+                        | MCF_SDRAMC_SDCS_CSSZ(MCF_SDRAMC_SDCS_CSSZ_32MBYTE));
+
+        /*
+         * Basic configuration and initialization
+         */
+        MCF_SDRAMC_SDCFG1 = (0
+                | MCF_SDRAMC_SDCFG1_SRD2RW((int)((SDRAM_CASL + 2) + 0.5 ))
+                | MCF_SDRAMC_SDCFG1_SWT2RD(SDRAM_TWR + 1)
+                | MCF_SDRAMC_SDCFG1_RDLAT((int)((SDRAM_CASL*2) + 2))
+                | MCF_SDRAMC_SDCFG1_ACT2RW((int)((SDRAM_TRCD ) + 0.5))
+                | MCF_SDRAMC_SDCFG1_PRE2ACT((int)((SDRAM_TRP ) + 0.5))
+                | MCF_SDRAMC_SDCFG1_REF2ACT((int)(((SDRAM_TRFC) ) + 0.5))
+                | MCF_SDRAMC_SDCFG1_WTLAT(3));
+        MCF_SDRAMC_SDCFG2 = (0
+                | MCF_SDRAMC_SDCFG2_BRD2PRE(SDRAM_BL/2 + 1)
+                | MCF_SDRAMC_SDCFG2_BWT2RW(SDRAM_BL/2 + SDRAM_TWR)
+                | MCF_SDRAMC_SDCFG2_BRD2WT((int)((SDRAM_CASL+SDRAM_BL/2-1.0)+0.5))
+                | MCF_SDRAMC_SDCFG2_BL(SDRAM_BL-1));
+
+            
+        /*
+         * Precharge and enable write to SDMR
+         */
+        MCF_SDRAMC_SDCR = (0
+                | MCF_SDRAMC_SDCR_MODE_EN
+                | MCF_SDRAMC_SDCR_CKE
+                | MCF_SDRAMC_SDCR_DDR
+                | MCF_SDRAMC_SDCR_MUX(1)
+                | MCF_SDRAMC_SDCR_RCNT((int)(((SDRAM_TREFI/(SYSTEM_PERIOD*64)) - 1) + 0.5))
+                | MCF_SDRAMC_SDCR_PS_16
+                | MCF_SDRAMC_SDCR_IPALL);            
+
+        /*
+         * Write extended mode register
+         */
+        MCF_SDRAMC_SDMR = (0
+                | MCF_SDRAMC_SDMR_BNKAD_LEMR
+                | MCF_SDRAMC_SDMR_AD(0x0)
+                | MCF_SDRAMC_SDMR_CMD);
+
+        /*
+         * Write mode register and reset DLL
+         */
+        MCF_SDRAMC_SDMR = (0
+                | MCF_SDRAMC_SDMR_BNKAD_LMR
+                | MCF_SDRAMC_SDMR_AD(0x163)
+                | MCF_SDRAMC_SDMR_CMD);
+
+        /*
+         * Execute a PALL command
+         */
+        MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_IPALL;
+
+        /*
+         * Perform two REF cycles
+         */
+        MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_IREF;
+        MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_IREF;
+
+        /*
+         * Write mode register and clear reset DLL
+         */
+        MCF_SDRAMC_SDMR = (0
+                | MCF_SDRAMC_SDMR_BNKAD_LMR
+                | MCF_SDRAMC_SDMR_AD(0x063)
+                | MCF_SDRAMC_SDMR_CMD);
+                                
+        /*
+         * Enable auto refresh and lock SDMR
+         */
+        MCF_SDRAMC_SDCR &= ~MCF_SDRAMC_SDCR_MODE_EN;
+        MCF_SDRAMC_SDCR |= (0
+                | MCF_SDRAMC_SDCR_REF
+                | MCF_SDRAMC_SDCR_DQS_OE(0xC));
+        }
+}
+
+void gpio_init(void)
+{
+        /* Enable UART0 pins */
+        MCF_GPIO_PAR_UART = ( 0
+                | MCF_GPIO_PAR_UART_PAR_URXD0
+                | MCF_GPIO_PAR_UART_PAR_UTXD0);
+
+        /* Initialize TIN3 as a GPIO output to enable the write
+           half of the latch */
+        MCF_GPIO_PAR_TIMER = 0x00;
+        __raw_writeb(0x08, MCFGPIO_PDDR_TIMER);
+        __raw_writeb(0x00, MCFGPIO_PCLRR_TIMER);
+
+}
+
+int clock_pll(int fsys, int flags)
+{
+        int fref, temp, fout, mfd;
+        u32 i;
+
+        fref = FREF;
+        
+        if (fsys == 0) {
+                /* Return current PLL output */
+                mfd = MCF_PLL_PFDR;
+
+                return (fref * mfd / (BUSDIV * 4));
+        }
+
+        /* Check bounds of requested system clock */
+        if (fsys > MAX_FSYS)
+                fsys = MAX_FSYS;
+        if (fsys < MIN_FSYS)
+                fsys = MIN_FSYS;
+
+        /* Multiplying by 100 when calculating the temp value,
+           and then dividing by 100 to calculate the mfd allows
+           for exact values without needing to include floating
+           point libraries. */
+        temp = 100 * fsys / fref;
+        mfd = 4 * BUSDIV * temp / 100;
+                        
+        /* Determine the output frequency for selected values */
+        fout = (fref * mfd / (BUSDIV * 4));
+
+        /*
+         * Check to see if the SDRAM has already been initialized.
+         * If it has then the SDRAM needs to be put into self refresh
+         * mode before reprogramming the PLL.
+         */
+        if (MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)
+                /* Put SDRAM into self refresh mode */
+                MCF_SDRAMC_SDCR &= ~MCF_SDRAMC_SDCR_CKE;
+
+        /*
+         * Initialize the PLL to generate the new system clock frequency.
+         * The device must be put into LIMP mode to reprogram the PLL.
+         */
+
+        /* Enter LIMP mode */
+        clock_limp(DEFAULT_LPD);
+                                        
+        /* Reprogram PLL for desired fsys */
+        MCF_PLL_PODR = (0
+                | MCF_PLL_PODR_CPUDIV(BUSDIV/3)
+                | MCF_PLL_PODR_BUSDIV(BUSDIV));
+                                                
+        MCF_PLL_PFDR = mfd;
+                
+        /* Exit LIMP mode */
+        clock_exit_limp();
+        
+        /*
+         * Return the SDRAM to normal operation if it is in use.
+         */
+        if (MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)
+                /* Exit self refresh mode */
+                MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_CKE;
+
+        /* Errata - workaround for SDRAM opeartion after exiting LIMP mode */
+        MCF_SDRAMC_LIMP_FIX = MCF_SDRAMC_REFRESH;
+
+        /* wait for DQS logic to relock */
+        for (i = 0; i < 0x200; i++)
+                ;
+
+        return fout;
+}
+
+int clock_limp(int div)
+{
+        u32 temp;
+
+        /* Check bounds of divider */
+        if (div < MIN_LPD)
+                div = MIN_LPD;
+        if (div > MAX_LPD)
+                div = MAX_LPD;
+    
+        /* Save of the current value of the SSIDIV so we don't
+           overwrite the value*/
+        temp = (MCF_CCM_CDR & MCF_CCM_CDR_SSIDIV(0xF));
+      
+        /* Apply the divider to the system clock */
+        MCF_CCM_CDR = ( 0
+                | MCF_CCM_CDR_LPDIV(div)
+                | MCF_CCM_CDR_SSIDIV(temp));
+    
+        MCF_CCM_MISCCR |= MCF_CCM_MISCCR_LIMP;
+    
+        return (FREF/(3*(1 << div)));
+}
+
+int clock_exit_limp(void)
+{
+        int fout;
+        
+        /* Exit LIMP mode */
+        MCF_CCM_MISCCR = (MCF_CCM_MISCCR & ~ MCF_CCM_MISCCR_LIMP);
+
+        /* Wait for PLL to lock */
+        while (!(MCF_CCM_MISCCR & MCF_CCM_MISCCR_PLL_LOCK))
+                ;
+        
+        fout = get_sys_clock();
+
+        return fout;
+}
+
+int get_sys_clock(void)
+{
+        int divider;
+        
+        /* Test to see if device is in LIMP mode */
+        if (MCF_CCM_MISCCR & MCF_CCM_MISCCR_LIMP) {
+                divider = MCF_CCM_CDR & MCF_CCM_CDR_LPDIV(0xF);
+                return (FREF/(2 << divider));
+        }
+        else
+                return ((FREF * MCF_PLL_PFDR) / (BUSDIV * 4));
+}
diff --git a/arch/m68k/platform/532x/gpio.c b/arch/m68k/platform/532x/gpio.c
new file mode 100644
index 000000000000..212a85deac90
--- /dev/null
+++ b/arch/m68k/platform/532x/gpio.c
@@ -0,0 +1,337 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PIRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFEPORT_EPDDR,
+                .podr                           = (void __iomem *) MCFEPORT_EPDR,
+                .ppdr                           = (void __iomem *) MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 8,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FECH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 16,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FECL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "SSI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 24,
+                        .ngpio                  = 5,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_SSI,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_SSI,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_SSI,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_SSI,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_SSI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BUSCTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_BUSCTL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BE",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_BE,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_BE,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_BE,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_BE,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_BE,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "CS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 49,
+                        .ngpio                  = 5,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_CS,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_CS,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_CS,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_CS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "PWM",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 58,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_PWM,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_PWM,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_PWM,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_PWM,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_PWM,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECI2C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_FECI2C,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_FECI2C,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UART",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_UART,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_UART,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_UART,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_UART,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_UART,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QSPI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 80,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_QSPI,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_QSPI,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_QSPI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMER",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 88,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_TIMER,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_TIMER,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_TIMER,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "LCDDATAH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 96,
+                        .ngpio                  = 2,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_LCDDATAH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_LCDDATAH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_LCDDATAH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "LCDDATAM",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 104,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_LCDDATAM,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_LCDDATAM,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAM,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAM,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_LCDDATAM,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "LCDDATAL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 112,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_LCDDATAL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_LCDDATAL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_LCDDATAL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_LCDDATAL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "LCDCTLH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 120,
+                        .ngpio                  = 1,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_LCDCTLH,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_LCDCTLH,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLH,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLH,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_LCDCTLH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "LCDCTLL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 128,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = (void __iomem *) MCFGPIO_PDDR_LCDCTLL,
+                .podr                           = (void __iomem *) MCFGPIO_PODR_LCDCTLL,
+                .ppdr                           = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLL,
+                .setr                           = (void __iomem *) MCFGPIO_PPDSDR_LCDCTLL,
+                .clrr                           = (void __iomem *) MCFGPIO_PCLRR_LCDCTLL,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/5407/Makefile b/arch/m68k/platform/5407/Makefile
new file mode 100644
index 000000000000..e83fe148eddc
--- /dev/null
+++ b/arch/m68k/platform/5407/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for the m68knommu linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs. You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y := config.o gpio.o
+
diff --git a/arch/m68k/platform/5407/config.c b/arch/m68k/platform/5407/config.c
new file mode 100644
index 000000000000..70ea789a400c
--- /dev/null
+++ b/arch/m68k/platform/5407/config.c
@@ -0,0 +1,122 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/5407/config.c
+ *
+ *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
+ *      Copyright (C) 2000, Lineo (www.lineo.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m5407_uart_platform[] = {
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE1,
+                .irq            = 73,
+        },
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE2,
+                .irq            = 74,
+        },
+        { },
+};
+
+static struct platform_device m5407_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m5407_uart_platform,
+};
+
+static struct platform_device *m5407_devices[] __initdata = {
+        &m5407_uart,
+};
+
+/***************************************************************************/
+
+static void __init m5407_uart_init_line(int line, int irq)
+{
+        if (line == 0) {
+                writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
+                writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
+                mcf_mapirq2imr(irq, MCFINTC_UART0);
+        } else if (line == 1) {
+                writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
+                writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
+                mcf_mapirq2imr(irq, MCFINTC_UART1);
+        }
+}
+
+static void __init m5407_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m5407_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m5407_uart_init_line(line, m5407_uart_platform[line].irq);
+}
+
+/***************************************************************************/
+
+static void __init m5407_timers_init(void)
+{
+        /* Timer1 is always used as system timer */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER1ICR);
+        mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+        /* Timer2 is to be used as a high speed profile timer  */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER2ICR);
+        mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
+}
+
+/***************************************************************************/
+
+void m5407_cpu_reset(void)
+{
+        local_irq_disable();
+        /* set watchdog to soft reset, and enabled */
+        __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+        mach_reset = m5407_cpu_reset;
+        m5407_timers_init();
+        m5407_uarts_init();
+
+        /* Only support the external interrupts on their primary level */
+        mcf_mapirq2imr(25, MCFINTC_EINT1);
+        mcf_mapirq2imr(27, MCFINTC_EINT3);
+        mcf_mapirq2imr(29, MCFINTC_EINT5);
+        mcf_mapirq2imr(31, MCFINTC_EINT7);
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+        platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/5407/gpio.c b/arch/m68k/platform/5407/gpio.c
new file mode 100644
index 000000000000..5850612b4a38
--- /dev/null
+++ b/arch/m68k/platform/5407/gpio.c
@@ -0,0 +1,49 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PP",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 16,
+                },
+                .pddr                           = (void __iomem *) MCFSIM_PADDR,
+                .podr                           = (void __iomem *) MCFSIM_PADAT,
+                .ppdr                           = (void __iomem *) MCFSIM_PADAT,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68k/platform/54xx/Makefile b/arch/m68k/platform/54xx/Makefile
new file mode 100644
index 000000000000..6cfd090ec3cd
--- /dev/null
+++ b/arch/m68k/platform/54xx/Makefile
@@ -0,0 +1,19 @@
+#
+# Makefile for the m68knommu linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs. You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT
+# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-y := config.o
+obj-$(CONFIG_FIREBEE) += firebee.o
+
diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c
new file mode 100644
index 000000000000..78130984db95
--- /dev/null
+++ b/arch/m68k/platform/54xx/config.c
@@ -0,0 +1,115 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/54xx/config.c
+ *
+ *      Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/m54xxsim.h>
+#include <asm/mcfuart.h>
+#include <asm/m54xxgpt.h>
+
+/***************************************************************************/
+
+static struct mcf_platform_uart m54xx_uart_platform[] = {
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE1,
+                .irq            = 64 + 35,
+        },
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE2,
+                .irq            = 64 + 34,
+        },
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE3,
+                .irq            = 64 + 33,
+        },
+        {
+                .mapbase        = MCF_MBAR + MCFUART_BASE4,
+                .irq            = 64 + 32,
+        },
+};
+
+static struct platform_device m54xx_uart = {
+        .name                   = "mcfuart",
+        .id                     = 0,
+        .dev.platform_data      = m54xx_uart_platform,
+};
+
+static struct platform_device *m54xx_devices[] __initdata = {
+        &m54xx_uart,
+};
+
+
+/***************************************************************************/
+
+static void __init m54xx_uart_init_line(int line, int irq)
+{
+        int rts_cts;
+
+        /* enable io pins */
+        switch (line) {
+        case 0:
+                rts_cts = 0; break;
+        case 1:
+                rts_cts = MCF_PAR_PSC_RTS_RTS; break;
+        case 2:
+                rts_cts = MCF_PAR_PSC_RTS_RTS | MCF_PAR_PSC_CTS_CTS; break;
+        case 3:
+                rts_cts = 0; break;
+        }
+        __raw_writeb(MCF_PAR_PSC_TXD | rts_cts | MCF_PAR_PSC_RXD,
+                                                MCF_MBAR + MCF_PAR_PSC(line));
+}
+
+static void __init m54xx_uarts_init(void)
+{
+        const int nrlines = ARRAY_SIZE(m54xx_uart_platform);
+        int line;
+
+        for (line = 0; (line < nrlines); line++)
+                m54xx_uart_init_line(line, m54xx_uart_platform[line].irq);
+}
+
+/***************************************************************************/
+
+static void mcf54xx_reset(void)
+{
+        /* disable interrupts and enable the watchdog */
+        asm("movew #0x2700, %sr\n");
+        __raw_writel(0, MCF_MBAR + MCF_GPT_GMS0);
+        __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_MBAR + MCF_GPT_GCIR0);
+        __raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4),
+                                                MCF_MBAR + MCF_GPT_GMS0);
+}
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+        mach_reset = mcf54xx_reset;
+        m54xx_uarts_init();
+}
+
+/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+
+        platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices));
+        return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/54xx/firebee.c b/arch/m68k/platform/54xx/firebee.c
new file mode 100644
index 000000000000..46d50534f981
--- /dev/null
+++ b/arch/m68k/platform/54xx/firebee.c
@@ -0,0 +1,86 @@
+/***************************************************************************/
+
+/*
+ *      firebee.c -- extra startup code support for the FireBee boards
+ *
+ *      Copyright (C) 2011, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+/***************************************************************************/
+
+/*
+ *      8MB of NOR flash fitted to the FireBee board.
+ */
+#define FLASH_PHYS_ADDR         0xe0000000      /* Physical address of flash */
+#define FLASH_PHYS_SIZE         0x00800000      /* Size of flash */
+
+#define PART_BOOT_START         0x00000000      /* Start at bottom of flash */
+#define PART_BOOT_SIZE          0x00040000      /* 256k in size */
+#define PART_IMAGE_START        0x00040000      /* Start after boot loader */
+#define PART_IMAGE_SIZE         0x006c0000      /* Most of flash */
+#define PART_FPGA_START         0x00700000      /* Start at offset 7MB */
+#define PART_FPGA_SIZE          0x00100000      /* 1MB in size */
+
+static struct mtd_partition firebee_flash_parts[] = {
+        {
+                .name   = "dBUG",
+                .offset = PART_BOOT_START,
+                .size   = PART_BOOT_SIZE,
+        },
+        {
+                .name   = "FPGA",
+                .offset = PART_FPGA_START,
+                .size   = PART_FPGA_SIZE,
+        },
+        {
+                .name   = "image",
+                .offset = PART_IMAGE_START,
+                .size   = PART_IMAGE_SIZE,
+        },
+};
+
+static struct physmap_flash_data firebee_flash_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(firebee_flash_parts),
+        .parts          = firebee_flash_parts,
+};
+
+static struct resource firebee_flash_resource = {
+        .start          = FLASH_PHYS_ADDR,
+        .end            = FLASH_PHYS_ADDR + FLASH_PHYS_SIZE,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device firebee_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data = &firebee_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &firebee_flash_resource,
+};
+
+/***************************************************************************/
+
+static int __init init_firebee(void)
+{
+        platform_device_register(&firebee_flash);
+        return 0;
+}
+
+arch_initcall(init_firebee);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/68328/Makefile b/arch/m68k/platform/68328/Makefile
new file mode 100644
index 000000000000..5e5435552d56
--- /dev/null
+++ b/arch/m68k/platform/68328/Makefile
@@ -0,0 +1,22 @@
+#
+# Makefile for arch/m68knommu/platform/68328.
+#
+
+head-y                  = head-$(MODEL).o
+head-$(CONFIG_PILOT)    = head-pilot.o
+head-$(CONFIG_DRAGEN2)  = head-de2.o
+
+obj-y                   += entry.o ints.o timers.o
+obj-$(CONFIG_M68328)    += config.o
+obj-$(CONFIG_ROM)       += romvec.o
+
+extra-y                 := head.o
+extra-$(CONFIG_M68328)  += bootlogo.rh head.o
+
+$(obj)/bootlogo.rh: $(src)/bootlogo.h
+        perl $(src)/bootlogo.pl < $(src)/bootlogo.h > $(obj)/bootlogo.rh
+
+$(obj)/head.o: $(obj)/$(head-y)
+        ln -sf $(head-y) $(obj)/head.o
+
+clean-files := $(obj)/bootlogo.rh $(obj)/head.o $(head-y)
diff --git a/arch/m68k/platform/68328/bootlogo.h b/arch/m68k/platform/68328/bootlogo.h
new file mode 100644
index 000000000000..67bc2c17386e
--- /dev/null
+++ b/arch/m68k/platform/68328/bootlogo.h
@@ -0,0 +1,270 @@
+#define bootlogo_width 160
+#define bootlogo_height 160
+static unsigned char bootlogo_bits[] = {
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x01, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x40, 0x55, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xac, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x10, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x01, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x20, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x80, 0x08, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x08, 0x00, 0x00,
+  0x00, 0xff, 0x80, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x20, 0x04, 0x00, 0x00, 0x00, 0xf8, 0x80, 0x0f,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x50, 0x04, 0x00, 0x00, 0x00, 0x78, 0x80, 0x0f, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x03, 0x00, 0x00,
+  0x00, 0x78, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x40,
+  0xa8, 0x02, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x70, 0x28, 0x01, 0x00, 0x00,
+  0x00, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x20, 0x00, 0x00, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x70,
+  0x54, 0x01, 0x00, 0x00, 0x00, 0x3e, 0x80, 0x01, 0x3a, 0x78, 0x80, 0x0e,
+  0x50, 0xc0, 0x03, 0x0e, 0x00, 0x20, 0x00, 0x00, 0xaa, 0x00, 0x00, 0x00,
+  0x00, 0x3e, 0xf0, 0x83, 0x1f, 0xfc, 0xe0, 0x0f, 0x78, 0xf8, 0x87, 0x1f,
+  0x00, 0x18, 0x00, 0x30, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x1e, 0xf8, 0xc3,
+  0x1f, 0xfc, 0xe0, 0x0f, 0x78, 0xf8, 0x87, 0x0f, 0x00, 0x20, 0x00, 0x10,
+  0x55, 0x00, 0x00, 0x00, 0x00, 0x1e, 0xc0, 0x03, 0x9f, 0xf3, 0x80, 0x0f,
+  0x78, 0x80, 0xc7, 0x0e, 0x00, 0x18, 0x00, 0x20, 0xaa, 0x00, 0x00, 0x00,
+  0x00, 0x1e, 0xe0, 0x03, 0x9f, 0xf1, 0x80, 0x07, 0x78, 0x80, 0x67, 0x00,
+  0x00, 0x24, 0x00, 0x18, 0x55, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xe0, 0x01,
+  0x5e, 0xf0, 0x80, 0x07, 0x3c, 0x00, 0x2f, 0x00, 0x00, 0x14, 0x00, 0x20,
+  0xaa, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xe0, 0x01, 0x7f, 0xf0, 0x80, 0x07,
+  0x3c, 0x00, 0x3f, 0x00, 0x00, 0x08, 0x00, 0x18, 0x55, 0x00, 0x00, 0x00,
+  0x00, 0x0f, 0xe0, 0x00, 0x3f, 0xf0, 0xc0, 0x03, 0x1e, 0x00, 0x1f, 0x00,
+  0x00, 0x14, 0x00, 0x28, 0xaa, 0x00, 0x00, 0x00, 0x80, 0x0f, 0xf0, 0x00,
+  0x1f, 0xf0, 0xc0, 0x03, 0x1f, 0x00, 0x1f, 0x00, 0x00, 0x04, 0x00, 0x0c,
+  0x54, 0x00, 0x00, 0x00, 0x80, 0x07, 0x78, 0x00, 0x1f, 0x78, 0xc0, 0x03,
+  0x1f, 0x00, 0x1e, 0x00, 0x00, 0x0a, 0x00, 0x12, 0xa8, 0x00, 0x00, 0x00,
+  0x80, 0x07, 0x78, 0x00, 0x1f, 0x78, 0xe0, 0x03, 0x1f, 0x00, 0x1f, 0x00,
+  0x00, 0x04, 0x00, 0x0a, 0x54, 0x00, 0x00, 0x00, 0x80, 0x07, 0x78, 0x80,
+  0x0f, 0x78, 0xe0, 0x03, 0x1f, 0x00, 0x1e, 0x00, 0x00, 0x0a, 0x00, 0x08,
+  0x50, 0x01, 0x00, 0x00, 0x84, 0x03, 0x78, 0x80, 0x07, 0x3c, 0xe0, 0xc1,
+  0x0f, 0x00, 0x1f, 0x00, 0x00, 0x04, 0x00, 0x06, 0xa8, 0x00, 0x00, 0x00,
+  0xc0, 0x03, 0x78, 0xc0, 0x07, 0x3c, 0xe0, 0xc1, 0x0f, 0x00, 0x1f, 0x00,
+  0x00, 0x0a, 0x00, 0x08, 0x50, 0x01, 0x00, 0x00, 0xc2, 0x01, 0x38, 0xc0,
+  0x07, 0x3c, 0xe0, 0x60, 0x0f, 0x80, 0x1e, 0x00, 0x00, 0x05, 0x00, 0x07,
+  0xa0, 0x00, 0x00, 0x80, 0xe0, 0x01, 0x3c, 0xc0, 0x07, 0x3c, 0xf0, 0xa0,
+  0x07, 0xc0, 0x1c, 0x00, 0x00, 0x0a, 0x80, 0x08, 0xa0, 0x02, 0x00, 0xa0,
+  0xe0, 0x21, 0x1c, 0xc0, 0x03, 0x1c, 0x71, 0x90, 0x47, 0x40, 0x3c, 0x04,
+  0x00, 0x05, 0x80, 0x06, 0xa0, 0x02, 0x00, 0x20, 0xe0, 0x31, 0x1e, 0xc3,
+  0x03, 0x1e, 0x79, 0x98, 0x47, 0x60, 0x38, 0x04, 0x00, 0x15, 0x40, 0x0a,
+  0xa0, 0x0a, 0x00, 0x1a, 0xe0, 0x19, 0x9e, 0xe1, 0x01, 0x9e, 0x78, 0xcc,
+  0xa7, 0x32, 0x78, 0x02, 0x80, 0x2a, 0x40, 0x05, 0x80, 0x2a, 0x00, 0x05,
+  0xe0, 0x0d, 0x9e, 0xe0, 0x01, 0xde, 0x78, 0xc6, 0x97, 0x1b, 0x78, 0x03,
+  0x80, 0x52, 0x30, 0x0a, 0x00, 0x95, 0xd2, 0x0a, 0xe0, 0x0f, 0xfe, 0xe0,
+  0x00, 0x7e, 0xf8, 0x87, 0x9f, 0x0f, 0xf8, 0x01, 0x00, 0xa1, 0x0e, 0x15,
+  0x80, 0x55, 0x55, 0x01, 0xe0, 0x01, 0x3c, 0xf0, 0x00, 0x3c, 0xf0, 0x80,
+  0x8f, 0x0f, 0x70, 0x00, 0x00, 0x81, 0x02, 0x14, 0x00, 0x54, 0x55, 0x00,
+  0xc0, 0x01, 0x3c, 0x00, 0x00, 0x0c, 0x60, 0x00, 0x07, 0x03, 0x70, 0x00,
+  0x80, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x40, 0x01, 0x00, 0x11, 0x09, 0x00, 0x04, 0x00, 0x01, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00,
+  0x00, 0x20, 0x01, 0x00, 0x04, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x49, 0x32, 0x49, 0x49, 0x91,
+  0x24, 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x20, 0x49, 0x0a, 0x09, 0xc9, 0x92, 0x14, 0x81, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x49,
+  0x18, 0x01, 0x49, 0x92, 0x0c, 0x43, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x49, 0x30, 0x01, 0x49, 0x92,
+  0x14, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x08, 0x69, 0x22, 0x09, 0x49, 0xd2, 0x24, 0x24, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x51,
+  0x1a, 0x09, 0x49, 0xa2, 0x44, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
+  0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x87, 0x08, 0x00, 0x00, 0x00,
+  0xf2, 0xf0, 0xf0, 0xf0, 0xf0, 0x00, 0xf0, 0x00, 0x08, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x40, 0x88, 0x00, 0x00, 0x00, 0x00, 0x09, 0x09, 0x09, 0x09,
+  0x09, 0x01, 0x10, 0x01, 0x08, 0x00, 0x00, 0x00, 0x00, 0x40, 0x24, 0x80,
+  0x88, 0x86, 0x48, 0x04, 0x09, 0x08, 0x01, 0x01, 0x09, 0x01, 0x10, 0x71,
+  0x88, 0x66, 0x00, 0x00, 0x00, 0x40, 0x24, 0x80, 0x88, 0x89, 0x48, 0x84,
+  0x08, 0x08, 0x01, 0x01, 0x09, 0x01, 0x10, 0x89, 0x88, 0x99, 0x00, 0x00,
+  0x00, 0x40, 0x24, 0x80, 0x88, 0x88, 0x88, 0x82, 0xf8, 0xf0, 0xe0, 0x80,
+  0xf0, 0xf8, 0x13, 0x81, 0x88, 0x88, 0x00, 0x00, 0x00, 0x40, 0x24, 0x80,
+  0x88, 0x88, 0x08, 0x81, 0x08, 0x09, 0x01, 0x41, 0x08, 0x01, 0xf0, 0xf0,
+  0x88, 0x88, 0x00, 0x00, 0x00, 0x40, 0x24, 0x80, 0x88, 0x88, 0x88, 0x42,
+  0x08, 0x09, 0x01, 0x21, 0x08, 0x01, 0x10, 0x88, 0x88, 0x88, 0x00, 0x00,
+  0x00, 0x40, 0x46, 0x88, 0x88, 0x88, 0x4c, 0x44, 0x08, 0x09, 0x09, 0x11,
+  0x08, 0x01, 0x10, 0x88, 0x88, 0x88, 0x00, 0x00, 0x00, 0x80, 0x85, 0x87,
+  0x88, 0x08, 0x4b, 0x24, 0xf0, 0xf0, 0xf0, 0xf8, 0xf1, 0x00, 0x10, 0x70,
+  0x89, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x7f, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc,
+  0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x0f, 0x00, 0x00,
+  0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0xff, 0x3f, 0x0f, 0x00, 0x00, 0x08, 0x02, 0x04, 0x00,
+  0x00, 0x00, 0x08, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
+  0xff, 0x1f, 0x00, 0x00, 0x48, 0x62, 0xc4, 0x31, 0x4a, 0x18, 0x3c, 0x03,
+  0x21, 0x45, 0x92, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x1f, 0x00, 0x00,
+  0x48, 0x92, 0x24, 0x48, 0xb6, 0x24, 0x88, 0x04, 0x21, 0x4b, 0x92, 0x00,
+  0x00, 0x00, 0x80, 0xff, 0xff, 0x3f, 0x00, 0x00, 0xa8, 0xf2, 0x24, 0x48,
+  0x92, 0x3c, 0x88, 0x04, 0x21, 0x49, 0x62, 0x00, 0x00, 0x00, 0x80, 0xff,
+  0xff, 0x3f, 0x00, 0x00, 0x10, 0x11, 0x24, 0x48, 0x92, 0x04, 0x88, 0x04,
+  0x21, 0x49, 0x62, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x3f, 0x00, 0x00,
+  0x10, 0x11, 0x24, 0x48, 0x92, 0x04, 0x88, 0x04, 0x21, 0x49, 0x93, 0x00,
+  0x00, 0x00, 0x80, 0xff, 0xcf, 0x7e, 0x00, 0x00, 0x10, 0xe1, 0xc4, 0x31,
+  0x92, 0x38, 0x30, 0x03, 0x2f, 0x89, 0x92, 0x00, 0x00, 0x00, 0x80, 0xe3,
+  0x07, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc1, 0x03, 0x7e, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x80, 0xc9, 0x23, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x95,
+  0x33, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xdd, 0xfb, 0x7e, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x80, 0x1d, 0xf8, 0x7e, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00,
+  0x02, 0x00, 0x40, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x9b,
+  0x70, 0x7e, 0x00, 0x00, 0x08, 0x00, 0xe0, 0x00, 0x02, 0x00, 0x47, 0x80,
+  0x08, 0x00, 0x00, 0x08, 0x00, 0x00, 0x80, 0x03, 0x00, 0x7e, 0x00, 0x00,
+  0x3c, 0xa3, 0x20, 0x31, 0x52, 0x02, 0x49, 0xcc, 0x3f, 0xa3, 0x94, 0x08,
+  0x00, 0x00, 0x00, 0x27, 0x02, 0x7e, 0x00, 0x00, 0x88, 0xe4, 0x20, 0x41,
+  0xb2, 0x05, 0x49, 0x90, 0x88, 0xe4, 0x6c, 0x09, 0x00, 0x00, 0x00, 0x01,
+  0x00, 0x7e, 0x00, 0x00, 0x88, 0x24, 0xe0, 0x70, 0x92, 0x04, 0x47, 0x9c,
+  0x88, 0x24, 0x24, 0x09, 0x00, 0x00, 0x00, 0x13, 0x48, 0x7e, 0x00, 0x00,
+  0x88, 0x24, 0x20, 0x48, 0x92, 0x04, 0x41, 0x92, 0x88, 0x24, 0x24, 0x01,
+  0x00, 0x00, 0x00, 0x43, 0x00, 0xfe, 0x00, 0x00, 0x88, 0x24, 0x20, 0x48,
+  0x92, 0x04, 0x41, 0x92, 0x88, 0x24, 0x24, 0x09, 0x00, 0x00, 0x00, 0x07,
+  0x94, 0xce, 0x00, 0x00, 0x08, 0x23, 0x20, 0xb0, 0x92, 0x04, 0x41, 0x2c,
+  0x0b, 0x23, 0x24, 0x09, 0x00, 0x00, 0x00, 0x49, 0x02, 0xce, 0x01, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x11, 0x08, 0xdc, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41,
+  0x01, 0xfc, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x01, 0x00, 0xf8, 0x07, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0xc0, 0x01, 0x00, 0xf8, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01,
+  0x00, 0xf0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0xf0, 0x1f, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x70, 0x00, 0x00, 0xe0, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x00,
+  0x00, 0xe0, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x00, 0x00, 0xe0, 0x7f, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x3c, 0x00, 0x00, 0xe0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x00,
+  0x00, 0xc0, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00, 0xc0, 0xff, 0x01,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x1f, 0x00, 0x00, 0x80, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00,
+  0x00, 0x80, 0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0f, 0x00, 0x00, 0x00, 0xff, 0x07,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x80, 0x07, 0x00, 0x00, 0x00, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, 0x00,
+  0x00, 0x00, 0xfe, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x00, 0xfe, 0x0f,
+  0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x05, 0x00, 0x00, 0x80, 0x08, 0x00,
+  0x00, 0xc0, 0x03, 0x00, 0x78, 0x00, 0xfe, 0x0f, 0x00, 0x00, 0x40, 0x10,
+  0x12, 0x10, 0x05, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xe0, 0x03, 0x00,
+  0x84, 0x00, 0xfe, 0x0f, 0x00, 0x00, 0x20, 0x26, 0x0a, 0x10, 0x9d, 0x39,
+  0xa6, 0xb2, 0x0a, 0x00, 0x00, 0xe0, 0x01, 0x00, 0x02, 0x00, 0xfe, 0x0f,
+  0x00, 0x00, 0x20, 0x21, 0x06, 0x28, 0x25, 0x4a, 0xa9, 0x8a, 0x09, 0x00,
+  0x00, 0xe0, 0x01, 0x22, 0x02, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x20, 0x21,
+  0x0e, 0x38, 0xa5, 0x4b, 0xa9, 0xb2, 0x09, 0x00, 0x00, 0xf0, 0x01, 0x22,
+  0x02, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x20, 0x21, 0x12, 0x44, 0xa5, 0x4a,
+  0x49, 0xa1, 0x0a, 0x00, 0x00, 0xf8, 0x01, 0x22, 0x02, 0x00, 0xfc, 0x1f,
+  0x00, 0x00, 0x20, 0x26, 0x52, 0x44, 0x9d, 0x4d, 0x46, 0x99, 0x0a, 0x00,
+  0x00, 0xfc, 0x01, 0x22, 0x02, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x40, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, 0xb2,
+  0x84, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0x01, 0x6e, 0x78, 0x00, 0xfc, 0x1f,
+  0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0xfc, 0x01, 0x02, 0x00, 0x00, 0xfc, 0x1f, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x01, 0x02,
+  0x00, 0x00, 0xfe, 0x1f, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x06, 0x00, 0x00, 0xfc, 0x0f,
+  0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x20, 0x01, 0x02, 0x00, 0x00, 0x00,
+  0x00, 0x24, 0x06, 0x00, 0x00, 0x00, 0xfc, 0x07, 0x00, 0x00, 0x40, 0x10,
+  0x1e, 0x20, 0x90, 0x78, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x00,
+  0x00, 0x80, 0xfc, 0x03, 0x00, 0x00, 0x20, 0x26, 0x22, 0x20, 0xf9, 0x89,
+  0x32, 0xe7, 0x08, 0x00, 0x00, 0x92, 0x38, 0x00, 0x00, 0x00, 0xfc, 0x01,
+  0x00, 0x00, 0x20, 0x21, 0x22, 0xa0, 0x92, 0x88, 0x4a, 0x29, 0x15, 0x00,
+  0x00, 0x00, 0x78, 0x00, 0x00, 0x40, 0xfa, 0x04, 0x00, 0x00, 0x20, 0x21,
+  0x22, 0xa0, 0x93, 0x88, 0x4a, 0x29, 0x1d, 0x00, 0x00, 0x11, 0xf2, 0x00,
+  0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x20, 0x21, 0x22, 0xa8, 0x90, 0x88,
+  0x4a, 0x29, 0x05, 0x00, 0x48, 0x40, 0xf0, 0x01, 0x00, 0x80, 0x14, 0x04,
+  0x00, 0x00, 0x20, 0x26, 0x9e, 0x10, 0x93, 0x78, 0x32, 0x29, 0x19, 0x00,
+  0x00, 0x09, 0xe0, 0x03, 0x00, 0x00, 0x80, 0x10, 0x00, 0x00, 0x40, 0x10,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0xc5, 0x03,
+  0x00, 0x40, 0x22, 0x00, 0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x40, 0x04, 0xc0, 0x07, 0x00, 0x20, 0x08, 0x04,
+  0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x08, 0x50, 0x90, 0x03, 0x00, 0xb0, 0x00, 0x41, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00,
+  0x00, 0x38, 0x22, 0x08, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x48, 0x04, 0x44, 0x00, 0x00, 0x3c, 0x08, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x20, 0x00, 0x00, 0x00, 0xbf, 0x40, 0x42, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x40, 0x02, 0x00, 0x00, 0x00, 0x00, 0x24, 0x80, 0x48, 0x02,
+  0xc0, 0x1f, 0x00, 0x08, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4e, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x05, 0xf0, 0x3f, 0x09, 0x00,
+  0x00, 0x10, 0x24, 0x48, 0x10, 0x12, 0x41, 0x52, 0x24, 0x09, 0x46, 0x71,
+  0x90, 0x20, 0x02, 0xfc, 0xff, 0x1f, 0x80, 0x22, 0x00, 0x90, 0x24, 0x49,
+  0x12, 0x92, 0x40, 0xb2, 0x24, 0x09, 0xc9, 0x49, 0x04, 0x80, 0x90, 0xfc,
+  0xff, 0xbf, 0x24, 0x00, 0x00, 0x90, 0x24, 0x49, 0x12, 0x92, 0x40, 0x92,
+  0x24, 0x06, 0x49, 0x48, 0x50, 0x0a, 0x02, 0xfe, 0xff, 0x3f, 0x00, 0x05,
+  0x00, 0x50, 0xa5, 0x4a, 0x15, 0x92, 0x40, 0x92, 0x24, 0x06, 0x49, 0x48,
+  0x80, 0x40, 0x48, 0xfe, 0xff, 0x3f, 0x49, 0x00, 0x00, 0x20, 0x42, 0x84,
+  0x88, 0x1a, 0x41, 0x92, 0x34, 0x49, 0x49, 0x68, 0x00, 0x38, 0x10, 0x07,
+  0x00, 0x60, 0x80, 0x00, 0x00, 0x20, 0x42, 0x84, 0x88, 0x14, 0x4e, 0x92,
+  0x28, 0x49, 0x46, 0x50, 0x00, 0x80, 0x83, 0x01, 0x00, 0xa0, 0x6a, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
+  0x00, 0x00, 0xfc, 0x00, 0x00, 0xc0, 0x3b, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, };
diff --git a/arch/m68k/platform/68328/bootlogo.pl b/arch/m68k/platform/68328/bootlogo.pl
new file mode 100644
index 000000000000..b04ae3f50da5
--- /dev/null
+++ b/arch/m68k/platform/68328/bootlogo.pl
@@ -0,0 +1,10 @@
+
+$_ = join("", <>);
+
+s/(0x[0-9a-f]{2})/sprintf("0x%.2x",ord(pack("b8",unpack("B8",chr(hex($1))))))/gei;
+
+s/^ /   .byte /gm;
+s/[,};]+$//gm;
+s/^static.*//gm;
+
+print $_;
diff --git a/arch/m68k/platform/68328/config.c b/arch/m68k/platform/68328/config.c
new file mode 100644
index 000000000000..a7bd21deb00f
--- /dev/null
+++ b/arch/m68k/platform/68328/config.c
@@ -0,0 +1,52 @@
+/***************************************************************************/
+
+/*
+ *  linux/arch/m68knommu/platform/68328/config.c
+ *
+ *  Copyright (C) 1993 Hamish Macdonald
+ *  Copyright (C) 1999 D. Jeff Dionne
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * VZ Support/Fixes             Evan Stawnyczy <e@lineo.ca>
+ */
+
+/***************************************************************************/
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <asm/system.h>
+#include <asm/machdep.h>
+#include <asm/MC68328.h>
+
+/***************************************************************************/
+
+void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
+
+/***************************************************************************/
+
+void m68328_reset (void)
+{
+  local_irq_disable();
+  asm volatile ("moveal #0x10c00000, %a0;\n\t"
+                "moveb #0, 0xFFFFF300;\n\t"
+                "moveal 0(%a0), %sp;\n\t"
+                "moveal 4(%a0), %a0;\n\t"
+                "jmp (%a0);");
+}
+
+/***************************************************************************/
+
+void config_BSP(char *command, int len)
+{
+  printk(KERN_INFO "\n68328 support D. Jeff Dionne <jeff@uclinux.org>\n");
+  printk(KERN_INFO "68328 support Kenneth Albanowski <kjahds@kjshds.com>\n");
+  printk(KERN_INFO "68328/Pilot support Bernhard Kuhn <kuhn@lpr.e-technik.tu-muenchen.de>\n");
+
+  mach_gettod = m68328_timer_gettod;
+  mach_reset = m68328_reset;
+}
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/68328/entry.S b/arch/m68k/platform/68328/entry.S
new file mode 100644
index 000000000000..676960cf022a
--- /dev/null
+++ b/arch/m68k/platform/68328/entry.S
@@ -0,0 +1,263 @@
+/*
+ *  linux/arch/m68knommu/platform/68328/entry.S
+ *
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file README.legal in the main directory of this archive
+ * for more details.
+ *
+ * Linux/m68k support by Hamish Macdonald
+ */
+
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/thread_info.h>
+#include <asm/unistd.h>
+#include <asm/errno.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/traps.h>
+#include <asm/asm-offsets.h>
+#include <asm/entry.h>
+
+.text
+
+.globl system_call
+.globl resume
+.globl ret_from_exception
+.globl ret_from_signal
+.globl sys_call_table
+.globl ret_from_interrupt
+.globl bad_interrupt
+.globl inthandler1
+.globl inthandler2
+.globl inthandler3
+.globl inthandler4
+.globl inthandler5
+.globl inthandler6
+.globl inthandler7
+
+badsys:
+        movel   #-ENOSYS,%sp@(PT_OFF_D0)
+        jra     ret_from_exception
+
+do_trace:
+        movel   #-ENOSYS,%sp@(PT_OFF_D0) /* needed for strace*/
+        subql   #4,%sp
+        SAVE_SWITCH_STACK
+        jbsr    syscall_trace_enter
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        movel   %sp@(PT_OFF_ORIG_D0),%d1
+        movel   #-ENOSYS,%d0
+        cmpl    #NR_syscalls,%d1
+        jcc     1f
+        lsl     #2,%d1
+        lea     sys_call_table, %a0
+        jbsr    %a0@(%d1)
+
+1:      movel   %d0,%sp@(PT_OFF_D0)     /* save the return value */
+        subql   #4,%sp                  /* dummy return address */
+        SAVE_SWITCH_STACK
+        jbsr    syscall_trace_leave
+
+ret_from_signal:
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        jra     ret_from_exception
+
+ENTRY(system_call)
+        SAVE_ALL
+
+        /* save top of frame*/
+        pea     %sp@
+        jbsr    set_esp0
+        addql   #4,%sp
+
+        movel   %sp@(PT_OFF_ORIG_D0),%d0
+
+        movel   %sp,%d1                 /* get thread_info pointer */
+        andl    #-THREAD_SIZE,%d1
+        movel   %d1,%a2
+        btst    #(TIF_SYSCALL_TRACE%8),%a2@(TI_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
+        jne     do_trace
+        cmpl    #NR_syscalls,%d0
+        jcc     badsys
+        lsl     #2,%d0
+        lea     sys_call_table,%a0
+        movel   %a0@(%d0), %a0
+        jbsr    %a0@
+        movel   %d0,%sp@(PT_OFF_D0)     /* save the return value*/
+
+ret_from_exception:
+        btst    #5,%sp@(PT_OFF_SR)      /* check if returning to kernel*/
+        jeq     Luser_return            /* if so, skip resched, signals*/
+
+Lkernel_return:
+        RESTORE_ALL
+
+Luser_return:
+        /* only allow interrupts when we are really the last one on the*/
+        /* kernel stack, otherwise stack overflow can occur during*/
+        /* heavy interrupt load*/
+        andw    #ALLOWINT,%sr
+
+        movel   %sp,%d1                 /* get thread_info pointer */
+        andl    #-THREAD_SIZE,%d1
+        movel   %d1,%a2
+1:
+        move    %a2@(TI_FLAGS),%d1      /* thread_info->flags */
+        jne     Lwork_to_do
+        RESTORE_ALL
+
+Lwork_to_do:
+        movel   %a2@(TI_FLAGS),%d1      /* thread_info->flags */
+        btst    #TIF_NEED_RESCHED,%d1
+        jne     reschedule
+
+Lsignal_return:
+        subql   #4,%sp                  /* dummy return address*/
+        SAVE_SWITCH_STACK
+        pea     %sp@(SWITCH_STACK_SIZE)
+        bsrw    do_signal
+        addql   #4,%sp
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        jra     1b
+
+/*
+ * This is the main interrupt handler, responsible for calling process_int()
+ */
+inthandler1:
+        SAVE_ALL
+        movew   %sp@(PT_OFF_FORMATVEC), %d0
+        and     #0x3ff, %d0
+
+        movel   %sp,%sp@-
+        movel   #65,%sp@-               /*  put vector # on stack*/
+        jbsr    process_int             /*  process the IRQ*/
+3:      addql   #8,%sp                  /*  pop parameters off stack*/
+        bra     ret_from_interrupt
+
+inthandler2:
+        SAVE_ALL
+        movew   %sp@(PT_OFF_FORMATVEC), %d0
+        and     #0x3ff, %d0
+
+        movel   %sp,%sp@-
+        movel   #66,%sp@-               /*  put vector # on stack*/
+        jbsr    process_int             /*  process the IRQ*/
+3:      addql   #8,%sp                  /*  pop parameters off stack*/
+        bra     ret_from_interrupt
+
+inthandler3:
+        SAVE_ALL
+        movew   %sp@(PT_OFF_FORMATVEC), %d0
+        and     #0x3ff, %d0
+
+        movel   %sp,%sp@-
+        movel   #67,%sp@-               /*  put vector # on stack*/
+        jbsr    process_int             /*  process the IRQ*/
+3:      addql   #8,%sp                  /*  pop parameters off stack*/
+        bra     ret_from_interrupt
+
+inthandler4:
+        SAVE_ALL
+        movew   %sp@(PT_OFF_FORMATVEC), %d0
+        and     #0x3ff, %d0
+
+        movel   %sp,%sp@-
+        movel   #68,%sp@-               /*  put vector # on stack*/
+        jbsr    process_int             /*  process the IRQ*/
+3:      addql   #8,%sp                  /*  pop parameters off stack*/
+        bra     ret_from_interrupt
+
+inthandler5:
+        SAVE_ALL
+        movew   %sp@(PT_OFF_FORMATVEC), %d0
+        and     #0x3ff, %d0
+
+        movel   %sp,%sp@-
+        movel   #69,%sp@-               /*  put vector # on stack*/
+        jbsr    process_int             /*  process the IRQ*/
+3:      addql   #8,%sp                  /*  pop parameters off stack*/
+        bra     ret_from_interrupt
+
+inthandler6:
+        SAVE_ALL
+        movew   %sp@(PT_OFF_FORMATVEC), %d0
+        and     #0x3ff, %d0
+
+        movel   %sp,%sp@-
+        movel   #70,%sp@-               /*  put vector # on stack*/
+        jbsr    process_int             /*  process the IRQ*/
+3:      addql   #8,%sp                  /*  pop parameters off stack*/
+        bra     ret_from_interrupt
+
+inthandler7:
+        SAVE_ALL
+        movew   %sp@(PT_OFF_FORMATVEC), %d0
+        and     #0x3ff, %d0
+
+        movel   %sp,%sp@-
+        movel   #71,%sp@-               /*  put vector # on stack*/
+        jbsr    process_int             /*  process the IRQ*/
+3:      addql   #8,%sp                  /*  pop parameters off stack*/
+        bra     ret_from_interrupt
+
+inthandler:
+        SAVE_ALL
+        movew   %sp@(PT_OFF_FORMATVEC), %d0
+        and     #0x3ff, %d0
+
+        movel   %sp,%sp@-
+        movel   %d0,%sp@-               /*  put vector # on stack*/
+        jbsr    process_int             /*  process the IRQ*/
+3:      addql   #8,%sp                  /*  pop parameters off stack*/
+        bra     ret_from_interrupt
+
+ret_from_interrupt:
+        jeq     1f
+2:
+        RESTORE_ALL
+1:
+        moveb   %sp@(PT_OFF_SR), %d0
+        and     #7, %d0
+        jhi     2b
+
+        /* check if we need to do software interrupts */
+        jeq     ret_from_exception
+
+        pea     ret_from_exception
+        jra     do_softirq
+
+
+/*
+ * Handler for uninitialized and spurious interrupts.
+ */
+ENTRY(bad_interrupt)
+        addql   #1,num_spurious
+        rte
+
+/*
+ * Beware - when entering resume, prev (the current task) is
+ * in a0, next (the new task) is in a1,so don't change these
+ * registers until their contents are no longer needed.
+ */
+ENTRY(resume)
+        movel   %a0,%d1                         /* save prev thread in d1 */
+        movew   %sr,%a0@(TASK_THREAD+THREAD_SR) /* save sr */
+        movel   %usp,%a2                        /* save usp */
+        movel   %a2,%a0@(TASK_THREAD+THREAD_USP)
+
+        SAVE_SWITCH_STACK
+        movel   %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack */
+        movel   %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new thread stack */
+        RESTORE_SWITCH_STACK
+
+        movel   %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore user stack */
+        movel   %a0,%usp
+        movew   %a1@(TASK_THREAD+THREAD_SR),%sr /* restore thread status reg */
+        rts
+
diff --git a/arch/m68k/platform/68328/head-de2.S b/arch/m68k/platform/68328/head-de2.S
new file mode 100644
index 000000000000..f632fdcb93e9
--- /dev/null
+++ b/arch/m68k/platform/68328/head-de2.S
@@ -0,0 +1,128 @@
+
+#define MEM_END 0x00800000      /* Memory size 8Mb */
+
+#undef CRT_DEBUG
+
+.macro  PUTC CHAR
+#ifdef CRT_DEBUG
+        moveq   #\CHAR, %d7
+        jsr     putc
+#endif
+.endm
+
+        .global _start
+        .global _rambase
+        .global _ramvec
+        .global _ramstart
+        .global _ramend
+        
+        .data
+
+/*
+ *      Set up the usable of RAM stuff
+ */
+_rambase:
+        .long   0
+_ramvec:
+        .long   0
+_ramstart:
+        .long   0
+_ramend:
+        .long   0
+
+        .text
+
+_start:
+
+/*
+ * Setup initial stack
+ */
+        /* disable all interrupts */
+        movew   #0x2700, %sr
+        movel   #-1, 0xfffff304
+        movel   #MEM_END-4, %sp
+
+        PUTC    '\r'
+        PUTC    '\n'
+        PUTC    'A'
+        PUTC    'B'
+
+/*
+ *      Determine end of RAM
+ */
+
+        movel   #MEM_END, %a0
+        movel   %a0, _ramend
+
+        PUTC    'C'
+
+/*
+ *      Move ROM filesystem above bss :-)
+ */
+
+        moveal  #_sbss, %a0                     /* romfs at the start of bss */
+        moveal  #_ebss, %a1                     /* Set up destination  */
+        movel   %a0, %a2                        /* Copy of bss start */
+
+        movel   8(%a0), %d1                     /* Get size of ROMFS */
+        addql   #8, %d1                         /* Allow for rounding */
+        andl    #0xfffffffc, %d1        /* Whole words */
+
+        addl    %d1, %a0                        /* Copy from end */
+        addl    %d1, %a1                        /* Copy from end */
+        movel   %a1, _ramstart          /* Set start of ram */
+
+1:
+        movel   -(%a0), %d0                     /* Copy dword */
+        movel   %d0, -(%a1)
+        cmpl    %a0, %a2                        /* Check if at end */
+        bne     1b
+
+        PUTC    'D'
+
+/*
+ * Initialize BSS segment to 0
+ */
+
+        lea     _sbss, %a0
+        lea     _ebss, %a1
+
+        /* Copy 0 to %a0 until %a0 == %a1 */
+2:      cmpal   %a0, %a1
+        beq     1f
+        clrl    (%a0)+
+        bra     2b
+1:
+
+        PUTC    'E'
+
+/*
+ * Load the current task pointer and stack
+ */
+
+        lea     init_thread_union, %a0
+        lea     0x2000(%a0), %sp
+
+        PUTC    'F'
+        PUTC    '\r'
+        PUTC    '\n'
+
+/*
+ * Go
+ */
+
+        jmp     start_kernel
+
+/*
+ * Local functions
+ */
+ 
+#ifdef CRT_DEBUG
+putc:
+        moveb   %d7, 0xfffff907
+1:
+        movew   0xfffff906, %d7
+        andw    #0x2000, %d7
+        beq     1b
+        rts
+#endif
diff --git a/arch/m68k/platform/68328/head-pilot.S b/arch/m68k/platform/68328/head-pilot.S
new file mode 100644
index 000000000000..aecff532b343
--- /dev/null
+++ b/arch/m68k/platform/68328/head-pilot.S
@@ -0,0 +1,222 @@
+/*
+ * linux/arch/m68knommu/platform/68328/head-pilot.S
+ * - A startup file for the MC68328
+ *
+ * Copyright (C) 1998  D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
+ *                     Kenneth Albanowski <kjahds@kjahds.com>,
+ *                     The Silver Hammer Group, Ltd.
+ *
+ * (c) 1995, Dionne & Associates
+ * (c) 1995, DKG Display Tech.
+ */
+
+#define ASSEMBLY
+
+#define IMMED #
+#define DBG_PUTC(x)     moveb IMMED x, 0xfffff907
+
+
+.global _stext
+.global _start
+
+.global _rambase
+.global _ramvec
+.global _ramstart
+.global _ramend
+
+.global penguin_bits
+
+#ifdef CONFIG_PILOT
+
+#define IMR 0xFFFFF304
+
+        .data
+        .align 16
+
+penguin_bits:   
+#include "bootlogo.rh"
+
+#endif
+
+/*****************************************************************************/
+
+.data
+
+/*
+ *      Set up the usable of RAM stuff. Size of RAM is determined then
+ *      an initial stack set up at the end.
+ */
+.align 4
+_ramvec:
+.long   0
+_rambase:
+.long   0
+_ramstart:
+.long   0
+_ramend:
+.long   0
+
+.text
+        
+_start:
+_stext:
+
+
+#ifdef CONFIG_M68328
+
+#ifdef CONFIG_PILOT
+        .byte 0x4e, 0xfa, 0x00, 0x0a /* Jmp +X bytes */
+        .byte 'b', 'o', 'o', 't'
+        .word 10000
+
+        nop
+#endif
+
+        moveq   #0, %d0
+        movew   %d0, 0xfffff618 /* Watchdog off */
+        movel   #0x00011f07, 0xfffff114 /* CS A1 Mask */
+
+        movew   #0x0800, 0xfffff906 /* Ignore CTS */
+        movew   #0x010b, 0xfffff902 /* BAUD to 9600 */
+
+        movew   #0x2410, 0xfffff200 /* PLLCR */
+        movew   #0x123, 0xfffff202 /* PLLFSR */
+
+#ifdef CONFIG_PILOT
+        moveb   #0, 0xfffffA27 /* LCKCON */
+        movel   #_start, 0xfffffA00 /* LSSA */
+        moveb   #0xa, 0xfffffA05 /* LVPW */
+        movew   #0x9f, 0xFFFFFa08 /* LXMAX */
+        movew   #0x9f, 0xFFFFFa0a /* LYMAX */
+        moveb   #9, 0xfffffa29 /* LBAR */
+        moveb   #0, 0xfffffa25 /* LPXCD */
+        moveb   #0x04, 0xFFFFFa20 /* LPICF */
+        moveb   #0x58, 0xfffffA27 /* LCKCON */
+        moveb   #0x85, 0xfffff429 /* PFDATA */
+        moveb   #0xd8, 0xfffffA27 /* LCKCON */
+        moveb   #0xc5, 0xfffff429 /* PFDATA */
+        moveb   #0xd5, 0xfffff429 /* PFDATA */
+
+        moveal  #0x00100000, %a3
+        moveal  #0x100ffc00, %a4
+#endif /* CONFIG_PILOT */
+
+#endif /* CONFIG_M68328 */
+
+        movew   #0x2700, %sr
+        lea     %a4@(-4), %sp
+
+        DBG_PUTC('\r')
+        DBG_PUTC('\n')
+        DBG_PUTC('A')
+
+        moveq   #0,%d0
+        movew   #16384, %d0  /* PLL settle wait loop */
+L0:
+        subw    #1, %d0
+        bne     L0
+
+        DBG_PUTC('B')
+
+        /* Copy command line from beginning of RAM (+16) to end of bss */
+        movel   #CONFIG_VECTORBASE, %d7
+        addl    #16, %d7
+        moveal  %d7, %a0
+        moveal  #_ebss, %a1
+        lea     %a1@(512), %a2
+
+        DBG_PUTC('C')
+
+        /* Copy %a0 to %a1 until %a1 == %a2 */
+L2:
+        movel   %a0@+, %d0
+        movel   %d0, %a1@+
+        cmpal   %a1, %a2
+        bhi     L2
+
+        /* Copy data+init segment from ROM to RAM */
+        moveal  #_etext, %a0
+        moveal  #_sdata, %a1
+        moveal  #__init_end, %a2
+
+        DBG_PUTC('D')
+
+        /* Copy %a0 to %a1 until %a1 == %a2 */
+LD1:
+        movel   %a0@+, %d0
+        movel   %d0, %a1@+
+        cmpal   %a1, %a2
+        bhi     LD1
+
+        DBG_PUTC('E')
+
+        moveal  #_sbss, %a0
+        moveal  #_ebss, %a1
+
+        /* Copy 0 to %a0 until %a0 == %a1 */
+L1:
+        movel   #0, %a0@+
+        cmpal   %a0, %a1
+        bhi     L1
+
+        DBG_PUTC('F')
+
+        /* Copy command line from end of bss to command line */
+        moveal  #_ebss, %a0
+        moveal  #command_line, %a1
+        lea     %a1@(512), %a2
+
+        DBG_PUTC('G')
+
+        /* Copy %a0 to %a1 until %a1 == %a2 */
+L3:
+        movel   %a0@+, %d0
+        movel   %d0, %a1@+
+        cmpal   %a1, %a2
+        bhi     L3
+
+        movel   #_sdata, %d0    
+        movel   %d0, _rambase   
+        movel   #_ebss, %d0
+        movel   %d0, _ramstart
+
+        movel   %a4, %d0
+        subl    #4096, %d0      /* Reserve 4K of stack */
+        moveq   #79, %d7
+        movel   %d0, _ramend
+
+        movel   %a3, %d0
+        movel   %d0, rom_length
+
+        pea     0
+        pea     env
+        pea     %sp@(4)
+        pea     0
+
+        DBG_PUTC('H')
+
+#ifdef CONFIG_PILOT
+        movel   #penguin_bits, 0xFFFFFA00
+        moveb   #10, 0xFFFFFA05
+        movew   #160, 0xFFFFFA08
+        movew   #160, 0xFFFFFA0A
+#endif /* CONFIG_PILOT */
+
+        DBG_PUTC('I')
+
+        lea     init_thread_union, %a0
+        lea     0x2000(%a0), %sp
+
+        DBG_PUTC('J')
+        DBG_PUTC('\r')
+        DBG_PUTC('\n')
+
+        jsr     start_kernel
+_exit:
+
+        jmp     _exit
+
+
+        .data
+env:
+        .long   0
diff --git a/arch/m68k/platform/68328/head-ram.S b/arch/m68k/platform/68328/head-ram.S
new file mode 100644
index 000000000000..7f1aeeacb219
--- /dev/null
+++ b/arch/m68k/platform/68328/head-ram.S
@@ -0,0 +1,141 @@
+
+        .global __main
+        .global __rom_start
+
+        .global _rambase
+        .global _ramstart
+        
+        .global splash_bits
+        .global _start
+        .global _stext
+        .global _edata
+
+#define DEBUG
+#define ROM_OFFSET 0x10C00000
+#define STACK_GAURD 0x10
+
+        .text
+        
+_start:
+_stext:
+        movew   #0x2700, %sr            /* Exceptions off! */
+
+#if 0
+        /* Init chip registers.  uCsimm specific */
+        moveb   #0x00,   0xfffffb0b     /* Watchdog off */
+        moveb   #0x10,   0xfffff000     /* SCR */
+
+        movew   #0x2400, 0xfffff200     /* PLLCR */
+        movew   #0x0123, 0xfffff202     /* PLLFSR */
+
+        moveb   #0x00,   0xfffff40b     /* enable chip select */
+        moveb   #0x00,   0xfffff423     /* enable /DWE */
+        moveb   #0x08,   0xfffffd0d     /* disable hardmap */
+        moveb   #0x07,   0xfffffd0e     /* level 7 interrupt clear */
+
+        movew   #0x8600, 0xfffff100     /* FLASH at 0x10c00000 */
+        movew   #0x018b, 0xfffff110     /* 2Meg, enable, 0ws */
+
+        movew   #0x8f00, 0xfffffc00     /* DRAM configuration */
+        movew   #0x9667, 0xfffffc02     /* DRAM control */
+        movew   #0x0000, 0xfffff106     /* DRAM at 0x00000000 */
+        movew   #0x068f, 0xfffff116     /* 8Meg, enable, 0ws */
+
+        moveb   #0x40,   0xfffff300     /* IVR */
+        movel   #0x007FFFFF, %d0        /* IMR */
+        movel   %d0,     0xfffff304
+
+        moveb   0xfffff42b, %d0
+        andb    #0xe0,   %d0
+        moveb   %d0,     0xfffff42b
+
+        moveb   #0x08,   0xfffff907     /* Ignore CTS */
+        movew   #0x010b, 0xfffff902     /* BAUD to 9600 */
+        movew   #0xe100, 0xfffff900     /* enable */
+#endif
+
+        movew   #16384, %d0  /* PLL settle wait loop */
+L0:
+        subw    #1, %d0
+        bne     L0
+#ifdef DEBUG
+        moveq   #70, %d7                /* 'F' */
+        moveb   %d7,0xfffff907          /* No absolute addresses */
+pclp1:
+        movew   0xfffff906, %d7
+        andw    #0x2000, %d7
+        beq     pclp1
+#endif /* DEBUG */
+
+#ifdef DEBUG
+        moveq   #82, %d7                /* 'R' */
+        moveb   %d7,0xfffff907          /* No absolute addresses */
+pclp3:
+        movew   0xfffff906, %d7
+        andw    #0x2000, %d7
+        beq     pclp3
+#endif /* DEBUG */
+        moveal  #0x007ffff0, %ssp
+        moveal  #_sbss, %a0
+        moveal  #_ebss, %a1
+
+        /* Copy 0 to %a0 until %a0 >= %a1 */
+L1:
+        movel   #0, %a0@+
+        cmpal   %a0, %a1
+        bhi     L1
+
+#ifdef DEBUG
+        moveq   #67, %d7                /* 'C' */
+        jsr     putc
+#endif /* DEBUG */
+
+        pea     0
+        pea     env
+        pea     %sp@(4)
+        pea     0
+
+#ifdef DEBUG
+        moveq   #70, %d7                /* 'F' */
+        jsr     putc
+#endif /* DEBUG */
+
+lp:
+        jsr     start_kernel
+        jmp lp
+_exit:
+
+        jmp     _exit
+
+__main:
+        /* nothing */
+        rts
+
+#ifdef DEBUG
+putc:
+        moveb   %d7,0xfffff907
+pclp:
+        movew   0xfffff906, %d7
+        andw    #0x2000, %d7
+        beq     pclp
+        rts
+#endif /* DEBUG */
+
+        .data
+
+/*
+ *      Set up the usable of RAM stuff. Size of RAM is determined then
+ *      an initial stack set up at the end.
+ */
+.align 4
+_ramvec:
+.long   0
+_rambase:
+.long   0
+_ramstart:
+.long   0
+_ramend:
+.long   0
+
+env:
+        .long   0
diff --git a/arch/m68k/platform/68328/head-rom.S b/arch/m68k/platform/68328/head-rom.S
new file mode 100644
index 000000000000..6ec77d3ea0b3
--- /dev/null
+++ b/arch/m68k/platform/68328/head-rom.S
@@ -0,0 +1,110 @@
+        
+        .global _start
+        .global _stext
+
+        .global _rambase
+        .global _ramvec
+        .global _ramstart
+        .global _ramend
+
+#ifdef CONFIG_INIT_LCD
+        .global splash_bits
+#endif
+
+        .data
+
+/*
+ *      Set up the usable of RAM stuff. Size of RAM is determined then
+ *      an initial stack set up at the end.
+ */
+.align 4
+_ramvec:
+.long   0
+_rambase:
+.long   0
+_ramstart:
+.long   0
+_ramend:
+.long   0
+
+#define RAMEND  (CONFIG_RAMBASE + CONFIG_RAMSIZE)
+
+#ifdef CONFIG_INIT_LCD
+splash_bits:
+#include "bootlogo.rh"
+#endif
+        
+        .text
+_start:
+_stext: movew   #0x2700,%sr
+#ifdef CONFIG_INIT_LCD
+        movel   #splash_bits, 0xfffffA00 /* LSSA */
+        moveb   #0x28,   0xfffffA05     /* LVPW */
+        movew   #0x280,  0xFFFFFa08     /* LXMAX */
+        movew   #0x1df,  0xFFFFFa0a     /* LYMAX */
+        moveb   #0,      0xfffffa29     /* LBAR */
+        moveb   #0,      0xfffffa25     /* LPXCD */
+        moveb   #0x08,   0xFFFFFa20     /* LPICF */
+        moveb   #0x01,   0xFFFFFA21     /* -ve pol */
+        moveb   #0x81,   0xfffffA27     /* LCKCON */
+        movew   #0xff00, 0xfffff412     /* LCD pins */
+#endif
+        moveal  #RAMEND-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp
+        movew   #32767, %d0  /* PLL settle wait loop */
+1:      subq    #1, %d0
+        bne     1b
+
+        /* Copy data segment from ROM to RAM */
+        moveal  #_etext, %a0
+        moveal  #_sdata, %a1
+        moveal  #_edata, %a2
+
+        /* Copy %a0 to %a1 until %a1 == %a2 */
+1:      movel   %a0@+, %a1@+
+        cmpal   %a1, %a2
+        bhi     1b
+
+        moveal  #_sbss, %a0
+        moveal  #_ebss, %a1
+        /* Copy 0 to %a0 until %a0 == %a1 */
+        
+1:
+        clrl    %a0@+
+        cmpal   %a0, %a1
+        bhi     1b
+
+        movel   #_sdata, %d0    
+        movel   %d0, _rambase        
+        movel   #_ebss, %d0
+        movel   %d0, _ramstart
+        movel   #RAMEND-CONFIG_MEMORY_RESERVE*0x100000, %d0
+        movel   %d0, _ramend
+        movel   #CONFIG_VECTORBASE,     %d0
+        movel   %d0, _ramvec
+        
+/*
+ * load the current task pointer and stack
+ */
+        lea     init_thread_union, %a0
+        lea     0x2000(%a0), %sp
+
+1:      jsr     start_kernel
+        bra 1b
+_exit:
+
+        jmp     _exit
+
+
+putc:
+        moveb   %d7,0xfffff907
+1:
+        movew   0xfffff906, %d7
+        andw    #0x2000, %d7
+        beq     1b
+        rts
+
+        .data
+env:
+        .long   0
+        .text
+
diff --git a/arch/m68k/platform/68328/ints.c b/arch/m68k/platform/68328/ints.c
new file mode 100644
index 000000000000..e5631831a200
--- /dev/null
+++ b/arch/m68k/platform/68328/ints.c
@@ -0,0 +1,186 @@
+/*
+ * linux/arch/m68knommu/platform/68328/ints.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright 1996 Roman Zippel
+ * Copyright 1999 D. Jeff Dionne <jeff@rt-control.com>
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <asm/traps.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+
+#if defined(CONFIG_M68328)
+#include <asm/MC68328.h>
+#elif defined(CONFIG_M68EZ328)
+#include <asm/MC68EZ328.h>
+#elif defined(CONFIG_M68VZ328)
+#include <asm/MC68VZ328.h>
+#endif
+
+/* assembler routines */
+asmlinkage void system_call(void);
+asmlinkage void buserr(void);
+asmlinkage void trap(void);
+asmlinkage void trap3(void);
+asmlinkage void trap4(void);
+asmlinkage void trap5(void);
+asmlinkage void trap6(void);
+asmlinkage void trap7(void);
+asmlinkage void trap8(void);
+asmlinkage void trap9(void);
+asmlinkage void trap10(void);
+asmlinkage void trap11(void);
+asmlinkage void trap12(void);
+asmlinkage void trap13(void);
+asmlinkage void trap14(void);
+asmlinkage void trap15(void);
+asmlinkage void trap33(void);
+asmlinkage void trap34(void);
+asmlinkage void trap35(void);
+asmlinkage void trap36(void);
+asmlinkage void trap37(void);
+asmlinkage void trap38(void);
+asmlinkage void trap39(void);
+asmlinkage void trap40(void);
+asmlinkage void trap41(void);
+asmlinkage void trap42(void);
+asmlinkage void trap43(void);
+asmlinkage void trap44(void);
+asmlinkage void trap45(void);
+asmlinkage void trap46(void);
+asmlinkage void trap47(void);
+asmlinkage irqreturn_t bad_interrupt(int, void *);
+asmlinkage irqreturn_t inthandler(void);
+asmlinkage irqreturn_t inthandler1(void);
+asmlinkage irqreturn_t inthandler2(void);
+asmlinkage irqreturn_t inthandler3(void);
+asmlinkage irqreturn_t inthandler4(void);
+asmlinkage irqreturn_t inthandler5(void);
+asmlinkage irqreturn_t inthandler6(void);
+asmlinkage irqreturn_t inthandler7(void);
+
+extern e_vector *_ramvec;
+
+/* The number of spurious interrupts */
+volatile unsigned int num_spurious;
+
+/* The 68k family did not have a good way to determine the source
+ * of interrupts until later in the family.  The EC000 core does
+ * not provide the vector number on the stack, we vector everything
+ * into one vector and look in the blasted mask register...
+ * This code is designed to be fast, almost constant time, not clean!
+ */
+void process_int(int vec, struct pt_regs *fp)
+{
+        int irq;
+        int mask;
+
+        unsigned long pend = ISR;
+
+        while (pend) {
+                if (pend & 0x0000ffff) {
+                        if (pend & 0x000000ff) {
+                                if (pend & 0x0000000f) {
+                                        mask = 0x00000001;
+                                        irq = 0;
+                                } else {
+                                        mask = 0x00000010;
+                                        irq = 4;
+                                }
+                        } else {
+                                if (pend & 0x00000f00) {
+                                        mask = 0x00000100;
+                                        irq = 8;
+                                } else {
+                                        mask = 0x00001000;
+                                        irq = 12;
+                                }
+                        }
+                } else {
+                        if (pend & 0x00ff0000) {
+                                if (pend & 0x000f0000) {
+                                        mask = 0x00010000;
+                                        irq = 16;
+                                } else {
+                                        mask = 0x00100000;
+                                        irq = 20;
+                                }
+                        } else {
+                                if (pend & 0x0f000000) {
+                                        mask = 0x01000000;
+                                        irq = 24;
+                                } else {
+                                        mask = 0x10000000;
+                                        irq = 28;
+                                }
+                        }
+                }
+
+                while (! (mask & pend)) {
+                        mask <<=1;
+                        irq++;
+                }
+
+                do_IRQ(irq, fp);
+                pend &= ~mask;
+        }
+}
+
+static void intc_irq_unmask(struct irq_data *d)
+{
+        IMR &= ~(1 << d->irq);
+}
+
+static void intc_irq_mask(struct irq_data *d)
+{
+        IMR |= (1 << d->irq);
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "M68K-INTC",
+        .irq_mask       = intc_irq_mask,
+        .irq_unmask     = intc_irq_unmask,
+};
+
+/*
+ * This function should be called during kernel startup to initialize
+ * the machine vector table.
+ */
+void __init init_IRQ(void)
+{
+        int i;
+
+        /* set up the vectors */
+        for (i = 72; i < 256; ++i)
+                _ramvec[i] = (e_vector) bad_interrupt;
+
+        _ramvec[32] = system_call;
+
+        _ramvec[65] = (e_vector) inthandler1;
+        _ramvec[66] = (e_vector) inthandler2;
+        _ramvec[67] = (e_vector) inthandler3;
+        _ramvec[68] = (e_vector) inthandler4;
+        _ramvec[69] = (e_vector) inthandler5;
+        _ramvec[70] = (e_vector) inthandler6;
+        _ramvec[71] = (e_vector) inthandler7;
+
+        IVR = 0x40; /* Set DragonBall IVR (interrupt base) to 64 */
+
+        /* turn off all interrupts */
+        IMR = ~0;
+
+        for (i = 0; (i < NR_IRQS); i++) {
+                set_irq_chip(i, &intc_irq_chip);
+                set_irq_handler(i, handle_level_irq);
+        }
+}
+
diff --git a/arch/m68k/platform/68328/romvec.S b/arch/m68k/platform/68328/romvec.S
new file mode 100644
index 000000000000..31084466eae8
--- /dev/null
+++ b/arch/m68k/platform/68328/romvec.S
@@ -0,0 +1,35 @@
+/*
+ * linux/arch/m68knommu/platform/68328/romvec.S
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright 1996 Roman Zippel
+ * Copyright 1999 D. Jeff Dionne <jeff@rt-control.com>
+ * Copyright 2006 Greg Ungerer <gerg@snapgear.com>
+ */
+
+.global _start
+.global _buserr
+.global trap
+.global system_call
+
+.section .romvec
+
+e_vectors:
+.long CONFIG_RAMBASE+CONFIG_RAMSIZE-4, _start, buserr, trap
+.long trap, trap, trap, trap
+.long trap, trap, trap, trap
+.long trap, trap, trap, trap
+.long trap, trap, trap, trap
+.long trap, trap, trap, trap
+.long trap, trap, trap, trap
+.long trap, trap, trap, trap
+/* TRAP #0-15 */
+.long system_call, trap, trap, trap
+.long trap, trap, trap, trap
+.long trap, trap, trap, trap
+.long trap, trap, trap, trap
+.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+
diff --git a/arch/m68k/platform/68328/timers.c b/arch/m68k/platform/68328/timers.c
new file mode 100644
index 000000000000..309f725995bf
--- /dev/null
+++ b/arch/m68k/platform/68328/timers.c
@@ -0,0 +1,134 @@
+/***************************************************************************/
+
+/*
+ *  linux/arch/m68knommu/platform/68328/timers.c
+ *
+ *  Copyright (C) 1993 Hamish Macdonald
+ *  Copyright (C) 1999 D. Jeff Dionne
+ *  Copyright (C) 2001 Georges Menie, Ken Desmet
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+/***************************************************************************/
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/clocksource.h>
+#include <asm/setup.h>
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/machdep.h>
+#include <asm/MC68VZ328.h>
+
+/***************************************************************************/
+
+#if defined(CONFIG_DRAGEN2)
+/* with a 33.16 MHz clock, this will give usec resolution to the time functions */
+#define CLOCK_SOURCE    TCTL_CLKSOURCE_SYSCLK
+#define CLOCK_PRE       7
+#define TICKS_PER_JIFFY 41450
+
+#elif defined(CONFIG_XCOPILOT_BUGS)
+/*
+ * The only thing I know is that CLK32 is not available on Xcopilot
+ * I have little idea about what frequency SYSCLK has on Xcopilot.
+ * The values for prescaler and compare registers were simply
+ * taken from the original source
+ */
+#define CLOCK_SOURCE    TCTL_CLKSOURCE_SYSCLK
+#define CLOCK_PRE       2
+#define TICKS_PER_JIFFY 0xd7e4
+
+#else
+/* default to using the 32Khz clock */
+#define CLOCK_SOURCE    TCTL_CLKSOURCE_32KHZ
+#define CLOCK_PRE       31
+#define TICKS_PER_JIFFY 10
+#endif
+
+static u32 m68328_tick_cnt;
+
+/***************************************************************************/
+
+static irqreturn_t hw_tick(int irq, void *dummy)
+{
+        /* Reset Timer1 */
+        TSTAT &= 0;
+
+        m68328_tick_cnt += TICKS_PER_JIFFY;
+        return arch_timer_interrupt(irq, dummy);
+}
+
+/***************************************************************************/
+
+static struct irqaction m68328_timer_irq = {
+        .name    = "timer",
+        .flags   = IRQF_DISABLED | IRQF_TIMER,
+        .handler = hw_tick,
+};
+
+/***************************************************************************/
+
+static cycle_t m68328_read_clk(struct clocksource *cs)
+{
+        unsigned long flags;
+        u32 cycles;
+
+        local_irq_save(flags);
+        cycles = m68328_tick_cnt + TCN;
+        local_irq_restore(flags);
+
+        return cycles;
+}
+
+/***************************************************************************/
+
+static struct clocksource m68328_clk = {
+        .name   = "timer",
+        .rating = 250,
+        .read   = m68328_read_clk,
+        .shift  = 20,
+        .mask   = CLOCKSOURCE_MASK(32),
+        .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+/***************************************************************************/
+
+void hw_timer_init(void)
+{
+        /* disable timer 1 */
+        TCTL = 0;
+
+        /* set ISR */
+        setup_irq(TMR_IRQ_NUM, &m68328_timer_irq);
+
+        /* Restart mode, Enable int, Set clock source */
+        TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
+        TPRER = CLOCK_PRE;
+        TCMP = TICKS_PER_JIFFY;
+
+        /* Enable timer 1 */
+        TCTL |= TCTL_TEN;
+        m68328_clk.mult = clocksource_hz2mult(TICKS_PER_JIFFY*HZ, m68328_clk.shift);
+        clocksource_register(&m68328_clk);
+}
+
+/***************************************************************************/
+
+void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec)
+{
+        long now = RTCTIME;
+
+        *year = *mon = *day = 1;
+        *hour = (now >> 24) % 24;
+        *min = (now >> 16) % 60;
+        *sec = now % 60;
+}
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/68360/Makefile b/arch/m68k/platform/68360/Makefile
new file mode 100644
index 000000000000..cf5af73a5789
--- /dev/null
+++ b/arch/m68k/platform/68360/Makefile
@@ -0,0 +1,10 @@
+#
+# Makefile for arch/m68knommu/platform/68360.
+#
+
+obj-y := config.o commproc.o entry.o ints.o
+
+extra-y := head.o
+
+$(obj)/head.o: $(obj)/head-$(MODEL).o
+        ln -sf head-$(MODEL).o $(obj)/head.o
diff --git a/arch/m68k/platform/68360/commproc.c b/arch/m68k/platform/68360/commproc.c
new file mode 100644
index 000000000000..8e4e10cc0080
--- /dev/null
+++ b/arch/m68k/platform/68360/commproc.c
@@ -0,0 +1,308 @@
+/*
+ * General Purpose functions for the global management of the
+ * Communication Processor Module.
+ *
+ * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
+ * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
+ *
+ * In addition to the individual control of the communication
+ * channels, there are a few functions that globally affect the
+ * communication processor.
+ *
+ * Buffer descriptors must be allocated from the dual ported memory
+ * space.  The allocator for that is here.  When the communication
+ * process is reset, we reclaim the memory available.  There is
+ * currently no deallocator for this memory.
+ * The amount of space available is platform dependent.  On the
+ * MBX, the EPPC software loads additional microcode into the
+ * communication processor, and uses some of the DP ram for this
+ * purpose.  Current, the first 512 bytes and the last 256 bytes of
+ * memory are used.  Right now I am conservative and only use the
+ * memory that can never be used for microcode.  If there are
+ * applications that require more DP ram, we can expand the boundaries
+ * but then we have to be careful of any downloaded microcode.
+ *
+ */
+
+/*
+ * Michael Leslie <mleslie@lineo.com>
+ * adapted Dan Malek's ppc8xx drivers to M68360
+ *
+ */
+
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <asm/irq.h>
+#include <asm/m68360.h>
+#include <asm/commproc.h>
+
+/* #include <asm/page.h> */
+/* #include <asm/pgtable.h> */
+extern void *_quicc_base;
+extern unsigned int system_clock;
+
+
+static uint dp_alloc_base;      /* Starting offset in DP ram */
+static uint dp_alloc_top;       /* Max offset + 1 */
+
+#if 0
+static  void    *host_buffer;   /* One page of host buffer */
+static  void    *host_end;          /* end + 1 */
+#endif
+
+/* struct  cpm360_t *cpmp; */         /* Pointer to comm processor space */
+
+QUICC  *pquicc;
+/* QUICC  *quicc_dpram; */ /* mleslie - temporary; use extern pquicc elsewhere instead */
+
+
+/* CPM interrupt vector functions. */
+struct  cpm_action {
+        void    (*handler)(void *);
+        void    *dev_id;
+};
+static  struct  cpm_action cpm_vecs[CPMVEC_NR];
+static  void    cpm_interrupt(int irq, void * dev, struct pt_regs * regs);
+static  void    cpm_error_interrupt(void *);
+
+/* prototypes: */
+void cpm_install_handler(int vec, void (*handler)(), void *dev_id);
+void m360_cpm_reset(void);
+
+
+
+
+void m360_cpm_reset()
+{
+/*      pte_t              *pte; */
+
+        pquicc = (struct quicc *)(_quicc_base); /* initialized in crt0_rXm.S */
+
+        /* Perform a CPM reset. */
+        pquicc->cp_cr = (SOFTWARE_RESET | CMD_FLAG);
+
+        /* Wait for CPM to become ready (should be 2 clocks). */
+        while (pquicc->cp_cr & CMD_FLAG);
+
+        /* On the recommendation of the 68360 manual, p. 7-60
+         * - Set sdma interrupt service mask to 7
+         * - Set sdma arbitration ID to 4
+         */
+        pquicc->sdma_sdcr = 0x0740;
+
+
+        /* Claim the DP memory for our use.
+         */
+        dp_alloc_base = CPM_DATAONLY_BASE;
+        dp_alloc_top = dp_alloc_base + CPM_DATAONLY_SIZE;
+
+
+        /* Set the host page for allocation.
+         */
+        /*      host_buffer = host_page_addr; */
+        /*      host_end = host_page_addr + PAGE_SIZE; */
+
+        /*      pte = find_pte(&init_mm, host_page_addr); */
+        /*      pte_val(*pte) |= _PAGE_NO_CACHE; */
+        /*      flush_tlb_page(current->mm->mmap, host_buffer); */
+
+        /* Tell everyone where the comm processor resides.
+        */
+/*      cpmp = (cpm360_t *)commproc; */
+}
+
+
+/* This is called during init_IRQ.  We used to do it above, but this
+ * was too early since init_IRQ was not yet called.
+ */
+void
+cpm_interrupt_init(void)
+{
+        /* Initialize the CPM interrupt controller.
+         * NOTE THAT pquicc had better have been initialized!
+         * reference: MC68360UM p. 7-377
+         */
+        pquicc->intr_cicr =
+                (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
+                (CPM_INTERRUPT << 13) |
+                CICR_HP_MASK |
+                (CPM_VECTOR_BASE << 5) |
+                CICR_SPS;
+
+        /* mask all CPM interrupts from reaching the cpu32 core: */
+        pquicc->intr_cimr = 0;
+
+
+        /* mles - If I understand correctly, the 360 just pops over to the CPM
+         * specific vector, obviating the necessity to vector through the IRQ
+         * whose priority the CPM is set to. This needs a closer look, though.
+         */
+
+        /* Set our interrupt handler with the core CPU. */
+/*      if (request_irq(CPM_INTERRUPT, cpm_interrupt, 0, "cpm", NULL) != 0) */
+/*              panic("Could not allocate CPM IRQ!"); */
+
+        /* Install our own error handler.
+         */
+        /* I think we want to hold off on this one for the moment - mles */
+        /* cpm_install_handler(CPMVEC_ERROR, cpm_error_interrupt, NULL); */
+
+        /* master CPM interrupt enable */
+        /* pquicc->intr_cicr |= CICR_IEN; */ /* no such animal for 360 */
+}
+
+
+
+/* CPM interrupt controller interrupt.
+*/
+static  void
+cpm_interrupt(int irq, void * dev, struct pt_regs * regs)
+{
+        /* uint vec; */
+
+        /* mles: Note that this stuff is currently being performed by
+         * M68360_do_irq(int vec, struct pt_regs *fp), in ../ints.c  */
+
+        /* figure out the vector */
+        /* call that vector's handler */
+        /* clear the irq's bit in the service register */
+
+#if 0 /* old 860 stuff: */
+        /* Get the vector by setting the ACK bit and then reading
+         * the register.
+         */
+        ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr = 1;
+        vec = ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr;
+        vec >>= 11;
+
+
+        if (cpm_vecs[vec].handler != 0)
+                (*cpm_vecs[vec].handler)(cpm_vecs[vec].dev_id);
+        else
+                ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec);
+
+        /* After servicing the interrupt, we have to remove the status
+         * indicator.
+         */
+        ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr |= (1 << vec);
+#endif
+
+}
+
+/* The CPM can generate the error interrupt when there is a race condition
+ * between generating and masking interrupts.  All we have to do is ACK it
+ * and return.  This is a no-op function so we don't need any special
+ * tests in the interrupt handler.
+ */
+static  void
+cpm_error_interrupt(void *dev)
+{
+}
+
+/* Install a CPM interrupt handler.
+*/
+void
+cpm_install_handler(int vec, void (*handler)(), void *dev_id)
+{
+
+        request_irq(vec, handler, 0, "timer", dev_id);
+
+/*      if (cpm_vecs[vec].handler != 0) */
+/*              printk(KERN_INFO "CPM interrupt %x replacing %x\n", */
+/*                      (uint)handler, (uint)cpm_vecs[vec].handler); */
+/*      cpm_vecs[vec].handler = handler; */
+/*      cpm_vecs[vec].dev_id = dev_id; */
+
+        /*              ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr |= (1 << vec); */
+/*      pquicc->intr_cimr |= (1 << vec); */
+
+}
+
+/* Free a CPM interrupt handler.
+*/
+void
+cpm_free_handler(int vec)
+{
+        cpm_vecs[vec].handler = NULL;
+        cpm_vecs[vec].dev_id = NULL;
+        /* ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec); */
+        pquicc->intr_cimr &= ~(1 << vec);
+}
+
+
+
+
+/* Allocate some memory from the dual ported ram.  We may want to
+ * enforce alignment restrictions, but right now everyone is a good
+ * citizen.
+ */
+uint
+m360_cpm_dpalloc(uint size)
+{
+        uint    retloc;
+
+        if ((dp_alloc_base + size) >= dp_alloc_top)
+                return(CPM_DP_NOSPACE);
+
+        retloc = dp_alloc_base;
+        dp_alloc_base += size;
+
+        return(retloc);
+}
+
+
+#if 0 /* mleslie - for now these are simply kmalloc'd */
+/* We also own one page of host buffer space for the allocation of
+ * UART "fifos" and the like.
+ */
+uint
+m360_cpm_hostalloc(uint size)
+{
+        uint    retloc;
+
+        if ((host_buffer + size) >= host_end)
+                return(0);
+
+        retloc = host_buffer;
+        host_buffer += size;
+
+        return(retloc);
+}
+#endif
+
+
+/* Set a baud rate generator.  This needs lots of work.  There are
+ * four BRGs, any of which can be wired to any channel.
+ * The internal baud rate clock is the system clock divided by 16.
+ * This assumes the baudrate is 16x oversampled by the uart.
+ */
+/* #define BRG_INT_CLK  (((bd_t *)__res)->bi_intfreq * 1000000) */
+#define BRG_INT_CLK             system_clock
+#define BRG_UART_CLK    (BRG_INT_CLK/16)
+
+void
+m360_cpm_setbrg(uint brg, uint rate)
+{
+        volatile uint   *bp;
+
+        /* This is good enough to get SMCs running.....
+         */
+        /* bp = (uint *)&cpmp->cp_brgc1; */
+        bp = (volatile uint *)(&pquicc->brgc[0].l);
+        bp += brg;
+        *bp = ((BRG_UART_CLK / rate - 1) << 1) | CPM_BRG_EN;
+}
+
+
+/*
+ * Local variables:
+ *  c-indent-level: 4
+ *  c-basic-offset: 4
+ *  tab-width: 4
+ * End:
+ */
diff --git a/arch/m68k/platform/68360/config.c b/arch/m68k/platform/68360/config.c
new file mode 100644
index 000000000000..9dd5bca38749
--- /dev/null
+++ b/arch/m68k/platform/68360/config.c
@@ -0,0 +1,186 @@
+/*
+ *  linux/arch/m68knommu/platform/68360/config.c
+ *
+ *  Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
+ *  Copyright (C) 1993 Hamish Macdonald
+ *  Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <stdarg.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+
+#include <asm/setup.h>
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/machdep.h>
+#include <asm/m68360.h>
+
+#ifdef CONFIG_UCQUICC
+#include <asm/bootstd.h>
+#endif
+
+extern void m360_cpm_reset(void);
+
+// Mask to select if the PLL prescaler is enabled.
+#define MCU_PREEN   ((unsigned short)(0x0001 << 13))
+
+#if defined(CONFIG_UCQUICC)
+#define OSCILLATOR  (unsigned long int)33000000
+#endif
+
+unsigned long int system_clock;
+
+extern QUICC *pquicc;
+
+/* TODO  DON"T Hard Code this */
+/* calculate properly using the right PLL and prescaller */
+// unsigned int system_clock = 33000000l;
+extern unsigned long int system_clock; //In kernel setup.c
+
+
+static irqreturn_t hw_tick(int irq, void *dummy)
+{
+  /* Reset Timer1 */
+  /* TSTAT &= 0; */
+
+  pquicc->timer_ter1 = 0x0002; /* clear timer event */
+
+  return arch_timer_interrupt(irq, dummy);
+}
+
+static struct irqaction m68360_timer_irq = {
+        .name    = "timer",
+        .flags   = IRQF_DISABLED | IRQF_TIMER,
+        .handler = hw_tick,
+};
+
+void hw_timer_init(void)
+{
+  unsigned char prescaler;
+  unsigned short tgcr_save;
+
+#if 0
+  /* Restart mode, Enable int, 32KHz, Enable timer */
+  TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
+  /* Set prescaler (Divide 32KHz by 32)*/
+  TPRER = 31;
+  /* Set compare register  32Khz / 32 / 10 = 100 */
+  TCMP = 10;                                                              
+
+  request_irq(IRQ_MACHSPEC | 1, timer_routine, 0, "timer", NULL);
+#endif
+
+  /* General purpose quicc timers: MC68360UM p7-20 */
+
+  /* Set up timer 1 (in [1..4]) to do 100Hz */
+  tgcr_save = pquicc->timer_tgcr & 0xfff0;
+  pquicc->timer_tgcr  = tgcr_save; /* stop and reset timer 1 */
+  /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
+
+  prescaler = 8;
+  pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */
+                           (unsigned short)((prescaler - 1) << 8);
+    
+  pquicc->timer_tcn1 = 0x0000; /* initial count */
+  /* calculate interval for 100Hz based on the _system_clock: */
+  pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */
+
+  pquicc->timer_ter1 = 0x0003; /* clear timer events */
+
+  /* enable timer 1 interrupt in CIMR */
+  setup_irq(CPMVEC_TIMER1, &m68360_timer_irq);
+
+  /* Start timer 1: */
+  tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001;
+  pquicc->timer_tgcr  = tgcr_save;
+}
+
+void BSP_gettod (int *yearp, int *monp, int *dayp,
+                   int *hourp, int *minp, int *secp)
+{
+}
+
+int BSP_set_clock_mmss(unsigned long nowtime)
+{
+#if 0
+  short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
+
+  tod->second1 = real_seconds / 10;
+  tod->second2 = real_seconds % 10;
+  tod->minute1 = real_minutes / 10;
+  tod->minute2 = real_minutes % 10;
+#endif
+  return 0;
+}
+
+void BSP_reset (void)
+{
+  local_irq_disable();
+  asm volatile (
+    "moveal #_start, %a0;\n"
+    "moveb #0, 0xFFFFF300;\n"
+    "moveal 0(%a0), %sp;\n"
+    "moveal 4(%a0), %a0;\n"
+    "jmp (%a0);\n"
+    );
+}
+
+unsigned char *scc1_hwaddr;
+static int errno;
+
+#if defined (CONFIG_UCQUICC)
+_bsc0(char *, getserialnum)
+_bsc1(unsigned char *, gethwaddr, int, a)
+_bsc1(char *, getbenv, char *, a)
+#endif
+
+
+void config_BSP(char *command, int len)
+{
+  unsigned char *p;
+
+  m360_cpm_reset();
+
+  /* Calculate the real system clock value. */
+  {
+     unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr);
+     if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128
+     {
+         int mf = (int)(pquicc->sim_pllcr & 0x0fff);
+         system_clock = (OSCILLATOR / 128) * (mf + 1);
+     }
+     else
+     {
+         int mf = (int)(pquicc->sim_pllcr & 0x0fff);
+         system_clock = (OSCILLATOR) * (mf + 1);
+     }
+  }
+
+  printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n");
+
+#if defined(CONFIG_UCQUICC) && 0
+  printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum());
+  p = scc1_hwaddr = gethwaddr(0);
+  printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
+         p[0], p[1], p[2], p[3], p[4], p[5]);
+
+  p = getbenv("APPEND");
+  if (p)
+    strcpy(p,command);
+  else
+    command[0] = 0;
+#else
+  scc1_hwaddr = "\00\01\02\03\04\05";
+#endif
+ 
+  mach_gettod          = BSP_gettod;
+  mach_reset           = BSP_reset;
+}
diff --git a/arch/m68k/platform/68360/entry.S b/arch/m68k/platform/68360/entry.S
new file mode 100644
index 000000000000..46c1b18c9dcb
--- /dev/null
+++ b/arch/m68k/platform/68360/entry.S
@@ -0,0 +1,184 @@
+/*
+ *  linux/arch/m68knommu/platform/68360/entry.S
+ *
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *  Copyright (C) 2001 SED Systems, a Division of Calian Ltd.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file README.legal in the main directory of this archive
+ * for more details.
+ *
+ * Linux/m68k support by Hamish Macdonald
+ * M68360 Port by SED Systems, and Lineo.
+ */
+
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/thread_info.h>
+#include <asm/unistd.h>
+#include <asm/errno.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/traps.h>
+#include <asm/asm-offsets.h>
+#include <asm/entry.h>
+
+.text
+
+.globl system_call
+.globl resume
+.globl ret_from_exception
+.globl ret_from_signal
+.globl sys_call_table
+.globl ret_from_interrupt
+.globl bad_interrupt
+.globl inthandler
+
+badsys:
+        movel   #-ENOSYS,%sp@(PT_OFF_D0)
+        jra     ret_from_exception
+
+do_trace:
+        movel   #-ENOSYS,%sp@(PT_OFF_D0) /* needed for strace*/
+        subql   #4,%sp
+        SAVE_SWITCH_STACK
+        jbsr    syscall_trace_enter
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        movel   %sp@(PT_OFF_ORIG_D0),%d1
+        movel   #-ENOSYS,%d0
+        cmpl    #NR_syscalls,%d1
+        jcc     1f
+        lsl     #2,%d1
+        lea     sys_call_table, %a0
+        jbsr    %a0@(%d1)
+
+1:      movel   %d0,%sp@(PT_OFF_D0)     /* save the return value */
+        subql   #4,%sp                  /* dummy return address */
+        SAVE_SWITCH_STACK
+        jbsr    syscall_trace_leave
+
+ret_from_signal:
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        jra     ret_from_exception
+
+ENTRY(system_call)
+        SAVE_ALL
+
+        /* save top of frame*/
+        pea     %sp@
+        jbsr    set_esp0
+        addql   #4,%sp
+
+        movel   %sp@(PT_OFF_ORIG_D0),%d0
+
+        movel   %sp,%d1                 /* get thread_info pointer */
+        andl    #-THREAD_SIZE,%d1
+        movel   %d1,%a2
+        btst    #(TIF_SYSCALL_TRACE%8),%a2@(TI_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
+        jne     do_trace
+        cmpl    #NR_syscalls,%d0
+        jcc     badsys
+        lsl     #2,%d0
+        lea     sys_call_table,%a0
+        movel   %a0@(%d0), %a0
+        jbsr    %a0@
+        movel   %d0,%sp@(PT_OFF_D0)     /* save the return value*/
+
+ret_from_exception:
+        btst    #5,%sp@(PT_OFF_SR)      /* check if returning to kernel*/
+        jeq     Luser_return            /* if so, skip resched, signals*/
+
+Lkernel_return:
+        RESTORE_ALL
+
+Luser_return:
+        /* only allow interrupts when we are really the last one on the*/
+        /* kernel stack, otherwise stack overflow can occur during*/
+        /* heavy interrupt load*/
+        andw    #ALLOWINT,%sr
+
+        movel   %sp,%d1                 /* get thread_info pointer */
+        andl    #-THREAD_SIZE,%d1
+        movel   %d1,%a2
+1:
+        move    %a2@(TI_FLAGS),%d1      /* thread_info->flags */
+        jne     Lwork_to_do
+        RESTORE_ALL
+
+Lwork_to_do:
+        movel   %a2@(TI_FLAGS),%d1      /* thread_info->flags */
+        btst    #TIF_NEED_RESCHED,%d1
+        jne     reschedule
+
+Lsignal_return:
+        subql   #4,%sp                  /* dummy return address*/
+        SAVE_SWITCH_STACK
+        pea     %sp@(SWITCH_STACK_SIZE)
+        bsrw    do_signal
+        addql   #4,%sp
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        jra     1b
+
+/*
+ * This is the main interrupt handler, responsible for calling do_IRQ()
+ */
+inthandler:
+        SAVE_ALL
+        movew   %sp@(PT_OFF_FORMATVEC), %d0
+        and.l   #0x3ff, %d0
+        lsr.l   #0x02,  %d0
+
+        movel   %sp,%sp@-
+        movel   %d0,%sp@-               /*  put vector # on stack*/
+        jbsr    do_IRQ                  /*  process the IRQ*/
+3:      addql   #8,%sp                  /*  pop parameters off stack*/
+        bra     ret_from_interrupt
+
+ret_from_interrupt:
+        jeq     1f
+2:
+        RESTORE_ALL
+1:
+        moveb   %sp@(PT_OFF_SR), %d0
+        and     #7, %d0
+        jhi     2b
+        /* check if we need to do software interrupts */
+
+        movel   irq_stat+CPUSTAT_SOFTIRQ_PENDING,%d0
+        jeq     ret_from_exception
+
+        pea     ret_from_exception
+        jra     do_softirq
+
+
+/*
+ * Handler for uninitialized and spurious interrupts.
+ */
+bad_interrupt:
+        addql   #1,num_spurious
+        rte
+
+/*
+ * Beware - when entering resume, prev (the current task) is
+ * in a0, next (the new task) is in a1,so don't change these
+ * registers until their contents are no longer needed.
+ */
+ENTRY(resume)
+        movel   %a0,%d1                         /* save prev thread in d1 */
+        movew   %sr,%a0@(TASK_THREAD+THREAD_SR) /* save sr */
+        movel   %usp,%a2                        /* save usp */
+        movel   %a2,%a0@(TASK_THREAD+THREAD_USP)
+
+        SAVE_SWITCH_STACK
+        movel   %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack */
+        movel   %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new thread stack */
+        RESTORE_SWITCH_STACK
+
+        movel   %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore user stack */
+        movel   %a0,%usp
+        movew   %a1@(TASK_THREAD+THREAD_SR),%sr /* restore thread status reg */
+        rts
+
diff --git a/arch/m68k/platform/68360/head-ram.S b/arch/m68k/platform/68360/head-ram.S
new file mode 100644
index 000000000000..8eb94fb6b971
--- /dev/null
+++ b/arch/m68k/platform/68360/head-ram.S
@@ -0,0 +1,403 @@
+/* arch/m68knommu/platform/68360/head-ram.S
+ *
+ * Startup code for Motorola 68360
+ *
+ * Copyright 2001 (C) SED Systems, a Division of Calian Ltd.
+ * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S
+ * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7
+ *           uClinux Kernel
+ * Copyright (C) Michael Leslie <mleslie@lineo.com>
+ * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
+ * Copyright (C) 1998  D. Jeff Dionne <jeff@uclinux.org>,
+ *
+ */
+#define ASSEMBLY
+
+.global _stext
+.global _start
+
+.global _rambase
+.global _ramvec
+.global _ramstart
+.global _ramend
+
+.global _quicc_base
+.global _periph_base
+
+#define RAMEND                      (CONFIG_RAMBASE + CONFIG_RAMSIZE)
+#define ROMEND                      (CONFIG_ROMBASE + CONFIG_ROMSIZE)
+
+#define REGB                        0x1000
+#define PEPAR                       (_dprbase + REGB + 0x0016)
+#define GMR                         (_dprbase + REGB + 0x0040)
+#define OR0                         (_dprbase + REGB + 0x0054)
+#define BR0                         (_dprbase + REGB + 0x0050)
+#define OR1                         (_dprbase + REGB + 0x0064)
+#define BR1                         (_dprbase + REGB + 0x0060)
+#define OR4                         (_dprbase + REGB + 0x0094)
+#define BR4                         (_dprbase + REGB + 0x0090)
+#define OR6                         (_dprbase + REGB + 0x00b4)
+#define BR6                         (_dprbase + REGB + 0x00b0)
+#define OR7                         (_dprbase + REGB + 0x00c4)
+#define BR7                         (_dprbase + REGB + 0x00c0)
+
+#define MCR                         (_dprbase + REGB + 0x0000)
+#define AVR                         (_dprbase + REGB + 0x0008)
+
+#define SYPCR                       (_dprbase + REGB + 0x0022)
+
+#define PLLCR                       (_dprbase + REGB + 0x0010)
+#define CLKOCR                      (_dprbase + REGB + 0x000C)
+#define CDVCR                       (_dprbase + REGB + 0x0014)
+
+#define BKAR                        (_dprbase + REGB + 0x0030)
+#define BKCR                        (_dprbase + REGB + 0x0034)
+#define SWIV                        (_dprbase + REGB + 0x0023)
+#define PICR                        (_dprbase + REGB + 0x0026)
+#define PITR                        (_dprbase + REGB + 0x002A)
+
+/* Define for all memory configuration */
+#define MCU_SIM_GMR                 0x00000000
+#define SIM_OR_MASK                 0x0fffffff
+
+/* Defines for chip select zero - the flash */
+#define SIM_OR0_MASK                0x20000002
+#define SIM_BR0_MASK                0x00000001
+
+
+/* Defines for chip select one - the RAM */
+#define SIM_OR1_MASK                0x10000000
+#define SIM_BR1_MASK                0x00000001
+
+#define MCU_SIM_MBAR_ADRS           0x0003ff00
+#define MCU_SIM_MBAR_BA_MASK        0xfffff000
+#define MCU_SIM_MBAR_AS_MASK        0x00000001
+
+#define MCU_SIM_PEPAR               0x00B4
+    
+#define MCU_DISABLE_INTRPTS         0x2700
+#define MCU_SIM_AVR                 0x00
+    
+#define MCU_SIM_MCR                 0x00005cff
+
+#define MCU_SIM_CLKOCR              0x00
+#define MCU_SIM_PLLCR               0x8000
+#define MCU_SIM_CDVCR               0x0000
+
+#define MCU_SIM_SYPCR               0x0000
+#define MCU_SIM_SWIV                0x00
+#define MCU_SIM_PICR                0x0000
+#define MCU_SIM_PITR                0x0000
+
+
+#include <asm/m68360_regs.h>
+
+        
+/*
+ * By the time this RAM specific code begins to execute, DPRAM
+ * and DRAM should already be mapped and accessible.
+ */
+
+        .text
+_start:
+_stext:
+        nop
+        ori.w   #MCU_DISABLE_INTRPTS, %sr       /* disable interrupts: */
+        /* We should not need to setup the boot stack the reset should do it. */
+        movea.l #RAMEND, %sp                    /*set up stack at the end of DRAM:*/
+
+set_mbar_register:
+        moveq.l #0x07, %d1                      /* Setup MBAR */
+        movec   %d1, %dfc
+
+        lea.l   MCU_SIM_MBAR_ADRS, %a0
+        move.l  #_dprbase, %d0
+        andi.l  #MCU_SIM_MBAR_BA_MASK, %d0
+        ori.l   #MCU_SIM_MBAR_AS_MASK, %d0
+        moves.l %d0, %a0@
+
+        moveq.l #0x05, %d1
+        movec.l %d1, %dfc
+
+        /* Now we can begin to access registers in DPRAM */
+
+set_sim_mcr:
+        /* Set Module Configuration Register */
+        move.l  #MCU_SIM_MCR, MCR
+
+        /* to do:       Determine cause of reset */
+
+        /*
+         *       configure system clock MC68360 p. 6-40
+         *       (value +1)*osc/128 = system clock
+         */
+set_sim_clock:
+        move.w  #MCU_SIM_PLLCR, PLLCR
+        move.b  #MCU_SIM_CLKOCR, CLKOCR
+        move.w  #MCU_SIM_CDVCR, CDVCR
+
+        /* Wait for the PLL to settle */
+        move.w  #16384, %d0
+pll_settle_wait:
+        subi.w  #1, %d0
+        bne     pll_settle_wait
+
+        /* Setup the system protection register, and watchdog timer register */
+        move.b  #MCU_SIM_SWIV, SWIV
+        move.w  #MCU_SIM_PICR, PICR
+        move.w  #MCU_SIM_PITR, PITR
+        move.w  #MCU_SIM_SYPCR, SYPCR
+
+        /* Clear DPRAM - system + parameter */
+        movea.l #_dprbase, %a0
+        movea.l #_dprbase+0x2000, %a1
+
+        /* Copy 0 to %a0 until %a0 == %a1 */
+clear_dpram:
+        movel   #0, %a0@+
+        cmpal   %a0, %a1
+        bhi     clear_dpram
+
+configure_memory_controller:    
+        /* Set up Global Memory Register (GMR) */
+        move.l  #MCU_SIM_GMR, %d0
+        move.l  %d0, GMR
+
+configure_chip_select_0:
+        move.l  #RAMEND, %d0
+        subi.l  #__ramstart, %d0
+        subq.l  #0x01, %d0
+        eori.l  #SIM_OR_MASK, %d0
+        ori.l   #SIM_OR0_MASK, %d0
+        move.l  %d0, OR0
+
+        move.l  #__ramstart, %d0
+        ori.l   #SIM_BR0_MASK, %d0
+        move.l  %d0, BR0
+
+configure_chip_select_1:
+        move.l  #ROMEND, %d0
+        subi.l  #__rom_start, %d0
+        subq.l  #0x01, %d0
+        eori.l  #SIM_OR_MASK, %d0
+        ori.l   #SIM_OR1_MASK, %d0
+        move.l  %d0, OR1
+
+        move.l  #__rom_start, %d0
+        ori.l   #SIM_BR1_MASK, %d0
+        move.l  %d0, BR1
+
+        move.w  #MCU_SIM_PEPAR, PEPAR 
+
+        /* point to vector table: */
+        move.l  #_romvec, %a0
+        move.l  #_ramvec, %a1
+copy_vectors:
+        move.l  %a0@, %d0
+        move.l  %d0, %a1@
+        move.l  %a0@, %a1@
+        addq.l  #0x04, %a0
+        addq.l  #0x04, %a1
+        cmp.l   #_start, %a0
+        blt     copy_vectors
+
+        move.l  #_ramvec, %a1
+        movec   %a1, %vbr
+
+
+        /* Copy data segment from ROM to RAM */
+        moveal  #_stext, %a0
+        moveal  #_sdata, %a1
+        moveal  #_edata, %a2
+
+        /* Copy %a0 to %a1 until %a1 == %a2 */
+LD1:
+        move.l  %a0@, %d0
+        addq.l  #0x04, %a0
+        move.l  %d0, %a1@
+        addq.l  #0x04, %a1
+        cmp.l   #_edata, %a1
+        blt     LD1
+
+        moveal  #_sbss, %a0
+        moveal  #_ebss, %a1
+
+        /* Copy 0 to %a0 until %a0 == %a1 */
+L1:
+        movel   #0, %a0@+
+        cmpal   %a0, %a1
+        bhi     L1
+
+load_quicc:
+        move.l  #_dprbase, _quicc_base
+
+store_ram_size:
+        /* Set ram size information */
+        move.l  #_sdata, _rambase
+        move.l  #_ebss, _ramstart
+        move.l  #RAMEND, %d0
+        sub.l   #0x1000, %d0                    /* Reserve 4K for stack space.*/
+        move.l  %d0, _ramend                    /* Different from RAMEND.*/
+
+        pea     0
+        pea     env
+        pea     %sp@(4)
+        pea     0
+
+        lea     init_thread_union, %a2
+        lea     0x2000(%a2), %sp
+
+lp:
+        jsr     start_kernel
+
+_exit:
+        jmp     _exit
+
+
+        .data
+        .align 4
+env:
+        .long   0
+_quicc_base:
+        .long   0
+_periph_base:
+        .long   0
+_ramvec:
+        .long   0
+_rambase:
+        .long   0
+_ramstart:
+        .long   0
+_ramend:
+        .long   0
+_dprbase:
+        .long   0xffffe000
+
+        .text
+
+    /*
+     * These are the exception vectors at boot up, they are copied into RAM
+     * and then overwritten as needed.
+     */
+ 
+.section ".data..initvect","awx"
+    .long   RAMEND      /* Reset: Initial Stack Pointer                 - 0.  */
+    .long   _start      /* Reset: Initial Program Counter               - 1.  */
+    .long   buserr      /* Bus Error                                    - 2.  */
+    .long   trap        /* Address Error                                - 3.  */
+    .long   trap        /* Illegal Instruction                          - 4.  */
+    .long   trap        /* Divide by zero                               - 5.  */
+    .long   trap        /* CHK, CHK2 Instructions                       - 6.  */
+    .long   trap        /* TRAPcc, TRAPV Instructions                   - 7.  */
+    .long   trap        /* Privilege Violation                          - 8.  */
+    .long   trap        /* Trace                                        - 9.  */
+    .long   trap        /* Line 1010 Emulator                           - 10. */
+    .long   trap        /* Line 1111 Emualtor                           - 11. */
+    .long   trap        /* Harware Breakpoint                           - 12. */
+    .long   trap        /* (Reserved for Coprocessor Protocol Violation)- 13. */
+    .long   trap        /* Format Error                                 - 14. */
+    .long   trap        /* Uninitialized Interrupt                      - 15. */
+    .long   trap        /* (Unassigned, Reserver)                       - 16. */
+    .long   trap        /* (Unassigned, Reserver)                       - 17. */
+    .long   trap        /* (Unassigned, Reserver)                       - 18. */
+    .long   trap        /* (Unassigned, Reserver)                       - 19. */
+    .long   trap        /* (Unassigned, Reserver)                       - 20. */
+    .long   trap        /* (Unassigned, Reserver)                       - 21. */
+    .long   trap        /* (Unassigned, Reserver)                       - 22. */
+    .long   trap        /* (Unassigned, Reserver)                       - 23. */
+    .long   trap        /* Spurious Interrupt                           - 24. */
+    .long   trap        /* Level 1 Interrupt Autovector                 - 25. */
+    .long   trap        /* Level 2 Interrupt Autovector                 - 26. */
+    .long   trap        /* Level 3 Interrupt Autovector                 - 27. */
+    .long   trap        /* Level 4 Interrupt Autovector                 - 28. */
+    .long   trap        /* Level 5 Interrupt Autovector                 - 29. */
+    .long   trap        /* Level 6 Interrupt Autovector                 - 30. */
+    .long   trap        /* Level 7 Interrupt Autovector                 - 31. */
+    .long   system_call /* Trap Instruction Vectors 0                   - 32. */
+    .long   trap        /* Trap Instruction Vectors 1                   - 33. */
+    .long   trap        /* Trap Instruction Vectors 2                   - 34. */
+    .long   trap        /* Trap Instruction Vectors 3                   - 35. */
+    .long   trap        /* Trap Instruction Vectors 4                   - 36. */
+    .long   trap        /* Trap Instruction Vectors 5                   - 37. */
+    .long   trap        /* Trap Instruction Vectors 6                   - 38. */
+    .long   trap        /* Trap Instruction Vectors 7                   - 39. */
+    .long   trap        /* Trap Instruction Vectors 8                   - 40. */
+    .long   trap        /* Trap Instruction Vectors 9                   - 41. */
+    .long   trap        /* Trap Instruction Vectors 10                  - 42. */
+    .long   trap        /* Trap Instruction Vectors 11                  - 43. */
+    .long   trap        /* Trap Instruction Vectors 12                  - 44. */
+    .long   trap        /* Trap Instruction Vectors 13                  - 45. */
+    .long   trap        /* Trap Instruction Vectors 14                  - 46. */
+    .long   trap        /* Trap Instruction Vectors 15                  - 47. */
+    .long   0           /* (Reserved for Coprocessor)                   - 48. */
+    .long   0           /* (Reserved for Coprocessor)                   - 49. */
+    .long   0           /* (Reserved for Coprocessor)                   - 50. */
+    .long   0           /* (Reserved for Coprocessor)                   - 51. */
+    .long   0           /* (Reserved for Coprocessor)                   - 52. */
+    .long   0           /* (Reserved for Coprocessor)                   - 53. */
+    .long   0           /* (Reserved for Coprocessor)                   - 54. */
+    .long   0           /* (Reserved for Coprocessor)                   - 55. */
+    .long   0           /* (Reserved for Coprocessor)                   - 56. */
+    .long   0           /* (Reserved for Coprocessor)                   - 57. */
+    .long   0           /* (Reserved for Coprocessor)                   - 58. */
+    .long   0           /* (Unassigned, Reserved)                       - 59. */
+    .long   0           /* (Unassigned, Reserved)                       - 60. */
+    .long   0           /* (Unassigned, Reserved)                       - 61. */
+    .long   0           /* (Unassigned, Reserved)                       - 62. */
+    .long   0           /* (Unassigned, Reserved)                       - 63. */
+    /*                  The assignment of these vectors to the CPM is         */
+    /*                  dependent on the configuration of the CPM vba         */
+    /*                          fields.                                       */
+    .long   0           /* (User-Defined Vectors 1) CPM Error           - 64. */
+    .long   0           /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */
+    .long   0           /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */
+    .long   0           /* (User-Defined Vectors 4) CPM SMC2 / PIP      - 67. */
+    .long   0           /* (User-Defined Vectors 5) CPM SMC1            - 68. */
+    .long   0           /* (User-Defined Vectors 6) CPM SPI             - 69. */
+    .long   0           /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */
+    .long   0           /* (User-Defined Vectors 8) CPM Timer 4         - 71. */
+    .long   0           /* (User-Defined Vectors 9) CPM Reserved        - 72. */
+    .long   0           /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */
+    .long   0           /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */
+    .long   0           /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */
+    .long   0           /* (User-Defined Vectors 13) CPM Timer 3        - 76. */
+    .long   0           /* (User-Defined Vectors 14) CPM Reserved       - 77. */
+    .long   0           /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */
+    .long   0           /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */
+    .long   0           /* (User-Defined Vectors 17) CPM Reserved       - 80. */
+    .long   0           /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */
+    .long   0           /* (User-Defined Vectors 19) CPM Timer 2        - 82. */
+    .long   0           /* (User-Defined Vectors 21) CPM Reserved       - 83. */
+    .long   0           /* (User-Defined Vectors 22) CPM IDMA2          - 84. */
+    .long   0           /* (User-Defined Vectors 23) CPM IDMA1          - 85. */
+    .long   0           /* (User-Defined Vectors 24) CPM SDMA Bus Err   - 86. */
+    .long   0           /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */
+    .long   0           /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */
+    .long   0           /* (User-Defined Vectors 27) CPM Timer 1        - 89. */
+    .long   0           /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */
+    .long   0           /* (User-Defined Vectors 29) CPM SCC 4          - 91. */
+    .long   0           /* (User-Defined Vectors 30) CPM SCC 3          - 92. */
+    .long   0           /* (User-Defined Vectors 31) CPM SCC 2          - 93. */
+    .long   0           /* (User-Defined Vectors 32) CPM SCC 1          - 94. */
+    .long   0           /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */
+    /*                  I don't think anything uses the vectors after here.   */
+    .long   0           /* (User-Defined Vectors 34)                    - 96. */
+    .long   0,0,0,0,0               /* (User-Defined Vectors 35  -  39). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 40  -  49). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 50  -  59). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 60  -  69). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 70  -  79). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 80  -  89). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 90  -  99). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 100 - 109). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 110 - 119). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 120 - 129). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 130 - 139). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 140 - 149). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 150 - 159). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 160 - 169). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 170 - 179). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 180 - 189). */
+    .long   0,0,0                   /* (User-Defined Vectors 190 - 192). */
+.text
+ignore: rte
diff --git a/arch/m68k/platform/68360/head-rom.S b/arch/m68k/platform/68360/head-rom.S
new file mode 100644
index 000000000000..97510e55b802
--- /dev/null
+++ b/arch/m68k/platform/68360/head-rom.S
@@ -0,0 +1,414 @@
+/* arch/m68knommu/platform/68360/head-rom.S
+ *
+ * Startup code for Motorola 68360
+ *
+ * Copyright (C) SED Systems, a Division of Calian Ltd.
+ * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S
+ * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7
+ *           uClinux Kernel
+ * Copyright (C) Michael Leslie <mleslie@lineo.com>
+ * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
+ * Copyright (C) 1998  D. Jeff Dionne <jeff@uclinux.org>,
+ *
+ */
+
+.global _stext
+.global _sbss
+.global _start
+
+.global _rambase
+.global _ramvec
+.global _ramstart
+.global _ramend
+
+.global _quicc_base
+.global _periph_base
+
+#define RAMEND                      (CONFIG_RAMBASE + CONFIG_RAMSIZE)
+
+#define REGB                        0x1000
+#define PEPAR                       (_dprbase + REGB + 0x0016)
+#define GMR                         (_dprbase + REGB + 0x0040)
+#define OR0                         (_dprbase + REGB + 0x0054)
+#define BR0                         (_dprbase + REGB + 0x0050)
+
+#define OR1                         (_dprbase + REGB + 0x0064)
+#define BR1                         (_dprbase + REGB + 0x0060)
+
+#define OR2                         (_dprbase + REGB + 0x0074)
+#define BR2                         (_dprbase + REGB + 0x0070)
+
+#define OR3                         (_dprbase + REGB + 0x0084)
+#define BR3                         (_dprbase + REGB + 0x0080)
+
+#define OR4                         (_dprbase + REGB + 0x0094)
+#define BR4                         (_dprbase + REGB + 0x0090)
+
+#define OR5                         (_dprbase + REGB + 0x00A4)
+#define BR5                         (_dprbase + REGB + 0x00A0)
+
+#define OR6                         (_dprbase + REGB + 0x00b4)
+#define BR6                         (_dprbase + REGB + 0x00b0)
+
+#define OR7                         (_dprbase + REGB + 0x00c4)
+#define BR7                         (_dprbase + REGB + 0x00c0)
+
+#define MCR                         (_dprbase + REGB + 0x0000)
+#define AVR                         (_dprbase + REGB + 0x0008)
+
+#define SYPCR                       (_dprbase + REGB + 0x0022)
+
+#define PLLCR                       (_dprbase + REGB + 0x0010)
+#define CLKOCR                      (_dprbase + REGB + 0x000C)
+#define CDVCR                       (_dprbase + REGB + 0x0014)
+
+#define BKAR                        (_dprbase + REGB + 0x0030)
+#define BKCR                        (_dprbase + REGB + 0x0034)
+#define SWIV                        (_dprbase + REGB + 0x0023)
+#define PICR                        (_dprbase + REGB + 0x0026)
+#define PITR                        (_dprbase + REGB + 0x002A)
+
+/* Define for all memory configuration */
+#define MCU_SIM_GMR                 0x00000000
+#define SIM_OR_MASK                 0x0fffffff
+
+/* Defines for chip select zero - the flash */
+#define SIM_OR0_MASK                0x20000000
+#define SIM_BR0_MASK                0x00000001
+
+/* Defines for chip select one - the RAM */
+#define SIM_OR1_MASK                0x10000000
+#define SIM_BR1_MASK                0x00000001
+
+#define MCU_SIM_MBAR_ADRS           0x0003ff00
+#define MCU_SIM_MBAR_BA_MASK        0xfffff000
+#define MCU_SIM_MBAR_AS_MASK        0x00000001
+
+#define MCU_SIM_PEPAR               0x00B4
+    
+#define MCU_DISABLE_INTRPTS         0x2700
+#define MCU_SIM_AVR                 0x00
+    
+#define MCU_SIM_MCR                 0x00005cff
+
+#define MCU_SIM_CLKOCR              0x00
+#define MCU_SIM_PLLCR               0x8000
+#define MCU_SIM_CDVCR               0x0000
+
+#define MCU_SIM_SYPCR               0x0000
+#define MCU_SIM_SWIV                0x00
+#define MCU_SIM_PICR                0x0000
+#define MCU_SIM_PITR                0x0000
+
+
+#include <asm/m68360_regs.h>
+
+        
+/*
+ * By the time this RAM specific code begins to execute, DPRAM
+ * and DRAM should already be mapped and accessible.
+ */
+
+        .text
+_start:
+_stext:
+        nop
+        ori.w   #MCU_DISABLE_INTRPTS, %sr       /* disable interrupts: */
+        /* We should not need to setup the boot stack the reset should do it. */
+        movea.l #RAMEND, %sp            /* set up stack at the end of DRAM:*/
+
+
+set_mbar_register:
+        moveq.l #0x07, %d1                      /* Setup MBAR */
+        movec   %d1, %dfc
+
+        lea.l   MCU_SIM_MBAR_ADRS, %a0
+        move.l  #_dprbase, %d0
+        andi.l  #MCU_SIM_MBAR_BA_MASK, %d0
+        ori.l   #MCU_SIM_MBAR_AS_MASK, %d0
+        moves.l %d0, %a0@
+
+        moveq.l #0x05, %d1
+        movec.l %d1, %dfc
+
+        /* Now we can begin to access registers in DPRAM */
+
+set_sim_mcr:
+        /* Set Module Configuration Register */
+        move.l  #MCU_SIM_MCR, MCR
+
+        /* to do:       Determine cause of reset */
+
+        /*
+         *      configure system clock MC68360 p. 6-40
+         *      (value +1)*osc/128 = system clock
+         *                    or
+         *      (value + 1)*osc = system clock
+         *      You do not need to divide the oscillator by 128 unless you want to.
+         */
+set_sim_clock:
+        move.w  #MCU_SIM_PLLCR, PLLCR
+        move.b  #MCU_SIM_CLKOCR, CLKOCR
+        move.w  #MCU_SIM_CDVCR, CDVCR
+
+        /* Wait for the PLL to settle */
+        move.w  #16384, %d0
+pll_settle_wait:
+        subi.w  #1, %d0
+        bne     pll_settle_wait
+
+        /* Setup the system protection register, and watchdog timer register */
+        move.b  #MCU_SIM_SWIV, SWIV
+        move.w  #MCU_SIM_PICR, PICR
+        move.w  #MCU_SIM_PITR, PITR
+        move.w  #MCU_SIM_SYPCR, SYPCR
+
+        /* Clear DPRAM - system + parameter */
+        movea.l #_dprbase, %a0
+        movea.l #_dprbase+0x2000, %a1
+
+        /* Copy 0 to %a0 until %a0 == %a1 */
+clear_dpram:
+        movel   #0, %a0@+
+        cmpal   %a0, %a1
+        bhi     clear_dpram
+
+configure_memory_controller:    
+        /* Set up Global Memory Register (GMR) */
+        move.l  #MCU_SIM_GMR, %d0
+        move.l  %d0, GMR
+
+configure_chip_select_0:
+        move.l  #0x00400000, %d0
+        subq.l  #0x01, %d0
+        eori.l  #SIM_OR_MASK, %d0
+        ori.l   #SIM_OR0_MASK, %d0
+        move.l  %d0, OR0
+
+        move.l  #__rom_start, %d0
+        ori.l   #SIM_BR0_MASK, %d0
+        move.l  %d0, BR0
+
+        move.l  #0x0, BR1
+        move.l  #0x0, BR2
+        move.l  #0x0, BR3
+        move.l  #0x0, BR4
+        move.l  #0x0, BR5
+        move.l  #0x0, BR6
+        move.l  #0x0, BR7
+
+        move.w  #MCU_SIM_PEPAR, PEPAR 
+
+        /* point to vector table: */
+        move.l  #_romvec, %a0
+        move.l  #_ramvec, %a1
+copy_vectors:
+        move.l  %a0@, %d0
+        move.l  %d0, %a1@
+        move.l  %a0@, %a1@
+        addq.l  #0x04, %a0
+        addq.l  #0x04, %a1
+        cmp.l   #_start, %a0
+        blt     copy_vectors
+
+        move.l  #_ramvec, %a1
+        movec   %a1, %vbr
+
+
+        /* Copy data segment from ROM to RAM */
+        moveal  #_etext, %a0
+        moveal  #_sdata, %a1
+        moveal  #_edata, %a2
+
+        /* Copy %a0 to %a1 until %a1 == %a2 */
+LD1:
+        move.l  %a0@, %d0
+        addq.l  #0x04, %a0
+        move.l  %d0, %a1@
+        addq.l  #0x04, %a1
+        cmp.l   #_edata, %a1
+        blt     LD1
+
+        moveal  #_sbss, %a0
+        moveal  #_ebss, %a1
+
+        /* Copy 0 to %a0 until %a0 == %a1 */
+L1:
+        movel   #0, %a0@+
+        cmpal   %a0, %a1
+        bhi     L1
+
+load_quicc:
+        move.l  #_dprbase, _quicc_base
+
+store_ram_size:
+        /* Set ram size information */
+        move.l  #_sdata, _rambase
+        move.l  #_ebss, _ramstart
+        move.l  #RAMEND, %d0
+        sub.l   #0x1000, %d0                    /* Reserve 4K for stack space.*/
+        move.l  %d0, _ramend                    /* Different from RAMEND.*/
+
+        pea     0
+        pea     env
+        pea     %sp@(4)
+        pea     0
+
+        lea     init_thread_union, %a2
+        lea     0x2000(%a2), %sp
+
+lp:
+        jsr     start_kernel
+
+_exit:
+        jmp     _exit
+
+
+        .data
+        .align 4
+env:
+        .long   0
+_quicc_base:
+        .long   0
+_periph_base:
+        .long   0
+_ramvec:
+        .long   0
+_rambase:
+        .long   0
+_ramstart:
+        .long   0
+_ramend:
+        .long   0
+_dprbase:
+        .long   0xffffe000
+
+
+        .text
+
+    /*
+     * These are the exception vectors at boot up, they are copied into RAM
+     * and then overwritten as needed.
+     */
+ 
+.section ".data..initvect","awx"
+    .long   RAMEND      /* Reset: Initial Stack Pointer                 - 0.  */
+    .long   _start      /* Reset: Initial Program Counter               - 1.  */
+    .long   buserr      /* Bus Error                                    - 2.  */
+    .long   trap        /* Address Error                                - 3.  */
+    .long   trap        /* Illegal Instruction                          - 4.  */
+    .long   trap        /* Divide by zero                               - 5.  */
+    .long   trap        /* CHK, CHK2 Instructions                       - 6.  */
+    .long   trap        /* TRAPcc, TRAPV Instructions                   - 7.  */
+    .long   trap        /* Privilege Violation                          - 8.  */
+    .long   trap        /* Trace                                        - 9.  */
+    .long   trap        /* Line 1010 Emulator                           - 10. */
+    .long   trap        /* Line 1111 Emualtor                           - 11. */
+    .long   trap        /* Harware Breakpoint                           - 12. */
+    .long   trap        /* (Reserved for Coprocessor Protocol Violation)- 13. */
+    .long   trap        /* Format Error                                 - 14. */
+    .long   trap        /* Uninitialized Interrupt                      - 15. */
+    .long   trap        /* (Unassigned, Reserver)                       - 16. */
+    .long   trap        /* (Unassigned, Reserver)                       - 17. */
+    .long   trap        /* (Unassigned, Reserver)                       - 18. */
+    .long   trap        /* (Unassigned, Reserver)                       - 19. */
+    .long   trap        /* (Unassigned, Reserver)                       - 20. */
+    .long   trap        /* (Unassigned, Reserver)                       - 21. */
+    .long   trap        /* (Unassigned, Reserver)                       - 22. */
+    .long   trap        /* (Unassigned, Reserver)                       - 23. */
+    .long   trap        /* Spurious Interrupt                           - 24. */
+    .long   trap        /* Level 1 Interrupt Autovector                 - 25. */
+    .long   trap        /* Level 2 Interrupt Autovector                 - 26. */
+    .long   trap        /* Level 3 Interrupt Autovector                 - 27. */
+    .long   trap        /* Level 4 Interrupt Autovector                 - 28. */
+    .long   trap        /* Level 5 Interrupt Autovector                 - 29. */
+    .long   trap        /* Level 6 Interrupt Autovector                 - 30. */
+    .long   trap        /* Level 7 Interrupt Autovector                 - 31. */
+    .long   system_call /* Trap Instruction Vectors 0                   - 32. */
+    .long   trap        /* Trap Instruction Vectors 1                   - 33. */
+    .long   trap        /* Trap Instruction Vectors 2                   - 34. */
+    .long   trap        /* Trap Instruction Vectors 3                   - 35. */
+    .long   trap        /* Trap Instruction Vectors 4                   - 36. */
+    .long   trap        /* Trap Instruction Vectors 5                   - 37. */
+    .long   trap        /* Trap Instruction Vectors 6                   - 38. */
+    .long   trap        /* Trap Instruction Vectors 7                   - 39. */
+    .long   trap        /* Trap Instruction Vectors 8                   - 40. */
+    .long   trap        /* Trap Instruction Vectors 9                   - 41. */
+    .long   trap        /* Trap Instruction Vectors 10                  - 42. */
+    .long   trap        /* Trap Instruction Vectors 11                  - 43. */
+    .long   trap        /* Trap Instruction Vectors 12                  - 44. */
+    .long   trap        /* Trap Instruction Vectors 13                  - 45. */
+    .long   trap        /* Trap Instruction Vectors 14                  - 46. */
+    .long   trap        /* Trap Instruction Vectors 15                  - 47. */
+    .long   0           /* (Reserved for Coprocessor)                   - 48. */
+    .long   0           /* (Reserved for Coprocessor)                   - 49. */
+    .long   0           /* (Reserved for Coprocessor)                   - 50. */
+    .long   0           /* (Reserved for Coprocessor)                   - 51. */
+    .long   0           /* (Reserved for Coprocessor)                   - 52. */
+    .long   0           /* (Reserved for Coprocessor)                   - 53. */
+    .long   0           /* (Reserved for Coprocessor)                   - 54. */
+    .long   0           /* (Reserved for Coprocessor)                   - 55. */
+    .long   0           /* (Reserved for Coprocessor)                   - 56. */
+    .long   0           /* (Reserved for Coprocessor)                   - 57. */
+    .long   0           /* (Reserved for Coprocessor)                   - 58. */
+    .long   0           /* (Unassigned, Reserved)                       - 59. */
+    .long   0           /* (Unassigned, Reserved)                       - 60. */
+    .long   0           /* (Unassigned, Reserved)                       - 61. */
+    .long   0           /* (Unassigned, Reserved)                       - 62. */
+    .long   0           /* (Unassigned, Reserved)                       - 63. */
+    /*                  The assignment of these vectors to the CPM is         */
+    /*                  dependent on the configuration of the CPM vba         */
+    /*                          fields.                                       */
+    .long   0           /* (User-Defined Vectors 1) CPM Error           - 64. */
+    .long   0           /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */
+    .long   0           /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */
+    .long   0           /* (User-Defined Vectors 4) CPM SMC2 / PIP      - 67. */
+    .long   0           /* (User-Defined Vectors 5) CPM SMC1            - 68. */
+    .long   0           /* (User-Defined Vectors 6) CPM SPI             - 69. */
+    .long   0           /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */
+    .long   0           /* (User-Defined Vectors 8) CPM Timer 4         - 71. */
+    .long   0           /* (User-Defined Vectors 9) CPM Reserved        - 72. */
+    .long   0           /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */
+    .long   0           /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */
+    .long   0           /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */
+    .long   0           /* (User-Defined Vectors 13) CPM Timer 3        - 76. */
+    .long   0           /* (User-Defined Vectors 14) CPM Reserved       - 77. */
+    .long   0           /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */
+    .long   0           /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */
+    .long   0           /* (User-Defined Vectors 17) CPM Reserved       - 80. */
+    .long   0           /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */
+    .long   0           /* (User-Defined Vectors 19) CPM Timer 2        - 82. */
+    .long   0           /* (User-Defined Vectors 21) CPM Reserved       - 83. */
+    .long   0           /* (User-Defined Vectors 22) CPM IDMA2          - 84. */
+    .long   0           /* (User-Defined Vectors 23) CPM IDMA1          - 85. */
+    .long   0           /* (User-Defined Vectors 24) CPM SDMA Bus Err   - 86. */
+    .long   0           /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */
+    .long   0           /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */
+    .long   0           /* (User-Defined Vectors 27) CPM Timer 1        - 89. */
+    .long   0           /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */
+    .long   0           /* (User-Defined Vectors 29) CPM SCC 4          - 91. */
+    .long   0           /* (User-Defined Vectors 30) CPM SCC 3          - 92. */
+    .long   0           /* (User-Defined Vectors 31) CPM SCC 2          - 93. */
+    .long   0           /* (User-Defined Vectors 32) CPM SCC 1          - 94. */
+    .long   0           /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */
+    /*                  I don't think anything uses the vectors after here.   */
+    .long   0           /* (User-Defined Vectors 34)                    - 96. */
+    .long   0,0,0,0,0               /* (User-Defined Vectors 35  -  39). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 40  -  49). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 50  -  59). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 60  -  69). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 70  -  79). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 80  -  89). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 90  -  99). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 100 - 109). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 110 - 119). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 120 - 129). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 130 - 139). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 140 - 149). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 150 - 159). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 160 - 169). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 170 - 179). */
+    .long   0,0,0,0,0,0,0,0,0,0     /* (User-Defined Vectors 180 - 189). */
+    .long   0,0,0                   /* (User-Defined Vectors 190 - 192). */
+.text
+ignore: rte
diff --git a/arch/m68k/platform/68360/ints.c b/arch/m68k/platform/68360/ints.c
new file mode 100644
index 000000000000..8de3feb568c6
--- /dev/null
+++ b/arch/m68k/platform/68360/ints.c
@@ -0,0 +1,139 @@
+/*
+ * linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 2000  Michael Leslie <mleslie@lineo.com>
+ * Copyright (c) 1996 Roman Zippel
+ * Copyright (c) 1999 D. Jeff Dionne <jeff@uclinux.org>
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <asm/traps.h>
+#include <asm/machdep.h>
+#include <asm/m68360.h>
+
+/* from quicc/commproc.c: */
+extern QUICC *pquicc;
+extern void cpm_interrupt_init(void);
+
+#define INTERNAL_IRQS (96)
+
+/* assembler routines */
+asmlinkage void system_call(void);
+asmlinkage void buserr(void);
+asmlinkage void trap(void);
+asmlinkage void bad_interrupt(void);
+asmlinkage void inthandler(void);
+
+extern void *_ramvec[];
+
+/* The number of spurious interrupts */
+volatile unsigned int num_spurious;
+
+static void intc_irq_unmask(struct irq_data *d)
+{
+        pquicc->intr_cimr |= (1 << d->irq);
+}
+
+static void intc_irq_mask(struct irq_data *d)
+{
+        pquicc->intr_cimr &= ~(1 << d->irq);
+}
+
+static void intc_irq_ack(struct irq_data *d)
+{
+        pquicc->intr_cisr = (1 << d->irq);
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "M68K-INTC",
+        .irq_mask       = intc_irq_mask,
+        .irq_unmask     = intc_irq_unmask,
+        .irq_ack        = intc_irq_ack,
+};
+
+/*
+ * This function should be called during kernel startup to initialize
+ * the vector table.
+ */
+void init_IRQ(void)
+{
+        int i;
+        int vba = (CPM_VECTOR_BASE<<4);
+
+        /* set up the vectors */
+        _ramvec[2] = buserr;
+        _ramvec[3] = trap;
+        _ramvec[4] = trap;
+        _ramvec[5] = trap;
+        _ramvec[6] = trap;
+        _ramvec[7] = trap;
+        _ramvec[8] = trap;
+        _ramvec[9] = trap;
+        _ramvec[10] = trap;
+        _ramvec[11] = trap;
+        _ramvec[12] = trap;
+        _ramvec[13] = trap;
+        _ramvec[14] = trap;
+        _ramvec[15] = trap;
+
+        _ramvec[32] = system_call;
+        _ramvec[33] = trap;
+
+        cpm_interrupt_init();
+
+        /* set up CICR for vector base address and irq level */
+        /* irl = 4, hp = 1f - see MC68360UM p 7-377 */
+        pquicc->intr_cicr = 0x00e49f00 | vba;
+
+        /* CPM interrupt vectors: (p 7-376) */
+        _ramvec[vba+CPMVEC_ERROR]       = bad_interrupt; /* Error */
+        _ramvec[vba+CPMVEC_PIO_PC11]    = inthandler;   /* pio - pc11 */
+        _ramvec[vba+CPMVEC_PIO_PC10]    = inthandler;   /* pio - pc10 */
+        _ramvec[vba+CPMVEC_SMC2]        = inthandler;   /* smc2/pip */
+        _ramvec[vba+CPMVEC_SMC1]        = inthandler;   /* smc1 */
+        _ramvec[vba+CPMVEC_SPI]         = inthandler;   /* spi */
+        _ramvec[vba+CPMVEC_PIO_PC9]     = inthandler;   /* pio - pc9 */
+        _ramvec[vba+CPMVEC_TIMER4]      = inthandler;   /* timer 4 */
+        _ramvec[vba+CPMVEC_RESERVED1]   = inthandler;   /* reserved */
+        _ramvec[vba+CPMVEC_PIO_PC8]     = inthandler;   /* pio - pc8 */
+        _ramvec[vba+CPMVEC_PIO_PC7]     = inthandler;  /* pio - pc7 */
+        _ramvec[vba+CPMVEC_PIO_PC6]     = inthandler;  /* pio - pc6 */
+        _ramvec[vba+CPMVEC_TIMER3]      = inthandler;  /* timer 3 */
+        _ramvec[vba+CPMVEC_PIO_PC5]     = inthandler;  /* pio - pc5 */
+        _ramvec[vba+CPMVEC_PIO_PC4]     = inthandler;  /* pio - pc4 */
+        _ramvec[vba+CPMVEC_RESERVED2]   = inthandler;  /* reserved */
+        _ramvec[vba+CPMVEC_RISCTIMER]   = inthandler;  /* timer table */
+        _ramvec[vba+CPMVEC_TIMER2]      = inthandler;  /* timer 2 */
+        _ramvec[vba+CPMVEC_RESERVED3]   = inthandler;  /* reserved */
+        _ramvec[vba+CPMVEC_IDMA2]       = inthandler;  /* idma 2 */
+        _ramvec[vba+CPMVEC_IDMA1]       = inthandler;  /* idma 1 */
+        _ramvec[vba+CPMVEC_SDMA_CB_ERR] = inthandler;  /* sdma channel bus error */
+        _ramvec[vba+CPMVEC_PIO_PC3]     = inthandler;  /* pio - pc3 */
+        _ramvec[vba+CPMVEC_PIO_PC2]     = inthandler;  /* pio - pc2 */
+        /* _ramvec[vba+CPMVEC_TIMER1]      = cpm_isr_timer1; */  /* timer 1 */
+        _ramvec[vba+CPMVEC_TIMER1]      = inthandler;  /* timer 1 */
+        _ramvec[vba+CPMVEC_PIO_PC1]     = inthandler;  /* pio - pc1 */
+        _ramvec[vba+CPMVEC_SCC4]        = inthandler;  /* scc 4 */
+        _ramvec[vba+CPMVEC_SCC3]        = inthandler;  /* scc 3 */
+        _ramvec[vba+CPMVEC_SCC2]        = inthandler;  /* scc 2 */
+        _ramvec[vba+CPMVEC_SCC1]        = inthandler;  /* scc 1 */
+        _ramvec[vba+CPMVEC_PIO_PC0]     = inthandler;  /* pio - pc0 */
+
+
+        /* turn off all CPM interrupts */
+        pquicc->intr_cimr = 0x00000000;
+
+        for (i = 0; (i < NR_IRQS); i++) {
+                set_irq_chip(i, &intc_irq_chip);
+                set_irq_handler(i, handle_level_irq);
+        }
+}
+
diff --git a/arch/m68k/platform/68EZ328/Makefile b/arch/m68k/platform/68EZ328/Makefile
new file mode 100644
index 000000000000..ee97735a242c
--- /dev/null
+++ b/arch/m68k/platform/68EZ328/Makefile
@@ -0,0 +1,11 @@
+#
+# Makefile for arch/m68knommu/platform/68EZ328.
+#
+
+obj-y := config.o
+
+extra-y := bootlogo.rh
+
+$(obj)/bootlogo.rh: $(src)/bootlogo.h
+        perl $(src)/../68328/bootlogo.pl < $(src)/bootlogo.h \
+                > $(obj)/bootlogo.rh
diff --git a/arch/m68k/platform/68EZ328/bootlogo.h b/arch/m68k/platform/68EZ328/bootlogo.h
new file mode 100644
index 000000000000..e842bdae5839
--- /dev/null
+++ b/arch/m68k/platform/68EZ328/bootlogo.h
@@ -0,0 +1,3204 @@
+#define splash_width 640
+#define splash_height 480
+static unsigned char splash_bits[] = {
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x80, 0xff, 0x7f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff,
+  0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0xf8, 0xff, 0xff, 0xff, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  };
diff --git a/arch/m68k/platform/68EZ328/config.c b/arch/m68k/platform/68EZ328/config.c
new file mode 100644
index 000000000000..1be1a16f6896
--- /dev/null
+++ b/arch/m68k/platform/68EZ328/config.c
@@ -0,0 +1,76 @@
+/***************************************************************************/
+
+/*
+ *  linux/arch/m68knommu/platform/68EZ328/config.c
+ *
+ *  Copyright (C) 1993 Hamish Macdonald
+ *  Copyright (C) 1999 D. Jeff Dionne
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+/***************************************************************************/
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/machdep.h>
+#include <asm/MC68EZ328.h>
+#ifdef CONFIG_UCSIMM
+#include <asm/bootstd.h>
+#endif
+
+/***************************************************************************/
+
+void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
+
+/***************************************************************************/
+
+void m68ez328_reset(void)
+{
+  local_irq_disable();
+  asm volatile (
+    "moveal #0x10c00000, %a0;\n"
+    "moveb #0, 0xFFFFF300;\n"
+    "moveal 0(%a0), %sp;\n"
+    "moveal 4(%a0), %a0;\n"
+    "jmp (%a0);\n"
+    );
+}
+
+/***************************************************************************/
+
+unsigned char *cs8900a_hwaddr;
+static int errno;
+
+#ifdef CONFIG_UCSIMM
+_bsc0(char *, getserialnum)
+_bsc1(unsigned char *, gethwaddr, int, a)
+_bsc1(char *, getbenv, char *, a)
+#endif
+
+void config_BSP(char *command, int len)
+{
+  unsigned char *p;
+
+  printk(KERN_INFO "\n68EZ328 DragonBallEZ support (C) 1999 Rt-Control, Inc\n");
+
+#ifdef CONFIG_UCSIMM
+  printk(KERN_INFO "uCsimm serial string [%s]\n",getserialnum());
+  p = cs8900a_hwaddr = gethwaddr(0);
+  printk(KERN_INFO "uCsimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
+         p[0], p[1], p[2], p[3], p[4], p[5]);
+
+  p = getbenv("APPEND");
+  if (p) strcpy(p,command);
+  else command[0] = 0;
+#endif
+ 
+  mach_gettod = m68328_timer_gettod;
+  mach_reset = m68ez328_reset;
+}
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/68VZ328/Makefile b/arch/m68k/platform/68VZ328/Makefile
new file mode 100644
index 000000000000..447ffa0fd7c7
--- /dev/null
+++ b/arch/m68k/platform/68VZ328/Makefile
@@ -0,0 +1,16 @@
+#
+# Makefile for arch/m68knommu/platform/68VZ328.
+#
+
+obj-y           := config.o
+logo-$(UCDIMM)  := bootlogo.rh
+logo-$(DRAGEN2) := screen.h
+extra-y         := $(logo-y)
+
+$(obj)/bootlogo.rh: $(src)/../68EZ328/bootlogo.h
+        perl $(src)/bootlogo.pl < $(src)/../68328/bootlogo.h > $(obj)/bootlogo.rh
+
+$(obj)/screen.h: $(src)/screen.xbm $(src)/xbm2lcd.pl
+        perl $(src)/xbm2lcd.pl < $(src)/screen.xbm > $(obj)/screen.h
+
+clean-files := $(obj)/screen.h $(obj)/bootlogo.rh
diff --git a/arch/m68k/platform/68VZ328/config.c b/arch/m68k/platform/68VZ328/config.c
new file mode 100644
index 000000000000..eabaabe8af36
--- /dev/null
+++ b/arch/m68k/platform/68VZ328/config.c
@@ -0,0 +1,188 @@
+/***************************************************************************/
+
+/*
+ *  linux/arch/m68knommu/platform/68VZ328/config.c
+ *
+ *  Copyright (C) 1993 Hamish Macdonald
+ *  Copyright (C) 1999 D. Jeff Dionne
+ *  Copyright (C) 2001 Georges Menie, Ken Desmet
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+/***************************************************************************/
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/kd.h>
+#include <linux/netdevice.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/machdep.h>
+#include <asm/MC68VZ328.h>
+#include <asm/bootstd.h>
+
+#ifdef CONFIG_INIT_LCD
+#include "bootlogo.h"
+#endif
+
+/***************************************************************************/
+
+void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
+
+/***************************************************************************/
+/*                        Init Drangon Engine hardware                     */
+/***************************************************************************/
+#if defined(CONFIG_DRAGEN2)
+
+static void m68vz328_reset(void)
+{
+        local_irq_disable();
+
+#ifdef CONFIG_INIT_LCD
+        PBDATA |= 0x20;                         /* disable CCFL light */
+        PKDATA |= 0x4;                          /* disable LCD controller */
+        LCKCON = 0;
+#endif
+
+        __asm__ __volatile__(
+                "reset\n\t"
+                "moveal #0x04000000, %a0\n\t"
+                "moveal 0(%a0), %sp\n\t"
+                "moveal 4(%a0), %a0\n\t"
+                "jmp (%a0)"
+        );
+}
+
+static void init_hardware(char *command, int size)
+{
+#ifdef CONFIG_DIRECT_IO_ACCESS
+        SCR = 0x10;                                     /* allow user access to internal registers */
+#endif
+
+        /* CSGB Init */
+        CSGBB = 0x4000;
+        CSB = 0x1a1;
+
+        /* CS8900 init */
+        /* PK3: hardware sleep function pin, active low */
+        PKSEL |= PK(3);                         /* select pin as I/O */
+        PKDIR |= PK(3);                         /* select pin as output */
+        PKDATA |= PK(3);                        /* set pin high */
+
+        /* PF5: hardware reset function pin, active high */
+        PFSEL |= PF(5);                         /* select pin as I/O */
+        PFDIR |= PF(5);                         /* select pin as output */
+        PFDATA &= ~PF(5);                       /* set pin low */
+
+        /* cs8900 hardware reset */
+        PFDATA |= PF(5);
+        { int i; for (i = 0; i < 32000; ++i); }
+        PFDATA &= ~PF(5);
+
+        /* INT1 enable (cs8900 IRQ) */
+        PDPOL &= ~PD(1);                        /* active high signal */
+        PDIQEG &= ~PD(1);
+        PDIRQEN |= PD(1);                       /* IRQ enabled */
+
+#ifdef CONFIG_INIT_LCD
+        /* initialize LCD controller */
+        LSSA = (long) screen_bits;
+        LVPW = 0x14;
+        LXMAX = 0x140;
+        LYMAX = 0xef;
+        LRRA = 0;
+        LPXCD = 3;
+        LPICF = 0x08;
+        LPOLCF = 0;
+        LCKCON = 0x80;
+        PCPDEN = 0xff;
+        PCSEL = 0;
+
+        /* Enable LCD controller */
+        PKDIR |= 0x4;
+        PKSEL |= 0x4;
+        PKDATA &= ~0x4;
+
+        /* Enable CCFL backlighting circuit */
+        PBDIR |= 0x20;
+        PBSEL |= 0x20;
+        PBDATA &= ~0x20;
+
+        /* contrast control register */
+        PFDIR |= 0x1;
+        PFSEL &= ~0x1;
+        PWMR = 0x037F;
+#endif
+}
+
+/***************************************************************************/
+/*                      Init RT-Control uCdimm hardware                    */
+/***************************************************************************/
+#elif defined(CONFIG_UCDIMM)
+
+static void m68vz328_reset(void)
+{
+        local_irq_disable();
+        asm volatile (
+                "moveal #0x10c00000, %a0;\n\t"
+                "moveb #0, 0xFFFFF300;\n\t"
+                "moveal 0(%a0), %sp;\n\t"
+                "moveal 4(%a0), %a0;\n\t"
+                "jmp (%a0);\n"
+        );
+}
+
+unsigned char *cs8900a_hwaddr;
+static int errno;
+
+_bsc0(char *, getserialnum)
+_bsc1(unsigned char *, gethwaddr, int, a)
+_bsc1(char *, getbenv, char *, a)
+
+static void init_hardware(char *command, int size)
+{
+        char *p;
+
+        printk(KERN_INFO "uCdimm serial string [%s]\n", getserialnum());
+        p = cs8900a_hwaddr = gethwaddr(0);
+        printk(KERN_INFO "uCdimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
+                p[0], p[1], p[2], p[3], p[4], p[5]);
+        p = getbenv("APPEND");
+        if (p)
+                strcpy(p, command);
+        else
+                command[0] = 0;
+}
+
+/***************************************************************************/
+#else
+
+static void m68vz328_reset(void)
+{
+}
+
+static void init_hardware(char *command, int size)
+{
+}
+
+/***************************************************************************/
+#endif
+/***************************************************************************/
+
+void config_BSP(char *command, int size)
+{
+        printk(KERN_INFO "68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n");
+
+        init_hardware(command, size);
+
+        mach_gettod = m68328_timer_gettod;
+        mach_reset = m68vz328_reset;
+}
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/Makefile b/arch/m68k/platform/Makefile
new file mode 100644
index 000000000000..fc932bf65d34
--- /dev/null
+++ b/arch/m68k/platform/Makefile
@@ -0,0 +1,3 @@
+#
+# Makefile for the arch/m68knommu/platform.
+#
diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile
new file mode 100644
index 000000000000..a8967baabd72
--- /dev/null
+++ b/arch/m68k/platform/coldfire/Makefile
@@ -0,0 +1,32 @@
+#
+# Makefile for the m68knommu kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this,  which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs. You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# ccflags-y := -DTRAP_DBG_INTERRUPT
+# asflags-y := -DTRAP_DBG_INTERRUPT
+#
+
+asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
+
+obj-$(CONFIG_COLDFIRE)  += cache.o clk.o dma.o entry.o vectors.o
+obj-$(CONFIG_M5206)     += timers.o intc.o
+obj-$(CONFIG_M5206e)    += timers.o intc.o
+obj-$(CONFIG_M520x)     += pit.o intc-simr.o
+obj-$(CONFIG_M523x)     += pit.o dma_timer.o intc-2.o
+obj-$(CONFIG_M5249)     += timers.o intc.o
+obj-$(CONFIG_M527x)     += pit.o intc-2.o
+obj-$(CONFIG_M5272)     += timers.o
+obj-$(CONFIG_M528x)     += pit.o intc-2.o
+obj-$(CONFIG_M5307)     += timers.o intc.o
+obj-$(CONFIG_M532x)     += timers.o intc-simr.o
+obj-$(CONFIG_M5407)     += timers.o intc.o
+obj-$(CONFIG_M54xx)     += sltimers.o intc-2.o
+
+obj-y                   += pinmux.o gpio.o
+extra-y := head.o
diff --git a/arch/m68k/platform/coldfire/cache.c b/arch/m68k/platform/coldfire/cache.c
new file mode 100644
index 000000000000..235d3c4f4f0f
--- /dev/null
+++ b/arch/m68k/platform/coldfire/cache.c
@@ -0,0 +1,48 @@
+/***************************************************************************/
+
+/*
+ *      cache.c -- general ColdFire Cache maintainence code
+ *
+ *      Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+/***************************************************************************/
+#ifdef CACHE_PUSH
+/***************************************************************************/
+
+/*
+ *      Use cpushl to push all dirty cache lines back to memory.
+ *      Older versions of GAS don't seem to know how to generate the
+ *      ColdFire cpushl instruction... Oh well, bit stuff it for now.
+ */
+
+void mcf_cache_push(void)
+{
+        __asm__ __volatile__ (
+                "clrl   %%d0\n\t"
+                "1:\n\t"
+                "movel  %%d0,%%a0\n\t"
+                "2:\n\t"
+                ".word  0xf468\n\t"
+                "addl   %0,%%a0\n\t"
+                "cmpl   %1,%%a0\n\t"
+                "blt    2b\n\t"
+                "addql  #1,%%d0\n\t"
+                "cmpil  %2,%%d0\n\t"
+                "bne    1b\n\t"
+                : /* No output */
+                : "i" (CACHE_LINE_SIZE),
+                  "i" (DCACHE_SIZE / CACHE_WAYS),
+                  "i" (CACHE_WAYS)
+                : "d0", "a0" );
+}
+
+/***************************************************************************/
+#endif /* CACHE_PUSH */
+/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/clk.c b/arch/m68k/platform/coldfire/clk.c
new file mode 100644
index 000000000000..9f1260c5e2ad
--- /dev/null
+++ b/arch/m68k/platform/coldfire/clk.c
@@ -0,0 +1,45 @@
+/***************************************************************************/
+
+/*
+ *      clk.c -- general ColdFire CPU kernel clk handling
+ *
+ *      Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <asm/coldfire.h>
+
+/***************************************************************************/
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        return NULL;
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+        return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        return MCF_CLK;
+}
+EXPORT_SYMBOL(clk_get_rate);
+/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/dma.c b/arch/m68k/platform/coldfire/dma.c
new file mode 100644
index 000000000000..e88b95e2cc62
--- /dev/null
+++ b/arch/m68k/platform/coldfire/dma.c
@@ -0,0 +1,39 @@
+/***************************************************************************/
+
+/*
+ *      dma.c -- Freescale ColdFire DMA support
+ *
+ *      Copyright (C) 2007, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <asm/dma.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfdma.h>
+
+/***************************************************************************/
+
+/*
+ *      DMA channel base address table.
+ */
+unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
+#ifdef MCFDMA_BASE0
+        MCFDMA_BASE0,
+#endif
+#ifdef MCFDMA_BASE1
+        MCFDMA_BASE1,
+#endif
+#ifdef MCFDMA_BASE2
+        MCFDMA_BASE2,
+#endif
+#ifdef MCFDMA_BASE3
+        MCFDMA_BASE3,
+#endif
+};
+
+unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/dma_timer.c b/arch/m68k/platform/coldfire/dma_timer.c
new file mode 100644
index 000000000000..a5f562823d7a
--- /dev/null
+++ b/arch/m68k/platform/coldfire/dma_timer.c
@@ -0,0 +1,84 @@
+/*
+ * dma_timer.c -- Freescale ColdFire DMA Timer.
+ *
+ * Copyright (C) 2007, Benedikt Spranger <b.spranger@linutronix.de>
+ * Copyright (C) 2008. Sebastian Siewior, Linutronix
+ *
+ */
+
+#include <linux/clocksource.h>
+#include <linux/io.h>
+
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfpit.h>
+#include <asm/mcfsim.h>
+
+#define DMA_TIMER_0     (0x00)
+#define DMA_TIMER_1     (0x40)
+#define DMA_TIMER_2     (0x80)
+#define DMA_TIMER_3     (0xc0)
+
+#define DTMR0   (MCF_IPSBAR + DMA_TIMER_0 + 0x400)
+#define DTXMR0  (MCF_IPSBAR + DMA_TIMER_0 + 0x402)
+#define DTER0   (MCF_IPSBAR + DMA_TIMER_0 + 0x403)
+#define DTRR0   (MCF_IPSBAR + DMA_TIMER_0 + 0x404)
+#define DTCR0   (MCF_IPSBAR + DMA_TIMER_0 + 0x408)
+#define DTCN0   (MCF_IPSBAR + DMA_TIMER_0 + 0x40c)
+
+#define DMA_FREQ    ((MCF_CLK / 2) / 16)
+
+/* DTMR */
+#define DMA_DTMR_RESTART        (1 << 3)
+#define DMA_DTMR_CLK_DIV_1      (1 << 1)
+#define DMA_DTMR_CLK_DIV_16     (2 << 1)
+#define DMA_DTMR_ENABLE         (1 << 0)
+
+static cycle_t cf_dt_get_cycles(struct clocksource *cs)
+{
+        return __raw_readl(DTCN0);
+}
+
+static struct clocksource clocksource_cf_dt = {
+        .name           = "coldfire_dma_timer",
+        .rating         = 200,
+        .read           = cf_dt_get_cycles,
+        .mask           = CLOCKSOURCE_MASK(32),
+        .shift          = 20,
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static int __init  init_cf_dt_clocksource(void)
+{
+        /*
+         * We setup DMA timer 0 in free run mode. This incrementing counter is
+         * used as a highly precious clock source. With MCF_CLOCK = 150 MHz we
+         * get a ~213 ns resolution and the 32bit register will overflow almost
+         * every 15 minutes.
+         */
+        __raw_writeb(0x00, DTXMR0);
+        __raw_writeb(0x00, DTER0);
+        __raw_writel(0x00000000, DTRR0);
+        __raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0);
+        clocksource_cf_dt.mult = clocksource_hz2mult(DMA_FREQ,
+                                                     clocksource_cf_dt.shift);
+        return clocksource_register(&clocksource_cf_dt);
+}
+
+arch_initcall(init_cf_dt_clocksource);
+
+#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
+#define CYC2NS_SCALE    ((1000000 << CYC2NS_SCALE_FACTOR) / (DMA_FREQ / 1000))
+
+static unsigned long long cycles2ns(unsigned long cycl)
+{
+        return (unsigned long long) ((unsigned long long)cycl *
+                        CYC2NS_SCALE) >> CYC2NS_SCALE_FACTOR;
+}
+
+unsigned long long sched_clock(void)
+{
+        unsigned long cycl = __raw_readl(DTCN0);
+
+        return cycles2ns(cycl);
+}
diff --git a/arch/m68k/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S
new file mode 100644
index 000000000000..5837cf080b6d
--- /dev/null
+++ b/arch/m68k/platform/coldfire/entry.S
@@ -0,0 +1,203 @@
+/*
+ *  linux/arch/m68knommu/platform/5307/entry.S
+ *
+ *  Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
+ *  Copyright (C) 1998  D. Jeff Dionne <jeff@lineo.ca>,
+ *                      Kenneth Albanowski <kjahds@kjahds.com>,
+ *  Copyright (C) 2000  Lineo Inc. (www.lineo.com)
+ *  Copyright (C) 2004-2006  Macq Electronique SA. (www.macqel.com)
+ *
+ * Based on:
+ *
+ *  linux/arch/m68k/kernel/entry.S
+ *
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file README.legal in the main directory of this archive
+ * for more details.
+ *
+ * Linux/m68k support by Hamish Macdonald
+ *
+ * 68060 fixes by Jesper Skov
+ * ColdFire support by Greg Ungerer (gerg@snapgear.com)
+ * 5307 fixes by David W. Miller
+ * linux 2.4 support David McCullough <davidm@snapgear.com>
+ * Bug, speed and maintainability fixes by Philippe De Muyter <phdm@macqel.be>
+ */
+
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <asm/unistd.h>
+#include <asm/thread_info.h>
+#include <asm/errno.h>
+#include <asm/setup.h>
+#include <asm/segment.h>
+#include <asm/asm-offsets.h>
+#include <asm/entry.h>
+
+#ifdef CONFIG_COLDFIRE_SW_A7
+/*
+ *      Define software copies of the supervisor and user stack pointers.
+ */
+.bss
+sw_ksp:
+.long   0
+sw_usp:
+.long   0
+#endif /* CONFIG_COLDFIRE_SW_A7 */
+
+.text
+
+.globl system_call
+.globl resume
+.globl ret_from_exception
+.globl ret_from_signal
+.globl sys_call_table
+.globl inthandler
+.globl fasthandler
+
+enosys:
+        mov.l   #sys_ni_syscall,%d3
+        bra     1f
+
+ENTRY(system_call)
+        SAVE_ALL
+        move    #0x2000,%sr             /* enable intrs again */
+
+        cmpl    #NR_syscalls,%d0
+        jcc     enosys
+        lea     sys_call_table,%a0
+        lsll    #2,%d0                  /* movel %a0@(%d0:l:4),%d3 */
+        movel   %a0@(%d0),%d3
+        jeq     enosys
+
+1:
+        movel   %sp,%d2                 /* get thread_info pointer */
+        andl    #-THREAD_SIZE,%d2       /* at start of kernel stack */
+        movel   %d2,%a0
+        movel   %a0@,%a1                /* save top of frame */
+        movel   %sp,%a1@(TASK_THREAD+THREAD_ESP0)
+        btst    #(TIF_SYSCALL_TRACE%8),%a0@(TI_FLAGS+(31-TIF_SYSCALL_TRACE)/8)
+        bnes    1f
+
+        movel   %d3,%a0
+        jbsr    %a0@
+        movel   %d0,%sp@(PT_OFF_D0)     /* save the return value */
+        jra     ret_from_exception
+1:
+        movel   #-ENOSYS,%d2            /* strace needs -ENOSYS in PT_OFF_D0 */
+        movel   %d2,PT_OFF_D0(%sp)      /* on syscall entry */
+        subql   #4,%sp
+        SAVE_SWITCH_STACK
+        jbsr    syscall_trace_enter
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        movel   %d3,%a0
+        jbsr    %a0@
+        movel   %d0,%sp@(PT_OFF_D0)             /* save the return value */
+        subql   #4,%sp                  /* dummy return address */
+        SAVE_SWITCH_STACK
+        jbsr    syscall_trace_leave
+
+ret_from_signal:
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+
+ret_from_exception:
+        move    #0x2700,%sr             /* disable intrs */
+        btst    #5,%sp@(PT_OFF_SR)      /* check if returning to kernel */
+        jeq     Luser_return            /* if so, skip resched, signals */
+
+#ifdef CONFIG_PREEMPT
+        movel   %sp,%d1                 /* get thread_info pointer */
+        andl    #-THREAD_SIZE,%d1       /* at base of kernel stack */
+        movel   %d1,%a0
+        movel   %a0@(TI_FLAGS),%d1      /* get thread_info->flags */
+        andl    #(1<<TIF_NEED_RESCHED),%d1
+        jeq     Lkernel_return
+
+        movel   %a0@(TI_PREEMPTCOUNT),%d1
+        cmpl    #0,%d1
+        jne     Lkernel_return
+
+        pea     Lkernel_return
+        jmp     preempt_schedule_irq    /* preempt the kernel */
+#endif
+
+Lkernel_return:
+        moveml  %sp@,%d1-%d5/%a0-%a2
+        lea     %sp@(32),%sp            /* space for 8 regs */
+        movel   %sp@+,%d0
+        addql   #4,%sp                  /* orig d0 */
+        addl    %sp@+,%sp               /* stk adj */
+        rte
+
+Luser_return:
+        movel   %sp,%d1                 /* get thread_info pointer */
+        andl    #-THREAD_SIZE,%d1       /* at base of kernel stack */
+        movel   %d1,%a0
+        movel   %a0@(TI_FLAGS),%d1      /* get thread_info->flags */
+        jne     Lwork_to_do             /* still work to do */
+
+Lreturn:
+        RESTORE_USER
+
+Lwork_to_do:
+        movel   %a0@(TI_FLAGS),%d1      /* get thread_info->flags */
+        move    #0x2000,%sr             /* enable intrs again */
+        btst    #TIF_NEED_RESCHED,%d1
+        jne     reschedule
+
+        /* GERG: do we need something here for TRACEing?? */
+
+Lsignal_return:
+        subql   #4,%sp                  /* dummy return address */
+        SAVE_SWITCH_STACK
+        pea     %sp@(SWITCH_STACK_SIZE)
+        jsr     do_signal
+        addql   #4,%sp
+        RESTORE_SWITCH_STACK
+        addql   #4,%sp
+        jmp     Luser_return
+
+/*
+ * This is the generic interrupt handler (for all hardware interrupt
+ * sources). Calls upto high level code to do all the work.
+ */
+ENTRY(inthandler)
+        SAVE_ALL
+        moveq   #-1,%d0
+        movel   %d0,%sp@(PT_OFF_ORIG_D0)
+
+        movew   %sp@(PT_OFF_FORMATVEC),%d0 /* put exception # in d0 */
+        andl    #0x03fc,%d0             /* mask out vector only */
+
+        movel   %sp,%sp@-               /* push regs arg */
+        lsrl    #2,%d0                  /* calculate real vector # */
+        movel   %d0,%sp@-               /* push vector number */
+        jbsr    do_IRQ                  /* call high level irq handler */
+        lea     %sp@(8),%sp             /* pop args off stack */
+
+        bra     ret_from_exception
+
+/*
+ * Beware - when entering resume, prev (the current task) is
+ * in a0, next (the new task) is in a1,so don't change these
+ * registers until their contents are no longer needed.
+ * This is always called in supervisor mode, so don't bother to save
+ * and restore sr; user's process sr is actually in the stack.
+ */
+ENTRY(resume)
+        movel   %a0, %d1                        /* get prev thread in d1 */
+        RDUSP
+        movel   %a2,%a0@(TASK_THREAD+THREAD_USP)
+
+        SAVE_SWITCH_STACK
+        movel   %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */
+        movel   %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new thread stack */
+        RESTORE_SWITCH_STACK
+
+        movel   %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */
+        WRUSP
+        rts
diff --git a/arch/m68k/platform/coldfire/gpio.c b/arch/m68k/platform/coldfire/gpio.c
new file mode 100644
index 000000000000..ff0045793450
--- /dev/null
+++ b/arch/m68k/platform/coldfire/gpio.c
@@ -0,0 +1,127 @@
+/*
+ * Coldfire generic GPIO support.
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/sysdev.h>
+
+#include <asm/gpio.h>
+#include <asm/pinmux.h>
+#include <asm/mcfgpio.h>
+
+#define MCF_CHIP(chip) container_of(chip, struct mcf_gpio_chip, gpio_chip)
+
+int mcf_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+        unsigned long flags;
+        MCFGPIO_PORTTYPE dir;
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        local_irq_save(flags);
+        dir = mcfgpio_read(mcf_chip->pddr);
+        dir &= ~mcfgpio_bit(chip->base + offset);
+        mcfgpio_write(dir, mcf_chip->pddr);
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+int mcf_gpio_get_value(struct gpio_chip *chip, unsigned offset)
+{
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        return mcfgpio_read(mcf_chip->ppdr) & mcfgpio_bit(chip->base + offset);
+}
+
+int mcf_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
+                int value)
+{
+        unsigned long flags;
+        MCFGPIO_PORTTYPE data;
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        local_irq_save(flags);
+        /* write the value to the output latch */
+        data = mcfgpio_read(mcf_chip->podr);
+        if (value)
+                data |= mcfgpio_bit(chip->base + offset);
+        else
+                data &= ~mcfgpio_bit(chip->base + offset);
+        mcfgpio_write(data, mcf_chip->podr);
+
+        /* now set the direction to output */
+        data = mcfgpio_read(mcf_chip->pddr);
+        data |= mcfgpio_bit(chip->base + offset);
+        mcfgpio_write(data, mcf_chip->pddr);
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+void mcf_gpio_set_value(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        unsigned long flags;
+        MCFGPIO_PORTTYPE data;
+
+        local_irq_save(flags);
+        data = mcfgpio_read(mcf_chip->podr);
+        if (value)
+                data |= mcfgpio_bit(chip->base + offset);
+        else
+                data &= ~mcfgpio_bit(chip->base + offset);
+        mcfgpio_write(data, mcf_chip->podr);
+        local_irq_restore(flags);
+}
+
+void mcf_gpio_set_value_fast(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        if (value)
+                mcfgpio_write(mcfgpio_bit(chip->base + offset), mcf_chip->setr);
+        else
+                mcfgpio_write(~mcfgpio_bit(chip->base + offset), mcf_chip->clrr);
+}
+
+int mcf_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        return mcf_chip->gpio_to_pinmux ?
+                mcf_pinmux_request(mcf_chip->gpio_to_pinmux[offset], 0) : 0;
+}
+
+void mcf_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        mcf_gpio_direction_input(chip, offset);
+
+        if (mcf_chip->gpio_to_pinmux)
+                mcf_pinmux_release(mcf_chip->gpio_to_pinmux[offset], 0);
+}
+
+struct sysdev_class mcf_gpio_sysclass = {
+        .name   = "gpio",
+};
+
+static int __init mcf_gpio_sysinit(void)
+{
+        return sysdev_class_register(&mcf_gpio_sysclass);
+}
+
+core_initcall(mcf_gpio_sysinit);
diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S
new file mode 100644
index 000000000000..129bff4956b5
--- /dev/null
+++ b/arch/m68k/platform/coldfire/head.S
@@ -0,0 +1,250 @@
+/*****************************************************************************/
+
+/*
+ *      head.S -- common startup code for ColdFire CPUs.
+ *
+ *      (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>.
+ */
+
+/*****************************************************************************/
+
+#include <linux/sys.h>
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/asm-offsets.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/thread_info.h>
+
+/*****************************************************************************/
+
+/*
+ *      If we don't have a fixed memory size, then lets build in code
+ *      to auto detect the DRAM size. Obviously this is the prefered
+ *      method, and should work for most boards. It won't work for those
+ *      that do not have their RAM starting at address 0, and it only
+ *      works on SDRAM (not boards fitted with SRAM).
+ */
+#if CONFIG_RAMSIZE != 0
+.macro GET_MEM_SIZE
+        movel   #CONFIG_RAMSIZE,%d0     /* hard coded memory size */
+.endm
+
+#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
+      defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
+      defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
+      defined(CONFIG_M5407)
+/*
+ *      Not all these devices have exactly the same DRAM controller,
+ *      but the DCMR register is virtually identical - give or take
+ *      a couple of bits. The only exception is the 5272 devices, their
+ *      DRAM controller is quite different.
+ */
+.macro GET_MEM_SIZE
+        movel   MCFSIM_DMR0,%d0         /* get mask for 1st bank */
+        btst    #0,%d0                  /* check if region enabled */
+        beq     1f
+        andl    #0xfffc0000,%d0
+        beq     1f
+        addl    #0x00040000,%d0         /* convert mask to size */
+1:
+        movel   MCFSIM_DMR1,%d1         /* get mask for 2nd bank */
+        btst    #0,%d1                  /* check if region enabled */
+        beq     2f
+        andl    #0xfffc0000,%d1
+        beq     2f
+        addl    #0x00040000,%d1
+        addl    %d1,%d0                 /* total mem size in d0 */
+2:
+.endm
+
+#elif defined(CONFIG_M5272)
+.macro GET_MEM_SIZE
+        movel   MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
+        andil   #0xfffff000,%d0         /* mask out chip select options */
+        negl    %d0                     /* negate bits */
+.endm
+
+#elif defined(CONFIG_M520x)
+.macro GET_MEM_SIZE
+        clrl    %d0
+        movel   MCFSIM_SDCS0, %d2       /* Get SDRAM chip select 0 config */
+        andl    #0x1f, %d2              /* Get only the chip select size */
+        beq     3f                      /* Check if it is enabled */
+        addql   #1, %d2                 /* Form exponent */
+        moveql  #1, %d0
+        lsll    %d2, %d0                /* 2 ^ exponent */
+3:
+        movel   MCFSIM_SDCS1, %d2       /* Get SDRAM chip select 1 config */
+        andl    #0x1f, %d2              /* Get only the chip select size */
+        beq     4f                      /* Check if it is enabled */
+        addql   #1, %d2                 /* Form exponent */
+        moveql  #1, %d1
+        lsll    %d2, %d1                /* 2 ^ exponent */
+        addl    %d1, %d0                /* Total size of SDRAM in d0 */
+4:
+.endm
+
+#else
+#error "ERROR: I don't know how to probe your boards memory size?"
+#endif
+
+/*****************************************************************************/
+
+/*
+ *      Boards and platforms can do specific early hardware setup if
+ *      they need to. Most don't need this, define away if not required.
+ */
+#ifndef PLATFORM_SETUP
+#define PLATFORM_SETUP
+#endif
+
+/*****************************************************************************/
+
+.global _start
+.global _rambase
+.global _ramvec
+.global _ramstart
+.global _ramend
+#if defined(CONFIG_UBOOT)
+.global _init_sp
+#endif
+
+/*****************************************************************************/
+
+.data
+
+/*
+ *      During startup we store away the RAM setup. These are not in the
+ *      bss, since their values are determined and written before the bss
+ *      has been cleared.
+ */
+_rambase:
+.long   0
+_ramvec:
+.long   0
+_ramstart:
+.long   0
+_ramend:
+.long   0
+#if defined(CONFIG_UBOOT)
+_init_sp:
+.long   0
+#endif
+
+/*****************************************************************************/
+
+__HEAD
+
+/*
+ *      This is the codes first entry point. This is where it all
+ *      begins...
+ */
+
+_start:
+        nop                                     /* filler */
+        movew   #0x2700, %sr                    /* no interrupts */
+#if defined(CONFIG_UBOOT)
+        movel   %sp,_init_sp                    /* save initial stack pointer */
+#endif
+
+        /*
+         *      Do any platform or board specific setup now. Most boards
+         *      don't need anything. Those exceptions are define this in
+         *      their board specific includes.
+         */
+        PLATFORM_SETUP
+
+        /*
+         *      Create basic memory configuration. Set VBR accordingly,
+         *      and size memory.
+         */
+        movel   #CONFIG_VECTORBASE,%a7
+        movec   %a7,%VBR                        /* set vectors addr */
+        movel   %a7,_ramvec
+
+        movel   #CONFIG_RAMBASE,%a7             /* mark the base of RAM */
+        movel   %a7,_rambase
+
+        GET_MEM_SIZE                            /* macro code determines size */
+        addl    %a7,%d0
+        movel   %d0,_ramend                     /* set end ram addr */
+
+        /*
+         *      Now that we know what the memory is, lets enable cache
+         *      and get things moving. This is Coldfire CPU specific. Not
+         *      all version cores have identical cache register setup. But
+         *      it is very similar. Define the exact settings in the headers
+         *      then the code here is the same for all.
+         */
+        movel   #CACHE_INIT,%d0                 /* invalidate whole cache */
+        movec   %d0,%CACR
+        nop
+        movel   #ACR0_MODE,%d0                  /* set RAM region for caching */
+        movec   %d0,%ACR0
+        movel   #ACR1_MODE,%d0                  /* anything else to cache? */
+        movec   %d0,%ACR1
+#ifdef ACR2_MODE
+        movel   #ACR2_MODE,%d0
+        movec   %d0,%ACR2
+        movel   #ACR3_MODE,%d0
+        movec   %d0,%ACR3
+#endif
+        movel   #CACHE_MODE,%d0                 /* enable cache */
+        movec   %d0,%CACR
+        nop
+
+#ifdef CONFIG_ROMFS_FS
+        /*
+         *      Move ROM filesystem above bss :-)
+         */
+        lea     _sbss,%a0                       /* get start of bss */
+        lea     _ebss,%a1                       /* set up destination  */
+        movel   %a0,%a2                         /* copy of bss start */
+
+        movel   8(%a0),%d0                      /* get size of ROMFS */
+        addql   #8,%d0                          /* allow for rounding */
+        andl    #0xfffffffc, %d0                /* whole words */
+
+        addl    %d0,%a0                         /* copy from end */
+        addl    %d0,%a1                         /* copy from end */
+        movel   %a1,_ramstart                   /* set start of ram */
+
+_copy_romfs:
+        movel   -(%a0),%d0                      /* copy dword */
+        movel   %d0,-(%a1)
+        cmpl    %a0,%a2                         /* check if at end */
+        bne     _copy_romfs
+
+#else /* CONFIG_ROMFS_FS */
+        lea     _ebss,%a1
+        movel   %a1,_ramstart
+#endif /* CONFIG_ROMFS_FS */
+
+
+        /*
+         *      Zero out the bss region.
+         */
+        lea     _sbss,%a0                       /* get start of bss */
+        lea     _ebss,%a1                       /* get end of bss */
+        clrl    %d0                             /* set value */
+_clear_bss:
+        movel   %d0,(%a0)+                      /* clear each word */
+        cmpl    %a0,%a1                         /* check if at end */
+        bne     _clear_bss
+
+        /*
+         *      Load the current task pointer and stack.
+         */
+        lea     init_thread_union,%a0
+        lea     THREAD_SIZE(%a0),%sp
+
+        /*
+         *      Assember start up done, start code proper.
+         */
+        jsr     start_kernel                    /* start Linux kernel */
+
+_exit:
+        jmp     _exit                           /* should never get here */
+
+/*****************************************************************************/
diff --git a/arch/m68k/platform/coldfire/intc-2.c b/arch/m68k/platform/coldfire/intc-2.c
new file mode 100644
index 000000000000..2cbfbf035db9
--- /dev/null
+++ b/arch/m68k/platform/coldfire/intc-2.c
@@ -0,0 +1,214 @@
+/*
+ * intc-2.c
+ *
+ * General interrupt controller code for the many ColdFire cores that use
+ * interrupt controllers with 63 interrupt sources, organized as 56 fully-
+ * programmable + 7 fixed-level interrupt sources. This includes the 523x
+ * family, the 5270, 5271, 5274, 5275, and the 528x family which have two such
+ * controllers, and the 547x and 548x families which have only one of them.
+ *
+ * The external 7 fixed interrupts are part the the Edge Port unit of these
+ * ColdFire parts. They can be configured as level or edge triggered.
+ *
+ * (C) Copyright 2009-2011, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/traps.h>
+
+/*
+ * Bit definitions for the ICR family of registers.
+ */
+#define MCFSIM_ICR_LEVEL(l)     ((l)<<3)        /* Level l intr */
+#define MCFSIM_ICR_PRI(p)       (p)             /* Priority p intr */
+
+/*
+ *      The EDGE Port interrupts are the fixed 7 external interrupts.
+ *      They need some special treatment, for example they need to be acked.
+ */
+#define EINT0   64      /* Is not actually used, but spot reserved for it */
+#define EINT1   65      /* EDGE Port interrupt 1 */
+#define EINT7   71      /* EDGE Port interrupt 7 */
+
+#ifdef MCFICM_INTC1
+#define NR_VECS 128
+#else
+#define NR_VECS 64
+#endif
+
+static void intc_irq_mask(struct irq_data *d)
+{
+        unsigned int irq = d->irq - MCFINT_VECBASE;
+        unsigned long imraddr;
+        u32 val, imrbit;
+
+#ifdef MCFICM_INTC1
+        imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
+#else
+        imraddr = MCFICM_INTC0;
+#endif
+        imraddr += (irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL;
+        imrbit = 0x1 << (irq & 0x1f);
+
+        val = __raw_readl(imraddr);
+        __raw_writel(val | imrbit, imraddr);
+}
+
+static void intc_irq_unmask(struct irq_data *d)
+{
+        unsigned int irq = d->irq - MCFINT_VECBASE;
+        unsigned long imraddr;
+        u32 val, imrbit;
+
+#ifdef MCFICM_INTC1
+        imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
+#else
+        imraddr = MCFICM_INTC0;
+#endif
+        imraddr += ((irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL);
+        imrbit = 0x1 << (irq & 0x1f);
+
+        /* Don't set the "maskall" bit! */
+        if ((irq & 0x20) == 0)
+                imrbit |= 0x1;
+
+        val = __raw_readl(imraddr);
+        __raw_writel(val & ~imrbit, imraddr);
+}
+
+/*
+ *      Only the external (or EDGE Port) interrupts need to be acknowledged
+ *      here, as part of the IRQ handler. They only really need to be ack'ed
+ *      if they are in edge triggered mode, but there is no harm in doing it
+ *      for all types.
+ */
+static void intc_irq_ack(struct irq_data *d)
+{
+        unsigned int irq = d->irq;
+
+        __raw_writeb(0x1 << (irq - EINT0), MCFEPORT_EPFR);
+}
+
+/*
+ *      Each vector needs a unique priority and level associated with it.
+ *      We don't really care so much what they are, we don't rely on the
+ *      traditional priority interrupt scheme of the m68k/ColdFire. This
+ *      only needs to be set once for an interrupt, and we will never change
+ *      these values once we have set them.
+ */
+static u8 intc_intpri = MCFSIM_ICR_LEVEL(6) | MCFSIM_ICR_PRI(6);
+
+static unsigned int intc_irq_startup(struct irq_data *d)
+{
+        unsigned int irq = d->irq - MCFINT_VECBASE;
+        unsigned long icraddr;
+
+#ifdef MCFICM_INTC1
+        icraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
+#else
+        icraddr = MCFICM_INTC0;
+#endif
+        icraddr += MCFINTC_ICR0 + (irq & 0x3f);
+        if (__raw_readb(icraddr) == 0)
+                __raw_writeb(intc_intpri--, icraddr);
+
+        irq = d->irq;
+        if ((irq >= EINT1) && (irq <= EINT7)) {
+                u8 v;
+
+                irq -= EINT0;
+
+                /* Set EPORT line as input */
+                v = __raw_readb(MCFEPORT_EPDDR);
+                __raw_writeb(v & ~(0x1 << irq), MCFEPORT_EPDDR);
+
+                /* Set EPORT line as interrupt source */
+                v = __raw_readb(MCFEPORT_EPIER);
+                __raw_writeb(v | (0x1 << irq), MCFEPORT_EPIER);
+        }
+
+        intc_irq_unmask(d);
+        return 0;
+}
+
+static int intc_irq_set_type(struct irq_data *d, unsigned int type)
+{
+        unsigned int irq = d->irq;
+        u16 pa, tb;
+
+        switch (type) {
+        case IRQ_TYPE_EDGE_RISING:
+                tb = 0x1;
+                break;
+        case IRQ_TYPE_EDGE_FALLING:
+                tb = 0x2;
+                break;
+        case IRQ_TYPE_EDGE_BOTH:
+                tb = 0x3;
+                break;
+        default:
+                /* Level triggered */
+                tb = 0;
+                break;
+        }
+
+        if (tb)
+                set_irq_handler(irq, handle_edge_irq);
+
+        irq -= EINT0;
+        pa = __raw_readw(MCFEPORT_EPPAR);
+        pa = (pa & ~(0x3 << (irq * 2))) | (tb << (irq * 2));
+        __raw_writew(pa, MCFEPORT_EPPAR);
+        
+        return 0;
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "CF-INTC",
+        .irq_startup    = intc_irq_startup,
+        .irq_mask       = intc_irq_mask,
+        .irq_unmask     = intc_irq_unmask,
+};
+
+static struct irq_chip intc_irq_chip_edge_port = {
+        .name           = "CF-INTC-EP",
+        .irq_startup    = intc_irq_startup,
+        .irq_mask       = intc_irq_mask,
+        .irq_unmask     = intc_irq_unmask,
+        .irq_ack        = intc_irq_ack,
+        .irq_set_type   = intc_irq_set_type,
+};
+
+void __init init_IRQ(void)
+{
+        int irq;
+
+        init_vectors();
+
+        /* Mask all interrupt sources */
+        __raw_writel(0x1, MCFICM_INTC0 + MCFINTC_IMRL);
+#ifdef MCFICM_INTC1
+        __raw_writel(0x1, MCFICM_INTC1 + MCFINTC_IMRL);
+#endif
+
+        for (irq = MCFINT_VECBASE; (irq < MCFINT_VECBASE + NR_VECS); irq++) {
+                if ((irq >= EINT1) && (irq <=EINT7))
+                        set_irq_chip(irq, &intc_irq_chip_edge_port);
+                else
+                        set_irq_chip(irq, &intc_irq_chip);
+                set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
+                set_irq_handler(irq, handle_level_irq);
+        }
+}
+
diff --git a/arch/m68k/platform/coldfire/intc-simr.c b/arch/m68k/platform/coldfire/intc-simr.c
new file mode 100644
index 000000000000..e642b24ab729
--- /dev/null
+++ b/arch/m68k/platform/coldfire/intc-simr.c
@@ -0,0 +1,191 @@
+/*
+ * intc-simr.c
+ *
+ * Interrupt controller code for the ColdFire 5208, 5207 & 532x parts.
+ *
+ * (C) Copyright 2009-2011, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/traps.h>
+
+/*
+ *      The EDGE Port interrupts are the fixed 7 external interrupts.
+ *      They need some special treatment, for example they need to be acked.
+ */
+#ifdef CONFIG_M520x
+/*
+ *      The 520x parts only support a limited range of these external
+ *      interrupts, only 1, 4 and 7 (as interrupts 65, 66 and 67).
+ */
+#define EINT0   64      /* Is not actually used, but spot reserved for it */
+#define EINT1   65      /* EDGE Port interrupt 1 */
+#define EINT4   66      /* EDGE Port interrupt 4 */
+#define EINT7   67      /* EDGE Port interrupt 7 */
+
+static unsigned int irqebitmap[] = { 0, 1, 4, 7 };
+static unsigned int inline irq2ebit(unsigned int irq)
+{
+        return irqebitmap[irq - EINT0];
+}
+
+#else
+
+/*
+ *      Most of the ColdFire parts with the EDGE Port module just have
+ *      a strait direct mapping of the 7 external interrupts. Although
+ *      there is a bit reserved for 0, it is not used.
+ */
+#define EINT0   64      /* Is not actually used, but spot reserved for it */
+#define EINT1   65      /* EDGE Port interrupt 1 */
+#define EINT7   71      /* EDGE Port interrupt 7 */
+
+static unsigned int inline irq2ebit(unsigned int irq)
+{
+        return irq - EINT0;
+}
+
+#endif
+
+/*
+ *      There maybe one or two interrupt control units, each has 64
+ *      interrupts. If there is no second unit then MCFINTC1_* defines
+ *      will be 0 (and code for them optimized away).
+ */
+
+static void intc_irq_mask(struct irq_data *d)
+{
+        unsigned int irq = d->irq - MCFINT_VECBASE;
+
+        if (MCFINTC1_SIMR && (irq > 64))
+                __raw_writeb(irq - 64, MCFINTC1_SIMR);
+        else
+                __raw_writeb(irq, MCFINTC0_SIMR);
+}
+
+static void intc_irq_unmask(struct irq_data *d)
+{
+        unsigned int irq = d->irq - MCFINT_VECBASE;
+
+        if (MCFINTC1_CIMR && (irq > 64))
+                __raw_writeb(irq - 64, MCFINTC1_CIMR);
+        else
+                __raw_writeb(irq, MCFINTC0_CIMR);
+}
+
+static void intc_irq_ack(struct irq_data *d)
+{
+        unsigned int ebit = irq2ebit(d->irq);
+
+        __raw_writeb(0x1 << ebit, MCFEPORT_EPFR);
+}
+
+static unsigned int intc_irq_startup(struct irq_data *d)
+{
+        unsigned int irq = d->irq;
+
+        if ((irq >= EINT1) && (irq <= EINT7)) {
+                unsigned int ebit = irq2ebit(irq);
+                u8 v;
+
+                /* Set EPORT line as input */
+                v = __raw_readb(MCFEPORT_EPDDR);
+                __raw_writeb(v & ~(0x1 << ebit), MCFEPORT_EPDDR);
+
+                /* Set EPORT line as interrupt source */
+                v = __raw_readb(MCFEPORT_EPIER);
+                __raw_writeb(v | (0x1 << ebit), MCFEPORT_EPIER);
+        }
+
+        irq -= MCFINT_VECBASE;
+        if (MCFINTC1_ICR0 && (irq > 64))
+                __raw_writeb(5, MCFINTC1_ICR0 + irq - 64);
+        else
+                __raw_writeb(5, MCFINTC0_ICR0 + irq);
+
+
+        intc_irq_unmask(d);
+        return 0;
+}
+
+static int intc_irq_set_type(struct irq_data *d, unsigned int type)
+{
+        unsigned int ebit, irq = d->irq;
+        u16 pa, tb;
+
+        switch (type) {
+        case IRQ_TYPE_EDGE_RISING:
+                tb = 0x1;
+                break;
+        case IRQ_TYPE_EDGE_FALLING:
+                tb = 0x2;
+                break;
+        case IRQ_TYPE_EDGE_BOTH:
+                tb = 0x3;
+                break;
+        default:
+                /* Level triggered */
+                tb = 0;
+                break;
+        }
+
+        if (tb)
+                set_irq_handler(irq, handle_edge_irq);
+
+        ebit = irq2ebit(irq) * 2;
+        pa = __raw_readw(MCFEPORT_EPPAR);
+        pa = (pa & ~(0x3 << ebit)) | (tb << ebit);
+        __raw_writew(pa, MCFEPORT_EPPAR);
+        
+        return 0;
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "CF-INTC",
+        .irq_startup    = intc_irq_startup,
+        .irq_mask       = intc_irq_mask,
+        .irq_unmask     = intc_irq_unmask,
+};
+
+static struct irq_chip intc_irq_chip_edge_port = {
+        .name           = "CF-INTC-EP",
+        .irq_startup    = intc_irq_startup,
+        .irq_mask       = intc_irq_mask,
+        .irq_unmask     = intc_irq_unmask,
+        .irq_ack        = intc_irq_ack,
+        .irq_set_type   = intc_irq_set_type,
+};
+
+void __init init_IRQ(void)
+{
+        int irq, eirq;
+
+        init_vectors();
+
+        /* Mask all interrupt sources */
+        __raw_writeb(0xff, MCFINTC0_SIMR);
+        if (MCFINTC1_SIMR)
+                __raw_writeb(0xff, MCFINTC1_SIMR);
+
+        eirq = MCFINT_VECBASE + 64 + (MCFINTC1_ICR0 ? 64 : 0);
+        for (irq = MCFINT_VECBASE; (irq < eirq); irq++) {
+                if ((irq >= EINT1) && (irq <= EINT7))
+                        set_irq_chip(irq, &intc_irq_chip_edge_port);
+                else
+                        set_irq_chip(irq, &intc_irq_chip);
+                set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
+                set_irq_handler(irq, handle_level_irq);
+        }
+}
+
diff --git a/arch/m68k/platform/coldfire/intc.c b/arch/m68k/platform/coldfire/intc.c
new file mode 100644
index 000000000000..d648081a63f6
--- /dev/null
+++ b/arch/m68k/platform/coldfire/intc.c
@@ -0,0 +1,151 @@
+/*
+ * intc.c  -- support for the old ColdFire interrupt controller
+ *
+ * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/traps.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+/*
+ * The mapping of irq number to a mask register bit is not one-to-one.
+ * The irq numbers are either based on "level" of interrupt or fixed
+ * for an autovector-able interrupt. So we keep a local data structure
+ * that maps from irq to mask register. Not all interrupts will have
+ * an IMR bit.
+ */
+unsigned char mcf_irq2imr[NR_IRQS];
+
+/*
+ * Define the miniumun and maximum external interrupt numbers.
+ * This is also used as the "level" interrupt numbers.
+ */
+#define EIRQ1   25
+#define EIRQ7   31
+
+/*
+ * In the early version 2 core ColdFire parts the IMR register was 16 bits
+ * in size. Version 3 (and later version 2) core parts have a 32 bit
+ * sized IMR register. Provide some size independant methods to access the
+ * IMR register.
+ */
+#ifdef MCFSIM_IMR_IS_16BITS
+
+void mcf_setimr(int index)
+{
+        u16 imr;
+        imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
+        __raw_writew(imr | (0x1 << index), MCF_MBAR + MCFSIM_IMR);
+}
+
+void mcf_clrimr(int index)
+{
+        u16 imr;
+        imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
+        __raw_writew(imr & ~(0x1 << index), MCF_MBAR + MCFSIM_IMR);
+}
+
+void mcf_maskimr(unsigned int mask)
+{
+        u16 imr;
+        imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
+        imr |= mask;
+        __raw_writew(imr, MCF_MBAR + MCFSIM_IMR);
+}
+
+#else
+
+void mcf_setimr(int index)
+{
+        u32 imr;
+        imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
+        __raw_writel(imr | (0x1 << index), MCF_MBAR + MCFSIM_IMR);
+}
+
+void mcf_clrimr(int index)
+{
+        u32 imr;
+        imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
+        __raw_writel(imr & ~(0x1 << index), MCF_MBAR + MCFSIM_IMR);
+}
+
+void mcf_maskimr(unsigned int mask)
+{
+        u32 imr;
+        imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
+        imr |= mask;
+        __raw_writel(imr, MCF_MBAR + MCFSIM_IMR);
+}
+
+#endif
+
+/*
+ * Interrupts can be "vectored" on the ColdFire cores that support this old
+ * interrupt controller. That is, the device raising the interrupt can also
+ * supply the vector number to interrupt through. The AVR register of the
+ * interrupt controller enables or disables this for each external interrupt,
+ * so provide generic support for this. Setting this up is out-of-band for
+ * the interrupt system API's, and needs to be done by the driver that
+ * supports this device. Very few devices actually use this.
+ */
+void mcf_autovector(int irq)
+{
+#ifdef MCFSIM_AVR
+        if ((irq >= EIRQ1) && (irq <= EIRQ7)) {
+                u8 avec;
+                avec = __raw_readb(MCF_MBAR + MCFSIM_AVR);
+                avec |= (0x1 << (irq - EIRQ1 + 1));
+                __raw_writeb(avec, MCF_MBAR + MCFSIM_AVR);
+        }
+#endif
+}
+
+static void intc_irq_mask(struct irq_data *d)
+{
+        if (mcf_irq2imr[d->irq])
+                mcf_setimr(mcf_irq2imr[d->irq]);
+}
+
+static void intc_irq_unmask(struct irq_data *d)
+{
+        if (mcf_irq2imr[d->irq])
+                mcf_clrimr(mcf_irq2imr[d->irq]);
+}
+
+static int intc_irq_set_type(struct irq_data *d, unsigned int type)
+{
+        return 0;
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "CF-INTC",
+        .irq_mask       = intc_irq_mask,
+        .irq_unmask     = intc_irq_unmask,
+        .irq_set_type   = intc_irq_set_type,
+};
+
+void __init init_IRQ(void)
+{
+        int irq;
+
+        init_vectors();
+        mcf_maskimr(0xffffffff);
+
+        for (irq = 0; (irq < NR_IRQS); irq++) {
+                set_irq_chip(irq, &intc_irq_chip);
+                set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
+                set_irq_handler(irq, handle_level_irq);
+        }
+}
+
diff --git a/arch/m68k/platform/coldfire/pinmux.c b/arch/m68k/platform/coldfire/pinmux.c
new file mode 100644
index 000000000000..8c62b825939f
--- /dev/null
+++ b/arch/m68k/platform/coldfire/pinmux.c
@@ -0,0 +1,28 @@
+/*
+ * Coldfire generic GPIO pinmux support.
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; version 2 of the License.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+
+#include <asm/pinmux.h>
+
+int mcf_pinmux_request(unsigned pinmux, unsigned func)
+{
+        return 0;
+}
+
+void mcf_pinmux_release(unsigned pinmux, unsigned func)
+{
+}
diff --git a/arch/m68k/platform/coldfire/pit.c b/arch/m68k/platform/coldfire/pit.c
new file mode 100644
index 000000000000..c2b980926bec
--- /dev/null
+++ b/arch/m68k/platform/coldfire/pit.c
@@ -0,0 +1,169 @@
+/***************************************************************************/
+
+/*
+ *      pit.c -- Freescale ColdFire PIT timer. Currently this type of
+ *               hardware timer only exists in the Freescale ColdFire
+ *               5270/5271, 5282 and 5208 CPUs. No doubt newer ColdFire
+ *               family members will probably use it too.
+ *
+ *      Copyright (C) 1999-2008, Greg Ungerer (gerg@snapgear.com)
+ *      Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/clockchips.h>
+#include <asm/machdep.h>
+#include <asm/io.h>
+#include <asm/coldfire.h>
+#include <asm/mcfpit.h>
+#include <asm/mcfsim.h>
+
+/***************************************************************************/
+
+/*
+ *      By default use timer1 as the system clock timer.
+ */
+#define FREQ    ((MCF_CLK / 2) / 64)
+#define TA(a)   (MCFPIT_BASE1 + (a))
+#define PIT_CYCLES_PER_JIFFY (FREQ / HZ)
+
+static u32 pit_cnt;
+
+/*
+ * Initialize the PIT timer.
+ *
+ * This is also called after resume to bring the PIT into operation again.
+ */
+
+static void init_cf_pit_timer(enum clock_event_mode mode,
+                             struct clock_event_device *evt)
+{
+        switch (mode) {
+        case CLOCK_EVT_MODE_PERIODIC:
+
+                __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
+                __raw_writew(PIT_CYCLES_PER_JIFFY, TA(MCFPIT_PMR));
+                __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | \
+                                MCFPIT_PCSR_OVW | MCFPIT_PCSR_RLD | \
+                                MCFPIT_PCSR_CLK64, TA(MCFPIT_PCSR));
+                break;
+
+        case CLOCK_EVT_MODE_SHUTDOWN:
+        case CLOCK_EVT_MODE_UNUSED:
+
+                __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
+                break;
+
+        case CLOCK_EVT_MODE_ONESHOT:
+
+                __raw_writew(MCFPIT_PCSR_DISABLE, TA(MCFPIT_PCSR));
+                __raw_writew(MCFPIT_PCSR_EN | MCFPIT_PCSR_PIE | \
+                                MCFPIT_PCSR_OVW | MCFPIT_PCSR_CLK64, \
+                                TA(MCFPIT_PCSR));
+                break;
+
+        case CLOCK_EVT_MODE_RESUME:
+                /* Nothing to do here */
+                break;
+        }
+}
+
+/*
+ * Program the next event in oneshot mode
+ *
+ * Delta is given in PIT ticks
+ */
+static int cf_pit_next_event(unsigned long delta,
+                struct clock_event_device *evt)
+{
+        __raw_writew(delta, TA(MCFPIT_PMR));
+        return 0;
+}
+
+struct clock_event_device cf_pit_clockevent = {
+        .name           = "pit",
+        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+        .set_mode       = init_cf_pit_timer,
+        .set_next_event = cf_pit_next_event,
+        .shift          = 32,
+        .irq            = MCFINT_VECBASE + MCFINT_PIT1,
+};
+
+
+
+/***************************************************************************/
+
+static irqreturn_t pit_tick(int irq, void *dummy)
+{
+        struct clock_event_device *evt = &cf_pit_clockevent;
+        u16 pcsr;
+
+        /* Reset the ColdFire timer */
+        pcsr = __raw_readw(TA(MCFPIT_PCSR));
+        __raw_writew(pcsr | MCFPIT_PCSR_PIF, TA(MCFPIT_PCSR));
+
+        pit_cnt += PIT_CYCLES_PER_JIFFY;
+        evt->event_handler(evt);
+        return IRQ_HANDLED;
+}
+
+/***************************************************************************/
+
+static struct irqaction pit_irq = {
+        .name    = "timer",
+        .flags   = IRQF_DISABLED | IRQF_TIMER,
+        .handler = pit_tick,
+};
+
+/***************************************************************************/
+
+static cycle_t pit_read_clk(struct clocksource *cs)
+{
+        unsigned long flags;
+        u32 cycles;
+        u16 pcntr;
+
+        local_irq_save(flags);
+        pcntr = __raw_readw(TA(MCFPIT_PCNTR));
+        cycles = pit_cnt;
+        local_irq_restore(flags);
+
+        return cycles + PIT_CYCLES_PER_JIFFY - pcntr;
+}
+
+/***************************************************************************/
+
+static struct clocksource pit_clk = {
+        .name   = "pit",
+        .rating = 100,
+        .read   = pit_read_clk,
+        .shift  = 20,
+        .mask   = CLOCKSOURCE_MASK(32),
+};
+
+/***************************************************************************/
+
+void hw_timer_init(void)
+{
+        cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id());
+        cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32);
+        cf_pit_clockevent.max_delta_ns =
+                clockevent_delta2ns(0xFFFF, &cf_pit_clockevent);
+        cf_pit_clockevent.min_delta_ns =
+                clockevent_delta2ns(0x3f, &cf_pit_clockevent);
+        clockevents_register_device(&cf_pit_clockevent);
+
+        setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq);
+
+        pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift);
+        clocksource_register(&pit_clk);
+}
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c
new file mode 100644
index 000000000000..0a1b937c3e18
--- /dev/null
+++ b/arch/m68k/platform/coldfire/sltimers.c
@@ -0,0 +1,145 @@
+/***************************************************************************/
+
+/*
+ *      sltimers.c -- generic ColdFire slice timer support.
+ *
+ *      Copyright (C) 2009-2010, Philippe De Muyter <phdm@macqel.be>
+ *      based on
+ *      timers.c -- generic ColdFire hardware timer support.
+ *      Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/profile.h>
+#include <linux/clocksource.h>
+#include <asm/io.h>
+#include <asm/traps.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfslt.h>
+#include <asm/mcfsim.h>
+
+/***************************************************************************/
+
+#ifdef CONFIG_HIGHPROFILE
+
+/*
+ *      By default use Slice Timer 1 as the profiler clock timer.
+ */
+#define PA(a)   (MCF_MBAR + MCFSLT_TIMER1 + (a))
+
+/*
+ *      Choose a reasonably fast profile timer. Make it an odd value to
+ *      try and get good coverage of kernel operations.
+ */
+#define PROFILEHZ       1013
+
+irqreturn_t mcfslt_profile_tick(int irq, void *dummy)
+{
+        /* Reset Slice Timer 1 */
+        __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, PA(MCFSLT_SSR));
+        if (current->pid)
+                profile_tick(CPU_PROFILING);
+        return IRQ_HANDLED;
+}
+
+static struct irqaction mcfslt_profile_irq = {
+        .name    = "profile timer",
+        .flags   = IRQF_DISABLED | IRQF_TIMER,
+        .handler = mcfslt_profile_tick,
+};
+
+void mcfslt_profile_init(void)
+{
+        printk(KERN_INFO "PROFILE: lodging TIMER 1 @ %dHz as profile timer\n",
+               PROFILEHZ);
+
+        setup_irq(MCF_IRQ_PROFILER, &mcfslt_profile_irq);
+
+        /* Set up TIMER 2 as high speed profile clock */
+        __raw_writel(MCF_BUSCLK / PROFILEHZ - 1, PA(MCFSLT_STCNT));
+        __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
+                                                                PA(MCFSLT_SCR));
+
+}
+
+#endif  /* CONFIG_HIGHPROFILE */
+
+/***************************************************************************/
+
+/*
+ *      By default use Slice Timer 0 as the system clock timer.
+ */
+#define TA(a)   (MCF_MBAR + MCFSLT_TIMER0 + (a))
+
+static u32 mcfslt_cycles_per_jiffy;
+static u32 mcfslt_cnt;
+
+static irqreturn_t mcfslt_tick(int irq, void *dummy)
+{
+        /* Reset Slice Timer 0 */
+        __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
+        mcfslt_cnt += mcfslt_cycles_per_jiffy;
+        return arch_timer_interrupt(irq, dummy);
+}
+
+static struct irqaction mcfslt_timer_irq = {
+        .name    = "timer",
+        .flags   = IRQF_DISABLED | IRQF_TIMER,
+        .handler = mcfslt_tick,
+};
+
+static cycle_t mcfslt_read_clk(struct clocksource *cs)
+{
+        unsigned long flags;
+        u32 cycles;
+        u16 scnt;
+
+        local_irq_save(flags);
+        scnt = __raw_readl(TA(MCFSLT_SCNT));
+        cycles = mcfslt_cnt;
+        local_irq_restore(flags);
+
+        /* substract because slice timers count down */
+        return cycles - scnt;
+}
+
+static struct clocksource mcfslt_clk = {
+        .name   = "slt",
+        .rating = 250,
+        .read   = mcfslt_read_clk,
+        .shift  = 20,
+        .mask   = CLOCKSOURCE_MASK(32),
+        .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+void hw_timer_init(void)
+{
+        mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ;
+        /*
+         *      The coldfire slice timer (SLT) runs from STCNT to 0 included,
+         *      then STCNT again and so on.  It counts thus actually
+         *      STCNT + 1 steps for 1 tick, not STCNT.  So if you want
+         *      n cycles, initialize STCNT with n - 1.
+         */
+        __raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT));
+        __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
+                                                                TA(MCFSLT_SCR));
+        /* initialize mcfslt_cnt knowing that slice timers count down */
+        mcfslt_cnt = mcfslt_cycles_per_jiffy;
+
+        setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq);
+
+        mcfslt_clk.mult = clocksource_hz2mult(MCF_BUSCLK, mcfslt_clk.shift);
+        clocksource_register(&mcfslt_clk);
+
+#ifdef CONFIG_HIGHPROFILE
+        mcfslt_profile_init();
+#endif
+}
diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c
new file mode 100644
index 000000000000..60242f65fea9
--- /dev/null
+++ b/arch/m68k/platform/coldfire/timers.c
@@ -0,0 +1,174 @@
+/***************************************************************************/
+
+/*
+ *      timers.c -- generic ColdFire hardware timer support.
+ *
+ *      Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/profile.h>
+#include <linux/clocksource.h>
+#include <asm/io.h>
+#include <asm/traps.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcftimer.h>
+#include <asm/mcfsim.h>
+
+/***************************************************************************/
+
+/*
+ *      By default use timer1 as the system clock timer.
+ */
+#define FREQ    (MCF_BUSCLK / 16)
+#define TA(a)   (MCFTIMER_BASE1 + (a))
+
+/*
+ *      These provide the underlying interrupt vector support.
+ *      Unfortunately it is a little different on each ColdFire.
+ */
+void coldfire_profile_init(void);
+
+#if defined(CONFIG_M532x)
+#define __raw_readtrr   __raw_readl
+#define __raw_writetrr  __raw_writel
+#else
+#define __raw_readtrr   __raw_readw
+#define __raw_writetrr  __raw_writew
+#endif
+
+static u32 mcftmr_cycles_per_jiffy;
+static u32 mcftmr_cnt;
+
+/***************************************************************************/
+
+static irqreturn_t mcftmr_tick(int irq, void *dummy)
+{
+        /* Reset the ColdFire timer */
+        __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
+
+        mcftmr_cnt += mcftmr_cycles_per_jiffy;
+        return arch_timer_interrupt(irq, dummy);
+}
+
+/***************************************************************************/
+
+static struct irqaction mcftmr_timer_irq = {
+        .name    = "timer",
+        .flags   = IRQF_DISABLED | IRQF_TIMER,
+        .handler = mcftmr_tick,
+};
+
+/***************************************************************************/
+
+static cycle_t mcftmr_read_clk(struct clocksource *cs)
+{
+        unsigned long flags;
+        u32 cycles;
+        u16 tcn;
+
+        local_irq_save(flags);
+        tcn = __raw_readw(TA(MCFTIMER_TCN));
+        cycles = mcftmr_cnt;
+        local_irq_restore(flags);
+
+        return cycles + tcn;
+}
+
+/***************************************************************************/
+
+static struct clocksource mcftmr_clk = {
+        .name   = "tmr",
+        .rating = 250,
+        .read   = mcftmr_read_clk,
+        .shift  = 20,
+        .mask   = CLOCKSOURCE_MASK(32),
+        .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+/***************************************************************************/
+
+void hw_timer_init(void)
+{
+        __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
+        mcftmr_cycles_per_jiffy = FREQ / HZ;
+        /*
+         *      The coldfire timer runs from 0 to TRR included, then 0
+         *      again and so on.  It counts thus actually TRR + 1 steps
+         *      for 1 tick, not TRR.  So if you want n cycles,
+         *      initialize TRR with n - 1.
+         */
+        __raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
+        __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
+                MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
+
+        mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
+        clocksource_register(&mcftmr_clk);
+
+        setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
+
+#ifdef CONFIG_HIGHPROFILE
+        coldfire_profile_init();
+#endif
+}
+
+/***************************************************************************/
+#ifdef CONFIG_HIGHPROFILE
+/***************************************************************************/
+
+/*
+ *      By default use timer2 as the profiler clock timer.
+ */
+#define PA(a)   (MCFTIMER_BASE2 + (a))
+
+/*
+ *      Choose a reasonably fast profile timer. Make it an odd value to
+ *      try and get good coverage of kernel operations.
+ */
+#define PROFILEHZ       1013
+
+/*
+ *      Use the other timer to provide high accuracy profiling info.
+ */
+irqreturn_t coldfire_profile_tick(int irq, void *dummy)
+{
+        /* Reset ColdFire timer2 */
+        __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
+        if (current->pid)
+                profile_tick(CPU_PROFILING);
+        return IRQ_HANDLED;
+}
+
+/***************************************************************************/
+
+static struct irqaction coldfire_profile_irq = {
+        .name    = "profile timer",
+        .flags   = IRQF_DISABLED | IRQF_TIMER,
+        .handler = coldfire_profile_tick,
+};
+
+void coldfire_profile_init(void)
+{
+        printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
+               PROFILEHZ);
+
+        /* Set up TIMER 2 as high speed profile clock */
+        __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
+
+        __raw_writetrr(((MCF_BUSCLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
+        __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
+                MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
+
+        setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
+}
+
+/***************************************************************************/
+#endif  /* CONFIG_HIGHPROFILE */
+/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/vectors.c b/arch/m68k/platform/coldfire/vectors.c
new file mode 100644
index 000000000000..a21d3f870b7a
--- /dev/null
+++ b/arch/m68k/platform/coldfire/vectors.c
@@ -0,0 +1,80 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/coldfire/vectors.c
+ *
+ *      Copyright (C) 1999-2007, Greg Ungerer <gerg@snapgear.com>
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/traps.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfwdebug.h>
+
+/***************************************************************************/
+
+#ifdef TRAP_DBG_INTERRUPT
+
+asmlinkage void dbginterrupt_c(struct frame *fp)
+{
+        extern void dump(struct pt_regs *fp);
+        printk(KERN_DEBUG "%s(%d): BUS ERROR TRAP\n", __FILE__, __LINE__);
+        dump((struct pt_regs *) fp);
+        asm("halt");
+}
+
+#endif
+
+/***************************************************************************/
+
+extern e_vector *_ramvec;
+
+void set_evector(int vecnum, void (*handler)(void))
+{
+        if (vecnum >= 0 && vecnum <= 255)
+                _ramvec[vecnum] = handler;
+}
+
+/***************************************************************************/
+
+/* Assembler routines */
+asmlinkage void buserr(void);
+asmlinkage void trap(void);
+asmlinkage void system_call(void);
+asmlinkage void inthandler(void);
+
+void __init init_vectors(void)
+{
+        int i;
+
+        /*
+         *      There is a common trap handler and common interrupt
+         *      handler that handle almost every vector. We treat
+         *      the system call and bus error special, they get their
+         *      own first level handlers.
+         */
+        for (i = 3; (i <= 23); i++)
+                _ramvec[i] = trap;
+        for (i = 33; (i <= 63); i++)
+                _ramvec[i] = trap;
+        for (i = 24; (i <= 31); i++)
+                _ramvec[i] = inthandler;
+        for (i = 64; (i < 255); i++)
+                _ramvec[i] = inthandler;
+        _ramvec[255] = 0;
+
+        _ramvec[2] = buserr;
+        _ramvec[32] = system_call;
+
+#ifdef TRAP_DBG_INTERRUPT
+        _ramvec[12] = dbginterrupt;
+#endif
+}
+
+/***************************************************************************/