m68knommu: external interrupt support to ColdFire intc-2 controller

The EDGE Port module of some ColdFire parts using the intc-2 interrupt
controller provides support for 7 external interrupts. These interrupts
go off-chip (that is they are not for internal peripherals). They need
some special handling and have some extra setup registers. Add code to
support them.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

3 files changed, 16 insertions, 0 deletions

diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index 3852f074fddd..8996df62ede4 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -139,9 +139,12 @@
 /*
  * EPort
  */
+#define MCFEPORT_EPPAR          (MCF_IPSBAR + 0x130000)
 #define MCFEPORT_EPDDR          (MCF_IPSBAR + 0x130002)
+#define MCFEPORT_EPIER          (MCF_IPSBAR + 0x130003)
 #define MCFEPORT_EPDR           (MCF_IPSBAR + 0x130004)
 #define MCFEPORT_EPPDR          (MCF_IPSBAR + 0x130005)
+#define MCFEPORT_EPFR           (MCF_IPSBAR + 0x130006)
 
 /*
  * Generic GPIO support
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index c23046ee3a51..74855a66c050 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -259,9 +259,12 @@
 /*
  * EPort
  */
+#define MCFEPORT_EPPAR          (MCF_IPSBAR + 0x130000)
 #define MCFEPORT_EPDDR          (MCF_IPSBAR + 0x130002)
+#define MCFEPORT_EPIER          (MCF_IPSBAR + 0x130003)
 #define MCFEPORT_EPDR           (MCF_IPSBAR + 0x130004)
 #define MCFEPORT_EPPDR          (MCF_IPSBAR + 0x130005)
+#define MCFEPORT_EPFR           (MCF_IPSBAR + 0x130006)
 
 /*
  *      GPIO pins setups to enable the UARTs.
diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h
index daaae276bb09..1ed8bfb02772 100644
--- a/arch/m68k/include/asm/m54xxsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -50,6 +50,16 @@
 #define MCFGPIO_IRQ_VECBASE     -1
 
 /*
+ *      EDGE Port support.
+ */
+#define MCFEPORT_EPPAR          (MCF_MBAR + 0xf00)      /* Pin assignment */
+#define MCFEPORT_EPDDR          (MCF_MBAR + 0xf04)      /* Data direction */
+#define MCFEPORT_EPIER          (MCF_MBAR + 0xf05)      /* Interrupt enable */
+#define MCFEPORT_EPDR           (MCF_MBAR + 0xf08)      /* Port data (w) */
+#define MCFEPORT_EPPDR          (MCF_MBAR + 0xf09)      /* Port data (r) */
+#define MCFEPORT_EPFR           (MCF_MBAR + 0xf0c)      /* Flags */
+
+/*
  *      Some PSC related definitions
  */
 #define MCF_PAR_PSC(x)          (0x000A4F-((x)&0x3))