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authorGreg Ungerer <gerg@uclinux.org>2011-12-23 21:38:40 -0500
committerGreg Ungerer <gerg@uclinux.org>2012-03-04 18:43:09 -0500
commit2424f549020b6f87ea3b6e89fd7bd26ddf1f717b (patch)
treec1adc43406e79ad5bf2d0e412852a748eca6f956 /arch/m68k
parent36d175a4b249235927d75fb681484bd97cc4ea41 (diff)
m68knommu: make 5249 QSPI platform addressing consistent
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and code and use a single setup for all. So modify the ColdFire 5249 QSPI addressing so that: . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used . move chip select definitions (CS) to appropriate header Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/include/asm/m5249sim.h11
-rw-r--r--arch/m68k/include/asm/mcfqspi.h2
-rw-r--r--arch/m68k/platform/5249/config.c9
3 files changed, 13 insertions, 9 deletions
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index 3e31508619c1..7f0c2c3660fd 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -80,6 +80,17 @@
80#define MCFUART_BASE1 (MCF_MBAR + 0x200) /* Base address UART1 */ 80#define MCFUART_BASE1 (MCF_MBAR + 0x200) /* Base address UART1 */
81 81
82/* 82/*
83 * QSPI module.
84 */
85#define MCFQSPI_BASE (MCF_MBAR + 0x300) /* Base address QSPI */
86#define MCFQSPI_SIZE 0x40 /* Register set size */
87
88#define MCFQSPI_CS0 29
89#define MCFQSPI_CS1 24
90#define MCFQSPI_CS2 21
91#define MCFQSPI_CS3 22
92
93/*
83 * DMA unit base addresses. 94 * DMA unit base addresses.
84 */ 95 */
85#define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */ 96#define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */
diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h
index 62148b72825e..e9a7e1a2c995 100644
--- a/arch/m68k/include/asm/mcfqspi.h
+++ b/arch/m68k/include/asm/mcfqspi.h
@@ -23,8 +23,6 @@
23 23
24#if defined(CONFIG_M527x) || defined(CONFIG_M528x) 24#if defined(CONFIG_M527x) || defined(CONFIG_M528x)
25#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) 25#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340)
26#elif defined(CONFIG_M5249)
27#define MCFQSPI_IOBASE (MCF_MBAR + 0x300)
28#elif defined(CONFIG_M532x) 26#elif defined(CONFIG_M532x)
29#define MCFQSPI_IOBASE 0xFC058000 27#define MCFQSPI_IOBASE 0xFC058000
30#endif 28#endif
diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c
index 58dc2c9c186d..1e176376010b 100644
--- a/arch/m68k/platform/5249/config.c
+++ b/arch/m68k/platform/5249/config.c
@@ -48,8 +48,8 @@ static struct platform_device m5249_smc91x = {
48#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 48#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
49static struct resource m5249_qspi_resources[] = { 49static struct resource m5249_qspi_resources[] = {
50 { 50 {
51 .start = MCFQSPI_IOBASE, 51 .start = MCFQSPI_BASE,
52 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, 52 .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
53 .flags = IORESOURCE_MEM, 53 .flags = IORESOURCE_MEM,
54 }, 54 },
55 { 55 {
@@ -59,11 +59,6 @@ static struct resource m5249_qspi_resources[] = {
59 }, 59 },
60}; 60};
61 61
62#define MCFQSPI_CS0 29
63#define MCFQSPI_CS1 24
64#define MCFQSPI_CS2 21
65#define MCFQSPI_CS3 22
66
67static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control) 62static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control)
68{ 63{
69 int status; 64 int status;