m68knommu: move the 54xx platform code into the common ColdFire code directory

All these separate directories for each ColdFire CPU SoC varient seems like
overkill. The majority of them only contain a single small config file. Move
these into the common ColdFire code directory.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>

3 files changed, 200 insertions, 1 deletions

diff --git a/arch/m68k/platform/coldfire/Makefile b/arch/m68k/platform/coldfire/Makefile
index d6089c11a682..76d389d9a84e 100644
--- a/arch/m68k/platform/coldfire/Makefile
+++ b/arch/m68k/platform/coldfire/Makefile
@@ -26,10 +26,11 @@ obj-$(CONFIG_M528x)	+= m528x.o pit.o intc-2.o reset.o
 obj-$(CONFIG_M5307)     += m5307.o timers.o intc.o reset.o
 obj-$(CONFIG_M532x)     += m532x.o timers.o intc-simr.o reset.o
 obj-$(CONFIG_M5407)     += m5407.o timers.o intc.o reset.o
-obj-$(CONFIG_M54xx)     += sltimers.o intc-2.o
+obj-$(CONFIG_M54xx)     += m54xx.o sltimers.o intc-2.o
 
 obj-$(CONFIG_NETtel)    += nettel.o
 obj-$(CONFIG_CLEOPATRA) += nettel.o
+obj-$(CONFIG_FIREBEE)   += firebee.o
 
 obj-y                   += pinmux.o gpio.o
 extra-y := head.o
diff --git a/arch/m68k/platform/coldfire/firebee.c b/arch/m68k/platform/coldfire/firebee.c
new file mode 100644
index 000000000000..46d50534f981
--- /dev/null
+++ b/arch/m68k/platform/coldfire/firebee.c
@@ -0,0 +1,86 @@
+/***************************************************************************/
+
+/*
+ *      firebee.c -- extra startup code support for the FireBee boards
+ *
+ *      Copyright (C) 2011, Greg Ungerer (gerg@snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+/***************************************************************************/
+
+/*
+ *      8MB of NOR flash fitted to the FireBee board.
+ */
+#define FLASH_PHYS_ADDR         0xe0000000      /* Physical address of flash */
+#define FLASH_PHYS_SIZE         0x00800000      /* Size of flash */
+
+#define PART_BOOT_START         0x00000000      /* Start at bottom of flash */
+#define PART_BOOT_SIZE          0x00040000      /* 256k in size */
+#define PART_IMAGE_START        0x00040000      /* Start after boot loader */
+#define PART_IMAGE_SIZE         0x006c0000      /* Most of flash */
+#define PART_FPGA_START         0x00700000      /* Start at offset 7MB */
+#define PART_FPGA_SIZE          0x00100000      /* 1MB in size */
+
+static struct mtd_partition firebee_flash_parts[] = {
+        {
+                .name   = "dBUG",
+                .offset = PART_BOOT_START,
+                .size   = PART_BOOT_SIZE,
+        },
+        {
+                .name   = "FPGA",
+                .offset = PART_FPGA_START,
+                .size   = PART_FPGA_SIZE,
+        },
+        {
+                .name   = "image",
+                .offset = PART_IMAGE_START,
+                .size   = PART_IMAGE_SIZE,
+        },
+};
+
+static struct physmap_flash_data firebee_flash_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(firebee_flash_parts),
+        .parts          = firebee_flash_parts,
+};
+
+static struct resource firebee_flash_resource = {
+        .start          = FLASH_PHYS_ADDR,
+        .end            = FLASH_PHYS_ADDR + FLASH_PHYS_SIZE,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device firebee_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data = &firebee_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &firebee_flash_resource,
+};
+
+/***************************************************************************/
+
+static int __init init_firebee(void)
+{
+        platform_device_register(&firebee_flash);
+        return 0;
+}
+
+arch_initcall(init_firebee);
+
+/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/m54xx.c b/arch/m68k/platform/coldfire/m54xx.c
new file mode 100644
index 000000000000..20672dadb252
--- /dev/null
+++ b/arch/m68k/platform/coldfire/m54xx.c
@@ -0,0 +1,112 @@
+/***************************************************************************/
+
+/*
+ *      linux/arch/m68knommu/platform/54xx/config.c
+ *
+ *      Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
+ */
+
+/***************************************************************************/
+
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <asm/pgalloc.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/m54xxsim.h>
+#include <asm/mcfuart.h>
+#include <asm/m54xxgpt.h>
+#include <asm/mcfgpio.h>
+#ifdef CONFIG_MMU
+#include <asm/mmu_context.h>
+#endif
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = { };
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
+
+/***************************************************************************/
+
+static void __init m54xx_uarts_init(void)
+{
+        /* enable io pins */
+        __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD,
+                MCF_MBAR + MCF_PAR_PSC(0));
+        __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS,
+                MCF_MBAR + MCF_PAR_PSC(1));
+        __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS |
+                MCF_PAR_PSC_CTS_CTS, MCF_MBAR + MCF_PAR_PSC(2));
+        __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD,
+                MCF_MBAR + MCF_PAR_PSC(3));
+}
+
+/***************************************************************************/
+
+static void mcf54xx_reset(void)
+{
+        /* disable interrupts and enable the watchdog */
+        asm("movew #0x2700, %sr\n");
+        __raw_writel(0, MCF_MBAR + MCF_GPT_GMS0);
+        __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_MBAR + MCF_GPT_GCIR0);
+        __raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4),
+                                                MCF_MBAR + MCF_GPT_GMS0);
+}
+
+/***************************************************************************/
+
+#ifdef CONFIG_MMU
+
+unsigned long num_pages;
+
+static void __init mcf54xx_bootmem_alloc(void)
+{
+        unsigned long start_pfn;
+        unsigned long memstart;
+
+        /* _rambase and _ramend will be naturally page aligned */
+        m68k_memory[0].addr = _rambase;
+        m68k_memory[0].size = _ramend - _rambase;
+
+        /* compute total pages in system */
+        num_pages = (_ramend - _rambase) >> PAGE_SHIFT;
+
+        /* page numbers */
+        memstart = PAGE_ALIGN(_ramstart);
+        min_low_pfn = _rambase >> PAGE_SHIFT;
+        start_pfn = memstart >> PAGE_SHIFT;
+        max_low_pfn = _ramend >> PAGE_SHIFT;
+        high_memory = (void *)_ramend;
+
+        m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6;
+        module_fixup(NULL, __start_fixup, __stop_fixup);
+
+        /* setup bootmem data */
+        m68k_setup_node(0);
+        memstart += init_bootmem_node(NODE_DATA(0), start_pfn,
+                min_low_pfn, max_low_pfn);
+        free_bootmem_node(NODE_DATA(0), memstart, _ramend - memstart);
+}
+
+#endif /* CONFIG_MMU */
+
+/***************************************************************************/
+
+void __init config_BSP(char *commandp, int size)
+{
+#ifdef CONFIG_MMU
+        mcf54xx_bootmem_alloc();
+        mmu_context_init();
+#endif
+        mach_reset = mcf54xx_reset;
+        mach_sched_init = hw_timer_init;
+        m54xx_uarts_init();
+}
+
+/***************************************************************************/