diff options
author | Greg Ungerer <gerg@uclinux.org> | 2012-04-17 01:33:13 -0400 |
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committer | Greg Ungerer <gerg@uclinux.org> | 2012-05-20 07:22:02 -0400 |
commit | 40711ccb22bb3f851291fa4b9d59a5a4ec6f7949 (patch) | |
tree | 3f0bade622eeefa5d5399128cd9501025906d4e5 /arch/m68k/platform/coldfire/m5272.c | |
parent | 2d11251168d1f4104b4824893288f1220ead22b3 (diff) |
m68knommu: move the 5272 platform code into the common ColdFire code directory
All these separate directories for each ColdFire CPU SoC varient seems like
overkill. The majority of them only contain a single small config file. Move
these into the common ColdFire code directory.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/platform/coldfire/m5272.c')
-rw-r--r-- | arch/m68k/platform/coldfire/m5272.c | 121 |
1 files changed, 121 insertions, 0 deletions
diff --git a/arch/m68k/platform/coldfire/m5272.c b/arch/m68k/platform/coldfire/m5272.c new file mode 100644 index 000000000000..43e36060da18 --- /dev/null +++ b/arch/m68k/platform/coldfire/m5272.c | |||
@@ -0,0 +1,121 @@ | |||
1 | /***************************************************************************/ | ||
2 | |||
3 | /* | ||
4 | * linux/arch/m68knommu/platform/5272/config.c | ||
5 | * | ||
6 | * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) | ||
7 | * Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com) | ||
8 | */ | ||
9 | |||
10 | /***************************************************************************/ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/param.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/phy.h> | ||
17 | #include <linux/phy_fixed.h> | ||
18 | #include <asm/machdep.h> | ||
19 | #include <asm/coldfire.h> | ||
20 | #include <asm/mcfsim.h> | ||
21 | #include <asm/mcfuart.h> | ||
22 | #include <asm/mcfgpio.h> | ||
23 | |||
24 | /***************************************************************************/ | ||
25 | |||
26 | /* | ||
27 | * Some platforms need software versions of the GPIO data registers. | ||
28 | */ | ||
29 | unsigned short ppdata; | ||
30 | unsigned char ledbank = 0xff; | ||
31 | |||
32 | /***************************************************************************/ | ||
33 | |||
34 | struct mcf_gpio_chip mcf_gpio_chips[] = { | ||
35 | MCFGPS(PA, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT), | ||
36 | MCFGPS(PB, 16, 16, MCFSIM_PBDDR, MCFSIM_PBDAT, MCFSIM_PBDAT), | ||
37 | MCFGPS(Pc, 32, 16, MCFSIM_PCDDR, MCFSIM_PCDAT, MCFSIM_PCDAT), | ||
38 | }; | ||
39 | |||
40 | unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips); | ||
41 | |||
42 | /***************************************************************************/ | ||
43 | |||
44 | static void __init m5272_uarts_init(void) | ||
45 | { | ||
46 | u32 v; | ||
47 | |||
48 | /* Enable the output lines for the serial ports */ | ||
49 | v = readl(MCF_MBAR + MCFSIM_PBCNT); | ||
50 | v = (v & ~0x000000ff) | 0x00000055; | ||
51 | writel(v, MCF_MBAR + MCFSIM_PBCNT); | ||
52 | |||
53 | v = readl(MCF_MBAR + MCFSIM_PDCNT); | ||
54 | v = (v & ~0x000003fc) | 0x000002a8; | ||
55 | writel(v, MCF_MBAR + MCFSIM_PDCNT); | ||
56 | } | ||
57 | |||
58 | /***************************************************************************/ | ||
59 | |||
60 | static void m5272_cpu_reset(void) | ||
61 | { | ||
62 | local_irq_disable(); | ||
63 | /* Set watchdog to reset, and enabled */ | ||
64 | __raw_writew(0, MCF_MBAR + MCFSIM_WIRR); | ||
65 | __raw_writew(1, MCF_MBAR + MCFSIM_WRRR); | ||
66 | __raw_writew(0, MCF_MBAR + MCFSIM_WCR); | ||
67 | for (;;) | ||
68 | /* wait for watchdog to timeout */; | ||
69 | } | ||
70 | |||
71 | /***************************************************************************/ | ||
72 | |||
73 | void __init config_BSP(char *commandp, int size) | ||
74 | { | ||
75 | #if defined (CONFIG_MOD5272) | ||
76 | volatile unsigned char *pivrp; | ||
77 | |||
78 | /* Set base of device vectors to be 64 */ | ||
79 | pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR); | ||
80 | *pivrp = 0x40; | ||
81 | #endif | ||
82 | |||
83 | #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES) | ||
84 | /* Copy command line from FLASH to local buffer... */ | ||
85 | memcpy(commandp, (char *) 0xf0004000, size); | ||
86 | commandp[size-1] = 0; | ||
87 | #elif defined(CONFIG_CANCam) | ||
88 | /* Copy command line from FLASH to local buffer... */ | ||
89 | memcpy(commandp, (char *) 0xf0010000, size); | ||
90 | commandp[size-1] = 0; | ||
91 | #endif | ||
92 | |||
93 | mach_reset = m5272_cpu_reset; | ||
94 | mach_sched_init = hw_timer_init; | ||
95 | } | ||
96 | |||
97 | /***************************************************************************/ | ||
98 | |||
99 | /* | ||
100 | * Some 5272 based boards have the FEC ethernet diectly connected to | ||
101 | * an ethernet switch. In this case we need to use the fixed phy type, | ||
102 | * and we need to declare it early in boot. | ||
103 | */ | ||
104 | static struct fixed_phy_status nettel_fixed_phy_status __initdata = { | ||
105 | .link = 1, | ||
106 | .speed = 100, | ||
107 | .duplex = 0, | ||
108 | }; | ||
109 | |||
110 | /***************************************************************************/ | ||
111 | |||
112 | static int __init init_BSP(void) | ||
113 | { | ||
114 | m5272_uarts_init(); | ||
115 | fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status); | ||
116 | return 0; | ||
117 | } | ||
118 | |||
119 | arch_initcall(init_BSP); | ||
120 | |||
121 | /***************************************************************************/ | ||