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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/m32r/mm/cache.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/m32r/mm/cache.c')
-rw-r--r--arch/m32r/mm/cache.c65
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/m32r/mm/cache.c b/arch/m32r/mm/cache.c
new file mode 100644
index 000000000000..31b0789c1992
--- /dev/null
+++ b/arch/m32r/mm/cache.c
@@ -0,0 +1,65 @@
1/*
2 * linux/arch/m32r/mm/cache.c
3 *
4 * Copyright (C) 2002 Hirokazu Takata
5 */
6
7#include <linux/config.h>
8#include <asm/pgtable.h>
9
10#undef MCCR
11
12#if defined(CONFIG_CHIP_XNUX2) || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_OPSP)
13/* Cache Control Register */
14#define MCCR ((volatile unsigned long*)0xfffffffc)
15#define MCCR_CC (1UL << 7) /* Cache mode modify bit */
16#define MCCR_IIV (1UL << 6) /* I-cache invalidate */
17#define MCCR_DIV (1UL << 5) /* D-cache invalidate */
18#define MCCR_DCB (1UL << 4) /* D-cache copy back */
19#define MCCR_ICM (1UL << 1) /* I-cache mode [0:off,1:on] */
20#define MCCR_DCM (1UL << 0) /* D-cache mode [0:off,1:on] */
21#define MCCR_ICACHE_INV (MCCR_CC|MCCR_IIV)
22#define MCCR_DCACHE_CB (MCCR_CC|MCCR_DCB)
23#define MCCR_DCACHE_CBINV (MCCR_CC|MCCR_DIV|MCCR_DCB)
24#define CHECK_MCCR(mccr) (mccr = *MCCR)
25#elif defined(CONFIG_CHIP_M32102)
26#define MCCR ((volatile unsigned char*)0xfffffffe)
27#define MCCR_IIV (1UL << 0) /* I-cache invalidate */
28#define MCCR_ICACHE_INV MCCR_IIV
29#endif /* CONFIG_CHIP_XNUX2 || CONFIG_CHIP_M32700 */
30
31#ifndef MCCR
32#error Unknown cache type.
33#endif
34
35
36/* Copy back and invalidate D-cache and invalidate I-cache all */
37void _flush_cache_all(void)
38{
39#if defined(CONFIG_CHIP_M32102)
40 *MCCR = MCCR_ICACHE_INV;
41#else
42 unsigned long mccr;
43
44 /* Copyback and invalidate D-cache */
45 /* Invalidate I-cache */
46 *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CBINV;
47 while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */
48#endif
49}
50
51/* Copy back D-cache and invalidate I-cache all */
52void _flush_cache_copyback_all(void)
53{
54#if defined(CONFIG_CHIP_M32102)
55 *MCCR = MCCR_ICACHE_INV;
56#else
57 unsigned long mccr;
58
59 /* Copyback D-cache */
60 /* Invalidate I-cache */
61 *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CB;
62 while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */
63
64#endif
65}