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authorPeter Zijlstra <peterz@infradead.org>2014-03-13 14:00:36 -0400
committerIngo Molnar <mingo@kernel.org>2014-04-18 08:20:36 -0400
commit89607d5e2928d49bb64669d6d1e30e933a33f817 (patch)
tree05950da4b8d353d7edba9328baf2c55c41a8450f /arch/m32r/include/asm
parent0cd64efb61f1e68be26bd5121ccff3c779dc488b (diff)
arch,m32r: Convert smp_mb__*()
M32r uses asm-generic/barrier.h and its smp_mb() is barrier(); therefore we can use the generic versions which default to smp_mb(). Signed-off-by: Peter Zijlstra <peterz@infradead.org> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Link: http://lkml.kernel.org/n/tip-wh6xljltyvmpy9t0bc80k1fy@git.kernel.org Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: linux-kernel@vger.kernel.org Cc: linux-m32r-ja@ml.linux-m32r.org Cc: linux-m32r@ml.linux-m32r.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/m32r/include/asm')
-rw-r--r--arch/m32r/include/asm/atomic.h7
-rw-r--r--arch/m32r/include/asm/bitops.h6
2 files changed, 3 insertions, 10 deletions
diff --git a/arch/m32r/include/asm/atomic.h b/arch/m32r/include/asm/atomic.h
index 0d81697c326c..8ad0ed4182a5 100644
--- a/arch/m32r/include/asm/atomic.h
+++ b/arch/m32r/include/asm/atomic.h
@@ -13,6 +13,7 @@
13#include <asm/assembler.h> 13#include <asm/assembler.h>
14#include <asm/cmpxchg.h> 14#include <asm/cmpxchg.h>
15#include <asm/dcache_clear.h> 15#include <asm/dcache_clear.h>
16#include <asm/barrier.h>
16 17
17/* 18/*
18 * Atomic operations that C can't guarantee us. Useful for 19 * Atomic operations that C can't guarantee us. Useful for
@@ -308,10 +309,4 @@ static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *addr)
308 local_irq_restore(flags); 309 local_irq_restore(flags);
309} 310}
310 311
311/* Atomic operations are already serializing on m32r */
312#define smp_mb__before_atomic_dec() barrier()
313#define smp_mb__after_atomic_dec() barrier()
314#define smp_mb__before_atomic_inc() barrier()
315#define smp_mb__after_atomic_inc() barrier()
316
317#endif /* _ASM_M32R_ATOMIC_H */ 312#endif /* _ASM_M32R_ATOMIC_H */
diff --git a/arch/m32r/include/asm/bitops.h b/arch/m32r/include/asm/bitops.h
index d3dea9ac7d4e..86ba2b42a6cf 100644
--- a/arch/m32r/include/asm/bitops.h
+++ b/arch/m32r/include/asm/bitops.h
@@ -21,6 +21,7 @@
21#include <asm/byteorder.h> 21#include <asm/byteorder.h>
22#include <asm/dcache_clear.h> 22#include <asm/dcache_clear.h>
23#include <asm/types.h> 23#include <asm/types.h>
24#include <asm/barrier.h>
24 25
25/* 26/*
26 * These have to be done with inline assembly: that way the bit-setting 27 * These have to be done with inline assembly: that way the bit-setting
@@ -73,7 +74,7 @@ static __inline__ void set_bit(int nr, volatile void * addr)
73 * 74 *
74 * clear_bit() is atomic and may not be reordered. However, it does 75 * clear_bit() is atomic and may not be reordered. However, it does
75 * not contain a memory barrier, so if it is used for locking purposes, 76 * not contain a memory barrier, so if it is used for locking purposes,
76 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit() 77 * you should call smp_mb__before_atomic() and/or smp_mb__after_atomic()
77 * in order to ensure changes are visible on other processors. 78 * in order to ensure changes are visible on other processors.
78 */ 79 */
79static __inline__ void clear_bit(int nr, volatile void * addr) 80static __inline__ void clear_bit(int nr, volatile void * addr)
@@ -103,9 +104,6 @@ static __inline__ void clear_bit(int nr, volatile void * addr)
103 local_irq_restore(flags); 104 local_irq_restore(flags);
104} 105}
105 106
106#define smp_mb__before_clear_bit() barrier()
107#define smp_mb__after_clear_bit() barrier()
108
109/** 107/**
110 * change_bit - Toggle a bit in memory 108 * change_bit - Toggle a bit in memory
111 * @nr: Bit to clear 109 * @nr: Bit to clear