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authorDean Nelson <dcn@sgi.com>2006-06-23 05:03:21 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-23 10:42:49 -0400
commit929f97276bcf7f4a95272ed08a85339b98ba210d (patch)
tree4975698af9559279c83e4e268213ed13e3efee9a /arch/ia64/sn
parent833423143c3a7c6545e409d65febd0d92deb351b (diff)
[PATCH] change gen_pool allocator to not touch managed memory
Modify the gen_pool allocator (lib/genalloc.c) to utilize a bitmap scheme instead of the buddy scheme. The purpose of this change is to eliminate the touching of the actual memory being allocated. Since the change modifies the interface, a change to the uncached allocator (arch/ia64/kernel/uncached.c) is also required. Both Andrey Volkov and Jes Sorenson have expressed a desire that the gen_pool allocator not write to the memory being managed. See the following: http://marc.theaimsgroup.com/?l=linux-kernel&m=113518602713125&w=2 http://marc.theaimsgroup.com/?l=linux-kernel&m=113533568827916&w=2 Signed-off-by: Dean Nelson <dcn@sgi.com> Cc: Andrey Volkov <avolkov@varma-el.com> Acked-by: Jes Sorensen <jes@trained-monkey.org> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ia64/sn')
-rw-r--r--arch/ia64/sn/kernel/sn2/cache.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/ia64/sn/kernel/sn2/cache.c b/arch/ia64/sn/kernel/sn2/cache.c
index bc3cfa17cd0f..2862cb33026d 100644
--- a/arch/ia64/sn/kernel/sn2/cache.c
+++ b/arch/ia64/sn/kernel/sn2/cache.c
@@ -3,11 +3,12 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2001-2003, 2006 Silicon Graphics, Inc. All rights reserved.
7 * 7 *
8 */ 8 */
9#include <linux/module.h> 9#include <linux/module.h>
10#include <asm/pgalloc.h> 10#include <asm/pgalloc.h>
11#include <asm/sn/arch.h>
11 12
12/** 13/**
13 * sn_flush_all_caches - flush a range of address from all caches (incl. L4) 14 * sn_flush_all_caches - flush a range of address from all caches (incl. L4)
@@ -17,18 +18,24 @@
17 * Flush a range of addresses from all caches including L4. 18 * Flush a range of addresses from all caches including L4.
18 * All addresses fully or partially contained within 19 * All addresses fully or partially contained within
19 * @flush_addr to @flush_addr + @bytes are flushed 20 * @flush_addr to @flush_addr + @bytes are flushed
20 * from the all caches. 21 * from all caches.
21 */ 22 */
22void 23void
23sn_flush_all_caches(long flush_addr, long bytes) 24sn_flush_all_caches(long flush_addr, long bytes)
24{ 25{
25 flush_icache_range(flush_addr, flush_addr+bytes); 26 unsigned long addr = flush_addr;
27
28 /* SHub1 requires a cached address */
29 if (is_shub1() && (addr & RGN_BITS) == RGN_BASE(RGN_UNCACHED))
30 addr = (addr - RGN_BASE(RGN_UNCACHED)) + RGN_BASE(RGN_KERNEL);
31
32 flush_icache_range(addr, addr + bytes);
26 /* 33 /*
27 * The last call may have returned before the caches 34 * The last call may have returned before the caches
28 * were actually flushed, so we call it again to make 35 * were actually flushed, so we call it again to make
29 * sure. 36 * sure.
30 */ 37 */
31 flush_icache_range(flush_addr, flush_addr+bytes); 38 flush_icache_range(addr, addr + bytes);
32 mb(); 39 mb();
33} 40}
34EXPORT_SYMBOL(sn_flush_all_caches); 41EXPORT_SYMBOL(sn_flush_all_caches);