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authorDavid Mosberger-Tang <davidm@hpl.hp.com>2005-02-18 21:09:00 -0500
committerTony Luck <tony.luck@intel.com>2005-05-03 14:27:33 -0400
commit2074615a13a4f250e0a4e3f6ec8e3733b950a783 (patch)
tree20af73cd640c88f5bedcb081fd5e850bf23b7b86 /arch/ia64/lib
parent43cc67251882f60c796c8729cefc0e05b550976c (diff)
[IA64] use fc.i for fluch_icache_range()
This is a small patch to switch fluch_icache_range() to use fc.i instead of fc. This would save time on processors which can establish i-cache coherency without flushing the cache-line out to memory (not that any current processors do). On existing processors, fc.i behaves like fc. The only caveat is that very old assemblers may not know about fc.i yet. Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/lib')
-rw-r--r--arch/ia64/lib/flush.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/ia64/lib/flush.S b/arch/ia64/lib/flush.S
index 29c802b19669..a1af9146cfdb 100644
--- a/arch/ia64/lib/flush.S
+++ b/arch/ia64/lib/flush.S
@@ -1,8 +1,8 @@
1/* 1/*
2 * Cache flushing routines. 2 * Cache flushing routines.
3 * 3 *
4 * Copyright (C) 1999-2001 Hewlett-Packard Co 4 * Copyright (C) 1999-2001, 2005 Hewlett-Packard Co
5 * Copyright (C) 1999-2001 David Mosberger-Tang <davidm@hpl.hp.com> 5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 */ 6 */
7#include <asm/asmmacro.h> 7#include <asm/asmmacro.h>
8#include <asm/page.h> 8#include <asm/page.h>
@@ -26,7 +26,7 @@ GLOBAL_ENTRY(flush_icache_range)
26 26
27 mov ar.lc=r8 27 mov ar.lc=r8
28 ;; 28 ;;
29.Loop: fc in0 // issuable on M0 only 29.Loop: fc.i in0 // issuable on M2 only
30 add in0=32,in0 30 add in0=32,in0
31 br.cloop.sptk.few .Loop 31 br.cloop.sptk.few .Loop
32 ;; 32 ;;