[IA64] Convert to generic timekeeping/clocksource

This is a merge of Peter Keilty's initial patch (which was
revived by Bob Picco) for this with Hidetoshi Seto's fixes
and scaling improvements.

Acked-by: Bob Picco <bob.picco@hp.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>

1 files changed, 32 insertions, 14 deletions

diff --git a/arch/ia64/kernel/cyclone.c b/arch/ia64/kernel/cyclone.c
index e00b21514f7c..2fd96d9062a1 100644
--- a/arch/ia64/kernel/cyclone.c
+++ b/arch/ia64/kernel/cyclone.c
@@ -3,6 +3,7 @@
 #include <linux/time.h>
 #include <linux/errno.h>
 #include <linux/timex.h>
+#include <linux/clocksource.h>
 #include <asm/io.h>
 
 /* IBM Summit (EXA) Cyclone counter code*/
@@ -18,13 +19,21 @@ void __init cyclone_setup(void)
         use_cyclone = 1;
 }
 
+static void __iomem *cyclone_mc;
 
-struct time_interpolator cyclone_interpolator = {
-        .source =       TIME_SOURCE_MMIO64,
-        .shift =        16,
-        .frequency =    CYCLONE_TIMER_FREQ,
-        .drift =        -100,
-        .mask =         (1LL << 40) - 1
+static cycle_t read_cyclone(void)
+{
+        return (cycle_t)readq((void __iomem *)cyclone_mc);
+}
+
+static struct clocksource clocksource_cyclone = {
+        .name           = "cyclone",
+        .rating         = 300,
+        .read           = read_cyclone,
+        .mask           = (1LL << 40) - 1,
+        .mult           = 0, /*to be caluclated*/
+        .shift          = 16,
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
 int __init init_cyclone_clock(void)
@@ -44,13 +53,15 @@ int __init init_cyclone_clock(void)
         offset = (CYCLONE_CBAR_ADDR);
         reg = (u64*)ioremap_nocache(offset, sizeof(u64));
         if(!reg){
-                printk(KERN_ERR "Summit chipset: Could not find valid CBAR register.\n");
+                printk(KERN_ERR "Summit chipset: Could not find valid CBAR"
+                                " register.\n");
                 use_cyclone = 0;
                 return -ENODEV;
         }
         base = readq(reg);
         if(!base){
-                printk(KERN_ERR "Summit chipset: Could not find valid CBAR value.\n");
+                printk(KERN_ERR "Summit chipset: Could not find valid CBAR"
+                                " value.\n");
                 use_cyclone = 0;
                 return -ENODEV;
         }
@@ -60,7 +71,8 @@ int __init init_cyclone_clock(void)
         offset = (base + CYCLONE_PMCC_OFFSET);
         reg = (u64*)ioremap_nocache(offset, sizeof(u64));
         if(!reg){
-                printk(KERN_ERR "Summit chipset: Could not find valid PMCC register.\n");
+                printk(KERN_ERR "Summit chipset: Could not find valid PMCC"
+                                " register.\n");
                 use_cyclone = 0;
                 return -ENODEV;
         }
@@ -71,7 +83,8 @@ int __init init_cyclone_clock(void)
         offset = (base + CYCLONE_MPCS_OFFSET);
         reg = (u64*)ioremap_nocache(offset, sizeof(u64));
         if(!reg){
-                printk(KERN_ERR "Summit chipset: Could not find valid MPCS register.\n");
+                printk(KERN_ERR "Summit chipset: Could not find valid MPCS"
+                                " register.\n");
                 use_cyclone = 0;
                 return -ENODEV;
         }
@@ -82,7 +95,8 @@ int __init init_cyclone_clock(void)
         offset = (base + CYCLONE_MPMC_OFFSET);
         cyclone_timer = (u32*)ioremap_nocache(offset, sizeof(u32));
         if(!cyclone_timer){
-                printk(KERN_ERR "Summit chipset: Could not find valid MPMC register.\n");
+                printk(KERN_ERR "Summit chipset: Could not find valid MPMC"
+                                " register.\n");
                 use_cyclone = 0;
                 return -ENODEV;
         }
@@ -93,7 +107,8 @@ int __init init_cyclone_clock(void)
                 int stall = 100;
                 while(stall--) barrier();
                 if(readl(cyclone_timer) == old){
-                        printk(KERN_ERR "Summit chipset: Counter not counting! DISABLED\n");
+                        printk(KERN_ERR "Summit chipset: Counter not counting!"
+                                        " DISABLED\n");
                         iounmap(cyclone_timer);
                         cyclone_timer = 0;
                         use_cyclone = 0;
@@ -101,8 +116,11 @@ int __init init_cyclone_clock(void)
                 }
         }
         /* initialize last tick */
-        cyclone_interpolator.addr = cyclone_timer;
-        register_time_interpolator(&cyclone_interpolator);
+        cyclone_mc = cyclone_timer;
+        clocksource_cyclone.fsys_mmio = cyclone_timer;
+        clocksource_cyclone.mult = clocksource_hz2mult(CYCLONE_TIMER_FREQ,
+                                                clocksource_cyclone.shift);
+        clocksource_register(&clocksource_cyclone);
 
         return 0;
 }