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authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/ia64/kernel/cyclone.c
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'arch/ia64/kernel/cyclone.c')
-rw-r--r--arch/ia64/kernel/cyclone.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/arch/ia64/kernel/cyclone.c b/arch/ia64/kernel/cyclone.c
index 71e35864d2e2..f64097b5118a 100644
--- a/arch/ia64/kernel/cyclone.c
+++ b/arch/ia64/kernel/cyclone.c
@@ -31,8 +31,6 @@ static struct clocksource clocksource_cyclone = {
31 .rating = 300, 31 .rating = 300,
32 .read = read_cyclone, 32 .read = read_cyclone,
33 .mask = (1LL << 40) - 1, 33 .mask = (1LL << 40) - 1,
34 .mult = 0, /*to be caluclated*/
35 .shift = 16,
36 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 34 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
37}; 35};
38 36
@@ -59,13 +57,13 @@ int __init init_cyclone_clock(void)
59 return -ENODEV; 57 return -ENODEV;
60 } 58 }
61 base = readq(reg); 59 base = readq(reg);
60 iounmap(reg);
62 if(!base){ 61 if(!base){
63 printk(KERN_ERR "Summit chipset: Could not find valid CBAR" 62 printk(KERN_ERR "Summit chipset: Could not find valid CBAR"
64 " value.\n"); 63 " value.\n");
65 use_cyclone = 0; 64 use_cyclone = 0;
66 return -ENODEV; 65 return -ENODEV;
67 } 66 }
68 iounmap(reg);
69 67
70 /* setup PMCC */ 68 /* setup PMCC */
71 offset = (base + CYCLONE_PMCC_OFFSET); 69 offset = (base + CYCLONE_PMCC_OFFSET);
@@ -118,9 +116,7 @@ int __init init_cyclone_clock(void)
118 /* initialize last tick */ 116 /* initialize last tick */
119 cyclone_mc = cyclone_timer; 117 cyclone_mc = cyclone_timer;
120 clocksource_cyclone.fsys_mmio = cyclone_timer; 118 clocksource_cyclone.fsys_mmio = cyclone_timer;
121 clocksource_cyclone.mult = clocksource_hz2mult(CYCLONE_TIMER_FREQ, 119 clocksource_register_hz(&clocksource_cyclone, CYCLONE_TIMER_FREQ);
122 clocksource_cyclone.shift);
123 clocksource_register(&clocksource_cyclone);
124 120
125 return 0; 121 return 0;
126} 122}