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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-12 21:38:34 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-12 21:38:34 -0400
commit0c4a479bdf7c0cf3fa1610b25e0c4ddd5b58713e (patch)
tree4d1f97d241b692ad8f7aeca9c5b773fbabfae258 /arch/ia64/include/uapi/asm
parentade0899b298ba2c43bfd6abd8cbc2545944cde0c (diff)
parentd536e0db2433686238ec97c517e4fc691000ee6f (diff)
Merge tag 'please-pull-dhowells-uapi' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux
Pull ia64 UAPI changes from Tony Luck: "ia64 pieces of David Howells great UAPI include file move" * tag 'please-pull-dhowells-uapi' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux: UAPI: (Scripted) Disintegrate arch/ia64/include/asm
Diffstat (limited to 'arch/ia64/include/uapi/asm')
-rw-r--r--arch/ia64/include/uapi/asm/Kbuild45
-rw-r--r--arch/ia64/include/uapi/asm/auxvec.h13
-rw-r--r--arch/ia64/include/uapi/asm/bitsperlong.h8
-rw-r--r--arch/ia64/include/uapi/asm/break.h32
-rw-r--r--arch/ia64/include/uapi/asm/byteorder.h6
-rw-r--r--arch/ia64/include/uapi/asm/cmpxchg.h147
-rw-r--r--arch/ia64/include/uapi/asm/errno.h1
-rw-r--r--arch/ia64/include/uapi/asm/fcntl.h13
-rw-r--r--arch/ia64/include/uapi/asm/fpu.h66
-rw-r--r--arch/ia64/include/uapi/asm/gcc_intrin.h618
-rw-r--r--arch/ia64/include/uapi/asm/ia64regs.h100
-rw-r--r--arch/ia64/include/uapi/asm/intel_intrin.h161
-rw-r--r--arch/ia64/include/uapi/asm/intrinsics.h124
-rw-r--r--arch/ia64/include/uapi/asm/ioctl.h1
-rw-r--r--arch/ia64/include/uapi/asm/ioctls.h6
-rw-r--r--arch/ia64/include/uapi/asm/ipcbuf.h1
-rw-r--r--arch/ia64/include/uapi/asm/kvm.h269
-rw-r--r--arch/ia64/include/uapi/asm/kvm_para.h0
-rw-r--r--arch/ia64/include/uapi/asm/mman.h16
-rw-r--r--arch/ia64/include/uapi/asm/msgbuf.h27
-rw-r--r--arch/ia64/include/uapi/asm/param.h29
-rw-r--r--arch/ia64/include/uapi/asm/perfmon.h177
-rw-r--r--arch/ia64/include/uapi/asm/perfmon_default_smpl.h83
-rw-r--r--arch/ia64/include/uapi/asm/poll.h1
-rw-r--r--arch/ia64/include/uapi/asm/posix_types.h8
-rw-r--r--arch/ia64/include/uapi/asm/ptrace.h247
-rw-r--r--arch/ia64/include/uapi/asm/ptrace_offsets.h268
-rw-r--r--arch/ia64/include/uapi/asm/resource.h7
-rw-r--r--arch/ia64/include/uapi/asm/rse.h66
-rw-r--r--arch/ia64/include/uapi/asm/sembuf.h22
-rw-r--r--arch/ia64/include/uapi/asm/setup.h24
-rw-r--r--arch/ia64/include/uapi/asm/shmbuf.h38
-rw-r--r--arch/ia64/include/uapi/asm/sigcontext.h70
-rw-r--r--arch/ia64/include/uapi/asm/siginfo.h121
-rw-r--r--arch/ia64/include/uapi/asm/signal.h127
-rw-r--r--arch/ia64/include/uapi/asm/socket.h81
-rw-r--r--arch/ia64/include/uapi/asm/sockios.h20
-rw-r--r--arch/ia64/include/uapi/asm/stat.h51
-rw-r--r--arch/ia64/include/uapi/asm/statfs.h20
-rw-r--r--arch/ia64/include/uapi/asm/swab.h34
-rw-r--r--arch/ia64/include/uapi/asm/termbits.h208
-rw-r--r--arch/ia64/include/uapi/asm/termios.h50
-rw-r--r--arch/ia64/include/uapi/asm/types.h31
-rw-r--r--arch/ia64/include/uapi/asm/ucontext.h12
-rw-r--r--arch/ia64/include/uapi/asm/unistd.h328
-rw-r--r--arch/ia64/include/uapi/asm/ustack.h12
46 files changed, 3789 insertions, 0 deletions
diff --git a/arch/ia64/include/uapi/asm/Kbuild b/arch/ia64/include/uapi/asm/Kbuild
index baebb3da1d44..30cafac93703 100644
--- a/arch/ia64/include/uapi/asm/Kbuild
+++ b/arch/ia64/include/uapi/asm/Kbuild
@@ -1,3 +1,48 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4header-y += auxvec.h
5header-y += bitsperlong.h
6header-y += break.h
7header-y += byteorder.h
8header-y += cmpxchg.h
9header-y += errno.h
10header-y += fcntl.h
11header-y += fpu.h
12header-y += gcc_intrin.h
13header-y += ia64regs.h
14header-y += intel_intrin.h
15header-y += intrinsics.h
16header-y += ioctl.h
17header-y += ioctls.h
18header-y += ipcbuf.h
19header-y += kvm.h
20header-y += kvm_para.h
21header-y += mman.h
22header-y += msgbuf.h
23header-y += param.h
24header-y += perfmon.h
25header-y += perfmon_default_smpl.h
26header-y += poll.h
27header-y += posix_types.h
28header-y += ptrace.h
29header-y += ptrace_offsets.h
30header-y += resource.h
31header-y += rse.h
32header-y += sembuf.h
33header-y += setup.h
34header-y += shmbuf.h
35header-y += sigcontext.h
36header-y += siginfo.h
37header-y += signal.h
38header-y += socket.h
39header-y += sockios.h
40header-y += stat.h
41header-y += statfs.h
42header-y += swab.h
43header-y += termbits.h
44header-y += termios.h
45header-y += types.h
46header-y += ucontext.h
47header-y += unistd.h
48header-y += ustack.h
diff --git a/arch/ia64/include/uapi/asm/auxvec.h b/arch/ia64/include/uapi/asm/auxvec.h
new file mode 100644
index 000000000000..58277fc650ef
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/auxvec.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_IA64_AUXVEC_H
2#define _ASM_IA64_AUXVEC_H
3
4/*
5 * Architecture-neutral AT_ values are in the range 0-17. Leave some room for more of
6 * them, start the architecture-specific ones at 32.
7 */
8#define AT_SYSINFO 32
9#define AT_SYSINFO_EHDR 33
10
11#define AT_VECTOR_SIZE_ARCH 2 /* entries in ARCH_DLINFO */
12
13#endif /* _ASM_IA64_AUXVEC_H */
diff --git a/arch/ia64/include/uapi/asm/bitsperlong.h b/arch/ia64/include/uapi/asm/bitsperlong.h
new file mode 100644
index 000000000000..ec4db3c970b7
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/bitsperlong.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_IA64_BITSPERLONG_H
2#define __ASM_IA64_BITSPERLONG_H
3
4#define __BITS_PER_LONG 64
5
6#include <asm-generic/bitsperlong.h>
7
8#endif /* __ASM_IA64_BITSPERLONG_H */
diff --git a/arch/ia64/include/uapi/asm/break.h b/arch/ia64/include/uapi/asm/break.h
new file mode 100644
index 000000000000..e90c40ec9edf
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/break.h
@@ -0,0 +1,32 @@
1#ifndef _ASM_IA64_BREAK_H
2#define _ASM_IA64_BREAK_H
3
4/*
5 * IA-64 Linux break numbers.
6 *
7 * Copyright (C) 1999 Hewlett-Packard Co
8 * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
9 */
10
11/*
12 * OS-specific debug break numbers:
13 */
14#define __IA64_BREAK_KDB 0x80100
15#define __IA64_BREAK_KPROBE 0x81000 /* .. 0x81fff */
16#define __IA64_BREAK_JPROBE 0x82000
17
18/*
19 * OS-specific break numbers:
20 */
21#define __IA64_BREAK_SYSCALL 0x100000
22
23/*
24 * Xen specific break numbers:
25 */
26#define __IA64_XEN_HYPERCALL 0x1000
27/* [__IA64_XEN_HYPERPRIVOP_START, __IA64_XEN_HYPERPRIVOP_MAX] is used
28 for xen hyperprivops */
29#define __IA64_XEN_HYPERPRIVOP_START 0x1
30#define __IA64_XEN_HYPERPRIVOP_MAX 0x1a
31
32#endif /* _ASM_IA64_BREAK_H */
diff --git a/arch/ia64/include/uapi/asm/byteorder.h b/arch/ia64/include/uapi/asm/byteorder.h
new file mode 100644
index 000000000000..a8dd73558150
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/byteorder.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_IA64_BYTEORDER_H
2#define _ASM_IA64_BYTEORDER_H
3
4#include <linux/byteorder/little_endian.h>
5
6#endif /* _ASM_IA64_BYTEORDER_H */
diff --git a/arch/ia64/include/uapi/asm/cmpxchg.h b/arch/ia64/include/uapi/asm/cmpxchg.h
new file mode 100644
index 000000000000..4f37dbbb8640
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/cmpxchg.h
@@ -0,0 +1,147 @@
1#ifndef _ASM_IA64_CMPXCHG_H
2#define _ASM_IA64_CMPXCHG_H
3
4/*
5 * Compare/Exchange, forked from asm/intrinsics.h
6 * which was:
7 *
8 * Copyright (C) 2002-2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 */
11
12#ifndef __ASSEMBLY__
13
14#include <linux/types.h>
15/* include compiler specific intrinsics */
16#include <asm/ia64regs.h>
17#ifdef __INTEL_COMPILER
18# include <asm/intel_intrin.h>
19#else
20# include <asm/gcc_intrin.h>
21#endif
22
23/*
24 * This function doesn't exist, so you'll get a linker error if
25 * something tries to do an invalid xchg().
26 */
27extern void ia64_xchg_called_with_bad_pointer(void);
28
29#define __xchg(x, ptr, size) \
30({ \
31 unsigned long __xchg_result; \
32 \
33 switch (size) { \
34 case 1: \
35 __xchg_result = ia64_xchg1((__u8 *)ptr, x); \
36 break; \
37 \
38 case 2: \
39 __xchg_result = ia64_xchg2((__u16 *)ptr, x); \
40 break; \
41 \
42 case 4: \
43 __xchg_result = ia64_xchg4((__u32 *)ptr, x); \
44 break; \
45 \
46 case 8: \
47 __xchg_result = ia64_xchg8((__u64 *)ptr, x); \
48 break; \
49 default: \
50 ia64_xchg_called_with_bad_pointer(); \
51 } \
52 __xchg_result; \
53})
54
55#define xchg(ptr, x) \
56((__typeof__(*(ptr))) __xchg((unsigned long) (x), (ptr), sizeof(*(ptr))))
57
58/*
59 * Atomic compare and exchange. Compare OLD with MEM, if identical,
60 * store NEW in MEM. Return the initial value in MEM. Success is
61 * indicated by comparing RETURN with OLD.
62 */
63
64#define __HAVE_ARCH_CMPXCHG 1
65
66/*
67 * This function doesn't exist, so you'll get a linker error
68 * if something tries to do an invalid cmpxchg().
69 */
70extern long ia64_cmpxchg_called_with_bad_pointer(void);
71
72#define ia64_cmpxchg(sem, ptr, old, new, size) \
73({ \
74 __u64 _o_, _r_; \
75 \
76 switch (size) { \
77 case 1: \
78 _o_ = (__u8) (long) (old); \
79 break; \
80 case 2: \
81 _o_ = (__u16) (long) (old); \
82 break; \
83 case 4: \
84 _o_ = (__u32) (long) (old); \
85 break; \
86 case 8: \
87 _o_ = (__u64) (long) (old); \
88 break; \
89 default: \
90 break; \
91 } \
92 switch (size) { \
93 case 1: \
94 _r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
95 break; \
96 \
97 case 2: \
98 _r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
99 break; \
100 \
101 case 4: \
102 _r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
103 break; \
104 \
105 case 8: \
106 _r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
107 break; \
108 \
109 default: \
110 _r_ = ia64_cmpxchg_called_with_bad_pointer(); \
111 break; \
112 } \
113 (__typeof__(old)) _r_; \
114})
115
116#define cmpxchg_acq(ptr, o, n) \
117 ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
118#define cmpxchg_rel(ptr, o, n) \
119 ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
120
121/* for compatibility with other platforms: */
122#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
123#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
124
125#define cmpxchg_local cmpxchg
126#define cmpxchg64_local cmpxchg64
127
128#ifdef CONFIG_IA64_DEBUG_CMPXCHG
129# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
130# define CMPXCHG_BUGCHECK(v) \
131do { \
132 if (_cmpxchg_bugcheck_count-- <= 0) { \
133 void *ip; \
134 extern int printk(const char *fmt, ...); \
135 ip = (void *) ia64_getreg(_IA64_REG_IP); \
136 printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v));\
137 break; \
138 } \
139} while (0)
140#else /* !CONFIG_IA64_DEBUG_CMPXCHG */
141# define CMPXCHG_BUGCHECK_DECL
142# define CMPXCHG_BUGCHECK(v)
143#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
144
145#endif /* !__ASSEMBLY__ */
146
147#endif /* _ASM_IA64_CMPXCHG_H */
diff --git a/arch/ia64/include/uapi/asm/errno.h b/arch/ia64/include/uapi/asm/errno.h
new file mode 100644
index 000000000000..4c82b503d92f
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/errno.h
@@ -0,0 +1 @@
#include <asm-generic/errno.h>
diff --git a/arch/ia64/include/uapi/asm/fcntl.h b/arch/ia64/include/uapi/asm/fcntl.h
new file mode 100644
index 000000000000..1dd275dc8f65
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/fcntl.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_IA64_FCNTL_H
2#define _ASM_IA64_FCNTL_H
3/*
4 * Modified 1998-2000
5 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co.
6 */
7
8#define force_o_largefile() \
9 (personality(current->personality) != PER_LINUX32)
10
11#include <asm-generic/fcntl.h>
12
13#endif /* _ASM_IA64_FCNTL_H */
diff --git a/arch/ia64/include/uapi/asm/fpu.h b/arch/ia64/include/uapi/asm/fpu.h
new file mode 100644
index 000000000000..b6395ad1500a
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/fpu.h
@@ -0,0 +1,66 @@
1#ifndef _ASM_IA64_FPU_H
2#define _ASM_IA64_FPU_H
3
4/*
5 * Copyright (C) 1998, 1999, 2002, 2003 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
8
9#include <linux/types.h>
10
11/* floating point status register: */
12#define FPSR_TRAP_VD (1 << 0) /* invalid op trap disabled */
13#define FPSR_TRAP_DD (1 << 1) /* denormal trap disabled */
14#define FPSR_TRAP_ZD (1 << 2) /* zero-divide trap disabled */
15#define FPSR_TRAP_OD (1 << 3) /* overflow trap disabled */
16#define FPSR_TRAP_UD (1 << 4) /* underflow trap disabled */
17#define FPSR_TRAP_ID (1 << 5) /* inexact trap disabled */
18#define FPSR_S0(x) ((x) << 6)
19#define FPSR_S1(x) ((x) << 19)
20#define FPSR_S2(x) (__IA64_UL(x) << 32)
21#define FPSR_S3(x) (__IA64_UL(x) << 45)
22
23/* floating-point status field controls: */
24#define FPSF_FTZ (1 << 0) /* flush-to-zero */
25#define FPSF_WRE (1 << 1) /* widest-range exponent */
26#define FPSF_PC(x) (((x) & 0x3) << 2) /* precision control */
27#define FPSF_RC(x) (((x) & 0x3) << 4) /* rounding control */
28#define FPSF_TD (1 << 6) /* trap disabled */
29
30/* floating-point status field flags: */
31#define FPSF_V (1 << 7) /* invalid operation flag */
32#define FPSF_D (1 << 8) /* denormal/unnormal operand flag */
33#define FPSF_Z (1 << 9) /* zero divide (IEEE) flag */
34#define FPSF_O (1 << 10) /* overflow (IEEE) flag */
35#define FPSF_U (1 << 11) /* underflow (IEEE) flag */
36#define FPSF_I (1 << 12) /* inexact (IEEE) flag) */
37
38/* floating-point rounding control: */
39#define FPRC_NEAREST 0x0
40#define FPRC_NEGINF 0x1
41#define FPRC_POSINF 0x2
42#define FPRC_TRUNC 0x3
43
44#define FPSF_DEFAULT (FPSF_PC (0x3) | FPSF_RC (FPRC_NEAREST))
45
46/* This default value is the same as HP-UX uses. Don't change it
47 without a very good reason. */
48#define FPSR_DEFAULT (FPSR_TRAP_VD | FPSR_TRAP_DD | FPSR_TRAP_ZD \
49 | FPSR_TRAP_OD | FPSR_TRAP_UD | FPSR_TRAP_ID \
50 | FPSR_S0 (FPSF_DEFAULT) \
51 | FPSR_S1 (FPSF_DEFAULT | FPSF_TD | FPSF_WRE) \
52 | FPSR_S2 (FPSF_DEFAULT | FPSF_TD) \
53 | FPSR_S3 (FPSF_DEFAULT | FPSF_TD))
54
55# ifndef __ASSEMBLY__
56
57struct ia64_fpreg {
58 union {
59 unsigned long bits[2];
60 long double __dummy; /* force 16-byte alignment */
61 } u;
62};
63
64# endif /* __ASSEMBLY__ */
65
66#endif /* _ASM_IA64_FPU_H */
diff --git a/arch/ia64/include/uapi/asm/gcc_intrin.h b/arch/ia64/include/uapi/asm/gcc_intrin.h
new file mode 100644
index 000000000000..61d0d0111978
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/gcc_intrin.h
@@ -0,0 +1,618 @@
1/*
2 *
3 * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
4 * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
5 */
6#ifndef _UAPI_ASM_IA64_GCC_INTRIN_H
7#define _UAPI_ASM_IA64_GCC_INTRIN_H
8
9#include <linux/types.h>
10#include <linux/compiler.h>
11
12/* define this macro to get some asm stmts included in 'c' files */
13#define ASM_SUPPORTED
14
15/* Optimization barrier */
16/* The "volatile" is due to gcc bugs */
17#define ia64_barrier() asm volatile ("":::"memory")
18
19#define ia64_stop() asm volatile (";;"::)
20
21#define ia64_invala_gr(regnum) asm volatile ("invala.e r%0" :: "i"(regnum))
22
23#define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum))
24
25#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
26
27#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
28
29extern void ia64_bad_param_for_setreg (void);
30extern void ia64_bad_param_for_getreg (void);
31
32
33#define ia64_native_setreg(regnum, val) \
34({ \
35 switch (regnum) { \
36 case _IA64_REG_PSR_L: \
37 asm volatile ("mov psr.l=%0" :: "r"(val) : "memory"); \
38 break; \
39 case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
40 asm volatile ("mov ar%0=%1" :: \
41 "i" (regnum - _IA64_REG_AR_KR0), \
42 "r"(val): "memory"); \
43 break; \
44 case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
45 asm volatile ("mov cr%0=%1" :: \
46 "i" (regnum - _IA64_REG_CR_DCR), \
47 "r"(val): "memory" ); \
48 break; \
49 case _IA64_REG_SP: \
50 asm volatile ("mov r12=%0" :: \
51 "r"(val): "memory"); \
52 break; \
53 case _IA64_REG_GP: \
54 asm volatile ("mov gp=%0" :: "r"(val) : "memory"); \
55 break; \
56 default: \
57 ia64_bad_param_for_setreg(); \
58 break; \
59 } \
60})
61
62#define ia64_native_getreg(regnum) \
63({ \
64 __u64 ia64_intri_res; \
65 \
66 switch (regnum) { \
67 case _IA64_REG_GP: \
68 asm volatile ("mov %0=gp" : "=r"(ia64_intri_res)); \
69 break; \
70 case _IA64_REG_IP: \
71 asm volatile ("mov %0=ip" : "=r"(ia64_intri_res)); \
72 break; \
73 case _IA64_REG_PSR: \
74 asm volatile ("mov %0=psr" : "=r"(ia64_intri_res)); \
75 break; \
76 case _IA64_REG_TP: /* for current() */ \
77 ia64_intri_res = ia64_r13; \
78 break; \
79 case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
80 asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res) \
81 : "i"(regnum - _IA64_REG_AR_KR0)); \
82 break; \
83 case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
84 asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res) \
85 : "i" (regnum - _IA64_REG_CR_DCR)); \
86 break; \
87 case _IA64_REG_SP: \
88 asm volatile ("mov %0=sp" : "=r" (ia64_intri_res)); \
89 break; \
90 default: \
91 ia64_bad_param_for_getreg(); \
92 break; \
93 } \
94 ia64_intri_res; \
95})
96
97#define ia64_hint_pause 0
98
99#define ia64_hint(mode) \
100({ \
101 switch (mode) { \
102 case ia64_hint_pause: \
103 asm volatile ("hint @pause" ::: "memory"); \
104 break; \
105 } \
106})
107
108
109/* Integer values for mux1 instruction */
110#define ia64_mux1_brcst 0
111#define ia64_mux1_mix 8
112#define ia64_mux1_shuf 9
113#define ia64_mux1_alt 10
114#define ia64_mux1_rev 11
115
116#define ia64_mux1(x, mode) \
117({ \
118 __u64 ia64_intri_res; \
119 \
120 switch (mode) { \
121 case ia64_mux1_brcst: \
122 asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x)); \
123 break; \
124 case ia64_mux1_mix: \
125 asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x)); \
126 break; \
127 case ia64_mux1_shuf: \
128 asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x)); \
129 break; \
130 case ia64_mux1_alt: \
131 asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x)); \
132 break; \
133 case ia64_mux1_rev: \
134 asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x)); \
135 break; \
136 } \
137 ia64_intri_res; \
138})
139
140#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
141# define ia64_popcnt(x) __builtin_popcountl(x)
142#else
143# define ia64_popcnt(x) \
144 ({ \
145 __u64 ia64_intri_res; \
146 asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
147 \
148 ia64_intri_res; \
149 })
150#endif
151
152#define ia64_getf_exp(x) \
153({ \
154 long ia64_intri_res; \
155 \
156 asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \
157 \
158 ia64_intri_res; \
159})
160
161#define ia64_shrp(a, b, count) \
162({ \
163 __u64 ia64_intri_res; \
164 asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count)); \
165 ia64_intri_res; \
166})
167
168#define ia64_ldfs(regnum, x) \
169({ \
170 register double __f__ asm ("f"#regnum); \
171 asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x)); \
172})
173
174#define ia64_ldfd(regnum, x) \
175({ \
176 register double __f__ asm ("f"#regnum); \
177 asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x)); \
178})
179
180#define ia64_ldfe(regnum, x) \
181({ \
182 register double __f__ asm ("f"#regnum); \
183 asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x)); \
184})
185
186#define ia64_ldf8(regnum, x) \
187({ \
188 register double __f__ asm ("f"#regnum); \
189 asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x)); \
190})
191
192#define ia64_ldf_fill(regnum, x) \
193({ \
194 register double __f__ asm ("f"#regnum); \
195 asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
196})
197
198#define ia64_st4_rel_nta(m, val) \
199({ \
200 asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
201})
202
203#define ia64_stfs(x, regnum) \
204({ \
205 register double __f__ asm ("f"#regnum); \
206 asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
207})
208
209#define ia64_stfd(x, regnum) \
210({ \
211 register double __f__ asm ("f"#regnum); \
212 asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
213})
214
215#define ia64_stfe(x, regnum) \
216({ \
217 register double __f__ asm ("f"#regnum); \
218 asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
219})
220
221#define ia64_stf8(x, regnum) \
222({ \
223 register double __f__ asm ("f"#regnum); \
224 asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
225})
226
227#define ia64_stf_spill(x, regnum) \
228({ \
229 register double __f__ asm ("f"#regnum); \
230 asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
231})
232
233#define ia64_fetchadd4_acq(p, inc) \
234({ \
235 \
236 __u64 ia64_intri_res; \
237 asm volatile ("fetchadd4.acq %0=[%1],%2" \
238 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
239 : "memory"); \
240 \
241 ia64_intri_res; \
242})
243
244#define ia64_fetchadd4_rel(p, inc) \
245({ \
246 __u64 ia64_intri_res; \
247 asm volatile ("fetchadd4.rel %0=[%1],%2" \
248 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
249 : "memory"); \
250 \
251 ia64_intri_res; \
252})
253
254#define ia64_fetchadd8_acq(p, inc) \
255({ \
256 \
257 __u64 ia64_intri_res; \
258 asm volatile ("fetchadd8.acq %0=[%1],%2" \
259 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
260 : "memory"); \
261 \
262 ia64_intri_res; \
263})
264
265#define ia64_fetchadd8_rel(p, inc) \
266({ \
267 __u64 ia64_intri_res; \
268 asm volatile ("fetchadd8.rel %0=[%1],%2" \
269 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
270 : "memory"); \
271 \
272 ia64_intri_res; \
273})
274
275#define ia64_xchg1(ptr,x) \
276({ \
277 __u64 ia64_intri_res; \
278 asm volatile ("xchg1 %0=[%1],%2" \
279 : "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory"); \
280 ia64_intri_res; \
281})
282
283#define ia64_xchg2(ptr,x) \
284({ \
285 __u64 ia64_intri_res; \
286 asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res) \
287 : "r" (ptr), "r" (x) : "memory"); \
288 ia64_intri_res; \
289})
290
291#define ia64_xchg4(ptr,x) \
292({ \
293 __u64 ia64_intri_res; \
294 asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res) \
295 : "r" (ptr), "r" (x) : "memory"); \
296 ia64_intri_res; \
297})
298
299#define ia64_xchg8(ptr,x) \
300({ \
301 __u64 ia64_intri_res; \
302 asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res) \
303 : "r" (ptr), "r" (x) : "memory"); \
304 ia64_intri_res; \
305})
306
307#define ia64_cmpxchg1_acq(ptr, new, old) \
308({ \
309 __u64 ia64_intri_res; \
310 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
311 asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \
312 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
313 ia64_intri_res; \
314})
315
316#define ia64_cmpxchg1_rel(ptr, new, old) \
317({ \
318 __u64 ia64_intri_res; \
319 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
320 asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \
321 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
322 ia64_intri_res; \
323})
324
325#define ia64_cmpxchg2_acq(ptr, new, old) \
326({ \
327 __u64 ia64_intri_res; \
328 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
329 asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \
330 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
331 ia64_intri_res; \
332})
333
334#define ia64_cmpxchg2_rel(ptr, new, old) \
335({ \
336 __u64 ia64_intri_res; \
337 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
338 \
339 asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \
340 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
341 ia64_intri_res; \
342})
343
344#define ia64_cmpxchg4_acq(ptr, new, old) \
345({ \
346 __u64 ia64_intri_res; \
347 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
348 asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \
349 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
350 ia64_intri_res; \
351})
352
353#define ia64_cmpxchg4_rel(ptr, new, old) \
354({ \
355 __u64 ia64_intri_res; \
356 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
357 asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \
358 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
359 ia64_intri_res; \
360})
361
362#define ia64_cmpxchg8_acq(ptr, new, old) \
363({ \
364 __u64 ia64_intri_res; \
365 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
366 asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \
367 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
368 ia64_intri_res; \
369})
370
371#define ia64_cmpxchg8_rel(ptr, new, old) \
372({ \
373 __u64 ia64_intri_res; \
374 asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
375 \
376 asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \
377 "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
378 ia64_intri_res; \
379})
380
381#define ia64_mf() asm volatile ("mf" ::: "memory")
382#define ia64_mfa() asm volatile ("mf.a" ::: "memory")
383
384#define ia64_invala() asm volatile ("invala" ::: "memory")
385
386#define ia64_native_thash(addr) \
387({ \
388 unsigned long ia64_intri_res; \
389 asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
390 ia64_intri_res; \
391})
392
393#define ia64_srlz_i() asm volatile (";; srlz.i ;;" ::: "memory")
394#define ia64_srlz_d() asm volatile (";; srlz.d" ::: "memory");
395
396#ifdef HAVE_SERIALIZE_DIRECTIVE
397# define ia64_dv_serialize_data() asm volatile (".serialize.data");
398# define ia64_dv_serialize_instruction() asm volatile (".serialize.instruction");
399#else
400# define ia64_dv_serialize_data()
401# define ia64_dv_serialize_instruction()
402#endif
403
404#define ia64_nop(x) asm volatile ("nop %0"::"i"(x));
405
406#define ia64_itci(addr) asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
407
408#define ia64_itcd(addr) asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
409
410
411#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1" \
412 :: "r"(trnum), "r"(addr) : "memory")
413
414#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1" \
415 :: "r"(trnum), "r"(addr) : "memory")
416
417#define ia64_tpa(addr) \
418({ \
419 unsigned long ia64_pa; \
420 asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \
421 ia64_pa; \
422})
423
424#define __ia64_set_dbr(index, val) \
425 asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
426
427#define ia64_set_ibr(index, val) \
428 asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
429
430#define ia64_set_pkr(index, val) \
431 asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
432
433#define ia64_set_pmc(index, val) \
434 asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
435
436#define ia64_set_pmd(index, val) \
437 asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
438
439#define ia64_native_set_rr(index, val) \
440 asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
441
442#define ia64_native_get_cpuid(index) \
443({ \
444 unsigned long ia64_intri_res; \
445 asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
446 ia64_intri_res; \
447})
448
449#define __ia64_get_dbr(index) \
450({ \
451 unsigned long ia64_intri_res; \
452 asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
453 ia64_intri_res; \
454})
455
456#define ia64_get_ibr(index) \
457({ \
458 unsigned long ia64_intri_res; \
459 asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
460 ia64_intri_res; \
461})
462
463#define ia64_get_pkr(index) \
464({ \
465 unsigned long ia64_intri_res; \
466 asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
467 ia64_intri_res; \
468})
469
470#define ia64_get_pmc(index) \
471({ \
472 unsigned long ia64_intri_res; \
473 asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
474 ia64_intri_res; \
475})
476
477
478#define ia64_native_get_pmd(index) \
479({ \
480 unsigned long ia64_intri_res; \
481 asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
482 ia64_intri_res; \
483})
484
485#define ia64_native_get_rr(index) \
486({ \
487 unsigned long ia64_intri_res; \
488 asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
489 ia64_intri_res; \
490})
491
492#define ia64_native_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory")
493
494
495#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory")
496
497#define ia64_native_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory")
498#define ia64_native_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory")
499#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory")
500#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory")
501
502#define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr))
503
504#define ia64_native_ptcga(addr, size) \
505do { \
506 asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory"); \
507 ia64_dv_serialize_data(); \
508} while (0)
509
510#define ia64_ptcl(addr, size) \
511do { \
512 asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory"); \
513 ia64_dv_serialize_data(); \
514} while (0)
515
516#define ia64_ptri(addr, size) \
517 asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
518
519#define ia64_ptrd(addr, size) \
520 asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
521
522#define ia64_ttag(addr) \
523({ \
524 __u64 ia64_intri_res; \
525 asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
526 ia64_intri_res; \
527})
528
529
530/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
531
532#define ia64_lfhint_none 0
533#define ia64_lfhint_nt1 1
534#define ia64_lfhint_nt2 2
535#define ia64_lfhint_nta 3
536
537#define ia64_lfetch(lfhint, y) \
538({ \
539 switch (lfhint) { \
540 case ia64_lfhint_none: \
541 asm volatile ("lfetch [%0]" : : "r"(y)); \
542 break; \
543 case ia64_lfhint_nt1: \
544 asm volatile ("lfetch.nt1 [%0]" : : "r"(y)); \
545 break; \
546 case ia64_lfhint_nt2: \
547 asm volatile ("lfetch.nt2 [%0]" : : "r"(y)); \
548 break; \
549 case ia64_lfhint_nta: \
550 asm volatile ("lfetch.nta [%0]" : : "r"(y)); \
551 break; \
552 } \
553})
554
555#define ia64_lfetch_excl(lfhint, y) \
556({ \
557 switch (lfhint) { \
558 case ia64_lfhint_none: \
559 asm volatile ("lfetch.excl [%0]" :: "r"(y)); \
560 break; \
561 case ia64_lfhint_nt1: \
562 asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y)); \
563 break; \
564 case ia64_lfhint_nt2: \
565 asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y)); \
566 break; \
567 case ia64_lfhint_nta: \
568 asm volatile ("lfetch.excl.nta [%0]" :: "r"(y)); \
569 break; \
570 } \
571})
572
573#define ia64_lfetch_fault(lfhint, y) \
574({ \
575 switch (lfhint) { \
576 case ia64_lfhint_none: \
577 asm volatile ("lfetch.fault [%0]" : : "r"(y)); \
578 break; \
579 case ia64_lfhint_nt1: \
580 asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y)); \
581 break; \
582 case ia64_lfhint_nt2: \
583 asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y)); \
584 break; \
585 case ia64_lfhint_nta: \
586 asm volatile ("lfetch.fault.nta [%0]" : : "r"(y)); \
587 break; \
588 } \
589})
590
591#define ia64_lfetch_fault_excl(lfhint, y) \
592({ \
593 switch (lfhint) { \
594 case ia64_lfhint_none: \
595 asm volatile ("lfetch.fault.excl [%0]" :: "r"(y)); \
596 break; \
597 case ia64_lfhint_nt1: \
598 asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \
599 break; \
600 case ia64_lfhint_nt2: \
601 asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \
602 break; \
603 case ia64_lfhint_nta: \
604 asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \
605 break; \
606 } \
607})
608
609#define ia64_native_intrin_local_irq_restore(x) \
610do { \
611 asm volatile (";; cmp.ne p6,p7=%0,r0;;" \
612 "(p6) ssm psr.i;" \
613 "(p7) rsm psr.i;;" \
614 "(p6) srlz.d" \
615 :: "r"((x)) : "p6", "p7", "memory"); \
616} while (0)
617
618#endif /* _UAPI_ASM_IA64_GCC_INTRIN_H */
diff --git a/arch/ia64/include/uapi/asm/ia64regs.h b/arch/ia64/include/uapi/asm/ia64regs.h
new file mode 100644
index 000000000000..1757f1c11ad4
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ia64regs.h
@@ -0,0 +1,100 @@
1/*
2 * Copyright (C) 2002,2003 Intel Corp.
3 * Jun Nakajima <jun.nakajima@intel.com>
4 * Suresh Siddha <suresh.b.siddha@intel.com>
5 */
6
7#ifndef _ASM_IA64_IA64REGS_H
8#define _ASM_IA64_IA64REGS_H
9
10/*
11 * Register Names for getreg() and setreg().
12 *
13 * The "magic" numbers happen to match the values used by the Intel compiler's
14 * getreg()/setreg() intrinsics.
15 */
16
17/* Special Registers */
18
19#define _IA64_REG_IP 1016 /* getreg only */
20#define _IA64_REG_PSR 1019
21#define _IA64_REG_PSR_L 1019
22
23/* General Integer Registers */
24
25#define _IA64_REG_GP 1025 /* R1 */
26#define _IA64_REG_R8 1032 /* R8 */
27#define _IA64_REG_R9 1033 /* R9 */
28#define _IA64_REG_SP 1036 /* R12 */
29#define _IA64_REG_TP 1037 /* R13 */
30
31/* Application Registers */
32
33#define _IA64_REG_AR_KR0 3072
34#define _IA64_REG_AR_KR1 3073
35#define _IA64_REG_AR_KR2 3074
36#define _IA64_REG_AR_KR3 3075
37#define _IA64_REG_AR_KR4 3076
38#define _IA64_REG_AR_KR5 3077
39#define _IA64_REG_AR_KR6 3078
40#define _IA64_REG_AR_KR7 3079
41#define _IA64_REG_AR_RSC 3088
42#define _IA64_REG_AR_BSP 3089
43#define _IA64_REG_AR_BSPSTORE 3090
44#define _IA64_REG_AR_RNAT 3091
45#define _IA64_REG_AR_FCR 3093
46#define _IA64_REG_AR_EFLAG 3096
47#define _IA64_REG_AR_CSD 3097
48#define _IA64_REG_AR_SSD 3098
49#define _IA64_REG_AR_CFLAG 3099
50#define _IA64_REG_AR_FSR 3100
51#define _IA64_REG_AR_FIR 3101
52#define _IA64_REG_AR_FDR 3102
53#define _IA64_REG_AR_CCV 3104
54#define _IA64_REG_AR_UNAT 3108
55#define _IA64_REG_AR_FPSR 3112
56#define _IA64_REG_AR_ITC 3116
57#define _IA64_REG_AR_PFS 3136
58#define _IA64_REG_AR_LC 3137
59#define _IA64_REG_AR_EC 3138
60
61/* Control Registers */
62
63#define _IA64_REG_CR_DCR 4096
64#define _IA64_REG_CR_ITM 4097
65#define _IA64_REG_CR_IVA 4098
66#define _IA64_REG_CR_PTA 4104
67#define _IA64_REG_CR_IPSR 4112
68#define _IA64_REG_CR_ISR 4113
69#define _IA64_REG_CR_IIP 4115
70#define _IA64_REG_CR_IFA 4116
71#define _IA64_REG_CR_ITIR 4117
72#define _IA64_REG_CR_IIPA 4118
73#define _IA64_REG_CR_IFS 4119
74#define _IA64_REG_CR_IIM 4120
75#define _IA64_REG_CR_IHA 4121
76#define _IA64_REG_CR_LID 4160
77#define _IA64_REG_CR_IVR 4161 /* getreg only */
78#define _IA64_REG_CR_TPR 4162
79#define _IA64_REG_CR_EOI 4163
80#define _IA64_REG_CR_IRR0 4164 /* getreg only */
81#define _IA64_REG_CR_IRR1 4165 /* getreg only */
82#define _IA64_REG_CR_IRR2 4166 /* getreg only */
83#define _IA64_REG_CR_IRR3 4167 /* getreg only */
84#define _IA64_REG_CR_ITV 4168
85#define _IA64_REG_CR_PMV 4169
86#define _IA64_REG_CR_CMCV 4170
87#define _IA64_REG_CR_LRR0 4176
88#define _IA64_REG_CR_LRR1 4177
89
90/* Indirect Registers for getindreg() and setindreg() */
91
92#define _IA64_REG_INDR_CPUID 9000 /* getindreg only */
93#define _IA64_REG_INDR_DBR 9001
94#define _IA64_REG_INDR_IBR 9002
95#define _IA64_REG_INDR_PKR 9003
96#define _IA64_REG_INDR_PMC 9004
97#define _IA64_REG_INDR_PMD 9005
98#define _IA64_REG_INDR_RR 9006
99
100#endif /* _ASM_IA64_IA64REGS_H */
diff --git a/arch/ia64/include/uapi/asm/intel_intrin.h b/arch/ia64/include/uapi/asm/intel_intrin.h
new file mode 100644
index 000000000000..53cec577558a
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/intel_intrin.h
@@ -0,0 +1,161 @@
1#ifndef _ASM_IA64_INTEL_INTRIN_H
2#define _ASM_IA64_INTEL_INTRIN_H
3/*
4 * Intel Compiler Intrinsics
5 *
6 * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
7 * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
8 * Copyright (C) 2005,2006 Hongjiu Lu <hongjiu.lu@intel.com>
9 *
10 */
11#include <ia64intrin.h>
12
13#define ia64_barrier() __memory_barrier()
14
15#define ia64_stop() /* Nothing: As of now stop bit is generated for each
16 * intrinsic
17 */
18
19#define ia64_native_getreg __getReg
20#define ia64_native_setreg __setReg
21
22#define ia64_hint __hint
23#define ia64_hint_pause __hint_pause
24
25#define ia64_mux1_brcst _m64_mux1_brcst
26#define ia64_mux1_mix _m64_mux1_mix
27#define ia64_mux1_shuf _m64_mux1_shuf
28#define ia64_mux1_alt _m64_mux1_alt
29#define ia64_mux1_rev _m64_mux1_rev
30
31#define ia64_mux1(x,v) _m_to_int64(_m64_mux1(_m_from_int64(x), (v)))
32#define ia64_popcnt _m64_popcnt
33#define ia64_getf_exp __getf_exp
34#define ia64_shrp _m64_shrp
35
36#define ia64_tpa __tpa
37#define ia64_invala __invala
38#define ia64_invala_gr __invala_gr
39#define ia64_invala_fr __invala_fr
40#define ia64_nop __nop
41#define ia64_sum __sum
42#define ia64_native_ssm __ssm
43#define ia64_rum __rum
44#define ia64_native_rsm __rsm
45#define ia64_native_fc __fc
46
47#define ia64_ldfs __ldfs
48#define ia64_ldfd __ldfd
49#define ia64_ldfe __ldfe
50#define ia64_ldf8 __ldf8
51#define ia64_ldf_fill __ldf_fill
52
53#define ia64_stfs __stfs
54#define ia64_stfd __stfd
55#define ia64_stfe __stfe
56#define ia64_stf8 __stf8
57#define ia64_stf_spill __stf_spill
58
59#define ia64_mf __mf
60#define ia64_mfa __mfa
61
62#define ia64_fetchadd4_acq __fetchadd4_acq
63#define ia64_fetchadd4_rel __fetchadd4_rel
64#define ia64_fetchadd8_acq __fetchadd8_acq
65#define ia64_fetchadd8_rel __fetchadd8_rel
66
67#define ia64_xchg1 _InterlockedExchange8
68#define ia64_xchg2 _InterlockedExchange16
69#define ia64_xchg4 _InterlockedExchange
70#define ia64_xchg8 _InterlockedExchange64
71
72#define ia64_cmpxchg1_rel _InterlockedCompareExchange8_rel
73#define ia64_cmpxchg1_acq _InterlockedCompareExchange8_acq
74#define ia64_cmpxchg2_rel _InterlockedCompareExchange16_rel
75#define ia64_cmpxchg2_acq _InterlockedCompareExchange16_acq
76#define ia64_cmpxchg4_rel _InterlockedCompareExchange_rel
77#define ia64_cmpxchg4_acq _InterlockedCompareExchange_acq
78#define ia64_cmpxchg8_rel _InterlockedCompareExchange64_rel
79#define ia64_cmpxchg8_acq _InterlockedCompareExchange64_acq
80
81#define __ia64_set_dbr(index, val) \
82 __setIndReg(_IA64_REG_INDR_DBR, index, val)
83#define ia64_set_ibr(index, val) \
84 __setIndReg(_IA64_REG_INDR_IBR, index, val)
85#define ia64_set_pkr(index, val) \
86 __setIndReg(_IA64_REG_INDR_PKR, index, val)
87#define ia64_set_pmc(index, val) \
88 __setIndReg(_IA64_REG_INDR_PMC, index, val)
89#define ia64_set_pmd(index, val) \
90 __setIndReg(_IA64_REG_INDR_PMD, index, val)
91#define ia64_native_set_rr(index, val) \
92 __setIndReg(_IA64_REG_INDR_RR, index, val)
93
94#define ia64_native_get_cpuid(index) \
95 __getIndReg(_IA64_REG_INDR_CPUID, index)
96#define __ia64_get_dbr(index) __getIndReg(_IA64_REG_INDR_DBR, index)
97#define ia64_get_ibr(index) __getIndReg(_IA64_REG_INDR_IBR, index)
98#define ia64_get_pkr(index) __getIndReg(_IA64_REG_INDR_PKR, index)
99#define ia64_get_pmc(index) __getIndReg(_IA64_REG_INDR_PMC, index)
100#define ia64_native_get_pmd(index) __getIndReg(_IA64_REG_INDR_PMD, index)
101#define ia64_native_get_rr(index) __getIndReg(_IA64_REG_INDR_RR, index)
102
103#define ia64_srlz_d __dsrlz
104#define ia64_srlz_i __isrlz
105
106#define ia64_dv_serialize_data()
107#define ia64_dv_serialize_instruction()
108
109#define ia64_st1_rel __st1_rel
110#define ia64_st2_rel __st2_rel
111#define ia64_st4_rel __st4_rel
112#define ia64_st8_rel __st8_rel
113
114/* FIXME: need st4.rel.nta intrinsic */
115#define ia64_st4_rel_nta __st4_rel
116
117#define ia64_ld1_acq __ld1_acq
118#define ia64_ld2_acq __ld2_acq
119#define ia64_ld4_acq __ld4_acq
120#define ia64_ld8_acq __ld8_acq
121
122#define ia64_sync_i __synci
123#define ia64_native_thash __thash
124#define ia64_native_ttag __ttag
125#define ia64_itcd __itcd
126#define ia64_itci __itci
127#define ia64_itrd __itrd
128#define ia64_itri __itri
129#define ia64_ptce __ptce
130#define ia64_ptcl __ptcl
131#define ia64_native_ptcg __ptcg
132#define ia64_native_ptcga __ptcga
133#define ia64_ptri __ptri
134#define ia64_ptrd __ptrd
135#define ia64_dep_mi _m64_dep_mi
136
137/* Values for lfhint in __lfetch and __lfetch_fault */
138
139#define ia64_lfhint_none __lfhint_none
140#define ia64_lfhint_nt1 __lfhint_nt1
141#define ia64_lfhint_nt2 __lfhint_nt2
142#define ia64_lfhint_nta __lfhint_nta
143
144#define ia64_lfetch __lfetch
145#define ia64_lfetch_excl __lfetch_excl
146#define ia64_lfetch_fault __lfetch_fault
147#define ia64_lfetch_fault_excl __lfetch_fault_excl
148
149#define ia64_native_intrin_local_irq_restore(x) \
150do { \
151 if ((x) != 0) { \
152 ia64_native_ssm(IA64_PSR_I); \
153 ia64_srlz_d(); \
154 } else { \
155 ia64_native_rsm(IA64_PSR_I); \
156 } \
157} while (0)
158
159#define __builtin_trap() __break(0);
160
161#endif /* _ASM_IA64_INTEL_INTRIN_H */
diff --git a/arch/ia64/include/uapi/asm/intrinsics.h b/arch/ia64/include/uapi/asm/intrinsics.h
new file mode 100644
index 000000000000..5829978ff466
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/intrinsics.h
@@ -0,0 +1,124 @@
1/*
2 * Compiler-dependent intrinsics.
3 *
4 * Copyright (C) 2002-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 */
7#ifndef _UAPI_ASM_IA64_INTRINSICS_H
8#define _UAPI_ASM_IA64_INTRINSICS_H
9
10
11#ifndef __ASSEMBLY__
12
13#include <linux/types.h>
14/* include compiler specific intrinsics */
15#include <asm/ia64regs.h>
16#ifdef __INTEL_COMPILER
17# include <asm/intel_intrin.h>
18#else
19# include <asm/gcc_intrin.h>
20#endif
21#include <asm/cmpxchg.h>
22
23#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
24
25#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
26do { \
27 ia64_native_set_rr(0x0000000000000000UL, (val0)); \
28 ia64_native_set_rr(0x2000000000000000UL, (val1)); \
29 ia64_native_set_rr(0x4000000000000000UL, (val2)); \
30 ia64_native_set_rr(0x6000000000000000UL, (val3)); \
31 ia64_native_set_rr(0x8000000000000000UL, (val4)); \
32} while (0)
33
34/*
35 * Force an unresolved reference if someone tries to use
36 * ia64_fetch_and_add() with a bad value.
37 */
38extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
39extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
40
41#define IA64_FETCHADD(tmp,v,n,sz,sem) \
42({ \
43 switch (sz) { \
44 case 4: \
45 tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \
46 break; \
47 \
48 case 8: \
49 tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \
50 break; \
51 \
52 default: \
53 __bad_size_for_ia64_fetch_and_add(); \
54 } \
55})
56
57#define ia64_fetchadd(i,v,sem) \
58({ \
59 __u64 _tmp; \
60 volatile __typeof__(*(v)) *_v = (v); \
61 /* Can't use a switch () here: gcc isn't always smart enough for that... */ \
62 if ((i) == -16) \
63 IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \
64 else if ((i) == -8) \
65 IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \
66 else if ((i) == -4) \
67 IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \
68 else if ((i) == -1) \
69 IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \
70 else if ((i) == 1) \
71 IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \
72 else if ((i) == 4) \
73 IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \
74 else if ((i) == 8) \
75 IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \
76 else if ((i) == 16) \
77 IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \
78 else \
79 _tmp = __bad_increment_for_ia64_fetch_and_add(); \
80 (__typeof__(*(v))) (_tmp); /* return old value */ \
81})
82
83#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
84
85#endif
86
87
88#ifndef __ASSEMBLY__
89
90#define IA64_INTRINSIC_API(name) ia64_native_ ## name
91#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name
92
93
94/************************************************/
95/* Instructions paravirtualized for correctness */
96/************************************************/
97/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
98/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
99 * is not currently used (though it may be in a long-format VHPT system!)
100 */
101#define ia64_fc IA64_INTRINSIC_API(fc)
102#define ia64_thash IA64_INTRINSIC_API(thash)
103#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)
104#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)
105
106
107/************************************************/
108/* Instructions paravirtualized for performance */
109/************************************************/
110#define ia64_ssm IA64_INTRINSIC_MACRO(ssm)
111#define ia64_rsm IA64_INTRINSIC_MACRO(rsm)
112#define ia64_getreg IA64_INTRINSIC_MACRO(getreg)
113#define ia64_setreg IA64_INTRINSIC_API(setreg)
114#define ia64_set_rr IA64_INTRINSIC_API(set_rr)
115#define ia64_get_rr IA64_INTRINSIC_API(get_rr)
116#define ia64_ptcga IA64_INTRINSIC_API(ptcga)
117#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)
118#define ia64_intrin_local_irq_restore \
119 IA64_INTRINSIC_API(intrin_local_irq_restore)
120#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)
121
122#endif /* !__ASSEMBLY__ */
123
124#endif /* _UAPI_ASM_IA64_INTRINSICS_H */
diff --git a/arch/ia64/include/uapi/asm/ioctl.h b/arch/ia64/include/uapi/asm/ioctl.h
new file mode 100644
index 000000000000..b279fe06dfe5
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ioctl.h
@@ -0,0 +1 @@
#include <asm-generic/ioctl.h>
diff --git a/arch/ia64/include/uapi/asm/ioctls.h b/arch/ia64/include/uapi/asm/ioctls.h
new file mode 100644
index 000000000000..f3aab5512e98
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ioctls.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_IA64_IOCTLS_H
2#define _ASM_IA64_IOCTLS_H
3
4#include <asm-generic/ioctls.h>
5
6#endif /* _ASM_IA64_IOCTLS_H */
diff --git a/arch/ia64/include/uapi/asm/ipcbuf.h b/arch/ia64/include/uapi/asm/ipcbuf.h
new file mode 100644
index 000000000000..84c7e51cb6d0
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ipcbuf.h
@@ -0,0 +1 @@
#include <asm-generic/ipcbuf.h>
diff --git a/arch/ia64/include/uapi/asm/kvm.h b/arch/ia64/include/uapi/asm/kvm.h
new file mode 100644
index 000000000000..ec6c6b301238
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/kvm.h
@@ -0,0 +1,269 @@
1#ifndef __ASM_IA64_KVM_H
2#define __ASM_IA64_KVM_H
3
4/*
5 * kvm structure definitions for ia64
6 *
7 * Copyright (C) 2007 Xiantao Zhang <xiantao.zhang@intel.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms and conditions of the GNU General Public License,
11 * version 2, as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * more details.
17 *
18 * You should have received a copy of the GNU General Public License along with
19 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
20 * Place - Suite 330, Boston, MA 02111-1307 USA.
21 *
22 */
23
24#include <linux/types.h>
25#include <linux/ioctl.h>
26
27/* Select x86 specific features in <linux/kvm.h> */
28#define __KVM_HAVE_IOAPIC
29#define __KVM_HAVE_IRQ_LINE
30#define __KVM_HAVE_DEVICE_ASSIGNMENT
31
32/* Architectural interrupt line count. */
33#define KVM_NR_INTERRUPTS 256
34
35#define KVM_IOAPIC_NUM_PINS 48
36
37struct kvm_ioapic_state {
38 __u64 base_address;
39 __u32 ioregsel;
40 __u32 id;
41 __u32 irr;
42 __u32 pad;
43 union {
44 __u64 bits;
45 struct {
46 __u8 vector;
47 __u8 delivery_mode:3;
48 __u8 dest_mode:1;
49 __u8 delivery_status:1;
50 __u8 polarity:1;
51 __u8 remote_irr:1;
52 __u8 trig_mode:1;
53 __u8 mask:1;
54 __u8 reserve:7;
55 __u8 reserved[4];
56 __u8 dest_id;
57 } fields;
58 } redirtbl[KVM_IOAPIC_NUM_PINS];
59};
60
61#define KVM_IRQCHIP_PIC_MASTER 0
62#define KVM_IRQCHIP_PIC_SLAVE 1
63#define KVM_IRQCHIP_IOAPIC 2
64#define KVM_NR_IRQCHIPS 3
65
66#define KVM_CONTEXT_SIZE 8*1024
67
68struct kvm_fpreg {
69 union {
70 unsigned long bits[2];
71 long double __dummy; /* force 16-byte alignment */
72 } u;
73};
74
75union context {
76 /* 8K size */
77 char dummy[KVM_CONTEXT_SIZE];
78 struct {
79 unsigned long psr;
80 unsigned long pr;
81 unsigned long caller_unat;
82 unsigned long pad;
83 unsigned long gr[32];
84 unsigned long ar[128];
85 unsigned long br[8];
86 unsigned long cr[128];
87 unsigned long rr[8];
88 unsigned long ibr[8];
89 unsigned long dbr[8];
90 unsigned long pkr[8];
91 struct kvm_fpreg fr[128];
92 };
93};
94
95struct thash_data {
96 union {
97 struct {
98 unsigned long p : 1; /* 0 */
99 unsigned long rv1 : 1; /* 1 */
100 unsigned long ma : 3; /* 2-4 */
101 unsigned long a : 1; /* 5 */
102 unsigned long d : 1; /* 6 */
103 unsigned long pl : 2; /* 7-8 */
104 unsigned long ar : 3; /* 9-11 */
105 unsigned long ppn : 38; /* 12-49 */
106 unsigned long rv2 : 2; /* 50-51 */
107 unsigned long ed : 1; /* 52 */
108 unsigned long ig1 : 11; /* 53-63 */
109 };
110 struct {
111 unsigned long __rv1 : 53; /* 0-52 */
112 unsigned long contiguous : 1; /*53 */
113 unsigned long tc : 1; /* 54 TR or TC */
114 unsigned long cl : 1;
115 /* 55 I side or D side cache line */
116 unsigned long len : 4; /* 56-59 */
117 unsigned long io : 1; /* 60 entry is for io or not */
118 unsigned long nomap : 1;
119 /* 61 entry cann't be inserted into machine TLB.*/
120 unsigned long checked : 1;
121 /* 62 for VTLB/VHPT sanity check */
122 unsigned long invalid : 1;
123 /* 63 invalid entry */
124 };
125 unsigned long page_flags;
126 }; /* same for VHPT and TLB */
127
128 union {
129 struct {
130 unsigned long rv3 : 2;
131 unsigned long ps : 6;
132 unsigned long key : 24;
133 unsigned long rv4 : 32;
134 };
135 unsigned long itir;
136 };
137 union {
138 struct {
139 unsigned long ig2 : 12;
140 unsigned long vpn : 49;
141 unsigned long vrn : 3;
142 };
143 unsigned long ifa;
144 unsigned long vadr;
145 struct {
146 unsigned long tag : 63;
147 unsigned long ti : 1;
148 };
149 unsigned long etag;
150 };
151 union {
152 struct thash_data *next;
153 unsigned long rid;
154 unsigned long gpaddr;
155 };
156};
157
158#define NITRS 8
159#define NDTRS 8
160
161struct saved_vpd {
162 unsigned long vhpi;
163 unsigned long vgr[16];
164 unsigned long vbgr[16];
165 unsigned long vnat;
166 unsigned long vbnat;
167 unsigned long vcpuid[5];
168 unsigned long vpsr;
169 unsigned long vpr;
170 union {
171 unsigned long vcr[128];
172 struct {
173 unsigned long dcr;
174 unsigned long itm;
175 unsigned long iva;
176 unsigned long rsv1[5];
177 unsigned long pta;
178 unsigned long rsv2[7];
179 unsigned long ipsr;
180 unsigned long isr;
181 unsigned long rsv3;
182 unsigned long iip;
183 unsigned long ifa;
184 unsigned long itir;
185 unsigned long iipa;
186 unsigned long ifs;
187 unsigned long iim;
188 unsigned long iha;
189 unsigned long rsv4[38];
190 unsigned long lid;
191 unsigned long ivr;
192 unsigned long tpr;
193 unsigned long eoi;
194 unsigned long irr[4];
195 unsigned long itv;
196 unsigned long pmv;
197 unsigned long cmcv;
198 unsigned long rsv5[5];
199 unsigned long lrr0;
200 unsigned long lrr1;
201 unsigned long rsv6[46];
202 };
203 };
204};
205
206struct kvm_regs {
207 struct saved_vpd vpd;
208 /*Arch-regs*/
209 int mp_state;
210 unsigned long vmm_rr;
211 /* TR and TC. */
212 struct thash_data itrs[NITRS];
213 struct thash_data dtrs[NDTRS];
214 /* Bit is set if there is a tr/tc for the region. */
215 unsigned char itr_regions;
216 unsigned char dtr_regions;
217 unsigned char tc_regions;
218
219 char irq_check;
220 unsigned long saved_itc;
221 unsigned long itc_check;
222 unsigned long timer_check;
223 unsigned long timer_pending;
224 unsigned long last_itc;
225
226 unsigned long vrr[8];
227 unsigned long ibr[8];
228 unsigned long dbr[8];
229 unsigned long insvc[4]; /* Interrupt in service. */
230 unsigned long xtp;
231
232 unsigned long metaphysical_rr0; /* from kvm_arch (so is pinned) */
233 unsigned long metaphysical_rr4; /* from kvm_arch (so is pinned) */
234 unsigned long metaphysical_saved_rr0; /* from kvm_arch */
235 unsigned long metaphysical_saved_rr4; /* from kvm_arch */
236 unsigned long fp_psr; /*used for lazy float register */
237 unsigned long saved_gp;
238 /*for phycial emulation */
239
240 union context saved_guest;
241
242 unsigned long reserved[64]; /* for future use */
243};
244
245struct kvm_sregs {
246};
247
248struct kvm_fpu {
249};
250
251#define KVM_IA64_VCPU_STACK_SHIFT 16
252#define KVM_IA64_VCPU_STACK_SIZE (1UL << KVM_IA64_VCPU_STACK_SHIFT)
253
254struct kvm_ia64_vcpu_stack {
255 unsigned char stack[KVM_IA64_VCPU_STACK_SIZE];
256};
257
258struct kvm_debug_exit_arch {
259};
260
261/* for KVM_SET_GUEST_DEBUG */
262struct kvm_guest_debug_arch {
263};
264
265/* definition of registers in kvm_run */
266struct kvm_sync_regs {
267};
268
269#endif
diff --git a/arch/ia64/include/uapi/asm/kvm_para.h b/arch/ia64/include/uapi/asm/kvm_para.h
new file mode 100644
index 000000000000..e69de29bb2d1
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/kvm_para.h
diff --git a/arch/ia64/include/uapi/asm/mman.h b/arch/ia64/include/uapi/asm/mman.h
new file mode 100644
index 000000000000..8740819adc54
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/mman.h
@@ -0,0 +1,16 @@
1/*
2 * Based on <asm-i386/mman.h>.
3 *
4 * Modified 1998-2000, 2002
5 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
6 */
7#ifndef _UAPI_ASM_IA64_MMAN_H
8#define _UAPI_ASM_IA64_MMAN_H
9
10
11#include <asm-generic/mman.h>
12
13#define MAP_GROWSUP 0x0200 /* register stack-like segment */
14
15
16#endif /* _UAPI_ASM_IA64_MMAN_H */
diff --git a/arch/ia64/include/uapi/asm/msgbuf.h b/arch/ia64/include/uapi/asm/msgbuf.h
new file mode 100644
index 000000000000..6c64c0d2aae1
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/msgbuf.h
@@ -0,0 +1,27 @@
1#ifndef _ASM_IA64_MSGBUF_H
2#define _ASM_IA64_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for IA-64 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 2 miscellaneous 64-bit values
11 */
12
13struct msqid64_ds {
14 struct ipc64_perm msg_perm;
15 __kernel_time_t msg_stime; /* last msgsnd time */
16 __kernel_time_t msg_rtime; /* last msgrcv time */
17 __kernel_time_t msg_ctime; /* last change time */
18 unsigned long msg_cbytes; /* current number of bytes on queue */
19 unsigned long msg_qnum; /* number of messages in queue */
20 unsigned long msg_qbytes; /* max number of bytes on queue */
21 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
22 __kernel_pid_t msg_lrpid; /* last receive pid */
23 unsigned long __unused1;
24 unsigned long __unused2;
25};
26
27#endif /* _ASM_IA64_MSGBUF_H */
diff --git a/arch/ia64/include/uapi/asm/param.h b/arch/ia64/include/uapi/asm/param.h
new file mode 100644
index 000000000000..d7da41d9497d
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/param.h
@@ -0,0 +1,29 @@
1/*
2 * Fundamental kernel parameters.
3 *
4 * Based on <asm-i386/param.h>.
5 *
6 * Modified 1998, 1999, 2002-2003
7 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
8 */
9#ifndef _UAPI_ASM_IA64_PARAM_H
10#define _UAPI_ASM_IA64_PARAM_H
11
12
13#define EXEC_PAGESIZE 65536
14
15#ifndef NOGROUP
16# define NOGROUP (-1)
17#endif
18
19#define MAXHOSTNAMELEN 64 /* max length of hostname */
20
21#ifndef __KERNEL__
22 /*
23 * Technically, this is wrong, but some old apps still refer to it. The proper way to
24 * get the HZ value is via sysconf(_SC_CLK_TCK).
25 */
26# define HZ 1024
27#endif
28
29#endif /* _UAPI_ASM_IA64_PARAM_H */
diff --git a/arch/ia64/include/uapi/asm/perfmon.h b/arch/ia64/include/uapi/asm/perfmon.h
new file mode 100644
index 000000000000..1a10a2dd58a1
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/perfmon.h
@@ -0,0 +1,177 @@
1/*
2 * Copyright (C) 2001-2003 Hewlett-Packard Co
3 * Stephane Eranian <eranian@hpl.hp.com>
4 */
5
6#ifndef _UAPI_ASM_IA64_PERFMON_H
7#define _UAPI_ASM_IA64_PERFMON_H
8
9/*
10 * perfmon commands supported on all CPU models
11 */
12#define PFM_WRITE_PMCS 0x01
13#define PFM_WRITE_PMDS 0x02
14#define PFM_READ_PMDS 0x03
15#define PFM_STOP 0x04
16#define PFM_START 0x05
17#define PFM_ENABLE 0x06 /* obsolete */
18#define PFM_DISABLE 0x07 /* obsolete */
19#define PFM_CREATE_CONTEXT 0x08
20#define PFM_DESTROY_CONTEXT 0x09 /* obsolete use close() */
21#define PFM_RESTART 0x0a
22#define PFM_PROTECT_CONTEXT 0x0b /* obsolete */
23#define PFM_GET_FEATURES 0x0c
24#define PFM_DEBUG 0x0d
25#define PFM_UNPROTECT_CONTEXT 0x0e /* obsolete */
26#define PFM_GET_PMC_RESET_VAL 0x0f
27#define PFM_LOAD_CONTEXT 0x10
28#define PFM_UNLOAD_CONTEXT 0x11
29
30/*
31 * PMU model specific commands (may not be supported on all PMU models)
32 */
33#define PFM_WRITE_IBRS 0x20
34#define PFM_WRITE_DBRS 0x21
35
36/*
37 * context flags
38 */
39#define PFM_FL_NOTIFY_BLOCK 0x01 /* block task on user level notifications */
40#define PFM_FL_SYSTEM_WIDE 0x02 /* create a system wide context */
41#define PFM_FL_OVFL_NO_MSG 0x80 /* do not post overflow/end messages for notification */
42
43/*
44 * event set flags
45 */
46#define PFM_SETFL_EXCL_IDLE 0x01 /* exclude idle task (syswide only) XXX: DO NOT USE YET */
47
48/*
49 * PMC flags
50 */
51#define PFM_REGFL_OVFL_NOTIFY 0x1 /* send notification on overflow */
52#define PFM_REGFL_RANDOM 0x2 /* randomize sampling interval */
53
54/*
55 * PMD/PMC/IBR/DBR return flags (ignored on input)
56 *
57 * Those flags are used on output and must be checked in case EAGAIN is returned
58 * by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure.
59 */
60#define PFM_REG_RETFL_NOTAVAIL (1UL<<31) /* set if register is implemented but not available */
61#define PFM_REG_RETFL_EINVAL (1UL<<30) /* set if register entry is invalid */
62#define PFM_REG_RETFL_MASK (PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL)
63
64#define PFM_REG_HAS_ERROR(flag) (((flag) & PFM_REG_RETFL_MASK) != 0)
65
66typedef unsigned char pfm_uuid_t[16]; /* custom sampling buffer identifier type */
67
68/*
69 * Request structure used to define a context
70 */
71typedef struct {
72 pfm_uuid_t ctx_smpl_buf_id; /* which buffer format to use (if needed) */
73 unsigned long ctx_flags; /* noblock/block */
74 unsigned short ctx_nextra_sets; /* number of extra event sets (you always get 1) */
75 unsigned short ctx_reserved1; /* for future use */
76 int ctx_fd; /* return arg: unique identification for context */
77 void *ctx_smpl_vaddr; /* return arg: virtual address of sampling buffer, is used */
78 unsigned long ctx_reserved2[11];/* for future use */
79} pfarg_context_t;
80
81/*
82 * Request structure used to write/read a PMC or PMD
83 */
84typedef struct {
85 unsigned int reg_num; /* which register */
86 unsigned short reg_set; /* event set for this register */
87 unsigned short reg_reserved1; /* for future use */
88
89 unsigned long reg_value; /* initial pmc/pmd value */
90 unsigned long reg_flags; /* input: pmc/pmd flags, return: reg error */
91
92 unsigned long reg_long_reset; /* reset after buffer overflow notification */
93 unsigned long reg_short_reset; /* reset after counter overflow */
94
95 unsigned long reg_reset_pmds[4]; /* which other counters to reset on overflow */
96 unsigned long reg_random_seed; /* seed value when randomization is used */
97 unsigned long reg_random_mask; /* bitmask used to limit random value */
98 unsigned long reg_last_reset_val;/* return: PMD last reset value */
99
100 unsigned long reg_smpl_pmds[4]; /* which pmds are accessed when PMC overflows */
101 unsigned long reg_smpl_eventid; /* opaque sampling event identifier */
102
103 unsigned long reg_reserved2[3]; /* for future use */
104} pfarg_reg_t;
105
106typedef struct {
107 unsigned int dbreg_num; /* which debug register */
108 unsigned short dbreg_set; /* event set for this register */
109 unsigned short dbreg_reserved1; /* for future use */
110 unsigned long dbreg_value; /* value for debug register */
111 unsigned long dbreg_flags; /* return: dbreg error */
112 unsigned long dbreg_reserved2[1]; /* for future use */
113} pfarg_dbreg_t;
114
115typedef struct {
116 unsigned int ft_version; /* perfmon: major [16-31], minor [0-15] */
117 unsigned int ft_reserved; /* reserved for future use */
118 unsigned long reserved[4]; /* for future use */
119} pfarg_features_t;
120
121typedef struct {
122 pid_t load_pid; /* process to load the context into */
123 unsigned short load_set; /* first event set to load */
124 unsigned short load_reserved1; /* for future use */
125 unsigned long load_reserved2[3]; /* for future use */
126} pfarg_load_t;
127
128typedef struct {
129 int msg_type; /* generic message header */
130 int msg_ctx_fd; /* generic message header */
131 unsigned long msg_ovfl_pmds[4]; /* which PMDs overflowed */
132 unsigned short msg_active_set; /* active set at the time of overflow */
133 unsigned short msg_reserved1; /* for future use */
134 unsigned int msg_reserved2; /* for future use */
135 unsigned long msg_tstamp; /* for perf tuning/debug */
136} pfm_ovfl_msg_t;
137
138typedef struct {
139 int msg_type; /* generic message header */
140 int msg_ctx_fd; /* generic message header */
141 unsigned long msg_tstamp; /* for perf tuning */
142} pfm_end_msg_t;
143
144typedef struct {
145 int msg_type; /* type of the message */
146 int msg_ctx_fd; /* unique identifier for the context */
147 unsigned long msg_tstamp; /* for perf tuning */
148} pfm_gen_msg_t;
149
150#define PFM_MSG_OVFL 1 /* an overflow happened */
151#define PFM_MSG_END 2 /* task to which context was attached ended */
152
153typedef union {
154 pfm_ovfl_msg_t pfm_ovfl_msg;
155 pfm_end_msg_t pfm_end_msg;
156 pfm_gen_msg_t pfm_gen_msg;
157} pfm_msg_t;
158
159/*
160 * Define the version numbers for both perfmon as a whole and the sampling buffer format.
161 */
162#define PFM_VERSION_MAJ 2U
163#define PFM_VERSION_MIN 0U
164#define PFM_VERSION (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff))
165#define PFM_VERSION_MAJOR(x) (((x)>>16) & 0xffff)
166#define PFM_VERSION_MINOR(x) ((x) & 0xffff)
167
168
169/*
170 * miscellaneous architected definitions
171 */
172#define PMU_FIRST_COUNTER 4 /* first counting monitor (PMC/PMD) */
173#define PMU_MAX_PMCS 256 /* maximum architected number of PMC registers */
174#define PMU_MAX_PMDS 256 /* maximum architected number of PMD registers */
175
176
177#endif /* _UAPI_ASM_IA64_PERFMON_H */
diff --git a/arch/ia64/include/uapi/asm/perfmon_default_smpl.h b/arch/ia64/include/uapi/asm/perfmon_default_smpl.h
new file mode 100644
index 000000000000..a2d560c67230
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/perfmon_default_smpl.h
@@ -0,0 +1,83 @@
1/*
2 * Copyright (C) 2002-2003 Hewlett-Packard Co
3 * Stephane Eranian <eranian@hpl.hp.com>
4 *
5 * This file implements the default sampling buffer format
6 * for Linux/ia64 perfmon subsystem.
7 */
8#ifndef __PERFMON_DEFAULT_SMPL_H__
9#define __PERFMON_DEFAULT_SMPL_H__ 1
10
11#define PFM_DEFAULT_SMPL_UUID { \
12 0x4d, 0x72, 0xbe, 0xc0, 0x06, 0x64, 0x41, 0x43, 0x82, 0xb4, 0xd3, 0xfd, 0x27, 0x24, 0x3c, 0x97}
13
14/*
15 * format specific parameters (passed at context creation)
16 */
17typedef struct {
18 unsigned long buf_size; /* size of the buffer in bytes */
19 unsigned int flags; /* buffer specific flags */
20 unsigned int res1; /* for future use */
21 unsigned long reserved[2]; /* for future use */
22} pfm_default_smpl_arg_t;
23
24/*
25 * combined context+format specific structure. Can be passed
26 * to PFM_CONTEXT_CREATE
27 */
28typedef struct {
29 pfarg_context_t ctx_arg;
30 pfm_default_smpl_arg_t buf_arg;
31} pfm_default_smpl_ctx_arg_t;
32
33/*
34 * This header is at the beginning of the sampling buffer returned to the user.
35 * It is directly followed by the first record.
36 */
37typedef struct {
38 unsigned long hdr_count; /* how many valid entries */
39 unsigned long hdr_cur_offs; /* current offset from top of buffer */
40 unsigned long hdr_reserved2; /* reserved for future use */
41
42 unsigned long hdr_overflows; /* how many times the buffer overflowed */
43 unsigned long hdr_buf_size; /* how many bytes in the buffer */
44
45 unsigned int hdr_version; /* contains perfmon version (smpl format diffs) */
46 unsigned int hdr_reserved1; /* for future use */
47 unsigned long hdr_reserved[10]; /* for future use */
48} pfm_default_smpl_hdr_t;
49
50/*
51 * Entry header in the sampling buffer. The header is directly followed
52 * with the values of the PMD registers of interest saved in increasing
53 * index order: PMD4, PMD5, and so on. How many PMDs are present depends
54 * on how the session was programmed.
55 *
56 * In the case where multiple counters overflow at the same time, multiple
57 * entries are written consecutively.
58 *
59 * last_reset_value member indicates the initial value of the overflowed PMD.
60 */
61typedef struct {
62 int pid; /* thread id (for NPTL, this is gettid()) */
63 unsigned char reserved1[3]; /* reserved for future use */
64 unsigned char ovfl_pmd; /* index of overflowed PMD */
65
66 unsigned long last_reset_val; /* initial value of overflowed PMD */
67 unsigned long ip; /* where did the overflow interrupt happened */
68 unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */
69
70 unsigned short cpu; /* cpu on which the overflow occurred */
71 unsigned short set; /* event set active when overflow occurred */
72 int tgid; /* thread group id (for NPTL, this is getpid()) */
73} pfm_default_smpl_entry_t;
74
75#define PFM_DEFAULT_MAX_PMDS 64 /* how many pmds supported by data structures (sizeof(unsigned long) */
76#define PFM_DEFAULT_MAX_ENTRY_SIZE (sizeof(pfm_default_smpl_entry_t)+(sizeof(unsigned long)*PFM_DEFAULT_MAX_PMDS))
77#define PFM_DEFAULT_SMPL_MIN_BUF_SIZE (sizeof(pfm_default_smpl_hdr_t)+PFM_DEFAULT_MAX_ENTRY_SIZE)
78
79#define PFM_DEFAULT_SMPL_VERSION_MAJ 2U
80#define PFM_DEFAULT_SMPL_VERSION_MIN 0U
81#define PFM_DEFAULT_SMPL_VERSION (((PFM_DEFAULT_SMPL_VERSION_MAJ&0xffff)<<16)|(PFM_DEFAULT_SMPL_VERSION_MIN & 0xffff))
82
83#endif /* __PERFMON_DEFAULT_SMPL_H__ */
diff --git a/arch/ia64/include/uapi/asm/poll.h b/arch/ia64/include/uapi/asm/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/arch/ia64/include/uapi/asm/posix_types.h b/arch/ia64/include/uapi/asm/posix_types.h
new file mode 100644
index 000000000000..99ee1d6510cf
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/posix_types.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_IA64_POSIX_TYPES_H
2#define _ASM_IA64_POSIX_TYPES_H
3
4typedef unsigned long __kernel_sigset_t; /* at least 32 bits */
5
6#include <asm-generic/posix_types.h>
7
8#endif /* _ASM_IA64_POSIX_TYPES_H */
diff --git a/arch/ia64/include/uapi/asm/ptrace.h b/arch/ia64/include/uapi/asm/ptrace.h
new file mode 100644
index 000000000000..0a02f634e12b
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ptrace.h
@@ -0,0 +1,247 @@
1/*
2 * Copyright (C) 1998-2004 Hewlett-Packard Co
3 * David Mosberger-Tang <davidm@hpl.hp.com>
4 * Stephane Eranian <eranian@hpl.hp.com>
5 * Copyright (C) 2003 Intel Co
6 * Suresh Siddha <suresh.b.siddha@intel.com>
7 * Fenghua Yu <fenghua.yu@intel.com>
8 * Arun Sharma <arun.sharma@intel.com>
9 *
10 * 12/07/98 S. Eranian added pt_regs & switch_stack
11 * 12/21/98 D. Mosberger updated to match latest code
12 * 6/17/99 D. Mosberger added second unat member to "struct switch_stack"
13 *
14 */
15#ifndef _UAPI_ASM_IA64_PTRACE_H
16#define _UAPI_ASM_IA64_PTRACE_H
17
18/*
19 * When a user process is blocked, its state looks as follows:
20 *
21 * +----------------------+ ------- IA64_STK_OFFSET
22 * | | ^
23 * | struct pt_regs | |
24 * | | |
25 * +----------------------+ |
26 * | | |
27 * | memory stack | |
28 * | (growing downwards) | |
29 * //.....................// |
30 * |
31 * //.....................// |
32 * | | |
33 * +----------------------+ |
34 * | struct switch_stack | |
35 * | | |
36 * +----------------------+ |
37 * | | |
38 * //.....................// |
39 * |
40 * //.....................// |
41 * | | |
42 * | register stack | |
43 * | (growing upwards) | |
44 * | | |
45 * +----------------------+ | --- IA64_RBS_OFFSET
46 * | struct thread_info | | ^
47 * +----------------------+ | |
48 * | | | |
49 * | struct task_struct | | |
50 * current -> | | | |
51 * +----------------------+ -------
52 *
53 * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
54 * This is because ar.ec is saved as part of ar.pfs.
55 */
56
57
58#include <asm/fpu.h>
59
60
61#ifndef __ASSEMBLY__
62
63/*
64 * This struct defines the way the registers are saved on system
65 * calls.
66 *
67 * We don't save all floating point register because the kernel
68 * is compiled to use only a very small subset, so the other are
69 * untouched.
70 *
71 * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
72 * (because the memory stack pointer MUST ALWAYS be aligned this way)
73 *
74 */
75struct pt_regs {
76 /* The following registers are saved by SAVE_MIN: */
77 unsigned long b6; /* scratch */
78 unsigned long b7; /* scratch */
79
80 unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
81 unsigned long ar_ssd; /* reserved for future use (scratch) */
82
83 unsigned long r8; /* scratch (return value register 0) */
84 unsigned long r9; /* scratch (return value register 1) */
85 unsigned long r10; /* scratch (return value register 2) */
86 unsigned long r11; /* scratch (return value register 3) */
87
88 unsigned long cr_ipsr; /* interrupted task's psr */
89 unsigned long cr_iip; /* interrupted task's instruction pointer */
90 /*
91 * interrupted task's function state; if bit 63 is cleared, it
92 * contains syscall's ar.pfs.pfm:
93 */
94 unsigned long cr_ifs;
95
96 unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
97 unsigned long ar_pfs; /* prev function state */
98 unsigned long ar_rsc; /* RSE configuration */
99 /* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
100 unsigned long ar_rnat; /* RSE NaT */
101 unsigned long ar_bspstore; /* RSE bspstore */
102
103 unsigned long pr; /* 64 predicate registers (1 bit each) */
104 unsigned long b0; /* return pointer (bp) */
105 unsigned long loadrs; /* size of dirty partition << 16 */
106
107 unsigned long r1; /* the gp pointer */
108 unsigned long r12; /* interrupted task's memory stack pointer */
109 unsigned long r13; /* thread pointer */
110
111 unsigned long ar_fpsr; /* floating point status (preserved) */
112 unsigned long r15; /* scratch */
113
114 /* The remaining registers are NOT saved for system calls. */
115
116 unsigned long r14; /* scratch */
117 unsigned long r2; /* scratch */
118 unsigned long r3; /* scratch */
119
120 /* The following registers are saved by SAVE_REST: */
121 unsigned long r16; /* scratch */
122 unsigned long r17; /* scratch */
123 unsigned long r18; /* scratch */
124 unsigned long r19; /* scratch */
125 unsigned long r20; /* scratch */
126 unsigned long r21; /* scratch */
127 unsigned long r22; /* scratch */
128 unsigned long r23; /* scratch */
129 unsigned long r24; /* scratch */
130 unsigned long r25; /* scratch */
131 unsigned long r26; /* scratch */
132 unsigned long r27; /* scratch */
133 unsigned long r28; /* scratch */
134 unsigned long r29; /* scratch */
135 unsigned long r30; /* scratch */
136 unsigned long r31; /* scratch */
137
138 unsigned long ar_ccv; /* compare/exchange value (scratch) */
139
140 /*
141 * Floating point registers that the kernel considers scratch:
142 */
143 struct ia64_fpreg f6; /* scratch */
144 struct ia64_fpreg f7; /* scratch */
145 struct ia64_fpreg f8; /* scratch */
146 struct ia64_fpreg f9; /* scratch */
147 struct ia64_fpreg f10; /* scratch */
148 struct ia64_fpreg f11; /* scratch */
149};
150
151/*
152 * This structure contains the addition registers that need to
153 * preserved across a context switch. This generally consists of
154 * "preserved" registers.
155 */
156struct switch_stack {
157 unsigned long caller_unat; /* user NaT collection register (preserved) */
158 unsigned long ar_fpsr; /* floating-point status register */
159
160 struct ia64_fpreg f2; /* preserved */
161 struct ia64_fpreg f3; /* preserved */
162 struct ia64_fpreg f4; /* preserved */
163 struct ia64_fpreg f5; /* preserved */
164
165 struct ia64_fpreg f12; /* scratch, but untouched by kernel */
166 struct ia64_fpreg f13; /* scratch, but untouched by kernel */
167 struct ia64_fpreg f14; /* scratch, but untouched by kernel */
168 struct ia64_fpreg f15; /* scratch, but untouched by kernel */
169 struct ia64_fpreg f16; /* preserved */
170 struct ia64_fpreg f17; /* preserved */
171 struct ia64_fpreg f18; /* preserved */
172 struct ia64_fpreg f19; /* preserved */
173 struct ia64_fpreg f20; /* preserved */
174 struct ia64_fpreg f21; /* preserved */
175 struct ia64_fpreg f22; /* preserved */
176 struct ia64_fpreg f23; /* preserved */
177 struct ia64_fpreg f24; /* preserved */
178 struct ia64_fpreg f25; /* preserved */
179 struct ia64_fpreg f26; /* preserved */
180 struct ia64_fpreg f27; /* preserved */
181 struct ia64_fpreg f28; /* preserved */
182 struct ia64_fpreg f29; /* preserved */
183 struct ia64_fpreg f30; /* preserved */
184 struct ia64_fpreg f31; /* preserved */
185
186 unsigned long r4; /* preserved */
187 unsigned long r5; /* preserved */
188 unsigned long r6; /* preserved */
189 unsigned long r7; /* preserved */
190
191 unsigned long b0; /* so we can force a direct return in copy_thread */
192 unsigned long b1;
193 unsigned long b2;
194 unsigned long b3;
195 unsigned long b4;
196 unsigned long b5;
197
198 unsigned long ar_pfs; /* previous function state */
199 unsigned long ar_lc; /* loop counter (preserved) */
200 unsigned long ar_unat; /* NaT bits for r4-r7 */
201 unsigned long ar_rnat; /* RSE NaT collection register */
202 unsigned long ar_bspstore; /* RSE dirty base (preserved) */
203 unsigned long pr; /* 64 predicate registers (1 bit each) */
204};
205
206
207/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
208struct pt_all_user_regs {
209 unsigned long nat;
210 unsigned long cr_iip;
211 unsigned long cfm;
212 unsigned long cr_ipsr;
213 unsigned long pr;
214
215 unsigned long gr[32];
216 unsigned long br[8];
217 unsigned long ar[128];
218 struct ia64_fpreg fr[128];
219};
220
221#endif /* !__ASSEMBLY__ */
222
223/* indices to application-registers array in pt_all_user_regs */
224#define PT_AUR_RSC 16
225#define PT_AUR_BSP 17
226#define PT_AUR_BSPSTORE 18
227#define PT_AUR_RNAT 19
228#define PT_AUR_CCV 32
229#define PT_AUR_UNAT 36
230#define PT_AUR_FPSR 40
231#define PT_AUR_PFS 64
232#define PT_AUR_LC 65
233#define PT_AUR_EC 66
234
235/*
236 * The numbers chosen here are somewhat arbitrary but absolutely MUST
237 * not overlap with any of the number assigned in <linux/ptrace.h>.
238 */
239#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
240#define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>) */
241#define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>) */
242#define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */
243#define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */
244
245#define PTRACE_OLDSETOPTIONS 21
246
247#endif /* _UAPI_ASM_IA64_PTRACE_H */
diff --git a/arch/ia64/include/uapi/asm/ptrace_offsets.h b/arch/ia64/include/uapi/asm/ptrace_offsets.h
new file mode 100644
index 000000000000..b712773c759e
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ptrace_offsets.h
@@ -0,0 +1,268 @@
1#ifndef _ASM_IA64_PTRACE_OFFSETS_H
2#define _ASM_IA64_PTRACE_OFFSETS_H
3
4/*
5 * Copyright (C) 1999, 2003 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
8/*
9 * The "uarea" that can be accessed via PEEKUSER and POKEUSER is a
10 * virtual structure that would have the following definition:
11 *
12 * struct uarea {
13 * struct ia64_fpreg fph[96]; // f32-f127
14 * unsigned long nat_bits;
15 * unsigned long empty1;
16 * struct ia64_fpreg f2; // f2-f5
17 * :
18 * struct ia64_fpreg f5;
19 * struct ia64_fpreg f10; // f10-f31
20 * :
21 * struct ia64_fpreg f31;
22 * unsigned long r4; // r4-r7
23 * :
24 * unsigned long r7;
25 * unsigned long b1; // b1-b5
26 * :
27 * unsigned long b5;
28 * unsigned long ar_ec;
29 * unsigned long ar_lc;
30 * unsigned long empty2[5];
31 * unsigned long cr_ipsr;
32 * unsigned long cr_iip;
33 * unsigned long cfm;
34 * unsigned long ar_unat;
35 * unsigned long ar_pfs;
36 * unsigned long ar_rsc;
37 * unsigned long ar_rnat;
38 * unsigned long ar_bspstore;
39 * unsigned long pr;
40 * unsigned long b6;
41 * unsigned long ar_bsp;
42 * unsigned long r1;
43 * unsigned long r2;
44 * unsigned long r3;
45 * unsigned long r12;
46 * unsigned long r13;
47 * unsigned long r14;
48 * unsigned long r15;
49 * unsigned long r8;
50 * unsigned long r9;
51 * unsigned long r10;
52 * unsigned long r11;
53 * unsigned long r16;
54 * :
55 * unsigned long r31;
56 * unsigned long ar_ccv;
57 * unsigned long ar_fpsr;
58 * unsigned long b0;
59 * unsigned long b7;
60 * unsigned long f6;
61 * unsigned long f7;
62 * unsigned long f8;
63 * unsigned long f9;
64 * unsigned long ar_csd;
65 * unsigned long ar_ssd;
66 * unsigned long rsvd1[710];
67 * unsigned long dbr[8];
68 * unsigned long rsvd2[504];
69 * unsigned long ibr[8];
70 * unsigned long rsvd3[504];
71 * unsigned long pmd[4];
72 * }
73 */
74
75/* fph: */
76#define PT_F32 0x0000
77#define PT_F33 0x0010
78#define PT_F34 0x0020
79#define PT_F35 0x0030
80#define PT_F36 0x0040
81#define PT_F37 0x0050
82#define PT_F38 0x0060
83#define PT_F39 0x0070
84#define PT_F40 0x0080
85#define PT_F41 0x0090
86#define PT_F42 0x00a0
87#define PT_F43 0x00b0
88#define PT_F44 0x00c0
89#define PT_F45 0x00d0
90#define PT_F46 0x00e0
91#define PT_F47 0x00f0
92#define PT_F48 0x0100
93#define PT_F49 0x0110
94#define PT_F50 0x0120
95#define PT_F51 0x0130
96#define PT_F52 0x0140
97#define PT_F53 0x0150
98#define PT_F54 0x0160
99#define PT_F55 0x0170
100#define PT_F56 0x0180
101#define PT_F57 0x0190
102#define PT_F58 0x01a0
103#define PT_F59 0x01b0
104#define PT_F60 0x01c0
105#define PT_F61 0x01d0
106#define PT_F62 0x01e0
107#define PT_F63 0x01f0
108#define PT_F64 0x0200
109#define PT_F65 0x0210
110#define PT_F66 0x0220
111#define PT_F67 0x0230
112#define PT_F68 0x0240
113#define PT_F69 0x0250
114#define PT_F70 0x0260
115#define PT_F71 0x0270
116#define PT_F72 0x0280
117#define PT_F73 0x0290
118#define PT_F74 0x02a0
119#define PT_F75 0x02b0
120#define PT_F76 0x02c0
121#define PT_F77 0x02d0
122#define PT_F78 0x02e0
123#define PT_F79 0x02f0
124#define PT_F80 0x0300
125#define PT_F81 0x0310
126#define PT_F82 0x0320
127#define PT_F83 0x0330
128#define PT_F84 0x0340
129#define PT_F85 0x0350
130#define PT_F86 0x0360
131#define PT_F87 0x0370
132#define PT_F88 0x0380
133#define PT_F89 0x0390
134#define PT_F90 0x03a0
135#define PT_F91 0x03b0
136#define PT_F92 0x03c0
137#define PT_F93 0x03d0
138#define PT_F94 0x03e0
139#define PT_F95 0x03f0
140#define PT_F96 0x0400
141#define PT_F97 0x0410
142#define PT_F98 0x0420
143#define PT_F99 0x0430
144#define PT_F100 0x0440
145#define PT_F101 0x0450
146#define PT_F102 0x0460
147#define PT_F103 0x0470
148#define PT_F104 0x0480
149#define PT_F105 0x0490
150#define PT_F106 0x04a0
151#define PT_F107 0x04b0
152#define PT_F108 0x04c0
153#define PT_F109 0x04d0
154#define PT_F110 0x04e0
155#define PT_F111 0x04f0
156#define PT_F112 0x0500
157#define PT_F113 0x0510
158#define PT_F114 0x0520
159#define PT_F115 0x0530
160#define PT_F116 0x0540
161#define PT_F117 0x0550
162#define PT_F118 0x0560
163#define PT_F119 0x0570
164#define PT_F120 0x0580
165#define PT_F121 0x0590
166#define PT_F122 0x05a0
167#define PT_F123 0x05b0
168#define PT_F124 0x05c0
169#define PT_F125 0x05d0
170#define PT_F126 0x05e0
171#define PT_F127 0x05f0
172
173#define PT_NAT_BITS 0x0600
174
175#define PT_F2 0x0610
176#define PT_F3 0x0620
177#define PT_F4 0x0630
178#define PT_F5 0x0640
179#define PT_F10 0x0650
180#define PT_F11 0x0660
181#define PT_F12 0x0670
182#define PT_F13 0x0680
183#define PT_F14 0x0690
184#define PT_F15 0x06a0
185#define PT_F16 0x06b0
186#define PT_F17 0x06c0
187#define PT_F18 0x06d0
188#define PT_F19 0x06e0
189#define PT_F20 0x06f0
190#define PT_F21 0x0700
191#define PT_F22 0x0710
192#define PT_F23 0x0720
193#define PT_F24 0x0730
194#define PT_F25 0x0740
195#define PT_F26 0x0750
196#define PT_F27 0x0760
197#define PT_F28 0x0770
198#define PT_F29 0x0780
199#define PT_F30 0x0790
200#define PT_F31 0x07a0
201#define PT_R4 0x07b0
202#define PT_R5 0x07b8
203#define PT_R6 0x07c0
204#define PT_R7 0x07c8
205
206#define PT_B1 0x07d8
207#define PT_B2 0x07e0
208#define PT_B3 0x07e8
209#define PT_B4 0x07f0
210#define PT_B5 0x07f8
211
212#define PT_AR_EC 0x0800
213#define PT_AR_LC 0x0808
214
215#define PT_CR_IPSR 0x0830
216#define PT_CR_IIP 0x0838
217#define PT_CFM 0x0840
218#define PT_AR_UNAT 0x0848
219#define PT_AR_PFS 0x0850
220#define PT_AR_RSC 0x0858
221#define PT_AR_RNAT 0x0860
222#define PT_AR_BSPSTORE 0x0868
223#define PT_PR 0x0870
224#define PT_B6 0x0878
225#define PT_AR_BSP 0x0880 /* note: this points to the *end* of the backing store! */
226#define PT_R1 0x0888
227#define PT_R2 0x0890
228#define PT_R3 0x0898
229#define PT_R12 0x08a0
230#define PT_R13 0x08a8
231#define PT_R14 0x08b0
232#define PT_R15 0x08b8
233#define PT_R8 0x08c0
234#define PT_R9 0x08c8
235#define PT_R10 0x08d0
236#define PT_R11 0x08d8
237#define PT_R16 0x08e0
238#define PT_R17 0x08e8
239#define PT_R18 0x08f0
240#define PT_R19 0x08f8
241#define PT_R20 0x0900
242#define PT_R21 0x0908
243#define PT_R22 0x0910
244#define PT_R23 0x0918
245#define PT_R24 0x0920
246#define PT_R25 0x0928
247#define PT_R26 0x0930
248#define PT_R27 0x0938
249#define PT_R28 0x0940
250#define PT_R29 0x0948
251#define PT_R30 0x0950
252#define PT_R31 0x0958
253#define PT_AR_CCV 0x0960
254#define PT_AR_FPSR 0x0968
255#define PT_B0 0x0970
256#define PT_B7 0x0978
257#define PT_F6 0x0980
258#define PT_F7 0x0990
259#define PT_F8 0x09a0
260#define PT_F9 0x09b0
261#define PT_AR_CSD 0x09c0
262#define PT_AR_SSD 0x09c8
263
264#define PT_DBR 0x2000 /* data breakpoint registers */
265#define PT_IBR 0x3000 /* instruction breakpoint registers */
266#define PT_PMD 0x4000 /* performance monitoring counters */
267
268#endif /* _ASM_IA64_PTRACE_OFFSETS_H */
diff --git a/arch/ia64/include/uapi/asm/resource.h b/arch/ia64/include/uapi/asm/resource.h
new file mode 100644
index 000000000000..ba2272a87fc7
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/resource.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_IA64_RESOURCE_H
2#define _ASM_IA64_RESOURCE_H
3
4#include <asm/ustack.h>
5#include <asm-generic/resource.h>
6
7#endif /* _ASM_IA64_RESOURCE_H */
diff --git a/arch/ia64/include/uapi/asm/rse.h b/arch/ia64/include/uapi/asm/rse.h
new file mode 100644
index 000000000000..02830a3b0196
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/rse.h
@@ -0,0 +1,66 @@
1#ifndef _ASM_IA64_RSE_H
2#define _ASM_IA64_RSE_H
3
4/*
5 * Copyright (C) 1998, 1999 Hewlett-Packard Co
6 * Copyright (C) 1998, 1999 David Mosberger-Tang <davidm@hpl.hp.com>
7 *
8 * Register stack engine related helper functions. This file may be
9 * used in applications, so be careful about the name-space and give
10 * some consideration to non-GNU C compilers (though __inline__ is
11 * fine).
12 */
13
14static __inline__ unsigned long
15ia64_rse_slot_num (unsigned long *addr)
16{
17 return (((unsigned long) addr) >> 3) & 0x3f;
18}
19
20/*
21 * Return TRUE if ADDR is the address of an RNAT slot.
22 */
23static __inline__ unsigned long
24ia64_rse_is_rnat_slot (unsigned long *addr)
25{
26 return ia64_rse_slot_num(addr) == 0x3f;
27}
28
29/*
30 * Returns the address of the RNAT slot that covers the slot at
31 * address SLOT_ADDR.
32 */
33static __inline__ unsigned long *
34ia64_rse_rnat_addr (unsigned long *slot_addr)
35{
36 return (unsigned long *) ((unsigned long) slot_addr | (0x3f << 3));
37}
38
39/*
40 * Calculate the number of registers in the dirty partition starting at BSPSTORE and
41 * ending at BSP. This isn't simply (BSP-BSPSTORE)/8 because every 64th slot stores
42 * ar.rnat.
43 */
44static __inline__ unsigned long
45ia64_rse_num_regs (unsigned long *bspstore, unsigned long *bsp)
46{
47 unsigned long slots = (bsp - bspstore);
48
49 return slots - (ia64_rse_slot_num(bspstore) + slots)/0x40;
50}
51
52/*
53 * The inverse of the above: given bspstore and the number of
54 * registers, calculate ar.bsp.
55 */
56static __inline__ unsigned long *
57ia64_rse_skip_regs (unsigned long *addr, long num_regs)
58{
59 long delta = ia64_rse_slot_num(addr) + num_regs;
60
61 if (num_regs < 0)
62 delta -= 0x3e;
63 return addr + num_regs + delta/0x3f;
64}
65
66#endif /* _ASM_IA64_RSE_H */
diff --git a/arch/ia64/include/uapi/asm/sembuf.h b/arch/ia64/include/uapi/asm/sembuf.h
new file mode 100644
index 000000000000..1340fbc04d3e
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/sembuf.h
@@ -0,0 +1,22 @@
1#ifndef _ASM_IA64_SEMBUF_H
2#define _ASM_IA64_SEMBUF_H
3
4/*
5 * The semid64_ds structure for IA-64 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 2 miscellaneous 64-bit values
11 */
12
13struct semid64_ds {
14 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
15 __kernel_time_t sem_otime; /* last semop time */
16 __kernel_time_t sem_ctime; /* last change time */
17 unsigned long sem_nsems; /* no. of semaphores in array */
18 unsigned long __unused1;
19 unsigned long __unused2;
20};
21
22#endif /* _ASM_IA64_SEMBUF_H */
diff --git a/arch/ia64/include/uapi/asm/setup.h b/arch/ia64/include/uapi/asm/setup.h
new file mode 100644
index 000000000000..8d56458310b3
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/setup.h
@@ -0,0 +1,24 @@
1#ifndef __IA64_SETUP_H
2#define __IA64_SETUP_H
3
4#define COMMAND_LINE_SIZE 2048
5
6extern struct ia64_boot_param {
7 __u64 command_line; /* physical address of command line arguments */
8 __u64 efi_systab; /* physical address of EFI system table */
9 __u64 efi_memmap; /* physical address of EFI memory map */
10 __u64 efi_memmap_size; /* size of EFI memory map */
11 __u64 efi_memdesc_size; /* size of an EFI memory map descriptor */
12 __u32 efi_memdesc_version; /* memory descriptor version */
13 struct {
14 __u16 num_cols; /* number of columns on console output device */
15 __u16 num_rows; /* number of rows on console output device */
16 __u16 orig_x; /* cursor's x position */
17 __u16 orig_y; /* cursor's y position */
18 } console_info;
19 __u64 fpswa; /* physical address of the fpswa interface */
20 __u64 initrd_start;
21 __u64 initrd_size;
22} *ia64_boot_param;
23
24#endif
diff --git a/arch/ia64/include/uapi/asm/shmbuf.h b/arch/ia64/include/uapi/asm/shmbuf.h
new file mode 100644
index 000000000000..585002a77acd
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/shmbuf.h
@@ -0,0 +1,38 @@
1#ifndef _ASM_IA64_SHMBUF_H
2#define _ASM_IA64_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for IA-64 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 2 miscellaneous 64-bit values
11 */
12
13struct shmid64_ds {
14 struct ipc64_perm shm_perm; /* operation perms */
15 size_t shm_segsz; /* size of segment (bytes) */
16 __kernel_time_t shm_atime; /* last attach time */
17 __kernel_time_t shm_dtime; /* last detach time */
18 __kernel_time_t shm_ctime; /* last change time */
19 __kernel_pid_t shm_cpid; /* pid of creator */
20 __kernel_pid_t shm_lpid; /* pid of last operator */
21 unsigned long shm_nattch; /* no. of current attaches */
22 unsigned long __unused1;
23 unsigned long __unused2;
24};
25
26struct shminfo64 {
27 unsigned long shmmax;
28 unsigned long shmmin;
29 unsigned long shmmni;
30 unsigned long shmseg;
31 unsigned long shmall;
32 unsigned long __unused1;
33 unsigned long __unused2;
34 unsigned long __unused3;
35 unsigned long __unused4;
36};
37
38#endif /* _ASM_IA64_SHMBUF_H */
diff --git a/arch/ia64/include/uapi/asm/sigcontext.h b/arch/ia64/include/uapi/asm/sigcontext.h
new file mode 100644
index 000000000000..57ff777bcc40
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/sigcontext.h
@@ -0,0 +1,70 @@
1#ifndef _ASM_IA64_SIGCONTEXT_H
2#define _ASM_IA64_SIGCONTEXT_H
3
4/*
5 * Copyright (C) 1998, 1999, 2001 Hewlett-Packard Co
6 * Copyright (C) 1998, 1999, 2001 David Mosberger-Tang <davidm@hpl.hp.com>
7 */
8
9#include <asm/fpu.h>
10
11#define IA64_SC_FLAG_ONSTACK_BIT 0 /* is handler running on signal stack? */
12#define IA64_SC_FLAG_IN_SYSCALL_BIT 1 /* did signal interrupt a syscall? */
13#define IA64_SC_FLAG_FPH_VALID_BIT 2 /* is state in f[32]-f[127] valid? */
14
15#define IA64_SC_FLAG_ONSTACK (1 << IA64_SC_FLAG_ONSTACK_BIT)
16#define IA64_SC_FLAG_IN_SYSCALL (1 << IA64_SC_FLAG_IN_SYSCALL_BIT)
17#define IA64_SC_FLAG_FPH_VALID (1 << IA64_SC_FLAG_FPH_VALID_BIT)
18
19# ifndef __ASSEMBLY__
20
21/*
22 * Note on handling of register backing store: sc_ar_bsp contains the address that would
23 * be found in ar.bsp after executing a "cover" instruction the context in which the
24 * signal was raised. If signal delivery required switching to an alternate signal stack
25 * (sc_rbs_base is not NULL), the "dirty" partition (as it would exist after executing the
26 * imaginary "cover" instruction) is backed by the *alternate* signal stack, not the
27 * original one. In this case, sc_rbs_base contains the base address of the new register
28 * backing store. The number of registers in the dirty partition can be calculated as:
29 *
30 * ndirty = ia64_rse_num_regs(sc_rbs_base, sc_rbs_base + (sc_loadrs >> 16))
31 *
32 */
33
34struct sigcontext {
35 unsigned long sc_flags; /* see manifest constants above */
36 unsigned long sc_nat; /* bit i == 1 iff scratch reg gr[i] is a NaT */
37 stack_t sc_stack; /* previously active stack */
38
39 unsigned long sc_ip; /* instruction pointer */
40 unsigned long sc_cfm; /* current frame marker */
41 unsigned long sc_um; /* user mask bits */
42 unsigned long sc_ar_rsc; /* register stack configuration register */
43 unsigned long sc_ar_bsp; /* backing store pointer */
44 unsigned long sc_ar_rnat; /* RSE NaT collection register */
45 unsigned long sc_ar_ccv; /* compare and exchange compare value register */
46 unsigned long sc_ar_unat; /* ar.unat of interrupted context */
47 unsigned long sc_ar_fpsr; /* floating-point status register */
48 unsigned long sc_ar_pfs; /* previous function state */
49 unsigned long sc_ar_lc; /* loop count register */
50 unsigned long sc_pr; /* predicate registers */
51 unsigned long sc_br[8]; /* branch registers */
52 /* Note: sc_gr[0] is used as the "uc_link" member of ucontext_t */
53 unsigned long sc_gr[32]; /* general registers (static partition) */
54 struct ia64_fpreg sc_fr[128]; /* floating-point registers */
55
56 unsigned long sc_rbs_base; /* NULL or new base of sighandler's rbs */
57 unsigned long sc_loadrs; /* see description above */
58
59 unsigned long sc_ar25; /* cmp8xchg16 uses this */
60 unsigned long sc_ar26; /* rsvd for scratch use */
61 unsigned long sc_rsvd[12]; /* reserved for future use */
62 /*
63 * The mask must come last so we can increase _NSIG_WORDS
64 * without breaking binary compatibility.
65 */
66 sigset_t sc_mask; /* signal mask to restore after handler returns */
67};
68
69# endif /* __ASSEMBLY__ */
70#endif /* _ASM_IA64_SIGCONTEXT_H */
diff --git a/arch/ia64/include/uapi/asm/siginfo.h b/arch/ia64/include/uapi/asm/siginfo.h
new file mode 100644
index 000000000000..4ea6225196bb
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/siginfo.h
@@ -0,0 +1,121 @@
1/*
2 * Based on <asm-i386/siginfo.h>.
3 *
4 * Modified 1998-2002
5 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
6 */
7#ifndef _UAPI_ASM_IA64_SIGINFO_H
8#define _UAPI_ASM_IA64_SIGINFO_H
9
10
11#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
12
13#define HAVE_ARCH_SIGINFO_T
14#define HAVE_ARCH_COPY_SIGINFO
15#define HAVE_ARCH_COPY_SIGINFO_TO_USER
16
17#include <asm-generic/siginfo.h>
18
19typedef struct siginfo {
20 int si_signo;
21 int si_errno;
22 int si_code;
23 int __pad0;
24
25 union {
26 int _pad[SI_PAD_SIZE];
27
28 /* kill() */
29 struct {
30 pid_t _pid; /* sender's pid */
31 uid_t _uid; /* sender's uid */
32 } _kill;
33
34 /* POSIX.1b timers */
35 struct {
36 timer_t _tid; /* timer id */
37 int _overrun; /* overrun count */
38 char _pad[sizeof(__ARCH_SI_UID_T) - sizeof(int)];
39 sigval_t _sigval; /* must overlay ._rt._sigval! */
40 int _sys_private; /* not to be passed to user */
41 } _timer;
42
43 /* POSIX.1b signals */
44 struct {
45 pid_t _pid; /* sender's pid */
46 uid_t _uid; /* sender's uid */
47 sigval_t _sigval;
48 } _rt;
49
50 /* SIGCHLD */
51 struct {
52 pid_t _pid; /* which child */
53 uid_t _uid; /* sender's uid */
54 int _status; /* exit code */
55 clock_t _utime;
56 clock_t _stime;
57 } _sigchld;
58
59 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
60 struct {
61 void __user *_addr; /* faulting insn/memory ref. */
62 int _imm; /* immediate value for "break" */
63 unsigned int _flags; /* see below */
64 unsigned long _isr; /* isr */
65 short _addr_lsb; /* lsb of faulting address */
66 } _sigfault;
67
68 /* SIGPOLL */
69 struct {
70 long _band; /* POLL_IN, POLL_OUT, POLL_MSG (XPG requires a "long") */
71 int _fd;
72 } _sigpoll;
73 } _sifields;
74} siginfo_t;
75
76#define si_imm _sifields._sigfault._imm /* as per UNIX SysV ABI spec */
77#define si_flags _sifields._sigfault._flags
78/*
79 * si_isr is valid for SIGILL, SIGFPE, SIGSEGV, SIGBUS, and SIGTRAP provided that
80 * si_code is non-zero and __ISR_VALID is set in si_flags.
81 */
82#define si_isr _sifields._sigfault._isr
83
84/*
85 * Flag values for si_flags:
86 */
87#define __ISR_VALID_BIT 0
88#define __ISR_VALID (1 << __ISR_VALID_BIT)
89
90/*
91 * SIGILL si_codes
92 */
93#define ILL_BADIADDR (__SI_FAULT|9) /* unimplemented instruction address */
94#define __ILL_BREAK (__SI_FAULT|10) /* illegal break */
95#define __ILL_BNDMOD (__SI_FAULT|11) /* bundle-update (modification) in progress */
96#undef NSIGILL
97#define NSIGILL 11
98
99/*
100 * SIGFPE si_codes
101 */
102#define __FPE_DECOVF (__SI_FAULT|9) /* decimal overflow */
103#define __FPE_DECDIV (__SI_FAULT|10) /* decimal division by zero */
104#define __FPE_DECERR (__SI_FAULT|11) /* packed decimal error */
105#define __FPE_INVASC (__SI_FAULT|12) /* invalid ASCII digit */
106#define __FPE_INVDEC (__SI_FAULT|13) /* invalid decimal digit */
107#undef NSIGFPE
108#define NSIGFPE 13
109
110/*
111 * SIGSEGV si_codes
112 */
113#define __SEGV_PSTKOVF (__SI_FAULT|3) /* paragraph stack overflow */
114#undef NSIGSEGV
115#define NSIGSEGV 3
116
117#undef NSIGTRAP
118#define NSIGTRAP 4
119
120
121#endif /* _UAPI_ASM_IA64_SIGINFO_H */
diff --git a/arch/ia64/include/uapi/asm/signal.h b/arch/ia64/include/uapi/asm/signal.h
new file mode 100644
index 000000000000..e531c424434c
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/signal.h
@@ -0,0 +1,127 @@
1/*
2 * Modified 1998-2001, 2003
3 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
4 *
5 * Unfortunately, this file is being included by bits/signal.h in
6 * glibc-2.x. Hence the #ifdef __KERNEL__ ugliness.
7 */
8#ifndef _UAPI_ASM_IA64_SIGNAL_H
9#define _UAPI_ASM_IA64_SIGNAL_H
10
11
12#define SIGHUP 1
13#define SIGINT 2
14#define SIGQUIT 3
15#define SIGILL 4
16#define SIGTRAP 5
17#define SIGABRT 6
18#define SIGIOT 6
19#define SIGBUS 7
20#define SIGFPE 8
21#define SIGKILL 9
22#define SIGUSR1 10
23#define SIGSEGV 11
24#define SIGUSR2 12
25#define SIGPIPE 13
26#define SIGALRM 14
27#define SIGTERM 15
28#define SIGSTKFLT 16
29#define SIGCHLD 17
30#define SIGCONT 18
31#define SIGSTOP 19
32#define SIGTSTP 20
33#define SIGTTIN 21
34#define SIGTTOU 22
35#define SIGURG 23
36#define SIGXCPU 24
37#define SIGXFSZ 25
38#define SIGVTALRM 26
39#define SIGPROF 27
40#define SIGWINCH 28
41#define SIGIO 29
42#define SIGPOLL SIGIO
43/*
44#define SIGLOST 29
45*/
46#define SIGPWR 30
47#define SIGSYS 31
48/* signal 31 is no longer "unused", but the SIGUNUSED macro remains for backwards compatibility */
49#define SIGUNUSED 31
50
51/* These should not be considered constants from userland. */
52#define SIGRTMIN 32
53#define SIGRTMAX _NSIG
54
55/*
56 * SA_FLAGS values:
57 *
58 * SA_ONSTACK indicates that a registered stack_t will be used.
59 * SA_RESTART flag to get restarting signals (which were the default long ago)
60 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
61 * SA_RESETHAND clears the handler when the signal is delivered.
62 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
63 * SA_NODEFER prevents the current signal from being masked in the handler.
64 *
65 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
66 * Unix names RESETHAND and NODEFER respectively.
67 */
68#define SA_NOCLDSTOP 0x00000001
69#define SA_NOCLDWAIT 0x00000002
70#define SA_SIGINFO 0x00000004
71#define SA_ONSTACK 0x08000000
72#define SA_RESTART 0x10000000
73#define SA_NODEFER 0x40000000
74#define SA_RESETHAND 0x80000000
75
76#define SA_NOMASK SA_NODEFER
77#define SA_ONESHOT SA_RESETHAND
78
79#define SA_RESTORER 0x04000000
80
81/*
82 * sigaltstack controls
83 */
84#define SS_ONSTACK 1
85#define SS_DISABLE 2
86
87/*
88 * The minimum stack size needs to be fairly large because we want to
89 * be sure that an app compiled for today's CPUs will continue to run
90 * on all future CPU models. The CPU model matters because the signal
91 * frame needs to have space for the complete machine state, including
92 * all physical stacked registers. The number of physical stacked
93 * registers is CPU model dependent, but given that the width of
94 * ar.rsc.loadrs is 14 bits, we can assume that they'll never take up
95 * more than 16KB of space.
96 */
97#if 1
98 /*
99 * This is a stupid typo: the value was _meant_ to be 131072 (0x20000), but I typed it
100 * in wrong. ;-( To preserve backwards compatibility, we leave the kernel at the
101 * incorrect value and fix libc only.
102 */
103# define MINSIGSTKSZ 131027 /* min. stack size for sigaltstack() */
104#else
105# define MINSIGSTKSZ 131072 /* min. stack size for sigaltstack() */
106#endif
107#define SIGSTKSZ 262144 /* default stack size for sigaltstack() */
108
109
110#include <asm-generic/signal-defs.h>
111
112# ifndef __ASSEMBLY__
113
114# include <linux/types.h>
115
116/* Avoid too many header ordering problems. */
117struct siginfo;
118
119typedef struct sigaltstack {
120 void __user *ss_sp;
121 int ss_flags;
122 size_t ss_size;
123} stack_t;
124
125
126# endif /* !__ASSEMBLY__ */
127#endif /* _UAPI_ASM_IA64_SIGNAL_H */
diff --git a/arch/ia64/include/uapi/asm/socket.h b/arch/ia64/include/uapi/asm/socket.h
new file mode 100644
index 000000000000..41fc28a4a18a
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/socket.h
@@ -0,0 +1,81 @@
1#ifndef _ASM_IA64_SOCKET_H
2#define _ASM_IA64_SOCKET_H
3
4/*
5 * Socket related defines.
6 *
7 * Based on <asm-i386/socket.h>.
8 *
9 * Modified 1998-2000
10 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
11 */
12
13#include <asm/sockios.h>
14
15/* For setsockopt(2) */
16#define SOL_SOCKET 1
17
18#define SO_DEBUG 1
19#define SO_REUSEADDR 2
20#define SO_TYPE 3
21#define SO_ERROR 4
22#define SO_DONTROUTE 5
23#define SO_BROADCAST 6
24#define SO_SNDBUF 7
25#define SO_RCVBUF 8
26#define SO_SNDBUFFORCE 32
27#define SO_RCVBUFFORCE 33
28#define SO_KEEPALIVE 9
29#define SO_OOBINLINE 10
30#define SO_NO_CHECK 11
31#define SO_PRIORITY 12
32#define SO_LINGER 13
33#define SO_BSDCOMPAT 14
34/* To add :#define SO_REUSEPORT 15 */
35#define SO_PASSCRED 16
36#define SO_PEERCRED 17
37#define SO_RCVLOWAT 18
38#define SO_SNDLOWAT 19
39#define SO_RCVTIMEO 20
40#define SO_SNDTIMEO 21
41
42/* Security levels - as per NRL IPv6 - don't actually do anything */
43#define SO_SECURITY_AUTHENTICATION 22
44#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
45#define SO_SECURITY_ENCRYPTION_NETWORK 24
46
47#define SO_BINDTODEVICE 25
48
49/* Socket filtering */
50#define SO_ATTACH_FILTER 26
51#define SO_DETACH_FILTER 27
52
53#define SO_PEERNAME 28
54#define SO_TIMESTAMP 29
55#define SCM_TIMESTAMP SO_TIMESTAMP
56
57#define SO_ACCEPTCONN 30
58
59#define SO_PEERSEC 31
60#define SO_PASSSEC 34
61#define SO_TIMESTAMPNS 35
62#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
63
64#define SO_MARK 36
65
66#define SO_TIMESTAMPING 37
67#define SCM_TIMESTAMPING SO_TIMESTAMPING
68
69#define SO_PROTOCOL 38
70#define SO_DOMAIN 39
71
72#define SO_RXQ_OVFL 40
73
74#define SO_WIFI_STATUS 41
75#define SCM_WIFI_STATUS SO_WIFI_STATUS
76#define SO_PEEK_OFF 42
77
78/* Instruct lower device to use last 4-bytes of skb data as FCS */
79#define SO_NOFCS 43
80
81#endif /* _ASM_IA64_SOCKET_H */
diff --git a/arch/ia64/include/uapi/asm/sockios.h b/arch/ia64/include/uapi/asm/sockios.h
new file mode 100644
index 000000000000..15c92468ad38
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/sockios.h
@@ -0,0 +1,20 @@
1#ifndef _ASM_IA64_SOCKIOS_H
2#define _ASM_IA64_SOCKIOS_H
3
4/*
5 * Socket-level I/O control calls.
6 *
7 * Based on <asm-i386/sockios.h>.
8 *
9 * Modified 1998, 1999
10 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
11 */
12#define FIOSETOWN 0x8901
13#define SIOCSPGRP 0x8902
14#define FIOGETOWN 0x8903
15#define SIOCGPGRP 0x8904
16#define SIOCATMARK 0x8905
17#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
18#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
19
20#endif /* _ASM_IA64_SOCKIOS_H */
diff --git a/arch/ia64/include/uapi/asm/stat.h b/arch/ia64/include/uapi/asm/stat.h
new file mode 100644
index 000000000000..367bb90cdffa
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/stat.h
@@ -0,0 +1,51 @@
1#ifndef _ASM_IA64_STAT_H
2#define _ASM_IA64_STAT_H
3
4/*
5 * Modified 1998, 1999
6 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
7 */
8
9struct stat {
10 unsigned long st_dev;
11 unsigned long st_ino;
12 unsigned long st_nlink;
13 unsigned int st_mode;
14 unsigned int st_uid;
15 unsigned int st_gid;
16 unsigned int __pad0;
17 unsigned long st_rdev;
18 unsigned long st_size;
19 unsigned long st_atime;
20 unsigned long st_atime_nsec;
21 unsigned long st_mtime;
22 unsigned long st_mtime_nsec;
23 unsigned long st_ctime;
24 unsigned long st_ctime_nsec;
25 unsigned long st_blksize;
26 long st_blocks;
27 unsigned long __unused[3];
28};
29
30#define STAT_HAVE_NSEC 1
31
32struct ia64_oldstat {
33 unsigned int st_dev;
34 unsigned int st_ino;
35 unsigned int st_mode;
36 unsigned int st_nlink;
37 unsigned int st_uid;
38 unsigned int st_gid;
39 unsigned int st_rdev;
40 unsigned int __pad1;
41 unsigned long st_size;
42 unsigned long st_atime;
43 unsigned long st_mtime;
44 unsigned long st_ctime;
45 unsigned int st_blksize;
46 int st_blocks;
47 unsigned int __unused1;
48 unsigned int __unused2;
49};
50
51#endif /* _ASM_IA64_STAT_H */
diff --git a/arch/ia64/include/uapi/asm/statfs.h b/arch/ia64/include/uapi/asm/statfs.h
new file mode 100644
index 000000000000..1e589669de56
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/statfs.h
@@ -0,0 +1,20 @@
1#ifndef _ASM_IA64_STATFS_H
2#define _ASM_IA64_STATFS_H
3
4/*
5 * Based on <asm-i386/statfs.h>.
6 *
7 * Modified 1998, 1999, 2003
8 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
9 */
10
11/*
12 * We need compat_statfs64 to be packed, because the i386 ABI won't
13 * add padding at the end to bring it to a multiple of 8 bytes, but
14 * the IA64 ABI will.
15 */
16#define ARCH_PACK_COMPAT_STATFS64 __attribute__((packed,aligned(4)))
17
18#include <asm-generic/statfs.h>
19
20#endif /* _ASM_IA64_STATFS_H */
diff --git a/arch/ia64/include/uapi/asm/swab.h b/arch/ia64/include/uapi/asm/swab.h
new file mode 100644
index 000000000000..c89a8cb5d8a5
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/swab.h
@@ -0,0 +1,34 @@
1#ifndef _ASM_IA64_SWAB_H
2#define _ASM_IA64_SWAB_H
3
4/*
5 * Modified 1998, 1999
6 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co.
7 */
8
9#include <linux/types.h>
10#include <asm/intrinsics.h>
11#include <linux/compiler.h>
12
13static __inline__ __attribute_const__ __u64 __arch_swab64(__u64 x)
14{
15 __u64 result;
16
17 result = ia64_mux1(x, ia64_mux1_rev);
18 return result;
19}
20#define __arch_swab64 __arch_swab64
21
22static __inline__ __attribute_const__ __u32 __arch_swab32(__u32 x)
23{
24 return __arch_swab64(x) >> 32;
25}
26#define __arch_swab32 __arch_swab32
27
28static __inline__ __attribute_const__ __u16 __arch_swab16(__u16 x)
29{
30 return __arch_swab64(x) >> 48;
31}
32#define __arch_swab16 __arch_swab16
33
34#endif /* _ASM_IA64_SWAB_H */
diff --git a/arch/ia64/include/uapi/asm/termbits.h b/arch/ia64/include/uapi/asm/termbits.h
new file mode 100644
index 000000000000..c009b94e58d9
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/termbits.h
@@ -0,0 +1,208 @@
1#ifndef _ASM_IA64_TERMBITS_H
2#define _ASM_IA64_TERMBITS_H
3
4/*
5 * Based on <asm-i386/termbits.h>.
6 *
7 * Modified 1999
8 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
9 *
10 * 99/01/28 Added new baudrates
11 */
12
13#include <linux/posix_types.h>
14
15typedef unsigned char cc_t;
16typedef unsigned int speed_t;
17typedef unsigned int tcflag_t;
18
19#define NCCS 19
20struct termios {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27};
28
29struct termios2 {
30 tcflag_t c_iflag; /* input mode flags */
31 tcflag_t c_oflag; /* output mode flags */
32 tcflag_t c_cflag; /* control mode flags */
33 tcflag_t c_lflag; /* local mode flags */
34 cc_t c_line; /* line discipline */
35 cc_t c_cc[NCCS]; /* control characters */
36 speed_t c_ispeed; /* input speed */
37 speed_t c_ospeed; /* output speed */
38};
39
40struct ktermios {
41 tcflag_t c_iflag; /* input mode flags */
42 tcflag_t c_oflag; /* output mode flags */
43 tcflag_t c_cflag; /* control mode flags */
44 tcflag_t c_lflag; /* local mode flags */
45 cc_t c_line; /* line discipline */
46 cc_t c_cc[NCCS]; /* control characters */
47 speed_t c_ispeed; /* input speed */
48 speed_t c_ospeed; /* output speed */
49};
50
51/* c_cc characters */
52#define VINTR 0
53#define VQUIT 1
54#define VERASE 2
55#define VKILL 3
56#define VEOF 4
57#define VTIME 5
58#define VMIN 6
59#define VSWTC 7
60#define VSTART 8
61#define VSTOP 9
62#define VSUSP 10
63#define VEOL 11
64#define VREPRINT 12
65#define VDISCARD 13
66#define VWERASE 14
67#define VLNEXT 15
68#define VEOL2 16
69
70/* c_iflag bits */
71#define IGNBRK 0000001
72#define BRKINT 0000002
73#define IGNPAR 0000004
74#define PARMRK 0000010
75#define INPCK 0000020
76#define ISTRIP 0000040
77#define INLCR 0000100
78#define IGNCR 0000200
79#define ICRNL 0000400
80#define IUCLC 0001000
81#define IXON 0002000
82#define IXANY 0004000
83#define IXOFF 0010000
84#define IMAXBEL 0020000
85#define IUTF8 0040000
86
87/* c_oflag bits */
88#define OPOST 0000001
89#define OLCUC 0000002
90#define ONLCR 0000004
91#define OCRNL 0000010
92#define ONOCR 0000020
93#define ONLRET 0000040
94#define OFILL 0000100
95#define OFDEL 0000200
96#define NLDLY 0000400
97#define NL0 0000000
98#define NL1 0000400
99#define CRDLY 0003000
100#define CR0 0000000
101#define CR1 0001000
102#define CR2 0002000
103#define CR3 0003000
104#define TABDLY 0014000
105#define TAB0 0000000
106#define TAB1 0004000
107#define TAB2 0010000
108#define TAB3 0014000
109#define XTABS 0014000
110#define BSDLY 0020000
111#define BS0 0000000
112#define BS1 0020000
113#define VTDLY 0040000
114#define VT0 0000000
115#define VT1 0040000
116#define FFDLY 0100000
117#define FF0 0000000
118#define FF1 0100000
119
120/* c_cflag bit meaning */
121#define CBAUD 0010017
122#define B0 0000000 /* hang up */
123#define B50 0000001
124#define B75 0000002
125#define B110 0000003
126#define B134 0000004
127#define B150 0000005
128#define B200 0000006
129#define B300 0000007
130#define B600 0000010
131#define B1200 0000011
132#define B1800 0000012
133#define B2400 0000013
134#define B4800 0000014
135#define B9600 0000015
136#define B19200 0000016
137#define B38400 0000017
138#define EXTA B19200
139#define EXTB B38400
140#define CSIZE 0000060
141#define CS5 0000000
142#define CS6 0000020
143#define CS7 0000040
144#define CS8 0000060
145#define CSTOPB 0000100
146#define CREAD 0000200
147#define PARENB 0000400
148#define PARODD 0001000
149#define HUPCL 0002000
150#define CLOCAL 0004000
151#define CBAUDEX 0010000
152#define BOTHER 0010000
153#define B57600 0010001
154#define B115200 0010002
155#define B230400 0010003
156#define B460800 0010004
157#define B500000 0010005
158#define B576000 0010006
159#define B921600 0010007
160#define B1000000 0010010
161#define B1152000 0010011
162#define B1500000 0010012
163#define B2000000 0010013
164#define B2500000 0010014
165#define B3000000 0010015
166#define B3500000 0010016
167#define B4000000 0010017
168#define CIBAUD 002003600000 /* input baud rate */
169#define CMSPAR 010000000000 /* mark or space (stick) parity */
170#define CRTSCTS 020000000000 /* flow control */
171
172#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
173
174/* c_lflag bits */
175#define ISIG 0000001
176#define ICANON 0000002
177#define XCASE 0000004
178#define ECHO 0000010
179#define ECHOE 0000020
180#define ECHOK 0000040
181#define ECHONL 0000100
182#define NOFLSH 0000200
183#define TOSTOP 0000400
184#define ECHOCTL 0001000
185#define ECHOPRT 0002000
186#define ECHOKE 0004000
187#define FLUSHO 0010000
188#define PENDIN 0040000
189#define IEXTEN 0100000
190#define EXTPROC 0200000
191
192/* tcflow() and TCXONC use these */
193#define TCOOFF 0
194#define TCOON 1
195#define TCIOFF 2
196#define TCION 3
197
198/* tcflush() and TCFLSH use these */
199#define TCIFLUSH 0
200#define TCOFLUSH 1
201#define TCIOFLUSH 2
202
203/* tcsetattr uses these */
204#define TCSANOW 0
205#define TCSADRAIN 1
206#define TCSAFLUSH 2
207
208#endif /* _ASM_IA64_TERMBITS_H */
diff --git a/arch/ia64/include/uapi/asm/termios.h b/arch/ia64/include/uapi/asm/termios.h
new file mode 100644
index 000000000000..d59b48c307f8
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/termios.h
@@ -0,0 +1,50 @@
1/*
2 * Modified 1999
3 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
4 *
5 * 99/01/28 Added N_IRDA and N_SMSBLOCK
6 */
7#ifndef _UAPI_ASM_IA64_TERMIOS_H
8#define _UAPI_ASM_IA64_TERMIOS_H
9
10
11#include <asm/termbits.h>
12#include <asm/ioctls.h>
13
14struct winsize {
15 unsigned short ws_row;
16 unsigned short ws_col;
17 unsigned short ws_xpixel;
18 unsigned short ws_ypixel;
19};
20
21#define NCC 8
22struct termio {
23 unsigned short c_iflag; /* input mode flags */
24 unsigned short c_oflag; /* output mode flags */
25 unsigned short c_cflag; /* control mode flags */
26 unsigned short c_lflag; /* local mode flags */
27 unsigned char c_line; /* line discipline */
28 unsigned char c_cc[NCC]; /* control characters */
29};
30
31/* modem lines */
32#define TIOCM_LE 0x001
33#define TIOCM_DTR 0x002
34#define TIOCM_RTS 0x004
35#define TIOCM_ST 0x008
36#define TIOCM_SR 0x010
37#define TIOCM_CTS 0x020
38#define TIOCM_CAR 0x040
39#define TIOCM_RNG 0x080
40#define TIOCM_DSR 0x100
41#define TIOCM_CD TIOCM_CAR
42#define TIOCM_RI TIOCM_RNG
43#define TIOCM_OUT1 0x2000
44#define TIOCM_OUT2 0x4000
45#define TIOCM_LOOP 0x8000
46
47/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
48
49
50#endif /* _UAPI_ASM_IA64_TERMIOS_H */
diff --git a/arch/ia64/include/uapi/asm/types.h b/arch/ia64/include/uapi/asm/types.h
new file mode 100644
index 000000000000..321193b05eed
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/types.h
@@ -0,0 +1,31 @@
1/*
2 * This file is never included by application software unless explicitly
3 * requested (e.g., via linux/types.h) in which case the application is
4 * Linux specific so (user-) name space pollution is not a major issue.
5 * However, for interoperability, libraries still need to be careful to
6 * avoid naming clashes.
7 *
8 * Based on <asm-alpha/types.h>.
9 *
10 * Modified 1998-2000, 2002
11 * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
12 */
13#ifndef _UAPI_ASM_IA64_TYPES_H
14#define _UAPI_ASM_IA64_TYPES_H
15
16
17#ifndef __KERNEL__
18#include <asm-generic/int-l64.h>
19#endif
20
21#ifdef __ASSEMBLY__
22# define __IA64_UL(x) (x)
23# define __IA64_UL_CONST(x) x
24
25#else
26# define __IA64_UL(x) ((unsigned long)(x))
27# define __IA64_UL_CONST(x) x##UL
28
29#endif /* !__ASSEMBLY__ */
30
31#endif /* _UAPI_ASM_IA64_TYPES_H */
diff --git a/arch/ia64/include/uapi/asm/ucontext.h b/arch/ia64/include/uapi/asm/ucontext.h
new file mode 100644
index 000000000000..bf573dc8ca6a
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ucontext.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_IA64_UCONTEXT_H
2#define _ASM_IA64_UCONTEXT_H
3
4struct ucontext {
5 struct sigcontext uc_mcontext;
6};
7
8#define uc_link uc_mcontext.sc_gr[0] /* wrong type; nobody cares */
9#define uc_sigmask uc_mcontext.sc_sigmask
10#define uc_stack uc_mcontext.sc_stack
11
12#endif /* _ASM_IA64_UCONTEXT_H */
diff --git a/arch/ia64/include/uapi/asm/unistd.h b/arch/ia64/include/uapi/asm/unistd.h
new file mode 100644
index 000000000000..b706aa54df20
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/unistd.h
@@ -0,0 +1,328 @@
1/*
2 * IA-64 Linux syscall numbers and inline-functions.
3 *
4 * Copyright (C) 1998-2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 */
7#ifndef _UAPI_ASM_IA64_UNISTD_H
8#define _UAPI_ASM_IA64_UNISTD_H
9
10
11#include <asm/break.h>
12
13#define __BREAK_SYSCALL __IA64_BREAK_SYSCALL
14
15#define __NR_ni_syscall 1024
16#define __NR_exit 1025
17#define __NR_read 1026
18#define __NR_write 1027
19#define __NR_open 1028
20#define __NR_close 1029
21#define __NR_creat 1030
22#define __NR_link 1031
23#define __NR_unlink 1032
24#define __NR_execve 1033
25#define __NR_chdir 1034
26#define __NR_fchdir 1035
27#define __NR_utimes 1036
28#define __NR_mknod 1037
29#define __NR_chmod 1038
30#define __NR_chown 1039
31#define __NR_lseek 1040
32#define __NR_getpid 1041
33#define __NR_getppid 1042
34#define __NR_mount 1043
35#define __NR_umount 1044
36#define __NR_setuid 1045
37#define __NR_getuid 1046
38#define __NR_geteuid 1047
39#define __NR_ptrace 1048
40#define __NR_access 1049
41#define __NR_sync 1050
42#define __NR_fsync 1051
43#define __NR_fdatasync 1052
44#define __NR_kill 1053
45#define __NR_rename 1054
46#define __NR_mkdir 1055
47#define __NR_rmdir 1056
48#define __NR_dup 1057
49#define __NR_pipe 1058
50#define __NR_times 1059
51#define __NR_brk 1060
52#define __NR_setgid 1061
53#define __NR_getgid 1062
54#define __NR_getegid 1063
55#define __NR_acct 1064
56#define __NR_ioctl 1065
57#define __NR_fcntl 1066
58#define __NR_umask 1067
59#define __NR_chroot 1068
60#define __NR_ustat 1069
61#define __NR_dup2 1070
62#define __NR_setreuid 1071
63#define __NR_setregid 1072
64#define __NR_getresuid 1073
65#define __NR_setresuid 1074
66#define __NR_getresgid 1075
67#define __NR_setresgid 1076
68#define __NR_getgroups 1077
69#define __NR_setgroups 1078
70#define __NR_getpgid 1079
71#define __NR_setpgid 1080
72#define __NR_setsid 1081
73#define __NR_getsid 1082
74#define __NR_sethostname 1083
75#define __NR_setrlimit 1084
76#define __NR_getrlimit 1085
77#define __NR_getrusage 1086
78#define __NR_gettimeofday 1087
79#define __NR_settimeofday 1088
80#define __NR_select 1089
81#define __NR_poll 1090
82#define __NR_symlink 1091
83#define __NR_readlink 1092
84#define __NR_uselib 1093
85#define __NR_swapon 1094
86#define __NR_swapoff 1095
87#define __NR_reboot 1096
88#define __NR_truncate 1097
89#define __NR_ftruncate 1098
90#define __NR_fchmod 1099
91#define __NR_fchown 1100
92#define __NR_getpriority 1101
93#define __NR_setpriority 1102
94#define __NR_statfs 1103
95#define __NR_fstatfs 1104
96#define __NR_gettid 1105
97#define __NR_semget 1106
98#define __NR_semop 1107
99#define __NR_semctl 1108
100#define __NR_msgget 1109
101#define __NR_msgsnd 1110
102#define __NR_msgrcv 1111
103#define __NR_msgctl 1112
104#define __NR_shmget 1113
105#define __NR_shmat 1114
106#define __NR_shmdt 1115
107#define __NR_shmctl 1116
108/* also known as klogctl() in GNU libc: */
109#define __NR_syslog 1117
110#define __NR_setitimer 1118
111#define __NR_getitimer 1119
112/* 1120 was __NR_old_stat */
113/* 1121 was __NR_old_lstat */
114/* 1122 was __NR_old_fstat */
115#define __NR_vhangup 1123
116#define __NR_lchown 1124
117#define __NR_remap_file_pages 1125
118#define __NR_wait4 1126
119#define __NR_sysinfo 1127
120#define __NR_clone 1128
121#define __NR_setdomainname 1129
122#define __NR_uname 1130
123#define __NR_adjtimex 1131
124/* 1132 was __NR_create_module */
125#define __NR_init_module 1133
126#define __NR_delete_module 1134
127/* 1135 was __NR_get_kernel_syms */
128/* 1136 was __NR_query_module */
129#define __NR_quotactl 1137
130#define __NR_bdflush 1138
131#define __NR_sysfs 1139
132#define __NR_personality 1140
133#define __NR_afs_syscall 1141
134#define __NR_setfsuid 1142
135#define __NR_setfsgid 1143
136#define __NR_getdents 1144
137#define __NR_flock 1145
138#define __NR_readv 1146
139#define __NR_writev 1147
140#define __NR_pread64 1148
141#define __NR_pwrite64 1149
142#define __NR__sysctl 1150
143#define __NR_mmap 1151
144#define __NR_munmap 1152
145#define __NR_mlock 1153
146#define __NR_mlockall 1154
147#define __NR_mprotect 1155
148#define __NR_mremap 1156
149#define __NR_msync 1157
150#define __NR_munlock 1158
151#define __NR_munlockall 1159
152#define __NR_sched_getparam 1160
153#define __NR_sched_setparam 1161
154#define __NR_sched_getscheduler 1162
155#define __NR_sched_setscheduler 1163
156#define __NR_sched_yield 1164
157#define __NR_sched_get_priority_max 1165
158#define __NR_sched_get_priority_min 1166
159#define __NR_sched_rr_get_interval 1167
160#define __NR_nanosleep 1168
161#define __NR_nfsservctl 1169
162#define __NR_prctl 1170
163/* 1171 is reserved for backwards compatibility with old __NR_getpagesize */
164#define __NR_mmap2 1172
165#define __NR_pciconfig_read 1173
166#define __NR_pciconfig_write 1174
167#define __NR_perfmonctl 1175
168#define __NR_sigaltstack 1176
169#define __NR_rt_sigaction 1177
170#define __NR_rt_sigpending 1178
171#define __NR_rt_sigprocmask 1179
172#define __NR_rt_sigqueueinfo 1180
173#define __NR_rt_sigreturn 1181
174#define __NR_rt_sigsuspend 1182
175#define __NR_rt_sigtimedwait 1183
176#define __NR_getcwd 1184
177#define __NR_capget 1185
178#define __NR_capset 1186
179#define __NR_sendfile 1187
180#define __NR_getpmsg 1188
181#define __NR_putpmsg 1189
182#define __NR_socket 1190
183#define __NR_bind 1191
184#define __NR_connect 1192
185#define __NR_listen 1193
186#define __NR_accept 1194
187#define __NR_getsockname 1195
188#define __NR_getpeername 1196
189#define __NR_socketpair 1197
190#define __NR_send 1198
191#define __NR_sendto 1199
192#define __NR_recv 1200
193#define __NR_recvfrom 1201
194#define __NR_shutdown 1202
195#define __NR_setsockopt 1203
196#define __NR_getsockopt 1204
197#define __NR_sendmsg 1205
198#define __NR_recvmsg 1206
199#define __NR_pivot_root 1207
200#define __NR_mincore 1208
201#define __NR_madvise 1209
202#define __NR_stat 1210
203#define __NR_lstat 1211
204#define __NR_fstat 1212
205#define __NR_clone2 1213
206#define __NR_getdents64 1214
207#define __NR_getunwind 1215
208#define __NR_readahead 1216
209#define __NR_setxattr 1217
210#define __NR_lsetxattr 1218
211#define __NR_fsetxattr 1219
212#define __NR_getxattr 1220
213#define __NR_lgetxattr 1221
214#define __NR_fgetxattr 1222
215#define __NR_listxattr 1223
216#define __NR_llistxattr 1224
217#define __NR_flistxattr 1225
218#define __NR_removexattr 1226
219#define __NR_lremovexattr 1227
220#define __NR_fremovexattr 1228
221#define __NR_tkill 1229
222#define __NR_futex 1230
223#define __NR_sched_setaffinity 1231
224#define __NR_sched_getaffinity 1232
225#define __NR_set_tid_address 1233
226#define __NR_fadvise64 1234
227#define __NR_tgkill 1235
228#define __NR_exit_group 1236
229#define __NR_lookup_dcookie 1237
230#define __NR_io_setup 1238
231#define __NR_io_destroy 1239
232#define __NR_io_getevents 1240
233#define __NR_io_submit 1241
234#define __NR_io_cancel 1242
235#define __NR_epoll_create 1243
236#define __NR_epoll_ctl 1244
237#define __NR_epoll_wait 1245
238#define __NR_restart_syscall 1246
239#define __NR_semtimedop 1247
240#define __NR_timer_create 1248
241#define __NR_timer_settime 1249
242#define __NR_timer_gettime 1250
243#define __NR_timer_getoverrun 1251
244#define __NR_timer_delete 1252
245#define __NR_clock_settime 1253
246#define __NR_clock_gettime 1254
247#define __NR_clock_getres 1255
248#define __NR_clock_nanosleep 1256
249#define __NR_fstatfs64 1257
250#define __NR_statfs64 1258
251#define __NR_mbind 1259
252#define __NR_get_mempolicy 1260
253#define __NR_set_mempolicy 1261
254#define __NR_mq_open 1262
255#define __NR_mq_unlink 1263
256#define __NR_mq_timedsend 1264
257#define __NR_mq_timedreceive 1265
258#define __NR_mq_notify 1266
259#define __NR_mq_getsetattr 1267
260#define __NR_kexec_load 1268
261#define __NR_vserver 1269
262#define __NR_waitid 1270
263#define __NR_add_key 1271
264#define __NR_request_key 1272
265#define __NR_keyctl 1273
266#define __NR_ioprio_set 1274
267#define __NR_ioprio_get 1275
268#define __NR_move_pages 1276
269#define __NR_inotify_init 1277
270#define __NR_inotify_add_watch 1278
271#define __NR_inotify_rm_watch 1279
272#define __NR_migrate_pages 1280
273#define __NR_openat 1281
274#define __NR_mkdirat 1282
275#define __NR_mknodat 1283
276#define __NR_fchownat 1284
277#define __NR_futimesat 1285
278#define __NR_newfstatat 1286
279#define __NR_unlinkat 1287
280#define __NR_renameat 1288
281#define __NR_linkat 1289
282#define __NR_symlinkat 1290
283#define __NR_readlinkat 1291
284#define __NR_fchmodat 1292
285#define __NR_faccessat 1293
286#define __NR_pselect6 1294
287#define __NR_ppoll 1295
288#define __NR_unshare 1296
289#define __NR_splice 1297
290#define __NR_set_robust_list 1298
291#define __NR_get_robust_list 1299
292#define __NR_sync_file_range 1300
293#define __NR_tee 1301
294#define __NR_vmsplice 1302
295#define __NR_fallocate 1303
296#define __NR_getcpu 1304
297#define __NR_epoll_pwait 1305
298#define __NR_utimensat 1306
299#define __NR_signalfd 1307
300#define __NR_timerfd 1308
301#define __NR_eventfd 1309
302#define __NR_timerfd_create 1310
303#define __NR_timerfd_settime 1311
304#define __NR_timerfd_gettime 1312
305#define __NR_signalfd4 1313
306#define __NR_eventfd2 1314
307#define __NR_epoll_create1 1315
308#define __NR_dup3 1316
309#define __NR_pipe2 1317
310#define __NR_inotify_init1 1318
311#define __NR_preadv 1319
312#define __NR_pwritev 1320
313#define __NR_rt_tgsigqueueinfo 1321
314#define __NR_recvmmsg 1322
315#define __NR_fanotify_init 1323
316#define __NR_fanotify_mark 1324
317#define __NR_prlimit64 1325
318#define __NR_name_to_handle_at 1326
319#define __NR_open_by_handle_at 1327
320#define __NR_clock_adjtime 1328
321#define __NR_syncfs 1329
322#define __NR_setns 1330
323#define __NR_sendmmsg 1331
324#define __NR_process_vm_readv 1332
325#define __NR_process_vm_writev 1333
326#define __NR_accept4 1334
327
328#endif /* _UAPI_ASM_IA64_UNISTD_H */
diff --git a/arch/ia64/include/uapi/asm/ustack.h b/arch/ia64/include/uapi/asm/ustack.h
new file mode 100644
index 000000000000..1dfebc622692
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ustack.h
@@ -0,0 +1,12 @@
1#ifndef _UAPI_ASM_IA64_USTACK_H
2#define _UAPI_ASM_IA64_USTACK_H
3
4/*
5 * Constants for the user stack size
6 */
7
8
9/* Make a default stack size of 2GiB */
10#define DEFAULT_USER_STACK_SIZE (1UL << 31)
11
12#endif /* _UAPI_ASM_IA64_USTACK_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-06 11:34:02 -0500