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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/i386/math-emu/errors.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/i386/math-emu/errors.c')
-rw-r--r--arch/i386/math-emu/errors.c739
1 files changed, 739 insertions, 0 deletions
diff --git a/arch/i386/math-emu/errors.c b/arch/i386/math-emu/errors.c
new file mode 100644
index 000000000000..a1b0d22f6978
--- /dev/null
+++ b/arch/i386/math-emu/errors.c
@@ -0,0 +1,739 @@
1/*---------------------------------------------------------------------------+
2 | errors.c |
3 | |
4 | The error handling functions for wm-FPU-emu |
5 | |
6 | Copyright (C) 1992,1993,1994,1996 |
7 | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
8 | E-mail billm@jacobi.maths.monash.edu.au |
9 | |
10 | |
11 +---------------------------------------------------------------------------*/
12
13/*---------------------------------------------------------------------------+
14 | Note: |
15 | The file contains code which accesses user memory. |
16 | Emulator static data may change when user memory is accessed, due to |
17 | other processes using the emulator while swapping is in progress. |
18 +---------------------------------------------------------------------------*/
19
20#include <linux/signal.h>
21
22#include <asm/uaccess.h>
23
24#include "fpu_emu.h"
25#include "fpu_system.h"
26#include "exception.h"
27#include "status_w.h"
28#include "control_w.h"
29#include "reg_constant.h"
30#include "version.h"
31
32/* */
33#undef PRINT_MESSAGES
34/* */
35
36
37#if 0
38void Un_impl(void)
39{
40 u_char byte1, FPU_modrm;
41 unsigned long address = FPU_ORIG_EIP;
42
43 RE_ENTRANT_CHECK_OFF;
44 /* No need to check access_ok(), we have previously fetched these bytes. */
45 printk("Unimplemented FPU Opcode at eip=%p : ", (void __user *) address);
46 if ( FPU_CS == __USER_CS )
47 {
48 while ( 1 )
49 {
50 FPU_get_user(byte1, (u_char __user *) address);
51 if ( (byte1 & 0xf8) == 0xd8 ) break;
52 printk("[%02x]", byte1);
53 address++;
54 }
55 printk("%02x ", byte1);
56 FPU_get_user(FPU_modrm, 1 + (u_char __user *) address);
57
58 if (FPU_modrm >= 0300)
59 printk("%02x (%02x+%d)\n", FPU_modrm, FPU_modrm & 0xf8, FPU_modrm & 7);
60 else
61 printk("/%d\n", (FPU_modrm >> 3) & 7);
62 }
63 else
64 {
65 printk("cs selector = %04x\n", FPU_CS);
66 }
67
68 RE_ENTRANT_CHECK_ON;
69
70 EXCEPTION(EX_Invalid);
71
72}
73#endif /* 0 */
74
75
76/*
77 Called for opcodes which are illegal and which are known to result in a
78 SIGILL with a real 80486.
79 */
80void FPU_illegal(void)
81{
82 math_abort(FPU_info,SIGILL);
83}
84
85
86
87void FPU_printall(void)
88{
89 int i;
90 static const char *tag_desc[] = { "Valid", "Zero", "ERROR", "Empty",
91 "DeNorm", "Inf", "NaN" };
92 u_char byte1, FPU_modrm;
93 unsigned long address = FPU_ORIG_EIP;
94
95 RE_ENTRANT_CHECK_OFF;
96 /* No need to check access_ok(), we have previously fetched these bytes. */
97 printk("At %p:", (void *) address);
98 if ( FPU_CS == __USER_CS )
99 {
100#define MAX_PRINTED_BYTES 20
101 for ( i = 0; i < MAX_PRINTED_BYTES; i++ )
102 {
103 FPU_get_user(byte1, (u_char __user *) address);
104 if ( (byte1 & 0xf8) == 0xd8 )
105 {
106 printk(" %02x", byte1);
107 break;
108 }
109 printk(" [%02x]", byte1);
110 address++;
111 }
112 if ( i == MAX_PRINTED_BYTES )
113 printk(" [more..]\n");
114 else
115 {
116 FPU_get_user(FPU_modrm, 1 + (u_char __user *) address);
117
118 if (FPU_modrm >= 0300)
119 printk(" %02x (%02x+%d)\n", FPU_modrm, FPU_modrm & 0xf8, FPU_modrm & 7);
120 else
121 printk(" /%d, mod=%d rm=%d\n",
122 (FPU_modrm >> 3) & 7, (FPU_modrm >> 6) & 3, FPU_modrm & 7);
123 }
124 }
125 else
126 {
127 printk("%04x\n", FPU_CS);
128 }
129
130 partial_status = status_word();
131
132#ifdef DEBUGGING
133if ( partial_status & SW_Backward ) printk("SW: backward compatibility\n");
134if ( partial_status & SW_C3 ) printk("SW: condition bit 3\n");
135if ( partial_status & SW_C2 ) printk("SW: condition bit 2\n");
136if ( partial_status & SW_C1 ) printk("SW: condition bit 1\n");
137if ( partial_status & SW_C0 ) printk("SW: condition bit 0\n");
138if ( partial_status & SW_Summary ) printk("SW: exception summary\n");
139if ( partial_status & SW_Stack_Fault ) printk("SW: stack fault\n");
140if ( partial_status & SW_Precision ) printk("SW: loss of precision\n");
141if ( partial_status & SW_Underflow ) printk("SW: underflow\n");
142if ( partial_status & SW_Overflow ) printk("SW: overflow\n");
143if ( partial_status & SW_Zero_Div ) printk("SW: divide by zero\n");
144if ( partial_status & SW_Denorm_Op ) printk("SW: denormalized operand\n");
145if ( partial_status & SW_Invalid ) printk("SW: invalid operation\n");
146#endif /* DEBUGGING */
147
148 printk(" SW: b=%d st=%ld es=%d sf=%d cc=%d%d%d%d ef=%d%d%d%d%d%d\n",
149 partial_status & 0x8000 ? 1 : 0, /* busy */
150 (partial_status & 0x3800) >> 11, /* stack top pointer */
151 partial_status & 0x80 ? 1 : 0, /* Error summary status */
152 partial_status & 0x40 ? 1 : 0, /* Stack flag */
153 partial_status & SW_C3?1:0, partial_status & SW_C2?1:0, /* cc */
154 partial_status & SW_C1?1:0, partial_status & SW_C0?1:0, /* cc */
155 partial_status & SW_Precision?1:0, partial_status & SW_Underflow?1:0,
156 partial_status & SW_Overflow?1:0, partial_status & SW_Zero_Div?1:0,
157 partial_status & SW_Denorm_Op?1:0, partial_status & SW_Invalid?1:0);
158
159printk(" CW: ic=%d rc=%ld%ld pc=%ld%ld iem=%d ef=%d%d%d%d%d%d\n",
160 control_word & 0x1000 ? 1 : 0,
161 (control_word & 0x800) >> 11, (control_word & 0x400) >> 10,
162 (control_word & 0x200) >> 9, (control_word & 0x100) >> 8,
163 control_word & 0x80 ? 1 : 0,
164 control_word & SW_Precision?1:0, control_word & SW_Underflow?1:0,
165 control_word & SW_Overflow?1:0, control_word & SW_Zero_Div?1:0,
166 control_word & SW_Denorm_Op?1:0, control_word & SW_Invalid?1:0);
167
168 for ( i = 0; i < 8; i++ )
169 {
170 FPU_REG *r = &st(i);
171 u_char tagi = FPU_gettagi(i);
172 switch (tagi)
173 {
174 case TAG_Empty:
175 continue;
176 break;
177 case TAG_Zero:
178 case TAG_Special:
179 tagi = FPU_Special(r);
180 case TAG_Valid:
181 printk("st(%d) %c .%04lx %04lx %04lx %04lx e%+-6d ", i,
182 getsign(r) ? '-' : '+',
183 (long)(r->sigh >> 16),
184 (long)(r->sigh & 0xFFFF),
185 (long)(r->sigl >> 16),
186 (long)(r->sigl & 0xFFFF),
187 exponent(r) - EXP_BIAS + 1);
188 break;
189 default:
190 printk("Whoops! Error in errors.c: tag%d is %d ", i, tagi);
191 continue;
192 break;
193 }
194 printk("%s\n", tag_desc[(int) (unsigned) tagi]);
195 }
196
197 RE_ENTRANT_CHECK_ON;
198
199}
200
201static struct {
202 int type;
203 const char *name;
204} exception_names[] = {
205 { EX_StackOver, "stack overflow" },
206 { EX_StackUnder, "stack underflow" },
207 { EX_Precision, "loss of precision" },
208 { EX_Underflow, "underflow" },
209 { EX_Overflow, "overflow" },
210 { EX_ZeroDiv, "divide by zero" },
211 { EX_Denormal, "denormalized operand" },
212 { EX_Invalid, "invalid operation" },
213 { EX_INTERNAL, "INTERNAL BUG in "FPU_VERSION },
214 { 0, NULL }
215};
216
217/*
218 EX_INTERNAL is always given with a code which indicates where the
219 error was detected.
220
221 Internal error types:
222 0x14 in fpu_etc.c
223 0x1nn in a *.c file:
224 0x101 in reg_add_sub.c
225 0x102 in reg_mul.c
226 0x104 in poly_atan.c
227 0x105 in reg_mul.c
228 0x107 in fpu_trig.c
229 0x108 in reg_compare.c
230 0x109 in reg_compare.c
231 0x110 in reg_add_sub.c
232 0x111 in fpe_entry.c
233 0x112 in fpu_trig.c
234 0x113 in errors.c
235 0x115 in fpu_trig.c
236 0x116 in fpu_trig.c
237 0x117 in fpu_trig.c
238 0x118 in fpu_trig.c
239 0x119 in fpu_trig.c
240 0x120 in poly_atan.c
241 0x121 in reg_compare.c
242 0x122 in reg_compare.c
243 0x123 in reg_compare.c
244 0x125 in fpu_trig.c
245 0x126 in fpu_entry.c
246 0x127 in poly_2xm1.c
247 0x128 in fpu_entry.c
248 0x129 in fpu_entry.c
249 0x130 in get_address.c
250 0x131 in get_address.c
251 0x132 in get_address.c
252 0x133 in get_address.c
253 0x140 in load_store.c
254 0x141 in load_store.c
255 0x150 in poly_sin.c
256 0x151 in poly_sin.c
257 0x160 in reg_ld_str.c
258 0x161 in reg_ld_str.c
259 0x162 in reg_ld_str.c
260 0x163 in reg_ld_str.c
261 0x164 in reg_ld_str.c
262 0x170 in fpu_tags.c
263 0x171 in fpu_tags.c
264 0x172 in fpu_tags.c
265 0x180 in reg_convert.c
266 0x2nn in an *.S file:
267 0x201 in reg_u_add.S
268 0x202 in reg_u_div.S
269 0x203 in reg_u_div.S
270 0x204 in reg_u_div.S
271 0x205 in reg_u_mul.S
272 0x206 in reg_u_sub.S
273 0x207 in wm_sqrt.S
274 0x208 in reg_div.S
275 0x209 in reg_u_sub.S
276 0x210 in reg_u_sub.S
277 0x211 in reg_u_sub.S
278 0x212 in reg_u_sub.S
279 0x213 in wm_sqrt.S
280 0x214 in wm_sqrt.S
281 0x215 in wm_sqrt.S
282 0x220 in reg_norm.S
283 0x221 in reg_norm.S
284 0x230 in reg_round.S
285 0x231 in reg_round.S
286 0x232 in reg_round.S
287 0x233 in reg_round.S
288 0x234 in reg_round.S
289 0x235 in reg_round.S
290 0x236 in reg_round.S
291 0x240 in div_Xsig.S
292 0x241 in div_Xsig.S
293 0x242 in div_Xsig.S
294 */
295
296asmlinkage void FPU_exception(int n)
297{
298 int i, int_type;
299
300 int_type = 0; /* Needed only to stop compiler warnings */
301 if ( n & EX_INTERNAL )
302 {
303 int_type = n - EX_INTERNAL;
304 n = EX_INTERNAL;
305 /* Set lots of exception bits! */
306 partial_status |= (SW_Exc_Mask | SW_Summary | SW_Backward);
307 }
308 else
309 {
310 /* Extract only the bits which we use to set the status word */
311 n &= (SW_Exc_Mask);
312 /* Set the corresponding exception bit */
313 partial_status |= n;
314 /* Set summary bits iff exception isn't masked */
315 if ( partial_status & ~control_word & CW_Exceptions )
316 partial_status |= (SW_Summary | SW_Backward);
317 if ( n & (SW_Stack_Fault | EX_Precision) )
318 {
319 if ( !(n & SW_C1) )
320 /* This bit distinguishes over- from underflow for a stack fault,
321 and roundup from round-down for precision loss. */
322 partial_status &= ~SW_C1;
323 }
324 }
325
326 RE_ENTRANT_CHECK_OFF;
327 if ( (~control_word & n & CW_Exceptions) || (n == EX_INTERNAL) )
328 {
329#ifdef PRINT_MESSAGES
330 /* My message from the sponsor */
331 printk(FPU_VERSION" "__DATE__" (C) W. Metzenthen.\n");
332#endif /* PRINT_MESSAGES */
333
334 /* Get a name string for error reporting */
335 for (i=0; exception_names[i].type; i++)
336 if ( (exception_names[i].type & n) == exception_names[i].type )
337 break;
338
339 if (exception_names[i].type)
340 {
341#ifdef PRINT_MESSAGES
342 printk("FP Exception: %s!\n", exception_names[i].name);
343#endif /* PRINT_MESSAGES */
344 }
345 else
346 printk("FPU emulator: Unknown Exception: 0x%04x!\n", n);
347
348 if ( n == EX_INTERNAL )
349 {
350 printk("FPU emulator: Internal error type 0x%04x\n", int_type);
351 FPU_printall();
352 }
353#ifdef PRINT_MESSAGES
354 else
355 FPU_printall();
356#endif /* PRINT_MESSAGES */
357
358 /*
359 * The 80486 generates an interrupt on the next non-control FPU
360 * instruction. So we need some means of flagging it.
361 * We use the ES (Error Summary) bit for this.
362 */
363 }
364 RE_ENTRANT_CHECK_ON;
365
366#ifdef __DEBUG__
367 math_abort(FPU_info,SIGFPE);
368#endif /* __DEBUG__ */
369
370}
371
372
373/* Real operation attempted on a NaN. */
374/* Returns < 0 if the exception is unmasked */
375int real_1op_NaN(FPU_REG *a)
376{
377 int signalling, isNaN;
378
379 isNaN = (exponent(a) == EXP_OVER) && (a->sigh & 0x80000000);
380
381 /* The default result for the case of two "equal" NaNs (signs may
382 differ) is chosen to reproduce 80486 behaviour */
383 signalling = isNaN && !(a->sigh & 0x40000000);
384
385 if ( !signalling )
386 {
387 if ( !isNaN ) /* pseudo-NaN, or other unsupported? */
388 {
389 if ( control_word & CW_Invalid )
390 {
391 /* Masked response */
392 reg_copy(&CONST_QNaN, a);
393 }
394 EXCEPTION(EX_Invalid);
395 return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special;
396 }
397 return TAG_Special;
398 }
399
400 if ( control_word & CW_Invalid )
401 {
402 /* The masked response */
403 if ( !(a->sigh & 0x80000000) ) /* pseudo-NaN ? */
404 {
405 reg_copy(&CONST_QNaN, a);
406 }
407 /* ensure a Quiet NaN */
408 a->sigh |= 0x40000000;
409 }
410
411 EXCEPTION(EX_Invalid);
412
413 return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special;
414}
415
416
417/* Real operation attempted on two operands, one a NaN. */
418/* Returns < 0 if the exception is unmasked */
419int real_2op_NaN(FPU_REG const *b, u_char tagb,
420 int deststnr,
421 FPU_REG const *defaultNaN)
422{
423 FPU_REG *dest = &st(deststnr);
424 FPU_REG const *a = dest;
425 u_char taga = FPU_gettagi(deststnr);
426 FPU_REG const *x;
427 int signalling, unsupported;
428
429 if ( taga == TAG_Special )
430 taga = FPU_Special(a);
431 if ( tagb == TAG_Special )
432 tagb = FPU_Special(b);
433
434 /* TW_NaN is also used for unsupported data types. */
435 unsupported = ((taga == TW_NaN)
436 && !((exponent(a) == EXP_OVER) && (a->sigh & 0x80000000)))
437 || ((tagb == TW_NaN)
438 && !((exponent(b) == EXP_OVER) && (b->sigh & 0x80000000)));
439 if ( unsupported )
440 {
441 if ( control_word & CW_Invalid )
442 {
443 /* Masked response */
444 FPU_copy_to_regi(&CONST_QNaN, TAG_Special, deststnr);
445 }
446 EXCEPTION(EX_Invalid);
447 return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special;
448 }
449
450 if (taga == TW_NaN)
451 {
452 x = a;
453 if (tagb == TW_NaN)
454 {
455 signalling = !(a->sigh & b->sigh & 0x40000000);
456 if ( significand(b) > significand(a) )
457 x = b;
458 else if ( significand(b) == significand(a) )
459 {
460 /* The default result for the case of two "equal" NaNs (signs may
461 differ) is chosen to reproduce 80486 behaviour */
462 x = defaultNaN;
463 }
464 }
465 else
466 {
467 /* return the quiet version of the NaN in a */
468 signalling = !(a->sigh & 0x40000000);
469 }
470 }
471 else
472#ifdef PARANOID
473 if (tagb == TW_NaN)
474#endif /* PARANOID */
475 {
476 signalling = !(b->sigh & 0x40000000);
477 x = b;
478 }
479#ifdef PARANOID
480 else
481 {
482 signalling = 0;
483 EXCEPTION(EX_INTERNAL|0x113);
484 x = &CONST_QNaN;
485 }
486#endif /* PARANOID */
487
488 if ( (!signalling) || (control_word & CW_Invalid) )
489 {
490 if ( ! x )
491 x = b;
492
493 if ( !(x->sigh & 0x80000000) ) /* pseudo-NaN ? */
494 x = &CONST_QNaN;
495
496 FPU_copy_to_regi(x, TAG_Special, deststnr);
497
498 if ( !signalling )
499 return TAG_Special;
500
501 /* ensure a Quiet NaN */
502 dest->sigh |= 0x40000000;
503 }
504
505 EXCEPTION(EX_Invalid);
506
507 return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special;
508}
509
510
511/* Invalid arith operation on Valid registers */
512/* Returns < 0 if the exception is unmasked */
513asmlinkage int arith_invalid(int deststnr)
514{
515
516 EXCEPTION(EX_Invalid);
517
518 if ( control_word & CW_Invalid )
519 {
520 /* The masked response */
521 FPU_copy_to_regi(&CONST_QNaN, TAG_Special, deststnr);
522 }
523
524 return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Valid;
525
526}
527
528
529/* Divide a finite number by zero */
530asmlinkage int FPU_divide_by_zero(int deststnr, u_char sign)
531{
532 FPU_REG *dest = &st(deststnr);
533 int tag = TAG_Valid;
534
535 if ( control_word & CW_ZeroDiv )
536 {
537 /* The masked response */
538 FPU_copy_to_regi(&CONST_INF, TAG_Special, deststnr);
539 setsign(dest, sign);
540 tag = TAG_Special;
541 }
542
543 EXCEPTION(EX_ZeroDiv);
544
545 return (!(control_word & CW_ZeroDiv) ? FPU_Exception : 0) | tag;
546
547}
548
549
550/* This may be called often, so keep it lean */
551int set_precision_flag(int flags)
552{
553 if ( control_word & CW_Precision )
554 {
555 partial_status &= ~(SW_C1 & flags);
556 partial_status |= flags; /* The masked response */
557 return 0;
558 }
559 else
560 {
561 EXCEPTION(flags);
562 return 1;
563 }
564}
565
566
567/* This may be called often, so keep it lean */
568asmlinkage void set_precision_flag_up(void)
569{
570 if ( control_word & CW_Precision )
571 partial_status |= (SW_Precision | SW_C1); /* The masked response */
572 else
573 EXCEPTION(EX_Precision | SW_C1);
574}
575
576
577/* This may be called often, so keep it lean */
578asmlinkage void set_precision_flag_down(void)
579{
580 if ( control_word & CW_Precision )
581 { /* The masked response */
582 partial_status &= ~SW_C1;
583 partial_status |= SW_Precision;
584 }
585 else
586 EXCEPTION(EX_Precision);
587}
588
589
590asmlinkage int denormal_operand(void)
591{
592 if ( control_word & CW_Denormal )
593 { /* The masked response */
594 partial_status |= SW_Denorm_Op;
595 return TAG_Special;
596 }
597 else
598 {
599 EXCEPTION(EX_Denormal);
600 return TAG_Special | FPU_Exception;
601 }
602}
603
604
605asmlinkage int arith_overflow(FPU_REG *dest)
606{
607 int tag = TAG_Valid;
608
609 if ( control_word & CW_Overflow )
610 {
611 /* The masked response */
612/* ###### The response here depends upon the rounding mode */
613 reg_copy(&CONST_INF, dest);
614 tag = TAG_Special;
615 }
616 else
617 {
618 /* Subtract the magic number from the exponent */
619 addexponent(dest, (-3 * (1 << 13)));
620 }
621
622 EXCEPTION(EX_Overflow);
623 if ( control_word & CW_Overflow )
624 {
625 /* The overflow exception is masked. */
626 /* By definition, precision is lost.
627 The roundup bit (C1) is also set because we have
628 "rounded" upwards to Infinity. */
629 EXCEPTION(EX_Precision | SW_C1);
630 return tag;
631 }
632
633 return tag;
634
635}
636
637
638asmlinkage int arith_underflow(FPU_REG *dest)
639{
640 int tag = TAG_Valid;
641
642 if ( control_word & CW_Underflow )
643 {
644 /* The masked response */
645 if ( exponent16(dest) <= EXP_UNDER - 63 )
646 {
647 reg_copy(&CONST_Z, dest);
648 partial_status &= ~SW_C1; /* Round down. */
649 tag = TAG_Zero;
650 }
651 else
652 {
653 stdexp(dest);
654 }
655 }
656 else
657 {
658 /* Add the magic number to the exponent. */
659 addexponent(dest, (3 * (1 << 13)) + EXTENDED_Ebias);
660 }
661
662 EXCEPTION(EX_Underflow);
663 if ( control_word & CW_Underflow )
664 {
665 /* The underflow exception is masked. */
666 EXCEPTION(EX_Precision);
667 return tag;
668 }
669
670 return tag;
671
672}
673
674
675void FPU_stack_overflow(void)
676{
677
678 if ( control_word & CW_Invalid )
679 {
680 /* The masked response */
681 top--;
682 FPU_copy_to_reg0(&CONST_QNaN, TAG_Special);
683 }
684
685 EXCEPTION(EX_StackOver);
686
687 return;
688
689}
690
691
692void FPU_stack_underflow(void)
693{
694
695 if ( control_word & CW_Invalid )
696 {
697 /* The masked response */
698 FPU_copy_to_reg0(&CONST_QNaN, TAG_Special);
699 }
700
701 EXCEPTION(EX_StackUnder);
702
703 return;
704
705}
706
707
708void FPU_stack_underflow_i(int i)
709{
710
711 if ( control_word & CW_Invalid )
712 {
713 /* The masked response */
714 FPU_copy_to_regi(&CONST_QNaN, TAG_Special, i);
715 }
716
717 EXCEPTION(EX_StackUnder);
718
719 return;
720
721}
722
723
724void FPU_stack_underflow_pop(int i)
725{
726
727 if ( control_word & CW_Invalid )
728 {
729 /* The masked response */
730 FPU_copy_to_regi(&CONST_QNaN, TAG_Special, i);
731 FPU_pop();
732 }
733
734 EXCEPTION(EX_StackUnder);
735
736 return;
737
738}
739