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authorDavid S. Miller <davem@davemloft.net>2005-09-15 00:47:01 -0400
committerDavid S. Miller <davem@davemloft.net>2005-09-15 00:47:01 -0400
commit4db2ce0199f04b6e99999f22e28ef9a0ae5f0d2f (patch)
tree87a00c97e02a77cdfec517398caa3f1d8f6a2f0d /arch/i386/lib/dec_and_lock.c
parent4a805e863d6b9466baf7084e1d6fdbe6e0628d8e (diff)
[LIB]: Consolidate _atomic_dec_and_lock()
Several implementations were essentialy a common piece of C code using the cmpxchg() macro. Put the implementation in one spot that everyone can share, and convert sparc64 over to using this. Alpha is the lone arch-specific implementation, which codes up a special fast path for the common case in order to avoid GP reloading which a pure C version would require. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/i386/lib/dec_and_lock.c')
-rw-r--r--arch/i386/lib/dec_and_lock.c42
1 files changed, 0 insertions, 42 deletions
diff --git a/arch/i386/lib/dec_and_lock.c b/arch/i386/lib/dec_and_lock.c
deleted file mode 100644
index 8b81b2524fa6..000000000000
--- a/arch/i386/lib/dec_and_lock.c
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * x86 version of "atomic_dec_and_lock()" using
3 * the atomic "cmpxchg" instruction.
4 *
5 * (For CPU's lacking cmpxchg, we use the slow
6 * generic version, and this one never even gets
7 * compiled).
8 */
9
10#include <linux/spinlock.h>
11#include <linux/module.h>
12#include <asm/atomic.h>
13
14int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
15{
16 int counter;
17 int newcount;
18
19repeat:
20 counter = atomic_read(atomic);
21 newcount = counter-1;
22
23 if (!newcount)
24 goto slow_path;
25
26 asm volatile("lock; cmpxchgl %1,%2"
27 :"=a" (newcount)
28 :"r" (newcount), "m" (atomic->counter), "0" (counter));
29
30 /* If the above failed, "eax" will have changed */
31 if (newcount != counter)
32 goto repeat;
33 return 0;
34
35slow_path:
36 spin_lock(lock);
37 if (atomic_dec_and_test(atomic))
38 return 1;
39 spin_unlock(lock);
40 return 0;
41}
42EXPORT_SYMBOL(_atomic_dec_and_lock);