diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-30 18:21:02 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-04-30 18:21:02 -0400 |
commit | 3ed1c478eff8db80e234d5446cb378b503135888 (patch) | |
tree | e1c8e0f488ca49c49b5a31fe59add4254381dd4b /arch/cris | |
parent | 151173e8ce9b95bbbbd7eedb9035cfaffbdb7cb2 (diff) | |
parent | 371deb9500831ad1afbf9ea00e373f650deaed2f (diff) |
Merge tag 'pm+acpi-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management and ACPI updates from Rafael J Wysocki:
- ARM big.LITTLE cpufreq driver from Viresh Kumar.
- exynos5440 cpufreq driver from Amit Daniel Kachhap.
- cpufreq core cleanup and code consolidation from Viresh Kumar and
Stratos Karafotis.
- cpufreq scalability improvement from Nathan Zimmer.
- AMD "frequency sensitivity feedback" powersave bias for the ondemand
cpufreq governor from Jacob Shin.
- cpuidle code consolidation and cleanups from Daniel Lezcano.
- ARM OMAP cpuidle fixes from Santosh Shilimkar and Daniel Lezcano.
- ACPICA fixes and other improvements from Bob Moore, Jung-uk Kim, Lv
Zheng, Yinghai Lu, Tang Chen, Colin Ian King, and Linn Crosetto.
- ACPI core updates related to hotplug from Toshi Kani, Paul Bolle,
Yasuaki Ishimatsu, and Rafael J Wysocki.
- Intel Lynxpoint LPSS (Low-Power Subsystem) support improvements from
Rafael J Wysocki and Andy Shevchenko.
* tag 'pm+acpi-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (192 commits)
cpufreq: Revert incorrect commit 5800043
cpufreq: MAINTAINERS: Add co-maintainer
cpuidle: add maintainer entry
ACPI / thermal: do not always return THERMAL_TREND_RAISING for active trip points
ARM: s3c64xx: cpuidle: use init/exit common routine
cpufreq: pxa2xx: initialize variables
ACPI: video: correct acpi_video_bus_add error processing
SH: cpuidle: use init/exit common routine
ARM: S5pv210: compiling issue, ARM_S5PV210_CPUFREQ needs CONFIG_CPU_FREQ_TABLE=y
ACPI: Fix wrong parameter passed to memblock_reserve
cpuidle: fix comment format
pnp: use %*phC to dump small buffers
isapnp: remove debug leftovers
ARM: imx: cpuidle: use init/exit common routine
ARM: davinci: cpuidle: use init/exit common routine
ARM: kirkwood: cpuidle: use init/exit common routine
ARM: calxeda: cpuidle: use init/exit common routine
ARM: tegra: cpuidle: use init/exit common routine for tegra3
ARM: tegra: cpuidle: use init/exit common routine for tegra2
ARM: OMAP4: cpuidle: use init/exit common routine
...
Diffstat (limited to 'arch/cris')
-rw-r--r-- | arch/cris/arch-v32/mach-a3/Makefile | 1 | ||||
-rw-r--r-- | arch/cris/arch-v32/mach-a3/cpufreq.c | 152 | ||||
-rw-r--r-- | arch/cris/arch-v32/mach-fs/Makefile | 1 | ||||
-rw-r--r-- | arch/cris/arch-v32/mach-fs/cpufreq.c | 145 |
4 files changed, 0 insertions, 299 deletions
diff --git a/arch/cris/arch-v32/mach-a3/Makefile b/arch/cris/arch-v32/mach-a3/Makefile index d366e0891988..18a227196a41 100644 --- a/arch/cris/arch-v32/mach-a3/Makefile +++ b/arch/cris/arch-v32/mach-a3/Makefile | |||
@@ -3,7 +3,6 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := dma.o pinmux.o io.o arbiter.o | 5 | obj-y := dma.o pinmux.o io.o arbiter.o |
6 | obj-$(CONFIG_CPU_FREQ) += cpufreq.o | ||
7 | 6 | ||
8 | clean: | 7 | clean: |
9 | 8 | ||
diff --git a/arch/cris/arch-v32/mach-a3/cpufreq.c b/arch/cris/arch-v32/mach-a3/cpufreq.c deleted file mode 100644 index ee391ecb5bc9..000000000000 --- a/arch/cris/arch-v32/mach-a3/cpufreq.c +++ /dev/null | |||
@@ -1,152 +0,0 @@ | |||
1 | #include <linux/init.h> | ||
2 | #include <linux/module.h> | ||
3 | #include <linux/cpufreq.h> | ||
4 | #include <hwregs/reg_map.h> | ||
5 | #include <hwregs/reg_rdwr.h> | ||
6 | #include <hwregs/clkgen_defs.h> | ||
7 | #include <hwregs/ddr2_defs.h> | ||
8 | |||
9 | static int | ||
10 | cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, | ||
11 | void *data); | ||
12 | |||
13 | static struct notifier_block cris_sdram_freq_notifier_block = { | ||
14 | .notifier_call = cris_sdram_freq_notifier | ||
15 | }; | ||
16 | |||
17 | static struct cpufreq_frequency_table cris_freq_table[] = { | ||
18 | {0x01, 6000}, | ||
19 | {0x02, 200000}, | ||
20 | {0, CPUFREQ_TABLE_END}, | ||
21 | }; | ||
22 | |||
23 | static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu) | ||
24 | { | ||
25 | reg_clkgen_rw_clk_ctrl clk_ctrl; | ||
26 | clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); | ||
27 | return clk_ctrl.pll ? 200000 : 6000; | ||
28 | } | ||
29 | |||
30 | static void cris_freq_set_cpu_state(unsigned int state) | ||
31 | { | ||
32 | int i = 0; | ||
33 | struct cpufreq_freqs freqs; | ||
34 | reg_clkgen_rw_clk_ctrl clk_ctrl; | ||
35 | clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); | ||
36 | |||
37 | #ifdef CONFIG_SMP | ||
38 | for_each_present_cpu(i) | ||
39 | #endif | ||
40 | { | ||
41 | freqs.old = cris_freq_get_cpu_frequency(i); | ||
42 | freqs.new = cris_freq_table[state].frequency; | ||
43 | freqs.cpu = i; | ||
44 | } | ||
45 | |||
46 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
47 | |||
48 | local_irq_disable(); | ||
49 | |||
50 | /* Even though we may be SMP they will share the same clock | ||
51 | * so all settings are made on CPU0. */ | ||
52 | if (cris_freq_table[state].frequency == 200000) | ||
53 | clk_ctrl.pll = 1; | ||
54 | else | ||
55 | clk_ctrl.pll = 0; | ||
56 | REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); | ||
57 | |||
58 | local_irq_enable(); | ||
59 | |||
60 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
61 | }; | ||
62 | |||
63 | static int cris_freq_verify(struct cpufreq_policy *policy) | ||
64 | { | ||
65 | return cpufreq_frequency_table_verify(policy, &cris_freq_table[0]); | ||
66 | } | ||
67 | |||
68 | static int cris_freq_target(struct cpufreq_policy *policy, | ||
69 | unsigned int target_freq, | ||
70 | unsigned int relation) | ||
71 | { | ||
72 | unsigned int newstate = 0; | ||
73 | |||
74 | if (cpufreq_frequency_table_target(policy, cris_freq_table, | ||
75 | target_freq, relation, &newstate)) | ||
76 | return -EINVAL; | ||
77 | |||
78 | cris_freq_set_cpu_state(newstate); | ||
79 | |||
80 | return 0; | ||
81 | } | ||
82 | |||
83 | static int cris_freq_cpu_init(struct cpufreq_policy *policy) | ||
84 | { | ||
85 | int result; | ||
86 | |||
87 | /* cpuinfo and default policy values */ | ||
88 | policy->cpuinfo.transition_latency = 1000000; /* 1ms */ | ||
89 | policy->cur = cris_freq_get_cpu_frequency(0); | ||
90 | |||
91 | result = cpufreq_frequency_table_cpuinfo(policy, cris_freq_table); | ||
92 | if (result) | ||
93 | return (result); | ||
94 | |||
95 | cpufreq_frequency_table_get_attr(cris_freq_table, policy->cpu); | ||
96 | |||
97 | return 0; | ||
98 | } | ||
99 | |||
100 | |||
101 | static int cris_freq_cpu_exit(struct cpufreq_policy *policy) | ||
102 | { | ||
103 | cpufreq_frequency_table_put_attr(policy->cpu); | ||
104 | return 0; | ||
105 | } | ||
106 | |||
107 | |||
108 | static struct freq_attr *cris_freq_attr[] = { | ||
109 | &cpufreq_freq_attr_scaling_available_freqs, | ||
110 | NULL, | ||
111 | }; | ||
112 | |||
113 | static struct cpufreq_driver cris_freq_driver = { | ||
114 | .get = cris_freq_get_cpu_frequency, | ||
115 | .verify = cris_freq_verify, | ||
116 | .target = cris_freq_target, | ||
117 | .init = cris_freq_cpu_init, | ||
118 | .exit = cris_freq_cpu_exit, | ||
119 | .name = "cris_freq", | ||
120 | .owner = THIS_MODULE, | ||
121 | .attr = cris_freq_attr, | ||
122 | }; | ||
123 | |||
124 | static int __init cris_freq_init(void) | ||
125 | { | ||
126 | int ret; | ||
127 | ret = cpufreq_register_driver(&cris_freq_driver); | ||
128 | cpufreq_register_notifier(&cris_sdram_freq_notifier_block, | ||
129 | CPUFREQ_TRANSITION_NOTIFIER); | ||
130 | return ret; | ||
131 | } | ||
132 | |||
133 | static int | ||
134 | cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, | ||
135 | void *data) | ||
136 | { | ||
137 | int i; | ||
138 | struct cpufreq_freqs *freqs = data; | ||
139 | if (val == CPUFREQ_PRECHANGE) { | ||
140 | reg_ddr2_rw_cfg cfg = | ||
141 | REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg); | ||
142 | cfg.ref_interval = (freqs->new == 200000 ? 1560 : 46); | ||
143 | |||
144 | if (freqs->new == 200000) | ||
145 | for (i = 0; i < 50000; i++); | ||
146 | REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing); | ||
147 | } | ||
148 | return 0; | ||
149 | } | ||
150 | |||
151 | |||
152 | module_init(cris_freq_init); | ||
diff --git a/arch/cris/arch-v32/mach-fs/Makefile b/arch/cris/arch-v32/mach-fs/Makefile index d366e0891988..18a227196a41 100644 --- a/arch/cris/arch-v32/mach-fs/Makefile +++ b/arch/cris/arch-v32/mach-fs/Makefile | |||
@@ -3,7 +3,6 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := dma.o pinmux.o io.o arbiter.o | 5 | obj-y := dma.o pinmux.o io.o arbiter.o |
6 | obj-$(CONFIG_CPU_FREQ) += cpufreq.o | ||
7 | 6 | ||
8 | clean: | 7 | clean: |
9 | 8 | ||
diff --git a/arch/cris/arch-v32/mach-fs/cpufreq.c b/arch/cris/arch-v32/mach-fs/cpufreq.c deleted file mode 100644 index d92cf70d1cbe..000000000000 --- a/arch/cris/arch-v32/mach-fs/cpufreq.c +++ /dev/null | |||
@@ -1,145 +0,0 @@ | |||
1 | #include <linux/init.h> | ||
2 | #include <linux/module.h> | ||
3 | #include <linux/cpufreq.h> | ||
4 | #include <hwregs/reg_map.h> | ||
5 | #include <arch/hwregs/reg_rdwr.h> | ||
6 | #include <arch/hwregs/config_defs.h> | ||
7 | #include <arch/hwregs/bif_core_defs.h> | ||
8 | |||
9 | static int | ||
10 | cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, | ||
11 | void *data); | ||
12 | |||
13 | static struct notifier_block cris_sdram_freq_notifier_block = { | ||
14 | .notifier_call = cris_sdram_freq_notifier | ||
15 | }; | ||
16 | |||
17 | static struct cpufreq_frequency_table cris_freq_table[] = { | ||
18 | {0x01, 6000}, | ||
19 | {0x02, 200000}, | ||
20 | {0, CPUFREQ_TABLE_END}, | ||
21 | }; | ||
22 | |||
23 | static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu) | ||
24 | { | ||
25 | reg_config_rw_clk_ctrl clk_ctrl; | ||
26 | clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl); | ||
27 | return clk_ctrl.pll ? 200000 : 6000; | ||
28 | } | ||
29 | |||
30 | static void cris_freq_set_cpu_state(unsigned int state) | ||
31 | { | ||
32 | int i; | ||
33 | struct cpufreq_freqs freqs; | ||
34 | reg_config_rw_clk_ctrl clk_ctrl; | ||
35 | clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl); | ||
36 | |||
37 | for_each_possible_cpu(i) { | ||
38 | freqs.old = cris_freq_get_cpu_frequency(i); | ||
39 | freqs.new = cris_freq_table[state].frequency; | ||
40 | freqs.cpu = i; | ||
41 | } | ||
42 | |||
43 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
44 | |||
45 | local_irq_disable(); | ||
46 | |||
47 | /* Even though we may be SMP they will share the same clock | ||
48 | * so all settings are made on CPU0. */ | ||
49 | if (cris_freq_table[state].frequency == 200000) | ||
50 | clk_ctrl.pll = 1; | ||
51 | else | ||
52 | clk_ctrl.pll = 0; | ||
53 | REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl); | ||
54 | |||
55 | local_irq_enable(); | ||
56 | |||
57 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
58 | }; | ||
59 | |||
60 | static int cris_freq_verify(struct cpufreq_policy *policy) | ||
61 | { | ||
62 | return cpufreq_frequency_table_verify(policy, &cris_freq_table[0]); | ||
63 | } | ||
64 | |||
65 | static int cris_freq_target(struct cpufreq_policy *policy, | ||
66 | unsigned int target_freq, unsigned int relation) | ||
67 | { | ||
68 | unsigned int newstate = 0; | ||
69 | |||
70 | if (cpufreq_frequency_table_target | ||
71 | (policy, cris_freq_table, target_freq, relation, &newstate)) | ||
72 | return -EINVAL; | ||
73 | |||
74 | cris_freq_set_cpu_state(newstate); | ||
75 | |||
76 | return 0; | ||
77 | } | ||
78 | |||
79 | static int cris_freq_cpu_init(struct cpufreq_policy *policy) | ||
80 | { | ||
81 | int result; | ||
82 | |||
83 | /* cpuinfo and default policy values */ | ||
84 | policy->cpuinfo.transition_latency = 1000000; /* 1ms */ | ||
85 | policy->cur = cris_freq_get_cpu_frequency(0); | ||
86 | |||
87 | result = cpufreq_frequency_table_cpuinfo(policy, cris_freq_table); | ||
88 | if (result) | ||
89 | return (result); | ||
90 | |||
91 | cpufreq_frequency_table_get_attr(cris_freq_table, policy->cpu); | ||
92 | |||
93 | return 0; | ||
94 | } | ||
95 | |||
96 | static int cris_freq_cpu_exit(struct cpufreq_policy *policy) | ||
97 | { | ||
98 | cpufreq_frequency_table_put_attr(policy->cpu); | ||
99 | return 0; | ||
100 | } | ||
101 | |||
102 | static struct freq_attr *cris_freq_attr[] = { | ||
103 | &cpufreq_freq_attr_scaling_available_freqs, | ||
104 | NULL, | ||
105 | }; | ||
106 | |||
107 | static struct cpufreq_driver cris_freq_driver = { | ||
108 | .get = cris_freq_get_cpu_frequency, | ||
109 | .verify = cris_freq_verify, | ||
110 | .target = cris_freq_target, | ||
111 | .init = cris_freq_cpu_init, | ||
112 | .exit = cris_freq_cpu_exit, | ||
113 | .name = "cris_freq", | ||
114 | .owner = THIS_MODULE, | ||
115 | .attr = cris_freq_attr, | ||
116 | }; | ||
117 | |||
118 | static int __init cris_freq_init(void) | ||
119 | { | ||
120 | int ret; | ||
121 | ret = cpufreq_register_driver(&cris_freq_driver); | ||
122 | cpufreq_register_notifier(&cris_sdram_freq_notifier_block, | ||
123 | CPUFREQ_TRANSITION_NOTIFIER); | ||
124 | return ret; | ||
125 | } | ||
126 | |||
127 | static int | ||
128 | cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, | ||
129 | void *data) | ||
130 | { | ||
131 | int i; | ||
132 | struct cpufreq_freqs *freqs = data; | ||
133 | if (val == CPUFREQ_PRECHANGE) { | ||
134 | reg_bif_core_rw_sdram_timing timing = | ||
135 | REG_RD(bif_core, regi_bif_core, rw_sdram_timing); | ||
136 | timing.cpd = (freqs->new == 200000 ? 0 : 1); | ||
137 | |||
138 | if (freqs->new == 200000) | ||
139 | for (i = 0; i < 50000; i++) ; | ||
140 | REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing); | ||
141 | } | ||
142 | return 0; | ||
143 | } | ||
144 | |||
145 | module_init(cris_freq_init); | ||