Blackfin arch: update ANOMALY handling

update lists for 533, 537, and add SSYNC workaround into assembly files.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>

5 files changed, 41 insertions, 16 deletions

diff --git a/arch/blackfin/lib/memcmp.S b/arch/blackfin/lib/memcmp.S
index a6b8ee6a6bf2..b88c5d2d1ebe 100644
--- a/arch/blackfin/lib/memcmp.S
+++ b/arch/blackfin/lib/memcmp.S
@@ -61,7 +61,12 @@ ENTRY(_memcmp)
 
         LSETUP (.Lquad_loop_s, .Lquad_loop_e) LC0=P1;
 .Lquad_loop_s:
+#ifdef ANOMALY_05000202
+        R0 = [P0++];
+        R1 = [I0++];
+#else
         MNOP || R0 = [P0++] || R1 = [I0++];
+#endif
         CC = R0 == R1;
         IF !CC JUMP .Lquad_different;
 .Lquad_loop_e:
diff --git a/arch/blackfin/lib/memcpy.S b/arch/blackfin/lib/memcpy.S
index 34b5a91c215c..14a5585bbd02 100644
--- a/arch/blackfin/lib/memcpy.S
+++ b/arch/blackfin/lib/memcpy.S
@@ -94,13 +94,20 @@ ENTRY(_memcpy)
 .Lmore_than_seven:
         /* There's at least eight bytes to copy. */
         P2 += -1;       /* because we unroll one iteration */
-        LSETUP(.Lword_loop, .Lword_loop) LC0=P2;
+        LSETUP(.Lword_loops, .Lword_loope) LC0=P2;
         R0 = R1;
         I1 = P1;
         R3 = [I1++];
-.Lword_loop:
+#ifdef ANOMALY_05000202
+.Lword_loops:
+        [P0++] = R3;
+.Lword_loope:
+        R3 = [I1++];
+#else
+.Lword_loops:
+.Lword_loope:
         MNOP || [P0++] = R3 || R3 = [I1++];
-
+#endif
         [P0++] = R3;
         /* Any remaining bytes to copy? */
         R3 = 0x3;
diff --git a/arch/blackfin/lib/memmove.S b/arch/blackfin/lib/memmove.S
index c371585e9dbd..6ee6e206e77c 100644
--- a/arch/blackfin/lib/memmove.S
+++ b/arch/blackfin/lib/memmove.S
@@ -69,8 +69,17 @@ ENTRY(_memmove)
         P2 = R2;                  /* set remainder */
         R1 = [I0++];
 
-        LSETUP (.Lquad_loop, .Lquad_loop) LC0=P1;
-.Lquad_loop: MNOP || [P0++] = R1 || R1 = [I0++];
+        LSETUP (.Lquad_loops, .Lquad_loope) LC0=P1;
+#ifdef ANOMALY_05000202
+.Lquad_loops:
+        [P0++] = R1;
+.Lquad_loope:
+        R1 = [I0++];
+#else
+.Lquad_loops:
+.Lquad_loope:
+         MNOP || [P0++] = R1 || R1 = [I0++];
+#endif
         [P0++] = R1;
 
         CC = P2 == 0;             /* any remaining bytes? */
@@ -93,6 +102,10 @@ ENTRY(_memmove)
         R1 = B[P3--] (Z);
         CC = P2 == 0;
         IF CC JUMP .Lno_loop;
+#ifdef ANOMALY_05000245
+        NOP;
+        NOP;
+#endif
         LSETUP (.Lol_s, .Lol_e) LC0 = P2;
 .Lol_s:    B[P0--] = R1;
 .Lol_e:    R1 = B[P3--] (Z);
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index 8bd2af1935bd..7063795eb7c0 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -123,14 +123,14 @@ ENTRY(_blackfin_icache_flush_range)
         R2 = R0 & R2;
         P0 = R2;
         P1 = R1;
-        CSYNC;
+        CSYNC(R3);
         IFLUSH [P0];
 1:
         IFLUSH [P0++];
         CC = P0 < P1 (iu);
         IF CC JUMP 1b (bp);
         IFLUSH [P0];
-        SSYNC;
+        SSYNC(R3);
         RTS;
 ENDPROC(_blackfin_icache_flush_range)
 
@@ -148,7 +148,7 @@ ENTRY(_blackfin_icache_dcache_flush_range)
         R2 = R0 & R2;
         P0 = R2;
         P1 = R1;
-        CSYNC;
+        CSYNC(R3);
         IFLUSH [P0];
 1:
         FLUSH [P0];
@@ -157,7 +157,7 @@ ENTRY(_blackfin_icache_dcache_flush_range)
         IF CC JUMP 1b (bp);
         IFLUSH [P0];
         FLUSH [P0];
-        SSYNC;
+        SSYNC(R3);
         RTS;
 ENDPROC(_blackfin_icache_dcache_flush_range)
 
@@ -174,7 +174,7 @@ ENTRY(_blackfin_dcache_invalidate_range)
         R2 = R0 & R2;
         P0 = R2;
         P1 = R1;
-        CSYNC;
+        CSYNC(R3);
         FLUSHINV[P0];
 1:
         FLUSHINV[P0++];
@@ -186,7 +186,7 @@ ENTRY(_blackfin_dcache_invalidate_range)
          * so do one more.
          */
         FLUSHINV[P0];
-        SSYNC;
+        SSYNC(R3);
         RTS;
 ENDPROC(_blackfin_dcache_invalidate_range)
 
@@ -235,7 +235,7 @@ ENTRY(_blackfin_dcache_flush_range)
         R2 = R0 & R2;
         P0 = R2;
         P1 = R1;
-        CSYNC;
+        CSYNC(R3);
         FLUSH[P0];
 1:
         FLUSH[P0++];
@@ -247,17 +247,17 @@ ENTRY(_blackfin_dcache_flush_range)
          * one more.
          */
         FLUSH[P0];
-        SSYNC;
+        SSYNC(R3);
         RTS;
 ENDPROC(_blackfin_dcache_flush_range)
 
 ENTRY(_blackfin_dflush_page)
         P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT);
         P0 = R0;
-        CSYNC;
+        CSYNC(R3);
         FLUSH[P0];
         LSETUP (.Lfl1, .Lfl1) LC0 = P1;
 .Lfl1:  FLUSH [P0++];
-        SSYNC;
+        SSYNC(R3);
         RTS;
 ENDPROC(_blackfin_dflush_page)
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index b69f517a650b..8be548e061bf 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -139,7 +139,7 @@ __common_int_entry:
         fp = 0;
 #endif
 
-#ifdef  ANOMALY_05000283
+#if defined (ANOMALY_05000283) || defined (ANOMALY_05000315)
         cc = r7 == r7;
         p5.h = 0xffc0;
         p5.l = 0x0014;