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authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-18 13:54:27 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-18 13:54:27 -0500
commit4351654e3ddf86a04966163dce4def586303e5cc (patch)
treeeeb683133e78fbe522c80d0895f94ce4ca699a23 /arch/blackfin
parent3d9de1909b339f967f1b37367df233a0dcfc10cf (diff)
parent86794b43569c9b8936dff2e8eed503393379af6e (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin
Pull blackfin update from Bob Liu. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin: blackfin: SEC: clean up SEC interrupt initialization blackfin: kgdb: call generic_exec_single() directly blackfin: anomaly: add anomaly 16000030 for bf5xx Blackfin: dpmc: use module_platform_driver macro Blackfin: remove unused is_in_rom() Blackfin: remove unnecessary prototype for kobjsize() Blackfin: twi: Add missing __iomem annotation Blackfin: Annotate strnlen_user and strlen_user 'src' parameter with __user Blackfin: Annotate clear_user 'to' parameter with __user Blackfin: Add missing __user annotations to put_user Blackfin: Annotate strncpy_from_user src parameter with __user blackfin: Use Kbuild infrastructure for kvm_para.h UAPI: (Scripted) Disintegrate arch/blackfin/include/asm
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/include/asm/Kbuild6
-rw-r--r--arch/blackfin/include/asm/bfin_sport.h128
-rw-r--r--arch/blackfin/include/asm/bfin_twi.h2
-rw-r--r--arch/blackfin/include/asm/fixed_code.h30
-rw-r--r--arch/blackfin/include/asm/kvm_para.h1
-rw-r--r--arch/blackfin/include/asm/pgtable.h2
-rw-r--r--arch/blackfin/include/asm/ptrace.h161
-rw-r--r--arch/blackfin/include/asm/uaccess.h41
-rw-r--r--arch/blackfin/include/asm/unistd.h430
-rw-r--r--arch/blackfin/include/mach-common/irq.h5
-rw-r--r--arch/blackfin/include/uapi/asm/Kbuild16
-rw-r--r--arch/blackfin/include/uapi/asm/bfin_sport.h136
-rw-r--r--arch/blackfin/include/uapi/asm/byteorder.h (renamed from arch/blackfin/include/asm/byteorder.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/cachectl.h (renamed from arch/blackfin/include/asm/cachectl.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/fcntl.h (renamed from arch/blackfin/include/asm/fcntl.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/fixed_code.h38
-rw-r--r--arch/blackfin/include/uapi/asm/ioctls.h (renamed from arch/blackfin/include/asm/ioctls.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/poll.h (renamed from arch/blackfin/include/asm/poll.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/posix_types.h (renamed from arch/blackfin/include/asm/posix_types.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/ptrace.h170
-rw-r--r--arch/blackfin/include/uapi/asm/sigcontext.h (renamed from arch/blackfin/include/asm/sigcontext.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/siginfo.h (renamed from arch/blackfin/include/asm/siginfo.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/signal.h (renamed from arch/blackfin/include/asm/signal.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/stat.h (renamed from arch/blackfin/include/asm/stat.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/swab.h (renamed from arch/blackfin/include/asm/swab.h)0
-rw-r--r--arch/blackfin/include/uapi/asm/unistd.h437
-rw-r--r--arch/blackfin/kernel/kgdb.c13
-rw-r--r--arch/blackfin/mach-bf518/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf527/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf533/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf537/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf538/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf548/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf561/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf609/include/mach/irq.h3
-rw-r--r--arch/blackfin/mach-bf609/pm.c3
-rw-r--r--arch/blackfin/mach-common/dpmc.c19
-rw-r--r--arch/blackfin/mach-common/ints-priority.c272
38 files changed, 972 insertions, 948 deletions
diff --git a/arch/blackfin/include/asm/Kbuild b/arch/blackfin/include/asm/Kbuild
index 27d70759474c..127826f8a375 100644
--- a/arch/blackfin/include/asm/Kbuild
+++ b/arch/blackfin/include/asm/Kbuild
@@ -1,4 +1,3 @@
1include include/asm-generic/Kbuild.asm
2 1
3generic-y += auxvec.h 2generic-y += auxvec.h
4generic-y += bitsperlong.h 3generic-y += bitsperlong.h
@@ -17,6 +16,7 @@ generic-y += ipcbuf.h
17generic-y += irq_regs.h 16generic-y += irq_regs.h
18generic-y += kdebug.h 17generic-y += kdebug.h
19generic-y += kmap_types.h 18generic-y += kmap_types.h
19generic-y += kvm_para.h
20generic-y += local64.h 20generic-y += local64.h
21generic-y += local.h 21generic-y += local.h
22generic-y += mman.h 22generic-y += mman.h
@@ -44,7 +44,3 @@ generic-y += ucontext.h
44generic-y += unaligned.h 44generic-y += unaligned.h
45generic-y += user.h 45generic-y += user.h
46generic-y += xor.h 46generic-y += xor.h
47
48header-y += bfin_sport.h
49header-y += cachectl.h
50header-y += fixed_code.h
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h
index f8907ea6b5b6..50b9dfd4839f 100644
--- a/arch/blackfin/include/asm/bfin_sport.h
+++ b/arch/blackfin/include/asm/bfin_sport.h
@@ -5,65 +5,12 @@
5 * 5 *
6 * Licensed under the GPL-2 or later. 6 * Licensed under the GPL-2 or later.
7 */ 7 */
8
9#ifndef __BFIN_SPORT_H__ 8#ifndef __BFIN_SPORT_H__
10#define __BFIN_SPORT_H__ 9#define __BFIN_SPORT_H__
11 10
12/* Sport mode: it can be set to TDM, i2s or others */
13#define NORM_MODE 0x0
14#define TDM_MODE 0x1
15#define I2S_MODE 0x2
16#define NDSO_MODE 0x3
17
18/* Data format, normal, a-law or u-law */
19#define NORM_FORMAT 0x0
20#define ALAW_FORMAT 0x2
21#define ULAW_FORMAT 0x3
22
23/* Function driver which use sport must initialize the structure */
24struct sport_config {
25 /* TDM (multichannels), I2S or other mode */
26 unsigned int mode:3;
27 unsigned int polled; /* use poll instead of irq when set */
28
29 /* if TDM mode is selected, channels must be set */
30 int channels; /* Must be in 8 units */
31 unsigned int frame_delay:4; /* Delay between frame sync pulse and first bit */
32
33 /* I2S mode */
34 unsigned int right_first:1; /* Right stereo channel first */
35
36 /* In mormal mode, the following item need to be set */
37 unsigned int lsb_first:1; /* order of transmit or receive data */
38 unsigned int fsync:1; /* Frame sync required */
39 unsigned int data_indep:1; /* data independent frame sync generated */
40 unsigned int act_low:1; /* Active low TFS */
41 unsigned int late_fsync:1; /* Late frame sync */
42 unsigned int tckfe:1;
43 unsigned int sec_en:1; /* Secondary side enabled */
44
45 /* Choose clock source */
46 unsigned int int_clk:1; /* Internal or external clock */
47
48 /* If external clock is used, the following fields are ignored */
49 int serial_clk;
50 int fsync_clk;
51
52 unsigned int data_format:2; /* Normal, u-law or a-law */
53
54 int word_len; /* How length of the word in bits, 3-32 bits */
55 int dma_enabled;
56};
57
58/* Userspace interface */
59#define SPORT_IOC_MAGIC 'P'
60#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
61#define SPORT_IOC_GET_SYSTEMCLOCK _IOR('P', 0x02, unsigned long)
62#define SPORT_IOC_SET_BAUDRATE _IOW('P', 0x03, unsigned long)
63
64#ifdef __KERNEL__
65 11
66#include <linux/types.h> 12#include <linux/types.h>
13#include <uapi/asm/bfin_sport.h>
67 14
68/* 15/*
69 * All Blackfin system MMRs are padded to 32bits even if the register 16 * All Blackfin system MMRs are padded to 32bits even if the register
@@ -122,76 +69,3 @@ struct bfin_snd_platform_data {
122}) 69})
123 70
124#endif 71#endif
125
126/* SPORT_TCR1 Masks */
127#define TSPEN 0x0001 /* TX enable */
128#define ITCLK 0x0002 /* Internal TX Clock Select */
129#define TDTYPE 0x000C /* TX Data Formatting Select */
130#define DTYPE_NORM 0x0000 /* Data Format Normal */
131#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
132#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
133#define TLSBIT 0x0010 /* TX Bit Order */
134#define ITFS 0x0200 /* Internal TX Frame Sync Select */
135#define TFSR 0x0400 /* TX Frame Sync Required Select */
136#define DITFS 0x0800 /* Data Independent TX Frame Sync Select */
137#define LTFS 0x1000 /* Low TX Frame Sync Select */
138#define LATFS 0x2000 /* Late TX Frame Sync Select */
139#define TCKFE 0x4000 /* TX Clock Falling Edge Select */
140
141/* SPORT_TCR2 Masks */
142#define SLEN 0x001F /* SPORT TX Word Length (2 - 31) */
143#define DP_SLEN(x) BFIN_DEPOSIT(SLEN, x)
144#define EX_SLEN(x) BFIN_EXTRACT(SLEN, x)
145#define TXSE 0x0100 /* TX Secondary Enable */
146#define TSFSE 0x0200 /* TX Stereo Frame Sync Enable */
147#define TRFST 0x0400 /* TX Right-First Data Order */
148
149/* SPORT_RCR1 Masks */
150#define RSPEN 0x0001 /* RX enable */
151#define IRCLK 0x0002 /* Internal RX Clock Select */
152#define RDTYPE 0x000C /* RX Data Formatting Select */
153/* DTYPE_* defined above */
154#define RLSBIT 0x0010 /* RX Bit Order */
155#define IRFS 0x0200 /* Internal RX Frame Sync Select */
156#define RFSR 0x0400 /* RX Frame Sync Required Select */
157#define LRFS 0x1000 /* Low RX Frame Sync Select */
158#define LARFS 0x2000 /* Late RX Frame Sync Select */
159#define RCKFE 0x4000 /* RX Clock Falling Edge Select */
160
161/* SPORT_RCR2 Masks */
162/* SLEN defined above */
163#define RXSE 0x0100 /* RX Secondary Enable */
164#define RSFSE 0x0200 /* RX Stereo Frame Sync Enable */
165#define RRFST 0x0400 /* Right-First Data Order */
166
167/* SPORT_STAT Masks */
168#define RXNE 0x0001 /* RX FIFO Not Empty Status */
169#define RUVF 0x0002 /* RX Underflow Status */
170#define ROVF 0x0004 /* RX Overflow Status */
171#define TXF 0x0008 /* TX FIFO Full Status */
172#define TUVF 0x0010 /* TX Underflow Status */
173#define TOVF 0x0020 /* TX Overflow Status */
174#define TXHRE 0x0040 /* TX Hold Register Empty */
175
176/* SPORT_MCMC1 Masks */
177#define SP_WOFF 0x03FF /* Multichannel Window Offset Field */
178#define DP_SP_WOFF(x) BFIN_DEPOSIT(SP_WOFF, x)
179#define EX_SP_WOFF(x) BFIN_EXTRACT(SP_WOFF, x)
180#define SP_WSIZE 0xF000 /* Multichannel Window Size Field */
181#define DP_SP_WSIZE(x) BFIN_DEPOSIT(SP_WSIZE, x)
182#define EX_SP_WSIZE(x) BFIN_EXTRACT(SP_WSIZE, x)
183
184/* SPORT_MCMC2 Masks */
185#define MCCRM 0x0003 /* Multichannel Clock Recovery Mode */
186#define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */
187#define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */
188#define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */
189#define MCDTXPE 0x0004 /* Multichannel DMA Transmit Packing */
190#define MCDRXPE 0x0008 /* Multichannel DMA Receive Packing */
191#define MCMEN 0x0010 /* Multichannel Frame Mode Enable */
192#define FSDR 0x0080 /* Multichannel Frame Sync to Data Relationship */
193#define MFD 0xF000 /* Multichannel Frame Delay */
194#define DP_MFD(x) BFIN_DEPOSIT(MFD, x)
195#define EX_MFD(x) BFIN_EXTRACT(MFD, x)
196
197#endif
diff --git a/arch/blackfin/include/asm/bfin_twi.h b/arch/blackfin/include/asm/bfin_twi.h
index f4a072787436..90c3c006557d 100644
--- a/arch/blackfin/include/asm/bfin_twi.h
+++ b/arch/blackfin/include/asm/bfin_twi.h
@@ -61,7 +61,7 @@ struct bfin_twi_iface {
61 int cur_msg; 61 int cur_msg;
62 u16 saved_clkdiv; 62 u16 saved_clkdiv;
63 u16 saved_control; 63 u16 saved_control;
64 struct bfin_twi_regs *regs_base; 64 struct bfin_twi_regs __iomem *regs_base;
65}; 65};
66 66
67#define DEFINE_TWI_REG(reg_name, reg) \ 67#define DEFINE_TWI_REG(reg_name, reg) \
diff --git a/arch/blackfin/include/asm/fixed_code.h b/arch/blackfin/include/asm/fixed_code.h
index 5395088b2d0e..bc330f06207b 100644
--- a/arch/blackfin/include/asm/fixed_code.h
+++ b/arch/blackfin/include/asm/fixed_code.h
@@ -6,11 +6,11 @@
6 * 6 *
7 * Licensed under the GPL-2 or later. 7 * Licensed under the GPL-2 or later.
8 */ 8 */
9
10#ifndef __BFIN_ASM_FIXED_CODE_H__ 9#ifndef __BFIN_ASM_FIXED_CODE_H__
11#define __BFIN_ASM_FIXED_CODE_H__ 10#define __BFIN_ASM_FIXED_CODE_H__
12 11
13#ifdef __KERNEL__ 12#include <uapi/asm/fixed_code.h>
13
14#ifndef __ASSEMBLY__ 14#ifndef __ASSEMBLY__
15#include <linux/linkage.h> 15#include <linux/linkage.h>
16#include <linux/ptrace.h> 16#include <linux/ptrace.h>
@@ -28,29 +28,3 @@ extern void safe_user_instruction(void);
28extern void sigreturn_stub(void); 28extern void sigreturn_stub(void);
29#endif 29#endif
30#endif 30#endif
31
32#ifndef CONFIG_PHY_RAM_BASE_ADDRESS
33#define CONFIG_PHY_RAM_BASE_ADDRESS 0x0
34#endif
35
36#define FIXED_CODE_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
37
38#define SIGRETURN_STUB (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
39
40#define ATOMIC_SEQS_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
41
42#define ATOMIC_XCHG32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
43#define ATOMIC_CAS32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x420)
44#define ATOMIC_ADD32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x430)
45#define ATOMIC_SUB32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x440)
46#define ATOMIC_IOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x450)
47#define ATOMIC_AND32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x460)
48#define ATOMIC_XOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x470)
49
50#define ATOMIC_SEQS_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
51
52#define SAFE_USER_INSTRUCTION (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
53
54#define FIXED_CODE_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x490)
55
56#endif
diff --git a/arch/blackfin/include/asm/kvm_para.h b/arch/blackfin/include/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b957..000000000000
--- a/arch/blackfin/include/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kvm_para.h>
diff --git a/arch/blackfin/include/asm/pgtable.h b/arch/blackfin/include/asm/pgtable.h
index dcca3e6d6e80..b8663921d3c1 100644
--- a/arch/blackfin/include/asm/pgtable.h
+++ b/arch/blackfin/include/asm/pgtable.h
@@ -83,8 +83,6 @@ PTE_BIT_FUNC(mkyoung, |= _PAGE_ACCESSED);
83#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page) 83#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
84extern char empty_zero_page[]; 84extern char empty_zero_page[];
85 85
86extern unsigned int kobjsize(const void *objp);
87
88#define swapper_pg_dir ((pgd_t *) 0) 86#define swapper_pg_dir ((pgd_t *) 0)
89/* 87/*
90 * No page table caches to initialise. 88 * No page table caches to initialise.
diff --git a/arch/blackfin/include/asm/ptrace.h b/arch/blackfin/include/asm/ptrace.h
index 10d8641180f2..14ea93388c05 100644
--- a/arch/blackfin/include/asm/ptrace.h
+++ b/arch/blackfin/include/asm/ptrace.h
@@ -3,102 +3,13 @@
3 * 3 *
4 * Licensed under the GPL-2 or later. 4 * Licensed under the GPL-2 or later.
5 */ 5 */
6
7#ifndef _BFIN_PTRACE_H 6#ifndef _BFIN_PTRACE_H
8#define _BFIN_PTRACE_H 7#define _BFIN_PTRACE_H
9 8
10/* 9#include <uapi/asm/ptrace.h>
11 * GCC defines register number like this:
12 * -----------------------------
13 * 0 - 7 are data registers R0-R7
14 * 8 - 15 are address registers P0-P7
15 * 16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3
16 * 32 - 33 A registers A0 & A1
17 * 34 - status register
18 * -----------------------------
19 *
20 * We follows above, except:
21 * 32-33 --- Low 32-bit of A0&1
22 * 34-35 --- High 8-bit of A0&1
23 */
24 10
25#ifndef __ASSEMBLY__ 11#ifndef __ASSEMBLY__
26 12
27struct task_struct;
28
29/* this struct defines the way the registers are stored on the
30 stack during a system call. */
31
32struct pt_regs {
33 long orig_pc;
34 long ipend;
35 long seqstat;
36 long rete;
37 long retn;
38 long retx;
39 long pc; /* PC == RETI */
40 long rets;
41 long reserved; /* Used as scratch during system calls */
42 long astat;
43 long lb1;
44 long lb0;
45 long lt1;
46 long lt0;
47 long lc1;
48 long lc0;
49 long a1w;
50 long a1x;
51 long a0w;
52 long a0x;
53 long b3;
54 long b2;
55 long b1;
56 long b0;
57 long l3;
58 long l2;
59 long l1;
60 long l0;
61 long m3;
62 long m2;
63 long m1;
64 long m0;
65 long i3;
66 long i2;
67 long i1;
68 long i0;
69 long usp;
70 long fp;
71 long p5;
72 long p4;
73 long p3;
74 long p2;
75 long p1;
76 long p0;
77 long r7;
78 long r6;
79 long r5;
80 long r4;
81 long r3;
82 long r2;
83 long r1;
84 long r0;
85 long orig_r0;
86 long orig_p0;
87 long syscfg;
88};
89
90/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
91#define PTRACE_GETREGS 12
92#define PTRACE_SETREGS 13 /* ptrace signal */
93
94#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */
95#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */
96#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */
97
98#define PS_S (0x0002)
99
100#ifdef __KERNEL__
101
102/* user_mode returns true if only one bit is set in IPEND, other than the 13/* user_mode returns true if only one bit is set in IPEND, other than the
103 master interrupt enable. */ 14 master interrupt enable. */
104#define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1))) 15#define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1)))
@@ -126,75 +37,5 @@ extern int is_user_addr_valid(struct task_struct *child,
126 37
127#include <asm-generic/ptrace.h> 38#include <asm-generic/ptrace.h>
128 39
129#endif /* __KERNEL__ */
130
131#endif /* __ASSEMBLY__ */ 40#endif /* __ASSEMBLY__ */
132
133/*
134 * Offsets used by 'ptrace' system call interface.
135 */
136
137#define PT_R0 204
138#define PT_R1 200
139#define PT_R2 196
140#define PT_R3 192
141#define PT_R4 188
142#define PT_R5 184
143#define PT_R6 180
144#define PT_R7 176
145#define PT_P0 172
146#define PT_P1 168
147#define PT_P2 164
148#define PT_P3 160
149#define PT_P4 156
150#define PT_P5 152
151#define PT_FP 148
152#define PT_USP 144
153#define PT_I0 140
154#define PT_I1 136
155#define PT_I2 132
156#define PT_I3 128
157#define PT_M0 124
158#define PT_M1 120
159#define PT_M2 116
160#define PT_M3 112
161#define PT_L0 108
162#define PT_L1 104
163#define PT_L2 100
164#define PT_L3 96
165#define PT_B0 92
166#define PT_B1 88
167#define PT_B2 84
168#define PT_B3 80
169#define PT_A0X 76
170#define PT_A0W 72
171#define PT_A1X 68
172#define PT_A1W 64
173#define PT_LC0 60
174#define PT_LC1 56
175#define PT_LT0 52
176#define PT_LT1 48
177#define PT_LB0 44
178#define PT_LB1 40
179#define PT_ASTAT 36
180#define PT_RESERVED 32
181#define PT_RETS 28
182#define PT_PC 24
183#define PT_RETX 20
184#define PT_RETN 16
185#define PT_RETE 12
186#define PT_SEQSTAT 8
187#define PT_IPEND 4
188
189#define PT_ORIG_R0 208
190#define PT_ORIG_P0 212
191#define PT_SYSCFG 216
192#define PT_TEXT_ADDR 220
193#define PT_TEXT_END_ADDR 224
194#define PT_DATA_ADDR 228
195#define PT_FDPIC_EXEC 232
196#define PT_FDPIC_INTERP 236
197
198#define PT_LAST_PSEUDO PT_FDPIC_INTERP
199
200#endif /* _BFIN_PTRACE_H */ 41#endif /* _BFIN_PTRACE_H */
diff --git a/arch/blackfin/include/asm/uaccess.h b/arch/blackfin/include/asm/uaccess.h
index 5cc111502822..461bb542e2e8 100644
--- a/arch/blackfin/include/asm/uaccess.h
+++ b/arch/blackfin/include/asm/uaccess.h
@@ -34,23 +34,6 @@ static inline void set_fs(mm_segment_t fs)
34 34
35#define access_ok(type, addr, size) _access_ok((unsigned long)(addr), (size)) 35#define access_ok(type, addr, size) _access_ok((unsigned long)(addr), (size))
36 36
37static inline int is_in_rom(unsigned long addr)
38{
39 /*
40 * What we are really trying to do is determine if addr is
41 * in an allocated kernel memory region. If not then assume
42 * we cannot free it or otherwise de-allocate it. Ideally
43 * we could restrict this to really being in a ROM or flash,
44 * but that would need to be done on a board by board basis,
45 * not globally.
46 */
47 if ((addr < _ramstart) || (addr >= _ramend))
48 return (1);
49
50 /* Default case, not in ROM */
51 return (0);
52}
53
54/* 37/*
55 * The fs value determines whether argument validity checking should be 38 * The fs value determines whether argument validity checking should be
56 * performed or not. If get_fs() == USER_DS, checking is performed, with 39 * performed or not. If get_fs() == USER_DS, checking is performed, with
@@ -89,7 +72,7 @@ struct exception_table_entry {
89 ({ \ 72 ({ \
90 int _err = 0; \ 73 int _err = 0; \
91 typeof(*(p)) _x = (x); \ 74 typeof(*(p)) _x = (x); \
92 typeof(*(p)) *_p = (p); \ 75 typeof(*(p)) __user *_p = (p); \
93 if (!access_ok(VERIFY_WRITE, _p, sizeof(*(_p)))) {\ 76 if (!access_ok(VERIFY_WRITE, _p, sizeof(*(_p)))) {\
94 _err = -EFAULT; \ 77 _err = -EFAULT; \
95 } \ 78 } \
@@ -108,8 +91,8 @@ struct exception_table_entry {
108 long _xl, _xh; \ 91 long _xl, _xh; \
109 _xl = ((long *)&_x)[0]; \ 92 _xl = ((long *)&_x)[0]; \
110 _xh = ((long *)&_x)[1]; \ 93 _xh = ((long *)&_x)[1]; \
111 __put_user_asm(_xl, ((long *)_p)+0, ); \ 94 __put_user_asm(_xl, ((long __user *)_p)+0, ); \
112 __put_user_asm(_xh, ((long *)_p)+1, ); \ 95 __put_user_asm(_xh, ((long __user *)_p)+1, ); \
113 } break; \ 96 } break; \
114 default: \ 97 default: \
115 _err = __put_user_bad(); \ 98 _err = __put_user_bad(); \
@@ -136,7 +119,7 @@ static inline int bad_user_access_length(void)
136 * aliasing issues. 119 * aliasing issues.
137 */ 120 */
138 121
139#define __ptr(x) ((unsigned long *)(x)) 122#define __ptr(x) ((unsigned long __force *)(x))
140 123
141#define __put_user_asm(x,p,bhw) \ 124#define __put_user_asm(x,p,bhw) \
142 __asm__ (#bhw"[%1] = %0;\n\t" \ 125 __asm__ (#bhw"[%1] = %0;\n\t" \
@@ -216,12 +199,12 @@ copy_to_user(void __user *to, const void *from, unsigned long n)
216 */ 199 */
217 200
218static inline long __must_check 201static inline long __must_check
219strncpy_from_user(char *dst, const char *src, long count) 202strncpy_from_user(char *dst, const char __user *src, long count)
220{ 203{
221 char *tmp; 204 char *tmp;
222 if (!access_ok(VERIFY_READ, src, 1)) 205 if (!access_ok(VERIFY_READ, src, 1))
223 return -EFAULT; 206 return -EFAULT;
224 strncpy(dst, src, count); 207 strncpy(dst, (const char __force *)src, count);
225 for (tmp = dst; *tmp && count > 0; tmp++, count--) ; 208 for (tmp = dst; *tmp && count > 0; tmp++, count--) ;
226 return (tmp - dst); 209 return (tmp - dst);
227} 210}
@@ -237,18 +220,18 @@ strncpy_from_user(char *dst, const char *src, long count)
237 * On exception, returns 0. 220 * On exception, returns 0.
238 * If the string is too long, returns a value greater than n. 221 * If the string is too long, returns a value greater than n.
239 */ 222 */
240static inline long __must_check strnlen_user(const char *src, long n) 223static inline long __must_check strnlen_user(const char __user *src, long n)
241{ 224{
242 if (!access_ok(VERIFY_READ, src, 1)) 225 if (!access_ok(VERIFY_READ, src, 1))
243 return 0; 226 return 0;
244 return strnlen(src, n) + 1; 227 return strnlen((const char __force *)src, n) + 1;
245} 228}
246 229
247static inline long __must_check strlen_user(const char *src) 230static inline long __must_check strlen_user(const char __user *src)
248{ 231{
249 if (!access_ok(VERIFY_READ, src, 1)) 232 if (!access_ok(VERIFY_READ, src, 1))
250 return 0; 233 return 0;
251 return strlen(src) + 1; 234 return strlen((const char __force *)src) + 1;
252} 235}
253 236
254/* 237/*
@@ -256,11 +239,11 @@ static inline long __must_check strlen_user(const char *src)
256 */ 239 */
257 240
258static inline unsigned long __must_check 241static inline unsigned long __must_check
259__clear_user(void *to, unsigned long n) 242__clear_user(void __user *to, unsigned long n)
260{ 243{
261 if (!access_ok(VERIFY_WRITE, to, n)) 244 if (!access_ok(VERIFY_WRITE, to, n))
262 return n; 245 return n;
263 memset(to, 0, n); 246 memset((void __force *)to, 0, n);
264 return 0; 247 return 0;
265} 248}
266 249
diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h
index 460514a1a4e1..17eb748e9c54 100644
--- a/arch/blackfin/include/asm/unistd.h
+++ b/arch/blackfin/include/asm/unistd.h
@@ -3,437 +3,11 @@
3 * 3 *
4 * Licensed under the GPL-2 or later. 4 * Licensed under the GPL-2 or later.
5 */ 5 */
6
7#ifndef __ASM_BFIN_UNISTD_H 6#ifndef __ASM_BFIN_UNISTD_H
8#define __ASM_BFIN_UNISTD_H 7#define __ASM_BFIN_UNISTD_H
9/*
10 * This file contains the system call numbers.
11 */
12#define __NR_restart_syscall 0
13#define __NR_exit 1
14 /* 2 __NR_fork not supported on nommu */
15#define __NR_read 3
16#define __NR_write 4
17#define __NR_open 5
18#define __NR_close 6
19 /* 7 __NR_waitpid obsolete */
20#define __NR_creat 8
21#define __NR_link 9
22#define __NR_unlink 10
23#define __NR_execve 11
24#define __NR_chdir 12
25#define __NR_time 13
26#define __NR_mknod 14
27#define __NR_chmod 15
28#define __NR_chown 16
29 /* 17 __NR_break obsolete */
30 /* 18 __NR_oldstat obsolete */
31#define __NR_lseek 19
32#define __NR_getpid 20
33#define __NR_mount 21
34 /* 22 __NR_umount obsolete */
35#define __NR_setuid 23
36#define __NR_getuid 24
37#define __NR_stime 25
38#define __NR_ptrace 26
39#define __NR_alarm 27
40 /* 28 __NR_oldfstat obsolete */
41#define __NR_pause 29
42 /* 30 __NR_utime obsolete */
43 /* 31 __NR_stty obsolete */
44 /* 32 __NR_gtty obsolete */
45#define __NR_access 33
46#define __NR_nice 34
47 /* 35 __NR_ftime obsolete */
48#define __NR_sync 36
49#define __NR_kill 37
50#define __NR_rename 38
51#define __NR_mkdir 39
52#define __NR_rmdir 40
53#define __NR_dup 41
54#define __NR_pipe 42
55#define __NR_times 43
56 /* 44 __NR_prof obsolete */
57#define __NR_brk 45
58#define __NR_setgid 46
59#define __NR_getgid 47
60 /* 48 __NR_signal obsolete */
61#define __NR_geteuid 49
62#define __NR_getegid 50
63#define __NR_acct 51
64#define __NR_umount2 52
65 /* 53 __NR_lock obsolete */
66#define __NR_ioctl 54
67#define __NR_fcntl 55
68 /* 56 __NR_mpx obsolete */
69#define __NR_setpgid 57
70 /* 58 __NR_ulimit obsolete */
71 /* 59 __NR_oldolduname obsolete */
72#define __NR_umask 60
73#define __NR_chroot 61
74#define __NR_ustat 62
75#define __NR_dup2 63
76#define __NR_getppid 64
77#define __NR_getpgrp 65
78#define __NR_setsid 66
79 /* 67 __NR_sigaction obsolete */
80#define __NR_sgetmask 68
81#define __NR_ssetmask 69
82#define __NR_setreuid 70
83#define __NR_setregid 71
84 /* 72 __NR_sigsuspend obsolete */
85 /* 73 __NR_sigpending obsolete */
86#define __NR_sethostname 74
87#define __NR_setrlimit 75
88 /* 76 __NR_old_getrlimit obsolete */
89#define __NR_getrusage 77
90#define __NR_gettimeofday 78
91#define __NR_settimeofday 79
92#define __NR_getgroups 80
93#define __NR_setgroups 81
94 /* 82 __NR_select obsolete */
95#define __NR_symlink 83
96 /* 84 __NR_oldlstat obsolete */
97#define __NR_readlink 85
98 /* 86 __NR_uselib obsolete */
99 /* 87 __NR_swapon obsolete */
100#define __NR_reboot 88
101 /* 89 __NR_readdir obsolete */
102 /* 90 __NR_mmap obsolete */
103#define __NR_munmap 91
104#define __NR_truncate 92
105#define __NR_ftruncate 93
106#define __NR_fchmod 94
107#define __NR_fchown 95
108#define __NR_getpriority 96
109#define __NR_setpriority 97
110 /* 98 __NR_profil obsolete */
111#define __NR_statfs 99
112#define __NR_fstatfs 100
113 /* 101 __NR_ioperm */
114 /* 102 __NR_socketcall obsolete */
115#define __NR_syslog 103
116#define __NR_setitimer 104
117#define __NR_getitimer 105
118#define __NR_stat 106
119#define __NR_lstat 107
120#define __NR_fstat 108
121 /* 109 __NR_olduname obsolete */
122 /* 110 __NR_iopl obsolete */
123#define __NR_vhangup 111
124 /* 112 __NR_idle obsolete */
125 /* 113 __NR_vm86old */
126#define __NR_wait4 114
127 /* 115 __NR_swapoff obsolete */
128#define __NR_sysinfo 116
129 /* 117 __NR_ipc oboslete */
130#define __NR_fsync 118
131 /* 119 __NR_sigreturn obsolete */
132#define __NR_clone 120
133#define __NR_setdomainname 121
134#define __NR_uname 122
135 /* 123 __NR_modify_ldt obsolete */
136#define __NR_adjtimex 124
137#define __NR_mprotect 125
138 /* 126 __NR_sigprocmask obsolete */
139 /* 127 __NR_create_module obsolete */
140#define __NR_init_module 128
141#define __NR_delete_module 129
142 /* 130 __NR_get_kernel_syms obsolete */
143#define __NR_quotactl 131
144#define __NR_getpgid 132
145#define __NR_fchdir 133
146#define __NR_bdflush 134
147 /* 135 was sysfs */
148#define __NR_personality 136
149 /* 137 __NR_afs_syscall */
150#define __NR_setfsuid 138
151#define __NR_setfsgid 139
152#define __NR__llseek 140
153#define __NR_getdents 141
154 /* 142 __NR__newselect obsolete */
155#define __NR_flock 143
156 /* 144 __NR_msync obsolete */
157#define __NR_readv 145
158#define __NR_writev 146
159#define __NR_getsid 147
160#define __NR_fdatasync 148
161#define __NR__sysctl 149
162 /* 150 __NR_mlock */
163 /* 151 __NR_munlock */
164 /* 152 __NR_mlockall */
165 /* 153 __NR_munlockall */
166#define __NR_sched_setparam 154
167#define __NR_sched_getparam 155
168#define __NR_sched_setscheduler 156
169#define __NR_sched_getscheduler 157
170#define __NR_sched_yield 158
171#define __NR_sched_get_priority_max 159
172#define __NR_sched_get_priority_min 160
173#define __NR_sched_rr_get_interval 161
174#define __NR_nanosleep 162
175#define __NR_mremap 163
176#define __NR_setresuid 164
177#define __NR_getresuid 165
178 /* 166 __NR_vm86 */
179 /* 167 __NR_query_module */
180 /* 168 __NR_poll */
181#define __NR_nfsservctl 169
182#define __NR_setresgid 170
183#define __NR_getresgid 171
184#define __NR_prctl 172
185#define __NR_rt_sigreturn 173
186#define __NR_rt_sigaction 174
187#define __NR_rt_sigprocmask 175
188#define __NR_rt_sigpending 176
189#define __NR_rt_sigtimedwait 177
190#define __NR_rt_sigqueueinfo 178
191#define __NR_rt_sigsuspend 179
192#define __NR_pread 180
193#define __NR_pwrite 181
194#define __NR_lchown 182
195#define __NR_getcwd 183
196#define __NR_capget 184
197#define __NR_capset 185
198#define __NR_sigaltstack 186
199#define __NR_sendfile 187
200 /* 188 __NR_getpmsg */
201 /* 189 __NR_putpmsg */
202#define __NR_vfork 190
203#define __NR_getrlimit 191
204#define __NR_mmap2 192
205#define __NR_truncate64 193
206#define __NR_ftruncate64 194
207#define __NR_stat64 195
208#define __NR_lstat64 196
209#define __NR_fstat64 197
210#define __NR_chown32 198
211#define __NR_getuid32 199
212#define __NR_getgid32 200
213#define __NR_geteuid32 201
214#define __NR_getegid32 202
215#define __NR_setreuid32 203
216#define __NR_setregid32 204
217#define __NR_getgroups32 205
218#define __NR_setgroups32 206
219#define __NR_fchown32 207
220#define __NR_setresuid32 208
221#define __NR_getresuid32 209
222#define __NR_setresgid32 210
223#define __NR_getresgid32 211
224#define __NR_lchown32 212
225#define __NR_setuid32 213
226#define __NR_setgid32 214
227#define __NR_setfsuid32 215
228#define __NR_setfsgid32 216
229#define __NR_pivot_root 217
230 /* 218 __NR_mincore */
231 /* 219 __NR_madvise */
232#define __NR_getdents64 220
233#define __NR_fcntl64 221
234 /* 222 reserved for TUX */
235 /* 223 reserved for TUX */
236#define __NR_gettid 224
237#define __NR_readahead 225
238#define __NR_setxattr 226
239#define __NR_lsetxattr 227
240#define __NR_fsetxattr 228
241#define __NR_getxattr 229
242#define __NR_lgetxattr 230
243#define __NR_fgetxattr 231
244#define __NR_listxattr 232
245#define __NR_llistxattr 233
246#define __NR_flistxattr 234
247#define __NR_removexattr 235
248#define __NR_lremovexattr 236
249#define __NR_fremovexattr 237
250#define __NR_tkill 238
251#define __NR_sendfile64 239
252#define __NR_futex 240
253#define __NR_sched_setaffinity 241
254#define __NR_sched_getaffinity 242
255 /* 243 __NR_set_thread_area */
256 /* 244 __NR_get_thread_area */
257#define __NR_io_setup 245
258#define __NR_io_destroy 246
259#define __NR_io_getevents 247
260#define __NR_io_submit 248
261#define __NR_io_cancel 249
262 /* 250 __NR_alloc_hugepages */
263 /* 251 __NR_free_hugepages */
264#define __NR_exit_group 252
265#define __NR_lookup_dcookie 253
266#define __NR_bfin_spinlock 254
267
268#define __NR_epoll_create 255
269#define __NR_epoll_ctl 256
270#define __NR_epoll_wait 257
271 /* 258 __NR_remap_file_pages */
272#define __NR_set_tid_address 259
273#define __NR_timer_create 260
274#define __NR_timer_settime 261
275#define __NR_timer_gettime 262
276#define __NR_timer_getoverrun 263
277#define __NR_timer_delete 264
278#define __NR_clock_settime 265
279#define __NR_clock_gettime 266
280#define __NR_clock_getres 267
281#define __NR_clock_nanosleep 268
282#define __NR_statfs64 269
283#define __NR_fstatfs64 270
284#define __NR_tgkill 271
285#define __NR_utimes 272
286#define __NR_fadvise64_64 273
287 /* 274 __NR_vserver */
288 /* 275 __NR_mbind */
289 /* 276 __NR_get_mempolicy */
290 /* 277 __NR_set_mempolicy */
291#define __NR_mq_open 278
292#define __NR_mq_unlink 279
293#define __NR_mq_timedsend 280
294#define __NR_mq_timedreceive 281
295#define __NR_mq_notify 282
296#define __NR_mq_getsetattr 283
297#define __NR_kexec_load 284
298#define __NR_waitid 285
299#define __NR_add_key 286
300#define __NR_request_key 287
301#define __NR_keyctl 288
302#define __NR_ioprio_set 289
303#define __NR_ioprio_get 290
304#define __NR_inotify_init 291
305#define __NR_inotify_add_watch 292
306#define __NR_inotify_rm_watch 293
307 /* 294 __NR_migrate_pages */
308#define __NR_openat 295
309#define __NR_mkdirat 296
310#define __NR_mknodat 297
311#define __NR_fchownat 298
312#define __NR_futimesat 299
313#define __NR_fstatat64 300
314#define __NR_unlinkat 301
315#define __NR_renameat 302
316#define __NR_linkat 303
317#define __NR_symlinkat 304
318#define __NR_readlinkat 305
319#define __NR_fchmodat 306
320#define __NR_faccessat 307
321#define __NR_pselect6 308
322#define __NR_ppoll 309
323#define __NR_unshare 310
324
325/* Blackfin private syscalls */
326#define __NR_sram_alloc 311
327#define __NR_sram_free 312
328#define __NR_dma_memcpy 313
329
330/* socket syscalls */
331#define __NR_accept 314
332#define __NR_bind 315
333#define __NR_connect 316
334#define __NR_getpeername 317
335#define __NR_getsockname 318
336#define __NR_getsockopt 319
337#define __NR_listen 320
338#define __NR_recv 321
339#define __NR_recvfrom 322
340#define __NR_recvmsg 323
341#define __NR_send 324
342#define __NR_sendmsg 325
343#define __NR_sendto 326
344#define __NR_setsockopt 327
345#define __NR_shutdown 328
346#define __NR_socket 329
347#define __NR_socketpair 330
348
349/* sysv ipc syscalls */
350#define __NR_semctl 331
351#define __NR_semget 332
352#define __NR_semop 333
353#define __NR_msgctl 334
354#define __NR_msgget 335
355#define __NR_msgrcv 336
356#define __NR_msgsnd 337
357#define __NR_shmat 338
358#define __NR_shmctl 339
359#define __NR_shmdt 340
360#define __NR_shmget 341
361 8
362#define __NR_splice 342 9#include <uapi/asm/unistd.h>
363#define __NR_sync_file_range 343
364#define __NR_tee 344
365#define __NR_vmsplice 345
366 10
367#define __NR_epoll_pwait 346
368#define __NR_utimensat 347
369#define __NR_signalfd 348
370#define __NR_timerfd_create 349
371#define __NR_eventfd 350
372#define __NR_pread64 351
373#define __NR_pwrite64 352
374#define __NR_fadvise64 353
375#define __NR_set_robust_list 354
376#define __NR_get_robust_list 355
377#define __NR_fallocate 356
378#define __NR_semtimedop 357
379#define __NR_timerfd_settime 358
380#define __NR_timerfd_gettime 359
381#define __NR_signalfd4 360
382#define __NR_eventfd2 361
383#define __NR_epoll_create1 362
384#define __NR_dup3 363
385#define __NR_pipe2 364
386#define __NR_inotify_init1 365
387#define __NR_preadv 366
388#define __NR_pwritev 367
389#define __NR_rt_tgsigqueueinfo 368
390#define __NR_perf_event_open 369
391#define __NR_recvmmsg 370
392#define __NR_fanotify_init 371
393#define __NR_fanotify_mark 372
394#define __NR_prlimit64 373
395#define __NR_cacheflush 374
396#define __NR_name_to_handle_at 375
397#define __NR_open_by_handle_at 376
398#define __NR_clock_adjtime 377
399#define __NR_syncfs 378
400#define __NR_setns 379
401#define __NR_sendmmsg 380
402#define __NR_process_vm_readv 381
403#define __NR_process_vm_writev 382
404
405#define __NR_syscall 383
406#define NR_syscalls __NR_syscall
407
408/* Old optional stuff no one actually uses */
409#define __IGNORE_sysfs
410#define __IGNORE_uselib
411
412/* Implement the newer interfaces */
413#define __IGNORE_mmap
414#define __IGNORE_poll
415#define __IGNORE_select
416#define __IGNORE_utime
417
418/* Not relevant on no-mmu */
419#define __IGNORE_swapon
420#define __IGNORE_swapoff
421#define __IGNORE_msync
422#define __IGNORE_mlock
423#define __IGNORE_munlock
424#define __IGNORE_mlockall
425#define __IGNORE_munlockall
426#define __IGNORE_mincore
427#define __IGNORE_madvise
428#define __IGNORE_remap_file_pages
429#define __IGNORE_mbind
430#define __IGNORE_get_mempolicy
431#define __IGNORE_set_mempolicy
432#define __IGNORE_migrate_pages
433#define __IGNORE_move_pages
434#define __IGNORE_getcpu
435
436#ifdef __KERNEL__
437#define __ARCH_WANT_STAT64 11#define __ARCH_WANT_STAT64
438#define __ARCH_WANT_SYS_ALARM 12#define __ARCH_WANT_SYS_ALARM
439#define __ARCH_WANT_SYS_GETHOSTNAME 13#define __ARCH_WANT_SYS_GETHOSTNAME
@@ -457,6 +31,4 @@
457 */ 31 */
458#define cond_syscall(x) asm(".weak\t_" #x "\n\t.set\t_" #x ",_sys_ni_syscall"); 32#define cond_syscall(x) asm(".weak\t_" #x "\n\t.set\t_" #x ",_sys_ni_syscall");
459 33
460#endif /* __KERNEL__ */
461
462#endif /* __ASM_BFIN_UNISTD_H */ 34#endif /* __ASM_BFIN_UNISTD_H */
diff --git a/arch/blackfin/include/mach-common/irq.h b/arch/blackfin/include/mach-common/irq.h
index cab14e911dc2..af9fc8171ebc 100644
--- a/arch/blackfin/include/mach-common/irq.h
+++ b/arch/blackfin/include/mach-common/irq.h
@@ -40,8 +40,6 @@
40#define IRQ_HWERR 5 /* Hardware Error */ 40#define IRQ_HWERR 5 /* Hardware Error */
41#define IRQ_CORETMR 6 /* Core timer */ 41#define IRQ_CORETMR 6 /* Core timer */
42 42
43#define BFIN_IRQ(x) ((x) + 7)
44
45#define IVG7 7 43#define IVG7 7
46#define IVG8 8 44#define IVG8 8
47#define IVG9 9 45#define IVG9 9
@@ -52,6 +50,9 @@
52#define IVG14 14 50#define IVG14 14
53#define IVG15 15 51#define IVG15 15
54 52
53#define BFIN_IRQ(x) ((x) + IVG7)
54#define BFIN_SYSIRQ(x) ((x) - IVG7)
55
55#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS) 56#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
56 57
57#endif 58#endif
diff --git a/arch/blackfin/include/uapi/asm/Kbuild b/arch/blackfin/include/uapi/asm/Kbuild
index baebb3da1d44..0bd28f77abc3 100644
--- a/arch/blackfin/include/uapi/asm/Kbuild
+++ b/arch/blackfin/include/uapi/asm/Kbuild
@@ -1,3 +1,19 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4header-y += bfin_sport.h
5header-y += byteorder.h
6header-y += cachectl.h
7header-y += fcntl.h
8header-y += fixed_code.h
9header-y += ioctls.h
10header-y += kvm_para.h
11header-y += poll.h
12header-y += posix_types.h
13header-y += ptrace.h
14header-y += sigcontext.h
15header-y += siginfo.h
16header-y += signal.h
17header-y += stat.h
18header-y += swab.h
19header-y += unistd.h
diff --git a/arch/blackfin/include/uapi/asm/bfin_sport.h b/arch/blackfin/include/uapi/asm/bfin_sport.h
new file mode 100644
index 000000000000..c086de87ee61
--- /dev/null
+++ b/arch/blackfin/include/uapi/asm/bfin_sport.h
@@ -0,0 +1,136 @@
1/*
2 * bfin_sport.h - interface to Blackfin SPORTs
3 *
4 * Copyright 2004-2009 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef _UAPI__BFIN_SPORT_H__
10#define _UAPI__BFIN_SPORT_H__
11
12/* Sport mode: it can be set to TDM, i2s or others */
13#define NORM_MODE 0x0
14#define TDM_MODE 0x1
15#define I2S_MODE 0x2
16#define NDSO_MODE 0x3
17
18/* Data format, normal, a-law or u-law */
19#define NORM_FORMAT 0x0
20#define ALAW_FORMAT 0x2
21#define ULAW_FORMAT 0x3
22
23/* Function driver which use sport must initialize the structure */
24struct sport_config {
25 /* TDM (multichannels), I2S or other mode */
26 unsigned int mode:3;
27 unsigned int polled; /* use poll instead of irq when set */
28
29 /* if TDM mode is selected, channels must be set */
30 int channels; /* Must be in 8 units */
31 unsigned int frame_delay:4; /* Delay between frame sync pulse and first bit */
32
33 /* I2S mode */
34 unsigned int right_first:1; /* Right stereo channel first */
35
36 /* In mormal mode, the following item need to be set */
37 unsigned int lsb_first:1; /* order of transmit or receive data */
38 unsigned int fsync:1; /* Frame sync required */
39 unsigned int data_indep:1; /* data independent frame sync generated */
40 unsigned int act_low:1; /* Active low TFS */
41 unsigned int late_fsync:1; /* Late frame sync */
42 unsigned int tckfe:1;
43 unsigned int sec_en:1; /* Secondary side enabled */
44
45 /* Choose clock source */
46 unsigned int int_clk:1; /* Internal or external clock */
47
48 /* If external clock is used, the following fields are ignored */
49 int serial_clk;
50 int fsync_clk;
51
52 unsigned int data_format:2; /* Normal, u-law or a-law */
53
54 int word_len; /* How length of the word in bits, 3-32 bits */
55 int dma_enabled;
56};
57
58/* Userspace interface */
59#define SPORT_IOC_MAGIC 'P'
60#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
61#define SPORT_IOC_GET_SYSTEMCLOCK _IOR('P', 0x02, unsigned long)
62#define SPORT_IOC_SET_BAUDRATE _IOW('P', 0x03, unsigned long)
63
64
65/* SPORT_TCR1 Masks */
66#define TSPEN 0x0001 /* TX enable */
67#define ITCLK 0x0002 /* Internal TX Clock Select */
68#define TDTYPE 0x000C /* TX Data Formatting Select */
69#define DTYPE_NORM 0x0000 /* Data Format Normal */
70#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
71#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
72#define TLSBIT 0x0010 /* TX Bit Order */
73#define ITFS 0x0200 /* Internal TX Frame Sync Select */
74#define TFSR 0x0400 /* TX Frame Sync Required Select */
75#define DITFS 0x0800 /* Data Independent TX Frame Sync Select */
76#define LTFS 0x1000 /* Low TX Frame Sync Select */
77#define LATFS 0x2000 /* Late TX Frame Sync Select */
78#define TCKFE 0x4000 /* TX Clock Falling Edge Select */
79
80/* SPORT_TCR2 Masks */
81#define SLEN 0x001F /* SPORT TX Word Length (2 - 31) */
82#define DP_SLEN(x) BFIN_DEPOSIT(SLEN, x)
83#define EX_SLEN(x) BFIN_EXTRACT(SLEN, x)
84#define TXSE 0x0100 /* TX Secondary Enable */
85#define TSFSE 0x0200 /* TX Stereo Frame Sync Enable */
86#define TRFST 0x0400 /* TX Right-First Data Order */
87
88/* SPORT_RCR1 Masks */
89#define RSPEN 0x0001 /* RX enable */
90#define IRCLK 0x0002 /* Internal RX Clock Select */
91#define RDTYPE 0x000C /* RX Data Formatting Select */
92/* DTYPE_* defined above */
93#define RLSBIT 0x0010 /* RX Bit Order */
94#define IRFS 0x0200 /* Internal RX Frame Sync Select */
95#define RFSR 0x0400 /* RX Frame Sync Required Select */
96#define LRFS 0x1000 /* Low RX Frame Sync Select */
97#define LARFS 0x2000 /* Late RX Frame Sync Select */
98#define RCKFE 0x4000 /* RX Clock Falling Edge Select */
99
100/* SPORT_RCR2 Masks */
101/* SLEN defined above */
102#define RXSE 0x0100 /* RX Secondary Enable */
103#define RSFSE 0x0200 /* RX Stereo Frame Sync Enable */
104#define RRFST 0x0400 /* Right-First Data Order */
105
106/* SPORT_STAT Masks */
107#define RXNE 0x0001 /* RX FIFO Not Empty Status */
108#define RUVF 0x0002 /* RX Underflow Status */
109#define ROVF 0x0004 /* RX Overflow Status */
110#define TXF 0x0008 /* TX FIFO Full Status */
111#define TUVF 0x0010 /* TX Underflow Status */
112#define TOVF 0x0020 /* TX Overflow Status */
113#define TXHRE 0x0040 /* TX Hold Register Empty */
114
115/* SPORT_MCMC1 Masks */
116#define SP_WOFF 0x03FF /* Multichannel Window Offset Field */
117#define DP_SP_WOFF(x) BFIN_DEPOSIT(SP_WOFF, x)
118#define EX_SP_WOFF(x) BFIN_EXTRACT(SP_WOFF, x)
119#define SP_WSIZE 0xF000 /* Multichannel Window Size Field */
120#define DP_SP_WSIZE(x) BFIN_DEPOSIT(SP_WSIZE, x)
121#define EX_SP_WSIZE(x) BFIN_EXTRACT(SP_WSIZE, x)
122
123/* SPORT_MCMC2 Masks */
124#define MCCRM 0x0003 /* Multichannel Clock Recovery Mode */
125#define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */
126#define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */
127#define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */
128#define MCDTXPE 0x0004 /* Multichannel DMA Transmit Packing */
129#define MCDRXPE 0x0008 /* Multichannel DMA Receive Packing */
130#define MCMEN 0x0010 /* Multichannel Frame Mode Enable */
131#define FSDR 0x0080 /* Multichannel Frame Sync to Data Relationship */
132#define MFD 0xF000 /* Multichannel Frame Delay */
133#define DP_MFD(x) BFIN_DEPOSIT(MFD, x)
134#define EX_MFD(x) BFIN_EXTRACT(MFD, x)
135
136#endif /* _UAPI__BFIN_SPORT_H__ */
diff --git a/arch/blackfin/include/asm/byteorder.h b/arch/blackfin/include/uapi/asm/byteorder.h
index 9558416d578b..9558416d578b 100644
--- a/arch/blackfin/include/asm/byteorder.h
+++ b/arch/blackfin/include/uapi/asm/byteorder.h
diff --git a/arch/blackfin/include/asm/cachectl.h b/arch/blackfin/include/uapi/asm/cachectl.h
index 03255df6c1ea..03255df6c1ea 100644
--- a/arch/blackfin/include/asm/cachectl.h
+++ b/arch/blackfin/include/uapi/asm/cachectl.h
diff --git a/arch/blackfin/include/asm/fcntl.h b/arch/blackfin/include/uapi/asm/fcntl.h
index 251c911d59c1..251c911d59c1 100644
--- a/arch/blackfin/include/asm/fcntl.h
+++ b/arch/blackfin/include/uapi/asm/fcntl.h
diff --git a/arch/blackfin/include/uapi/asm/fixed_code.h b/arch/blackfin/include/uapi/asm/fixed_code.h
new file mode 100644
index 000000000000..3bef1dca379f
--- /dev/null
+++ b/arch/blackfin/include/uapi/asm/fixed_code.h
@@ -0,0 +1,38 @@
1/*
2 * This file defines the fixed addresses where userspace programs
3 * can find atomic code sequences.
4 *
5 * Copyright 2007-2008 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#ifndef _UAPI__BFIN_ASM_FIXED_CODE_H__
11#define _UAPI__BFIN_ASM_FIXED_CODE_H__
12
13
14#ifndef CONFIG_PHY_RAM_BASE_ADDRESS
15#define CONFIG_PHY_RAM_BASE_ADDRESS 0x0
16#endif
17
18#define FIXED_CODE_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
19
20#define SIGRETURN_STUB (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
21
22#define ATOMIC_SEQS_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
23
24#define ATOMIC_XCHG32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
25#define ATOMIC_CAS32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x420)
26#define ATOMIC_ADD32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x430)
27#define ATOMIC_SUB32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x440)
28#define ATOMIC_IOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x450)
29#define ATOMIC_AND32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x460)
30#define ATOMIC_XOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x470)
31
32#define ATOMIC_SEQS_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
33
34#define SAFE_USER_INSTRUCTION (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
35
36#define FIXED_CODE_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x490)
37
38#endif /* _UAPI__BFIN_ASM_FIXED_CODE_H__ */
diff --git a/arch/blackfin/include/asm/ioctls.h b/arch/blackfin/include/uapi/asm/ioctls.h
index eca8d75b0a8a..eca8d75b0a8a 100644
--- a/arch/blackfin/include/asm/ioctls.h
+++ b/arch/blackfin/include/uapi/asm/ioctls.h
diff --git a/arch/blackfin/include/asm/poll.h b/arch/blackfin/include/uapi/asm/poll.h
index 072d8966c5c3..072d8966c5c3 100644
--- a/arch/blackfin/include/asm/poll.h
+++ b/arch/blackfin/include/uapi/asm/poll.h
diff --git a/arch/blackfin/include/asm/posix_types.h b/arch/blackfin/include/uapi/asm/posix_types.h
index 1bd3436db6a7..1bd3436db6a7 100644
--- a/arch/blackfin/include/asm/posix_types.h
+++ b/arch/blackfin/include/uapi/asm/posix_types.h
diff --git a/arch/blackfin/include/uapi/asm/ptrace.h b/arch/blackfin/include/uapi/asm/ptrace.h
new file mode 100644
index 000000000000..fd48bd0739d2
--- /dev/null
+++ b/arch/blackfin/include/uapi/asm/ptrace.h
@@ -0,0 +1,170 @@
1/*
2 * Copyright 2004-2008 Analog Devices Inc.
3 *
4 * Licensed under the GPL-2 or later.
5 */
6
7#ifndef _UAPI_BFIN_PTRACE_H
8#define _UAPI_BFIN_PTRACE_H
9
10/*
11 * GCC defines register number like this:
12 * -----------------------------
13 * 0 - 7 are data registers R0-R7
14 * 8 - 15 are address registers P0-P7
15 * 16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3
16 * 32 - 33 A registers A0 & A1
17 * 34 - status register
18 * -----------------------------
19 *
20 * We follows above, except:
21 * 32-33 --- Low 32-bit of A0&1
22 * 34-35 --- High 8-bit of A0&1
23 */
24
25#ifndef __ASSEMBLY__
26
27struct task_struct;
28
29/* this struct defines the way the registers are stored on the
30 stack during a system call. */
31
32struct pt_regs {
33 long orig_pc;
34 long ipend;
35 long seqstat;
36 long rete;
37 long retn;
38 long retx;
39 long pc; /* PC == RETI */
40 long rets;
41 long reserved; /* Used as scratch during system calls */
42 long astat;
43 long lb1;
44 long lb0;
45 long lt1;
46 long lt0;
47 long lc1;
48 long lc0;
49 long a1w;
50 long a1x;
51 long a0w;
52 long a0x;
53 long b3;
54 long b2;
55 long b1;
56 long b0;
57 long l3;
58 long l2;
59 long l1;
60 long l0;
61 long m3;
62 long m2;
63 long m1;
64 long m0;
65 long i3;
66 long i2;
67 long i1;
68 long i0;
69 long usp;
70 long fp;
71 long p5;
72 long p4;
73 long p3;
74 long p2;
75 long p1;
76 long p0;
77 long r7;
78 long r6;
79 long r5;
80 long r4;
81 long r3;
82 long r2;
83 long r1;
84 long r0;
85 long orig_r0;
86 long orig_p0;
87 long syscfg;
88};
89
90/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
91#define PTRACE_GETREGS 12
92#define PTRACE_SETREGS 13 /* ptrace signal */
93
94#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */
95#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */
96#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */
97
98#define PS_S (0x0002)
99
100
101#endif /* __ASSEMBLY__ */
102
103/*
104 * Offsets used by 'ptrace' system call interface.
105 */
106
107#define PT_R0 204
108#define PT_R1 200
109#define PT_R2 196
110#define PT_R3 192
111#define PT_R4 188
112#define PT_R5 184
113#define PT_R6 180
114#define PT_R7 176
115#define PT_P0 172
116#define PT_P1 168
117#define PT_P2 164
118#define PT_P3 160
119#define PT_P4 156
120#define PT_P5 152
121#define PT_FP 148
122#define PT_USP 144
123#define PT_I0 140
124#define PT_I1 136
125#define PT_I2 132
126#define PT_I3 128
127#define PT_M0 124
128#define PT_M1 120
129#define PT_M2 116
130#define PT_M3 112
131#define PT_L0 108
132#define PT_L1 104
133#define PT_L2 100
134#define PT_L3 96
135#define PT_B0 92
136#define PT_B1 88
137#define PT_B2 84
138#define PT_B3 80
139#define PT_A0X 76
140#define PT_A0W 72
141#define PT_A1X 68
142#define PT_A1W 64
143#define PT_LC0 60
144#define PT_LC1 56
145#define PT_LT0 52
146#define PT_LT1 48
147#define PT_LB0 44
148#define PT_LB1 40
149#define PT_ASTAT 36
150#define PT_RESERVED 32
151#define PT_RETS 28
152#define PT_PC 24
153#define PT_RETX 20
154#define PT_RETN 16
155#define PT_RETE 12
156#define PT_SEQSTAT 8
157#define PT_IPEND 4
158
159#define PT_ORIG_R0 208
160#define PT_ORIG_P0 212
161#define PT_SYSCFG 216
162#define PT_TEXT_ADDR 220
163#define PT_TEXT_END_ADDR 224
164#define PT_DATA_ADDR 228
165#define PT_FDPIC_EXEC 232
166#define PT_FDPIC_INTERP 236
167
168#define PT_LAST_PSEUDO PT_FDPIC_INTERP
169
170#endif /* _UAPI_BFIN_PTRACE_H */
diff --git a/arch/blackfin/include/asm/sigcontext.h b/arch/blackfin/include/uapi/asm/sigcontext.h
index 906bdc1f5fda..906bdc1f5fda 100644
--- a/arch/blackfin/include/asm/sigcontext.h
+++ b/arch/blackfin/include/uapi/asm/sigcontext.h
diff --git a/arch/blackfin/include/asm/siginfo.h b/arch/blackfin/include/uapi/asm/siginfo.h
index 3e81306394e2..3e81306394e2 100644
--- a/arch/blackfin/include/asm/siginfo.h
+++ b/arch/blackfin/include/uapi/asm/siginfo.h
diff --git a/arch/blackfin/include/asm/signal.h b/arch/blackfin/include/uapi/asm/signal.h
index 77a3bf37b69d..77a3bf37b69d 100644
--- a/arch/blackfin/include/asm/signal.h
+++ b/arch/blackfin/include/uapi/asm/signal.h
diff --git a/arch/blackfin/include/asm/stat.h b/arch/blackfin/include/uapi/asm/stat.h
index 2e27665c4e91..2e27665c4e91 100644
--- a/arch/blackfin/include/asm/stat.h
+++ b/arch/blackfin/include/uapi/asm/stat.h
diff --git a/arch/blackfin/include/asm/swab.h b/arch/blackfin/include/uapi/asm/swab.h
index 89de6507ca2b..89de6507ca2b 100644
--- a/arch/blackfin/include/asm/swab.h
+++ b/arch/blackfin/include/uapi/asm/swab.h
diff --git a/arch/blackfin/include/uapi/asm/unistd.h b/arch/blackfin/include/uapi/asm/unistd.h
new file mode 100644
index 000000000000..a4511649a864
--- /dev/null
+++ b/arch/blackfin/include/uapi/asm/unistd.h
@@ -0,0 +1,437 @@
1/*
2 * Copyright 2004-2009 Analog Devices Inc.
3 *
4 * Licensed under the GPL-2 or later.
5 */
6
7#ifndef _UAPI__ASM_BFIN_UNISTD_H
8#define _UAPI__ASM_BFIN_UNISTD_H
9/*
10 * This file contains the system call numbers.
11 */
12#define __NR_restart_syscall 0
13#define __NR_exit 1
14 /* 2 __NR_fork not supported on nommu */
15#define __NR_read 3
16#define __NR_write 4
17#define __NR_open 5
18#define __NR_close 6
19 /* 7 __NR_waitpid obsolete */
20#define __NR_creat 8
21#define __NR_link 9
22#define __NR_unlink 10
23#define __NR_execve 11
24#define __NR_chdir 12
25#define __NR_time 13
26#define __NR_mknod 14
27#define __NR_chmod 15
28#define __NR_chown 16
29 /* 17 __NR_break obsolete */
30 /* 18 __NR_oldstat obsolete */
31#define __NR_lseek 19
32#define __NR_getpid 20
33#define __NR_mount 21
34 /* 22 __NR_umount obsolete */
35#define __NR_setuid 23
36#define __NR_getuid 24
37#define __NR_stime 25
38#define __NR_ptrace 26
39#define __NR_alarm 27
40 /* 28 __NR_oldfstat obsolete */
41#define __NR_pause 29
42 /* 30 __NR_utime obsolete */
43 /* 31 __NR_stty obsolete */
44 /* 32 __NR_gtty obsolete */
45#define __NR_access 33
46#define __NR_nice 34
47 /* 35 __NR_ftime obsolete */
48#define __NR_sync 36
49#define __NR_kill 37
50#define __NR_rename 38
51#define __NR_mkdir 39
52#define __NR_rmdir 40
53#define __NR_dup 41
54#define __NR_pipe 42
55#define __NR_times 43
56 /* 44 __NR_prof obsolete */
57#define __NR_brk 45
58#define __NR_setgid 46
59#define __NR_getgid 47
60 /* 48 __NR_signal obsolete */
61#define __NR_geteuid 49
62#define __NR_getegid 50
63#define __NR_acct 51
64#define __NR_umount2 52
65 /* 53 __NR_lock obsolete */
66#define __NR_ioctl 54
67#define __NR_fcntl 55
68 /* 56 __NR_mpx obsolete */
69#define __NR_setpgid 57
70 /* 58 __NR_ulimit obsolete */
71 /* 59 __NR_oldolduname obsolete */
72#define __NR_umask 60
73#define __NR_chroot 61
74#define __NR_ustat 62
75#define __NR_dup2 63
76#define __NR_getppid 64
77#define __NR_getpgrp 65
78#define __NR_setsid 66
79 /* 67 __NR_sigaction obsolete */
80#define __NR_sgetmask 68
81#define __NR_ssetmask 69
82#define __NR_setreuid 70
83#define __NR_setregid 71
84 /* 72 __NR_sigsuspend obsolete */
85 /* 73 __NR_sigpending obsolete */
86#define __NR_sethostname 74
87#define __NR_setrlimit 75
88 /* 76 __NR_old_getrlimit obsolete */
89#define __NR_getrusage 77
90#define __NR_gettimeofday 78
91#define __NR_settimeofday 79
92#define __NR_getgroups 80
93#define __NR_setgroups 81
94 /* 82 __NR_select obsolete */
95#define __NR_symlink 83
96 /* 84 __NR_oldlstat obsolete */
97#define __NR_readlink 85
98 /* 86 __NR_uselib obsolete */
99 /* 87 __NR_swapon obsolete */
100#define __NR_reboot 88
101 /* 89 __NR_readdir obsolete */
102 /* 90 __NR_mmap obsolete */
103#define __NR_munmap 91
104#define __NR_truncate 92
105#define __NR_ftruncate 93
106#define __NR_fchmod 94
107#define __NR_fchown 95
108#define __NR_getpriority 96
109#define __NR_setpriority 97
110 /* 98 __NR_profil obsolete */
111#define __NR_statfs 99
112#define __NR_fstatfs 100
113 /* 101 __NR_ioperm */
114 /* 102 __NR_socketcall obsolete */
115#define __NR_syslog 103
116#define __NR_setitimer 104
117#define __NR_getitimer 105
118#define __NR_stat 106
119#define __NR_lstat 107
120#define __NR_fstat 108
121 /* 109 __NR_olduname obsolete */
122 /* 110 __NR_iopl obsolete */
123#define __NR_vhangup 111
124 /* 112 __NR_idle obsolete */
125 /* 113 __NR_vm86old */
126#define __NR_wait4 114
127 /* 115 __NR_swapoff obsolete */
128#define __NR_sysinfo 116
129 /* 117 __NR_ipc oboslete */
130#define __NR_fsync 118
131 /* 119 __NR_sigreturn obsolete */
132#define __NR_clone 120
133#define __NR_setdomainname 121
134#define __NR_uname 122
135 /* 123 __NR_modify_ldt obsolete */
136#define __NR_adjtimex 124
137#define __NR_mprotect 125
138 /* 126 __NR_sigprocmask obsolete */
139 /* 127 __NR_create_module obsolete */
140#define __NR_init_module 128
141#define __NR_delete_module 129
142 /* 130 __NR_get_kernel_syms obsolete */
143#define __NR_quotactl 131
144#define __NR_getpgid 132
145#define __NR_fchdir 133
146#define __NR_bdflush 134
147 /* 135 was sysfs */
148#define __NR_personality 136
149 /* 137 __NR_afs_syscall */
150#define __NR_setfsuid 138
151#define __NR_setfsgid 139
152#define __NR__llseek 140
153#define __NR_getdents 141
154 /* 142 __NR__newselect obsolete */
155#define __NR_flock 143
156 /* 144 __NR_msync obsolete */
157#define __NR_readv 145
158#define __NR_writev 146
159#define __NR_getsid 147
160#define __NR_fdatasync 148
161#define __NR__sysctl 149
162 /* 150 __NR_mlock */
163 /* 151 __NR_munlock */
164 /* 152 __NR_mlockall */
165 /* 153 __NR_munlockall */
166#define __NR_sched_setparam 154
167#define __NR_sched_getparam 155
168#define __NR_sched_setscheduler 156
169#define __NR_sched_getscheduler 157
170#define __NR_sched_yield 158
171#define __NR_sched_get_priority_max 159
172#define __NR_sched_get_priority_min 160
173#define __NR_sched_rr_get_interval 161
174#define __NR_nanosleep 162
175#define __NR_mremap 163
176#define __NR_setresuid 164
177#define __NR_getresuid 165
178 /* 166 __NR_vm86 */
179 /* 167 __NR_query_module */
180 /* 168 __NR_poll */
181#define __NR_nfsservctl 169
182#define __NR_setresgid 170
183#define __NR_getresgid 171
184#define __NR_prctl 172
185#define __NR_rt_sigreturn 173
186#define __NR_rt_sigaction 174
187#define __NR_rt_sigprocmask 175
188#define __NR_rt_sigpending 176
189#define __NR_rt_sigtimedwait 177
190#define __NR_rt_sigqueueinfo 178
191#define __NR_rt_sigsuspend 179
192#define __NR_pread 180
193#define __NR_pwrite 181
194#define __NR_lchown 182
195#define __NR_getcwd 183
196#define __NR_capget 184
197#define __NR_capset 185
198#define __NR_sigaltstack 186
199#define __NR_sendfile 187
200 /* 188 __NR_getpmsg */
201 /* 189 __NR_putpmsg */
202#define __NR_vfork 190
203#define __NR_getrlimit 191
204#define __NR_mmap2 192
205#define __NR_truncate64 193
206#define __NR_ftruncate64 194
207#define __NR_stat64 195
208#define __NR_lstat64 196
209#define __NR_fstat64 197
210#define __NR_chown32 198
211#define __NR_getuid32 199
212#define __NR_getgid32 200
213#define __NR_geteuid32 201
214#define __NR_getegid32 202
215#define __NR_setreuid32 203
216#define __NR_setregid32 204
217#define __NR_getgroups32 205
218#define __NR_setgroups32 206
219#define __NR_fchown32 207
220#define __NR_setresuid32 208
221#define __NR_getresuid32 209
222#define __NR_setresgid32 210
223#define __NR_getresgid32 211
224#define __NR_lchown32 212
225#define __NR_setuid32 213
226#define __NR_setgid32 214
227#define __NR_setfsuid32 215
228#define __NR_setfsgid32 216
229#define __NR_pivot_root 217
230 /* 218 __NR_mincore */
231 /* 219 __NR_madvise */
232#define __NR_getdents64 220
233#define __NR_fcntl64 221
234 /* 222 reserved for TUX */
235 /* 223 reserved for TUX */
236#define __NR_gettid 224
237#define __NR_readahead 225
238#define __NR_setxattr 226
239#define __NR_lsetxattr 227
240#define __NR_fsetxattr 228
241#define __NR_getxattr 229
242#define __NR_lgetxattr 230
243#define __NR_fgetxattr 231
244#define __NR_listxattr 232
245#define __NR_llistxattr 233
246#define __NR_flistxattr 234
247#define __NR_removexattr 235
248#define __NR_lremovexattr 236
249#define __NR_fremovexattr 237
250#define __NR_tkill 238
251#define __NR_sendfile64 239
252#define __NR_futex 240
253#define __NR_sched_setaffinity 241
254#define __NR_sched_getaffinity 242
255 /* 243 __NR_set_thread_area */
256 /* 244 __NR_get_thread_area */
257#define __NR_io_setup 245
258#define __NR_io_destroy 246
259#define __NR_io_getevents 247
260#define __NR_io_submit 248
261#define __NR_io_cancel 249
262 /* 250 __NR_alloc_hugepages */
263 /* 251 __NR_free_hugepages */
264#define __NR_exit_group 252
265#define __NR_lookup_dcookie 253
266#define __NR_bfin_spinlock 254
267
268#define __NR_epoll_create 255
269#define __NR_epoll_ctl 256
270#define __NR_epoll_wait 257
271 /* 258 __NR_remap_file_pages */
272#define __NR_set_tid_address 259
273#define __NR_timer_create 260
274#define __NR_timer_settime 261
275#define __NR_timer_gettime 262
276#define __NR_timer_getoverrun 263
277#define __NR_timer_delete 264
278#define __NR_clock_settime 265
279#define __NR_clock_gettime 266
280#define __NR_clock_getres 267
281#define __NR_clock_nanosleep 268
282#define __NR_statfs64 269
283#define __NR_fstatfs64 270
284#define __NR_tgkill 271
285#define __NR_utimes 272
286#define __NR_fadvise64_64 273
287 /* 274 __NR_vserver */
288 /* 275 __NR_mbind */
289 /* 276 __NR_get_mempolicy */
290 /* 277 __NR_set_mempolicy */
291#define __NR_mq_open 278
292#define __NR_mq_unlink 279
293#define __NR_mq_timedsend 280
294#define __NR_mq_timedreceive 281
295#define __NR_mq_notify 282
296#define __NR_mq_getsetattr 283
297#define __NR_kexec_load 284
298#define __NR_waitid 285
299#define __NR_add_key 286
300#define __NR_request_key 287
301#define __NR_keyctl 288
302#define __NR_ioprio_set 289
303#define __NR_ioprio_get 290
304#define __NR_inotify_init 291
305#define __NR_inotify_add_watch 292
306#define __NR_inotify_rm_watch 293
307 /* 294 __NR_migrate_pages */
308#define __NR_openat 295
309#define __NR_mkdirat 296
310#define __NR_mknodat 297
311#define __NR_fchownat 298
312#define __NR_futimesat 299
313#define __NR_fstatat64 300
314#define __NR_unlinkat 301
315#define __NR_renameat 302
316#define __NR_linkat 303
317#define __NR_symlinkat 304
318#define __NR_readlinkat 305
319#define __NR_fchmodat 306
320#define __NR_faccessat 307
321#define __NR_pselect6 308
322#define __NR_ppoll 309
323#define __NR_unshare 310
324
325/* Blackfin private syscalls */
326#define __NR_sram_alloc 311
327#define __NR_sram_free 312
328#define __NR_dma_memcpy 313
329
330/* socket syscalls */
331#define __NR_accept 314
332#define __NR_bind 315
333#define __NR_connect 316
334#define __NR_getpeername 317
335#define __NR_getsockname 318
336#define __NR_getsockopt 319
337#define __NR_listen 320
338#define __NR_recv 321
339#define __NR_recvfrom 322
340#define __NR_recvmsg 323
341#define __NR_send 324
342#define __NR_sendmsg 325
343#define __NR_sendto 326
344#define __NR_setsockopt 327
345#define __NR_shutdown 328
346#define __NR_socket 329
347#define __NR_socketpair 330
348
349/* sysv ipc syscalls */
350#define __NR_semctl 331
351#define __NR_semget 332
352#define __NR_semop 333
353#define __NR_msgctl 334
354#define __NR_msgget 335
355#define __NR_msgrcv 336
356#define __NR_msgsnd 337
357#define __NR_shmat 338
358#define __NR_shmctl 339
359#define __NR_shmdt 340
360#define __NR_shmget 341
361
362#define __NR_splice 342
363#define __NR_sync_file_range 343
364#define __NR_tee 344
365#define __NR_vmsplice 345
366
367#define __NR_epoll_pwait 346
368#define __NR_utimensat 347
369#define __NR_signalfd 348
370#define __NR_timerfd_create 349
371#define __NR_eventfd 350
372#define __NR_pread64 351
373#define __NR_pwrite64 352
374#define __NR_fadvise64 353
375#define __NR_set_robust_list 354
376#define __NR_get_robust_list 355
377#define __NR_fallocate 356
378#define __NR_semtimedop 357
379#define __NR_timerfd_settime 358
380#define __NR_timerfd_gettime 359
381#define __NR_signalfd4 360
382#define __NR_eventfd2 361
383#define __NR_epoll_create1 362
384#define __NR_dup3 363
385#define __NR_pipe2 364
386#define __NR_inotify_init1 365
387#define __NR_preadv 366
388#define __NR_pwritev 367
389#define __NR_rt_tgsigqueueinfo 368
390#define __NR_perf_event_open 369
391#define __NR_recvmmsg 370
392#define __NR_fanotify_init 371
393#define __NR_fanotify_mark 372
394#define __NR_prlimit64 373
395#define __NR_cacheflush 374
396#define __NR_name_to_handle_at 375
397#define __NR_open_by_handle_at 376
398#define __NR_clock_adjtime 377
399#define __NR_syncfs 378
400#define __NR_setns 379
401#define __NR_sendmmsg 380
402#define __NR_process_vm_readv 381
403#define __NR_process_vm_writev 382
404
405#define __NR_syscall 383
406#define NR_syscalls __NR_syscall
407
408/* Old optional stuff no one actually uses */
409#define __IGNORE_sysfs
410#define __IGNORE_uselib
411
412/* Implement the newer interfaces */
413#define __IGNORE_mmap
414#define __IGNORE_poll
415#define __IGNORE_select
416#define __IGNORE_utime
417
418/* Not relevant on no-mmu */
419#define __IGNORE_swapon
420#define __IGNORE_swapoff
421#define __IGNORE_msync
422#define __IGNORE_mlock
423#define __IGNORE_munlock
424#define __IGNORE_mlockall
425#define __IGNORE_munlockall
426#define __IGNORE_mincore
427#define __IGNORE_madvise
428#define __IGNORE_remap_file_pages
429#define __IGNORE_mbind
430#define __IGNORE_get_mempolicy
431#define __IGNORE_set_mempolicy
432#define __IGNORE_migrate_pages
433#define __IGNORE_move_pages
434#define __IGNORE_getcpu
435
436
437#endif /* _UAPI__ASM_BFIN_UNISTD_H */
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
index 9b80b152435e..b882ce22c347 100644
--- a/arch/blackfin/kernel/kgdb.c
+++ b/arch/blackfin/kernel/kgdb.c
@@ -329,6 +329,9 @@ static void bfin_disable_hw_debug(struct pt_regs *regs)
329} 329}
330 330
331#ifdef CONFIG_SMP 331#ifdef CONFIG_SMP
332extern void generic_exec_single(int cpu, struct call_single_data *data, int wait);
333static struct call_single_data kgdb_smp_ipi_data[NR_CPUS];
334
332void kgdb_passive_cpu_callback(void *info) 335void kgdb_passive_cpu_callback(void *info)
333{ 336{
334 kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs()); 337 kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs());
@@ -336,12 +339,18 @@ void kgdb_passive_cpu_callback(void *info)
336 339
337void kgdb_roundup_cpus(unsigned long flags) 340void kgdb_roundup_cpus(unsigned long flags)
338{ 341{
339 smp_call_function(kgdb_passive_cpu_callback, NULL, 0); 342 unsigned int cpu;
343
344 for (cpu = cpumask_first(cpu_online_mask); cpu < nr_cpu_ids;
345 cpu = cpumask_next(cpu, cpu_online_mask)) {
346 kgdb_smp_ipi_data[cpu].func = kgdb_passive_cpu_callback;
347 generic_exec_single(cpu, &kgdb_smp_ipi_data[cpu], 0);
348 }
340} 349}
341 350
342void kgdb_roundup_cpu(int cpu, unsigned long flags) 351void kgdb_roundup_cpu(int cpu, unsigned long flags)
343{ 352{
344 smp_call_function_single(cpu, kgdb_passive_cpu_callback, NULL, 0); 353 generic_exec_single(cpu, &kgdb_smp_ipi_data[cpu], 0);
345} 354}
346#endif 355#endif
347 356
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h
index 845e6bc8d633..46cb88231d66 100644
--- a/arch/blackfin/mach-bf518/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h
@@ -165,5 +165,6 @@
165#define ANOMALY_05000474 (0) 165#define ANOMALY_05000474 (0)
166#define ANOMALY_05000475 (0) 166#define ANOMALY_05000475 (0)
167#define ANOMALY_05000480 (0) 167#define ANOMALY_05000480 (0)
168#define ANOMALY_16000030 (0)
168 169
169#endif 170#endif
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h
index aa14110be4c4..2f9cc33deec4 100644
--- a/arch/blackfin/mach-bf527/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h
@@ -285,5 +285,6 @@
285#define ANOMALY_05000448 (0) 285#define ANOMALY_05000448 (0)
286#define ANOMALY_05000474 (0) 286#define ANOMALY_05000474 (0)
287#define ANOMALY_05000480 (0) 287#define ANOMALY_05000480 (0)
288#define ANOMALY_16000030 (0)
288 289
289#endif 290#endif
diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h
index 3a8f73a669f0..0e754efc3cf6 100644
--- a/arch/blackfin/mach-bf533/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf533/include/mach/anomaly.h
@@ -378,5 +378,6 @@
378#define ANOMALY_05000474 (0) 378#define ANOMALY_05000474 (0)
379#define ANOMALY_05000480 (0) 379#define ANOMALY_05000480 (0)
380#define ANOMALY_05000485 (0) 380#define ANOMALY_05000485 (0)
381#define ANOMALY_16000030 (0)
381 382
382#endif 383#endif
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index df9212696397..2bc70c5b9415 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -236,5 +236,6 @@
236#define ANOMALY_05000467 (0) 236#define ANOMALY_05000467 (0)
237#define ANOMALY_05000474 (0) 237#define ANOMALY_05000474 (0)
238#define ANOMALY_05000485 (0) 238#define ANOMALY_05000485 (0)
239#define ANOMALY_16000030 (0)
239 240
240#endif 241#endif
diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h
index 318d922d11d4..eaac26973f6a 100644
--- a/arch/blackfin/mach-bf538/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf538/include/mach/anomaly.h
@@ -210,5 +210,6 @@
210#define ANOMALY_05000474 (0) 210#define ANOMALY_05000474 (0)
211#define ANOMALY_05000480 (0) 211#define ANOMALY_05000480 (0)
212#define ANOMALY_05000485 (0) 212#define ANOMALY_05000485 (0)
213#define ANOMALY_16000030 (0)
213 214
214#endif 215#endif
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index 5b711d85b90b..098fad63e03b 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -296,5 +296,6 @@
296#define ANOMALY_05000440 (0) 296#define ANOMALY_05000440 (0)
297#define ANOMALY_05000475 (0) 297#define ANOMALY_05000475 (0)
298#define ANOMALY_05000480 (0) 298#define ANOMALY_05000480 (0)
299#define ANOMALY_16000030 (0)
299 300
300#endif 301#endif
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h
index 72476ff50335..038249c1d0d4 100644
--- a/arch/blackfin/mach-bf561/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h
@@ -348,5 +348,6 @@
348#define ANOMALY_05000474 (0) 348#define ANOMALY_05000474 (0)
349#define ANOMALY_05000480 (0) 349#define ANOMALY_05000480 (0)
350#define ANOMALY_05000485 (0) 350#define ANOMALY_05000485 (0)
351#define ANOMALY_16000030 (0)
351 352
352#endif 353#endif
diff --git a/arch/blackfin/mach-bf609/include/mach/irq.h b/arch/blackfin/mach-bf609/include/mach/irq.h
index 23e74cdeeee8..fa0843d5d77a 100644
--- a/arch/blackfin/mach-bf609/include/mach/irq.h
+++ b/arch/blackfin/mach-bf609/include/mach/irq.h
@@ -9,9 +9,6 @@
9 9
10#include <mach-common/irq.h> 10#include <mach-common/irq.h>
11 11
12#undef BFIN_IRQ
13#define BFIN_IRQ(x) ((x) + IVG15)
14
15#define NR_PERI_INTS (5 * 32) 12#define NR_PERI_INTS (5 * 32)
16 13
17#define IRQ_SEC_ERR BFIN_IRQ(0) /* SEC Error */ 14#define IRQ_SEC_ERR BFIN_IRQ(0) /* SEC Error */
diff --git a/arch/blackfin/mach-bf609/pm.c b/arch/blackfin/mach-bf609/pm.c
index dacafc163f76..ad505d9db4a8 100644
--- a/arch/blackfin/mach-bf609/pm.c
+++ b/arch/blackfin/mach-bf609/pm.c
@@ -174,7 +174,6 @@ void bfin_hibernate_syscontrol(void)
174 bfin_write32(DPM0_RESTORE5, bfin_read32(DPM0_RESTORE5) | 4); 174 bfin_write32(DPM0_RESTORE5, bfin_read32(DPM0_RESTORE5) | 4);
175} 175}
176 176
177#define IRQ_SID(irq) ((irq) - IVG15)
178asmlinkage void enter_deepsleep(void); 177asmlinkage void enter_deepsleep(void);
179 178
180__attribute__((l1_text)) 179__attribute__((l1_text))
@@ -311,7 +310,7 @@ static irqreturn_t test_isr(int irq, void *dev_id)
311{ 310{
312 printk(KERN_DEBUG "gpio irq %d\n", irq); 311 printk(KERN_DEBUG "gpio irq %d\n", irq);
313 if (irq == 231) 312 if (irq == 231)
314 bfin_sec_raise_irq(IRQ_SID(IRQ_SOFT1)); 313 bfin_sec_raise_irq(BFIN_SYSIRQ(IRQ_SOFT1));
315 return IRQ_HANDLED; 314 return IRQ_HANDLED;
316} 315}
317 316
diff --git a/arch/blackfin/mach-common/dpmc.c b/arch/blackfin/mach-common/dpmc.c
index f5685a496c58..978bb400be06 100644
--- a/arch/blackfin/mach-common/dpmc.c
+++ b/arch/blackfin/mach-common/dpmc.c
@@ -157,24 +157,7 @@ struct platform_driver bfin_dpmc_device_driver = {
157 .name = DRIVER_NAME, 157 .name = DRIVER_NAME,
158 } 158 }
159}; 159};
160 160module_platform_driver(bfin_dpmc_device_driver);
161/**
162 * bfin_dpmc_init - Init driver
163 */
164static int __init bfin_dpmc_init(void)
165{
166 return platform_driver_register(&bfin_dpmc_device_driver);
167}
168module_init(bfin_dpmc_init);
169
170/**
171 * bfin_dpmc_exit - break down driver
172 */
173static void __exit bfin_dpmc_exit(void)
174{
175 platform_driver_unregister(&bfin_dpmc_device_driver);
176}
177module_exit(bfin_dpmc_exit);
178 161
179MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 162MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
180MODULE_DESCRIPTION("cpu power management driver for Blackfin"); 163MODULE_DESCRIPTION("cpu power management driver for Blackfin");
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 902bebc434c6..83ff311fd6ea 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -28,12 +28,6 @@
28#include <asm/dpmc.h> 28#include <asm/dpmc.h>
29#include <asm/traps.h> 29#include <asm/traps.h>
30 30
31#ifndef SEC_GCTL
32# define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
33#else
34# define SIC_SYSIRQ(irq) ((irq) - IVG15)
35#endif
36
37/* 31/*
38 * NOTES: 32 * NOTES:
39 * - we have separated the physical Hardware interrupt from the 33 * - we have separated the physical Hardware interrupt from the
@@ -141,13 +135,13 @@ static void bfin_core_unmask_irq(struct irq_data *d)
141 return; 135 return;
142} 136}
143 137
138#ifndef SEC_GCTL
144void bfin_internal_mask_irq(unsigned int irq) 139void bfin_internal_mask_irq(unsigned int irq)
145{ 140{
146 unsigned long flags = hard_local_irq_save(); 141 unsigned long flags = hard_local_irq_save();
147#ifndef SEC_GCTL
148#ifdef SIC_IMASK0 142#ifdef SIC_IMASK0
149 unsigned mask_bank = SIC_SYSIRQ(irq) / 32; 143 unsigned mask_bank = BFIN_SYSIRQ(irq) / 32;
150 unsigned mask_bit = SIC_SYSIRQ(irq) % 32; 144 unsigned mask_bit = BFIN_SYSIRQ(irq) % 32;
151 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) & 145 bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
152 ~(1 << mask_bit)); 146 ~(1 << mask_bit));
153# if defined(CONFIG_SMP) || defined(CONFIG_ICC) 147# if defined(CONFIG_SMP) || defined(CONFIG_ICC)
@@ -156,9 +150,8 @@ void bfin_internal_mask_irq(unsigned int irq)
156# endif 150# endif
157#else 151#else
158 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() & 152 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
159 ~(1 << SIC_SYSIRQ(irq))); 153 ~(1 << BFIN_SYSIRQ(irq)));
160#endif /* end of SIC_IMASK0 */ 154#endif /* end of SIC_IMASK0 */
161#endif
162 hard_local_irq_restore(flags); 155 hard_local_irq_restore(flags);
163} 156}
164 157
@@ -176,10 +169,9 @@ void bfin_internal_unmask_irq(unsigned int irq)
176{ 169{
177 unsigned long flags = hard_local_irq_save(); 170 unsigned long flags = hard_local_irq_save();
178 171
179#ifndef SEC_GCTL
180#ifdef SIC_IMASK0 172#ifdef SIC_IMASK0
181 unsigned mask_bank = SIC_SYSIRQ(irq) / 32; 173 unsigned mask_bank = BFIN_SYSIRQ(irq) / 32;
182 unsigned mask_bit = SIC_SYSIRQ(irq) % 32; 174 unsigned mask_bit = BFIN_SYSIRQ(irq) % 32;
183# ifdef CONFIG_SMP 175# ifdef CONFIG_SMP
184 if (cpumask_test_cpu(0, affinity)) 176 if (cpumask_test_cpu(0, affinity))
185# endif 177# endif
@@ -194,17 +186,103 @@ void bfin_internal_unmask_irq(unsigned int irq)
194# endif 186# endif
195#else 187#else
196 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | 188 bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |
197 (1 << SIC_SYSIRQ(irq))); 189 (1 << BFIN_SYSIRQ(irq)));
190#endif
191 hard_local_irq_restore(flags);
192}
193
194#ifdef CONFIG_SMP
195static void bfin_internal_unmask_irq_chip(struct irq_data *d)
196{
197 bfin_internal_unmask_irq_affinity(d->irq, d->affinity);
198}
199
200static int bfin_internal_set_affinity(struct irq_data *d,
201 const struct cpumask *mask, bool force)
202{
203 bfin_internal_mask_irq(d->irq);
204 bfin_internal_unmask_irq_affinity(d->irq, mask);
205
206 return 0;
207}
208#else
209static void bfin_internal_unmask_irq_chip(struct irq_data *d)
210{
211 bfin_internal_unmask_irq(d->irq);
212}
198#endif 213#endif
214
215#if defined(CONFIG_PM)
216int bfin_internal_set_wake(unsigned int irq, unsigned int state)
217{
218 u32 bank, bit, wakeup = 0;
219 unsigned long flags;
220 bank = BFIN_SYSIRQ(irq) / 32;
221 bit = BFIN_SYSIRQ(irq) % 32;
222
223 switch (irq) {
224#ifdef IRQ_RTC
225 case IRQ_RTC:
226 wakeup |= WAKE;
227 break;
228#endif
229#ifdef IRQ_CAN0_RX
230 case IRQ_CAN0_RX:
231 wakeup |= CANWE;
232 break;
199#endif 233#endif
234#ifdef IRQ_CAN1_RX
235 case IRQ_CAN1_RX:
236 wakeup |= CANWE;
237 break;
238#endif
239#ifdef IRQ_USB_INT0
240 case IRQ_USB_INT0:
241 wakeup |= USBWE;
242 break;
243#endif
244#ifdef CONFIG_BF54x
245 case IRQ_CNT:
246 wakeup |= ROTWE;
247 break;
248#endif
249 default:
250 break;
251 }
252
253 flags = hard_local_irq_save();
254
255 if (state) {
256 bfin_sic_iwr[bank] |= (1 << bit);
257 vr_wakeup |= wakeup;
258
259 } else {
260 bfin_sic_iwr[bank] &= ~(1 << bit);
261 vr_wakeup &= ~wakeup;
262 }
263
200 hard_local_irq_restore(flags); 264 hard_local_irq_restore(flags);
265
266 return 0;
201} 267}
202 268
203#ifdef SEC_GCTL 269static int bfin_internal_set_wake_chip(struct irq_data *d, unsigned int state)
270{
271 return bfin_internal_set_wake(d->irq, state);
272}
273#else
274inline int bfin_internal_set_wake(unsigned int irq, unsigned int state)
275{
276 return 0;
277}
278# define bfin_internal_set_wake_chip NULL
279#endif
280
281#else /* SEC_GCTL */
204static void bfin_sec_preflow_handler(struct irq_data *d) 282static void bfin_sec_preflow_handler(struct irq_data *d)
205{ 283{
206 unsigned long flags = hard_local_irq_save(); 284 unsigned long flags = hard_local_irq_save();
207 unsigned int sid = SIC_SYSIRQ(d->irq); 285 unsigned int sid = BFIN_SYSIRQ(d->irq);
208 286
209 bfin_write_SEC_SCI(0, SEC_CSID, sid); 287 bfin_write_SEC_SCI(0, SEC_CSID, sid);
210 288
@@ -214,7 +292,7 @@ static void bfin_sec_preflow_handler(struct irq_data *d)
214static void bfin_sec_mask_ack_irq(struct irq_data *d) 292static void bfin_sec_mask_ack_irq(struct irq_data *d)
215{ 293{
216 unsigned long flags = hard_local_irq_save(); 294 unsigned long flags = hard_local_irq_save();
217 unsigned int sid = SIC_SYSIRQ(d->irq); 295 unsigned int sid = BFIN_SYSIRQ(d->irq);
218 296
219 bfin_write_SEC_SCI(0, SEC_CSID, sid); 297 bfin_write_SEC_SCI(0, SEC_CSID, sid);
220 298
@@ -224,7 +302,7 @@ static void bfin_sec_mask_ack_irq(struct irq_data *d)
224static void bfin_sec_unmask_irq(struct irq_data *d) 302static void bfin_sec_unmask_irq(struct irq_data *d)
225{ 303{
226 unsigned long flags = hard_local_irq_save(); 304 unsigned long flags = hard_local_irq_save();
227 unsigned int sid = SIC_SYSIRQ(d->irq); 305 unsigned int sid = BFIN_SYSIRQ(d->irq);
228 306
229 bfin_write32(SEC_END, sid); 307 bfin_write32(SEC_END, sid);
230 308
@@ -269,7 +347,7 @@ static void bfin_sec_enable_sci(unsigned int sid)
269 unsigned long flags = hard_local_irq_save(); 347 unsigned long flags = hard_local_irq_save();
270 uint32_t reg_sctl = bfin_read_SEC_SCTL(sid); 348 uint32_t reg_sctl = bfin_read_SEC_SCTL(sid);
271 349
272 if (sid == SIC_SYSIRQ(IRQ_WATCH0)) 350 if (sid == BFIN_SYSIRQ(IRQ_WATCH0))
273 reg_sctl |= SEC_SCTL_FAULT_EN; 351 reg_sctl |= SEC_SCTL_FAULT_EN;
274 else 352 else
275 reg_sctl |= SEC_SCTL_INT_EN; 353 reg_sctl |= SEC_SCTL_INT_EN;
@@ -292,7 +370,7 @@ static void bfin_sec_disable_sci(unsigned int sid)
292static void bfin_sec_enable(struct irq_data *d) 370static void bfin_sec_enable(struct irq_data *d)
293{ 371{
294 unsigned long flags = hard_local_irq_save(); 372 unsigned long flags = hard_local_irq_save();
295 unsigned int sid = SIC_SYSIRQ(d->irq); 373 unsigned int sid = BFIN_SYSIRQ(d->irq);
296 374
297 bfin_sec_enable_sci(sid); 375 bfin_sec_enable_sci(sid);
298 bfin_sec_enable_ssi(sid); 376 bfin_sec_enable_ssi(sid);
@@ -303,7 +381,7 @@ static void bfin_sec_enable(struct irq_data *d)
303static void bfin_sec_disable(struct irq_data *d) 381static void bfin_sec_disable(struct irq_data *d)
304{ 382{
305 unsigned long flags = hard_local_irq_save(); 383 unsigned long flags = hard_local_irq_save();
306 unsigned int sid = SIC_SYSIRQ(d->irq); 384 unsigned int sid = BFIN_SYSIRQ(d->irq);
307 385
308 bfin_sec_disable_sci(sid); 386 bfin_sec_disable_sci(sid);
309 bfin_sec_disable_ssi(sid); 387 bfin_sec_disable_ssi(sid);
@@ -328,9 +406,10 @@ static void bfin_sec_set_priority(unsigned int sec_int_levels, u8 *sec_int_prior
328 hard_local_irq_restore(flags); 406 hard_local_irq_restore(flags);
329} 407}
330 408
331void bfin_sec_raise_irq(unsigned int sid) 409void bfin_sec_raise_irq(unsigned int irq)
332{ 410{
333 unsigned long flags = hard_local_irq_save(); 411 unsigned long flags = hard_local_irq_save();
412 unsigned int sid = BFIN_SYSIRQ(irq);
334 413
335 bfin_write32(SEC_RAISE, sid); 414 bfin_write32(SEC_RAISE, sid);
336 415
@@ -341,8 +420,13 @@ static void init_software_driven_irq(void)
341{ 420{
342 bfin_sec_set_ssi_coreid(34, 0); 421 bfin_sec_set_ssi_coreid(34, 0);
343 bfin_sec_set_ssi_coreid(35, 1); 422 bfin_sec_set_ssi_coreid(35, 1);
423
424 bfin_sec_enable_sci(35);
425 bfin_sec_enable_ssi(35);
344 bfin_sec_set_ssi_coreid(36, 0); 426 bfin_sec_set_ssi_coreid(36, 0);
345 bfin_sec_set_ssi_coreid(37, 1); 427 bfin_sec_set_ssi_coreid(37, 1);
428 bfin_sec_enable_sci(37);
429 bfin_sec_enable_ssi(37);
346} 430}
347 431
348void bfin_sec_resume(void) 432void bfin_sec_resume(void)
@@ -412,6 +496,8 @@ void handle_sec_fault(unsigned int irq, struct irq_desc *desc)
412 } 496 }
413 497
414 raw_spin_unlock(&desc->lock); 498 raw_spin_unlock(&desc->lock);
499
500 handle_fasteoi_irq(irq, desc);
415} 501}
416 502
417void handle_core_fault(unsigned int irq, struct irq_desc *desc) 503void handle_core_fault(unsigned int irq, struct irq_desc *desc)
@@ -431,105 +517,18 @@ void handle_core_fault(unsigned int irq, struct irq_desc *desc)
431 printk(KERN_NOTICE "Kernel Stack\n"); 517 printk(KERN_NOTICE "Kernel Stack\n");
432 show_stack(current, NULL); 518 show_stack(current, NULL);
433 print_modules(); 519 print_modules();
434 panic("Kernel core hardware error"); 520 panic("Core 0 hardware error");
435 break; 521 break;
436 case IRQ_C0_NMI_L1_PARITY_ERR: 522 case IRQ_C0_NMI_L1_PARITY_ERR:
437 panic("NMI occurs unexpectedly"); 523 panic("Core 0 NMI L1 parity error");
438 break; 524 break;
439 default: 525 default:
440 panic("Core 1 fault occurs unexpectedly"); 526 panic("Core 1 fault %d occurs unexpectedly", irq);
441 } 527 }
442 528
443 raw_spin_unlock(&desc->lock); 529 raw_spin_unlock(&desc->lock);
444} 530}
445#endif 531#endif /* SEC_GCTL */
446
447#ifdef CONFIG_SMP
448static void bfin_internal_unmask_irq_chip(struct irq_data *d)
449{
450 bfin_internal_unmask_irq_affinity(d->irq, d->affinity);
451}
452
453static int bfin_internal_set_affinity(struct irq_data *d,
454 const struct cpumask *mask, bool force)
455{
456 bfin_internal_mask_irq(d->irq);
457 bfin_internal_unmask_irq_affinity(d->irq, mask);
458
459 return 0;
460}
461#else
462static void bfin_internal_unmask_irq_chip(struct irq_data *d)
463{
464 bfin_internal_unmask_irq(d->irq);
465}
466#endif
467
468#if defined(CONFIG_PM) && !defined(SEC_GCTL)
469int bfin_internal_set_wake(unsigned int irq, unsigned int state)
470{
471 u32 bank, bit, wakeup = 0;
472 unsigned long flags;
473 bank = SIC_SYSIRQ(irq) / 32;
474 bit = SIC_SYSIRQ(irq) % 32;
475
476 switch (irq) {
477#ifdef IRQ_RTC
478 case IRQ_RTC:
479 wakeup |= WAKE;
480 break;
481#endif
482#ifdef IRQ_CAN0_RX
483 case IRQ_CAN0_RX:
484 wakeup |= CANWE;
485 break;
486#endif
487#ifdef IRQ_CAN1_RX
488 case IRQ_CAN1_RX:
489 wakeup |= CANWE;
490 break;
491#endif
492#ifdef IRQ_USB_INT0
493 case IRQ_USB_INT0:
494 wakeup |= USBWE;
495 break;
496#endif
497#ifdef CONFIG_BF54x
498 case IRQ_CNT:
499 wakeup |= ROTWE;
500 break;
501#endif
502 default:
503 break;
504 }
505
506 flags = hard_local_irq_save();
507
508 if (state) {
509 bfin_sic_iwr[bank] |= (1 << bit);
510 vr_wakeup |= wakeup;
511
512 } else {
513 bfin_sic_iwr[bank] &= ~(1 << bit);
514 vr_wakeup &= ~wakeup;
515 }
516
517 hard_local_irq_restore(flags);
518
519 return 0;
520}
521
522static int bfin_internal_set_wake_chip(struct irq_data *d, unsigned int state)
523{
524 return bfin_internal_set_wake(d->irq, state);
525}
526#else
527inline int bfin_internal_set_wake(unsigned int irq, unsigned int state)
528{
529 return 0;
530}
531# define bfin_internal_set_wake_chip NULL
532#endif
533 532
534static struct irq_chip bfin_core_irqchip = { 533static struct irq_chip bfin_core_irqchip = {
535 .name = "CORE", 534 .name = "CORE",
@@ -537,6 +536,7 @@ static struct irq_chip bfin_core_irqchip = {
537 .irq_unmask = bfin_core_unmask_irq, 536 .irq_unmask = bfin_core_unmask_irq,
538}; 537};
539 538
539#ifndef SEC_GCTL
540static struct irq_chip bfin_internal_irqchip = { 540static struct irq_chip bfin_internal_irqchip = {
541 .name = "INTN", 541 .name = "INTN",
542 .irq_mask = bfin_internal_mask_irq_chip, 542 .irq_mask = bfin_internal_mask_irq_chip,
@@ -548,8 +548,7 @@ static struct irq_chip bfin_internal_irqchip = {
548#endif 548#endif
549 .irq_set_wake = bfin_internal_set_wake_chip, 549 .irq_set_wake = bfin_internal_set_wake_chip,
550}; 550};
551 551#else
552#ifdef SEC_GCTL
553static struct irq_chip bfin_sec_irqchip = { 552static struct irq_chip bfin_sec_irqchip = {
554 .name = "SEC", 553 .name = "SEC",
555 .irq_mask_ack = bfin_sec_mask_ack_irq, 554 .irq_mask_ack = bfin_sec_mask_ack_irq,
@@ -1138,7 +1137,9 @@ static int bfin_gpio_set_wake(struct irq_data *d, unsigned int state)
1138 return -EINVAL; 1137 return -EINVAL;
1139 } 1138 }
1140 1139
1140#ifndef SEC_GCTL
1141 bfin_internal_set_wake(pint_irq, state); 1141 bfin_internal_set_wake(pint_irq, state);
1142#endif
1142 1143
1143 return 0; 1144 return 0;
1144} 1145}
@@ -1173,7 +1174,7 @@ static int sec_suspend(void)
1173 u32 bank; 1174 u32 bank;
1174 1175
1175 for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++) 1176 for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++)
1176 save_pint_sec_ctl[bank] = bfin_read_SEC_SCTL(bank + SIC_SYSIRQ(IRQ_PINT0)); 1177 save_pint_sec_ctl[bank] = bfin_read_SEC_SCTL(bank + BFIN_SYSIRQ(IRQ_PINT0));
1177 return 0; 1178 return 0;
1178} 1179}
1179 1180
@@ -1187,7 +1188,7 @@ static void sec_resume(void)
1187 bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_EN | SEC_CCTL_NMI_EN); 1188 bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_EN | SEC_CCTL_NMI_EN);
1188 1189
1189 for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++) 1190 for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++)
1190 bfin_write_SEC_SCTL(bank + SIC_SYSIRQ(IRQ_PINT0), save_pint_sec_ctl[bank]); 1191 bfin_write_SEC_SCTL(bank + BFIN_SYSIRQ(IRQ_PINT0), save_pint_sec_ctl[bank]);
1191} 1192}
1192 1193
1193static struct syscore_ops sec_pm_syscore_ops = { 1194static struct syscore_ops sec_pm_syscore_ops = {
@@ -1538,33 +1539,26 @@ int __init init_arch_irq(void)
1538 1539
1539 for (irq = 0; irq <= SYS_IRQS; irq++) { 1540 for (irq = 0; irq <= SYS_IRQS; irq++) {
1540 if (irq <= IRQ_CORETMR) { 1541 if (irq <= IRQ_CORETMR) {
1541 irq_set_chip(irq, &bfin_core_irqchip); 1542 irq_set_chip_and_handler(irq, &bfin_core_irqchip,
1542#ifdef CONFIG_TICKSOURCE_CORETMR 1543 handle_simple_irq);
1544#if defined(CONFIG_TICKSOURCE_CORETMR) && defined(CONFIG_SMP)
1543 if (irq == IRQ_CORETMR) 1545 if (irq == IRQ_CORETMR)
1544# ifdef CONFIG_SMP
1545 irq_set_handler(irq, handle_percpu_irq); 1546 irq_set_handler(irq, handle_percpu_irq);
1546# else
1547 irq_set_handler(irq, handle_simple_irq);
1548# endif
1549#endif 1547#endif
1550 } else if (irq < BFIN_IRQ(0)) {
1551 irq_set_chip_and_handler(irq, &bfin_internal_irqchip,
1552 handle_simple_irq);
1553 } else if (irq == IRQ_SEC_ERR) {
1554 irq_set_chip_and_handler(irq, &bfin_sec_irqchip,
1555 handle_sec_fault);
1556 } else if (irq < CORE_IRQS && irq >= IRQ_C0_DBL_FAULT) {
1557 irq_set_chip_and_handler(irq, &bfin_sec_irqchip,
1558 handle_core_fault);
1559 } else if (irq >= BFIN_IRQ(21) && irq <= BFIN_IRQ(26)) { 1548 } else if (irq >= BFIN_IRQ(21) && irq <= BFIN_IRQ(26)) {
1560 irq_set_chip(irq, &bfin_sec_irqchip); 1549 irq_set_chip(irq, &bfin_sec_irqchip);
1561 irq_set_chained_handler(irq, bfin_demux_gpio_irq); 1550 irq_set_chained_handler(irq, bfin_demux_gpio_irq);
1562 } else if (irq >= BFIN_IRQ(34) && irq <= BFIN_IRQ(37)) { 1551 } else if (irq >= BFIN_IRQ(34) && irq <= BFIN_IRQ(37)) {
1563 irq_set_chip(irq, &bfin_sec_irqchip);
1564 irq_set_handler(irq, handle_percpu_irq);
1565 } else {
1566 irq_set_chip_and_handler(irq, &bfin_sec_irqchip, 1552 irq_set_chip_and_handler(irq, &bfin_sec_irqchip,
1567 handle_fasteoi_irq); 1553 handle_percpu_irq);
1554 } else {
1555 irq_set_chip(irq, &bfin_sec_irqchip);
1556 if (irq == IRQ_SEC_ERR)
1557 irq_set_handler(irq, handle_sec_fault);
1558 else if (irq >= IRQ_C0_DBL_FAULT && irq < CORE_IRQS)
1559 irq_set_handler(irq, handle_core_fault);
1560 else
1561 irq_set_handler(irq, handle_fasteoi_irq);
1568 __irq_set_preflow_handler(irq, bfin_sec_preflow_handler); 1562 __irq_set_preflow_handler(irq, bfin_sec_preflow_handler);
1569 } 1563 }
1570 } 1564 }
@@ -1593,8 +1587,8 @@ int __init init_arch_irq(void)
1593 1587
1594 1588
1595 bfin_write_SEC_FCTL(SEC_FCTL_EN | SEC_FCTL_SYSRST_EN | SEC_FCTL_FLTIN_EN); 1589 bfin_write_SEC_FCTL(SEC_FCTL_EN | SEC_FCTL_SYSRST_EN | SEC_FCTL_FLTIN_EN);
1596 bfin_sec_enable_sci(SIC_SYSIRQ(IRQ_WATCH0)); 1590 bfin_sec_enable_sci(BFIN_SYSIRQ(IRQ_WATCH0));
1597 bfin_sec_enable_ssi(SIC_SYSIRQ(IRQ_WATCH0)); 1591 bfin_sec_enable_ssi(BFIN_SYSIRQ(IRQ_WATCH0));
1598 bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_RESET); 1592 bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_RESET);
1599 udelay(100); 1593 udelay(100);
1600 bfin_write_SEC_GCTL(SEC_GCTL_EN); 1594 bfin_write_SEC_GCTL(SEC_GCTL_EN);