diff options
author | Sonic Zhang <sonic.zhang@analog.com> | 2012-05-17 05:35:24 -0400 |
---|---|---|
committer | Bob Liu <lliubbo@gmail.com> | 2012-05-21 02:54:53 -0400 |
commit | 1d3dbda6ed0216971291a48531e7b2578ddf7642 (patch) | |
tree | 21447098a19095840b91e3d2db85329bc751f85b /arch/blackfin | |
parent | 72b099ed93989575b0c447023748968d30059e8f (diff) |
blackfin: bf60x: cleanup get clock code
Remove redundance code for get clock.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Diffstat (limited to 'arch/blackfin')
-rw-r--r-- | arch/blackfin/kernel/setup.c | 64 |
1 files changed, 22 insertions, 42 deletions
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 55fb42b50463..d0246de347cf 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c | |||
@@ -888,6 +888,22 @@ void __init native_machine_early_platform_add_devices(void) | |||
888 | { | 888 | { |
889 | } | 889 | } |
890 | 890 | ||
891 | #ifdef CONFIG_BF60x | ||
892 | static inline u_long bfin_get_clk(char *name) | ||
893 | { | ||
894 | struct clk *clk; | ||
895 | u_long clk_rate; | ||
896 | |||
897 | clk = clk_get(NULL, name); | ||
898 | if (IS_ERR(clk)) | ||
899 | return 0; | ||
900 | |||
901 | clk_rate = clk_get_rate(clk); | ||
902 | clk_put(clk); | ||
903 | return clk_rate; | ||
904 | } | ||
905 | #endif | ||
906 | |||
891 | void __init setup_arch(char **cmdline_p) | 907 | void __init setup_arch(char **cmdline_p) |
892 | { | 908 | { |
893 | u32 mmr; | 909 | u32 mmr; |
@@ -1045,7 +1061,7 @@ void __init setup_arch(char **cmdline_p) | |||
1045 | 1061 | ||
1046 | #ifdef CONFIG_BF60x | 1062 | #ifdef CONFIG_BF60x |
1047 | printk(KERN_INFO "Processor Speed: %lu MHz core clock, %lu MHz SCLk, %lu MHz SCLK0, %lu MHz SCLK1 and %lu MHz DCLK\n", | 1063 | printk(KERN_INFO "Processor Speed: %lu MHz core clock, %lu MHz SCLk, %lu MHz SCLK0, %lu MHz SCLK1 and %lu MHz DCLK\n", |
1048 | cclk / 1000000, sclk / 1000000, get_sclk0() / 1000000, get_sclk1() / 1000000, get_dclk() / 1000000); | 1064 | cclk / 1000000, bfin_get_clk("SYSCLK") / 1000000, get_sclk0() / 1000000, get_sclk1() / 1000000, get_dclk() / 1000000); |
1049 | #else | 1065 | #else |
1050 | printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", | 1066 | printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n", |
1051 | cclk / 1000000, sclk / 1000000); | 1067 | cclk / 1000000, sclk / 1000000); |
@@ -1146,16 +1162,7 @@ static u_long get_vco(void) | |||
1146 | u_long get_cclk(void) | 1162 | u_long get_cclk(void) |
1147 | { | 1163 | { |
1148 | #ifdef CONFIG_BF60x | 1164 | #ifdef CONFIG_BF60x |
1149 | struct clk *cclk; | 1165 | return bfin_get_clk("CCLK"); |
1150 | u_long cclk_rate; | ||
1151 | |||
1152 | cclk = clk_get(NULL, "CCLK"); | ||
1153 | if (IS_ERR(cclk)) | ||
1154 | return 0; | ||
1155 | |||
1156 | cclk_rate = clk_get_rate(cclk); | ||
1157 | clk_put(cclk); | ||
1158 | return cclk_rate; | ||
1159 | #else | 1166 | #else |
1160 | static u_long cached_cclk_pll_div, cached_cclk; | 1167 | static u_long cached_cclk_pll_div, cached_cclk; |
1161 | u_long csel, ssel; | 1168 | u_long csel, ssel; |
@@ -1184,53 +1191,26 @@ EXPORT_SYMBOL(get_cclk); | |||
1184 | /* Get the bf60x clock of SCLK0 domain */ | 1191 | /* Get the bf60x clock of SCLK0 domain */ |
1185 | u_long get_sclk0(void) | 1192 | u_long get_sclk0(void) |
1186 | { | 1193 | { |
1187 | struct clk *sclk0; | 1194 | return bfin_get_clk("SCLK0"); |
1188 | u_long sclk0_rate; | ||
1189 | |||
1190 | sclk0 = clk_get(NULL, "SCLK0"); | ||
1191 | if (IS_ERR(sclk0)) | ||
1192 | return 0; | ||
1193 | |||
1194 | sclk0_rate = clk_get_rate(sclk0); | ||
1195 | clk_put(sclk0); | ||
1196 | return sclk0_rate; | ||
1197 | } | 1195 | } |
1198 | EXPORT_SYMBOL(get_sclk0); | 1196 | EXPORT_SYMBOL(get_sclk0); |
1199 | 1197 | ||
1200 | /* Get the bf60x clock of SCLK1 domain */ | 1198 | /* Get the bf60x clock of SCLK1 domain */ |
1201 | u_long get_sclk1(void) | 1199 | u_long get_sclk1(void) |
1202 | { | 1200 | { |
1203 | struct clk *sclk1; | 1201 | return bfin_get_clk("SCLK1"); |
1204 | u_long sclk1_rate; | ||
1205 | |||
1206 | sclk1 = clk_get(NULL, "SCLK1"); | ||
1207 | if (IS_ERR(sclk1)) | ||
1208 | return 0; | ||
1209 | |||
1210 | sclk1_rate = clk_get_rate(sclk1); | ||
1211 | clk_put(sclk1); | ||
1212 | return sclk1_rate; | ||
1213 | } | 1202 | } |
1214 | EXPORT_SYMBOL(get_sclk1); | 1203 | EXPORT_SYMBOL(get_sclk1); |
1215 | 1204 | ||
1216 | /* Get the bf60x DRAM clock */ | 1205 | /* Get the bf60x DRAM clock */ |
1217 | u_long get_dclk(void) | 1206 | u_long get_dclk(void) |
1218 | { | 1207 | { |
1219 | struct clk *dclk; | 1208 | return bfin_get_clk("DCLK"); |
1220 | u_long dclk_rate; | ||
1221 | |||
1222 | dclk = clk_get(NULL, "DCLK"); | ||
1223 | if (IS_ERR(dclk)) | ||
1224 | return 0; | ||
1225 | |||
1226 | dclk_rate = clk_get_rate(dclk); | ||
1227 | clk_put(dclk); | ||
1228 | return dclk_rate; | ||
1229 | } | 1209 | } |
1230 | EXPORT_SYMBOL(get_dclk); | 1210 | EXPORT_SYMBOL(get_dclk); |
1231 | #endif | 1211 | #endif |
1232 | 1212 | ||
1233 | /* Get the System clock */ | 1213 | /* Get the default system clock */ |
1234 | u_long get_sclk(void) | 1214 | u_long get_sclk(void) |
1235 | { | 1215 | { |
1236 | #ifdef CONFIG_BF60x | 1216 | #ifdef CONFIG_BF60x |