Blackfin arch: Fix Bug - System with EMAC driver enabled - Core not idling

 - Disable all bits in SIC_IWR unless we are going into a real (DPMC)
   power saving mode. Any Interrupt can wake the core form it's idle state.

 - Remove deep sleep mode as it is not going to be used anywhere:
   We support sleep, sleep deeper and hibernate.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>

1 files changed, 4 insertions, 4 deletions

diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index e713b9db867d..4271ef3f201a 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -1068,13 +1068,13 @@ int __init init_arch_irq(void)
             IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
 
 #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
-        bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
-        bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
+        bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
+        bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
 # ifdef CONFIG_BF54x
-        bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
+        bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
 # endif
 #else
-        bfin_write_SIC_IWR(IWR_ENABLE_ALL);
+        bfin_write_SIC_IWR(IWR_DISABLE_ALL);
 #endif
 
         return 0;