diff options
author | Mike Frysinger <vapier.adi@gmail.com> | 2008-11-18 04:48:22 -0500 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2008-11-18 04:48:22 -0500 |
commit | 400597842452c02916a61a51f3154dd032c2d569 (patch) | |
tree | ccb11e389a940ee9d8aa5c7654afd73063bdc950 /arch/blackfin/mach-common/ints-priority.c | |
parent | b60705765a635728187e5cea5f36914886675013 (diff) |
Blackfin arch: rename irq_flags to bfin_irq_flags
rename irq_flags to bfin_irq_flags to avoid namespace
collision with common code
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-common/ints-priority.c')
-rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 2efddcecc42b..5a7c1c177d23 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c | |||
@@ -64,8 +64,8 @@ | |||
64 | * it would live otherwise). The 0x1f magic represents the IRQs we | 64 | * it would live otherwise). The 0x1f magic represents the IRQs we |
65 | * cannot actually mask out in hardware. | 65 | * cannot actually mask out in hardware. |
66 | */ | 66 | */ |
67 | unsigned long irq_flags = 0x1f; | 67 | unsigned long bfin_irq_flags = 0x1f; |
68 | EXPORT_SYMBOL(irq_flags); | 68 | EXPORT_SYMBOL(bfin_irq_flags); |
69 | #endif | 69 | #endif |
70 | 70 | ||
71 | /* The number of spurious interrupts */ | 71 | /* The number of spurious interrupts */ |
@@ -134,21 +134,21 @@ static void bfin_ack_noop(unsigned int irq) | |||
134 | 134 | ||
135 | static void bfin_core_mask_irq(unsigned int irq) | 135 | static void bfin_core_mask_irq(unsigned int irq) |
136 | { | 136 | { |
137 | irq_flags &= ~(1 << irq); | 137 | bfin_irq_flags &= ~(1 << irq); |
138 | if (!irqs_disabled()) | 138 | if (!irqs_disabled()) |
139 | local_irq_enable(); | 139 | local_irq_enable(); |
140 | } | 140 | } |
141 | 141 | ||
142 | static void bfin_core_unmask_irq(unsigned int irq) | 142 | static void bfin_core_unmask_irq(unsigned int irq) |
143 | { | 143 | { |
144 | irq_flags |= 1 << irq; | 144 | bfin_irq_flags |= 1 << irq; |
145 | /* | 145 | /* |
146 | * If interrupts are enabled, IMASK must contain the same value | 146 | * If interrupts are enabled, IMASK must contain the same value |
147 | * as irq_flags. Make sure that invariant holds. If interrupts | 147 | * as bfin_irq_flags. Make sure that invariant holds. If interrupts |
148 | * are currently disabled we need not do anything; one of the | 148 | * are currently disabled we need not do anything; one of the |
149 | * callers will take care of setting IMASK to the proper value | 149 | * callers will take care of setting IMASK to the proper value |
150 | * when reenabling interrupts. | 150 | * when reenabling interrupts. |
151 | * local_irq_enable just does "STI irq_flags", so it's exactly | 151 | * local_irq_enable just does "STI bfin_irq_flags", so it's exactly |
152 | * what we need. | 152 | * what we need. |
153 | */ | 153 | */ |
154 | if (!irqs_disabled()) | 154 | if (!irqs_disabled()) |
@@ -1048,7 +1048,7 @@ int __init init_arch_irq(void) | |||
1048 | CSYNC(); | 1048 | CSYNC(); |
1049 | 1049 | ||
1050 | printk(KERN_INFO "Configuring Blackfin Priority Driven Interrupts\n"); | 1050 | printk(KERN_INFO "Configuring Blackfin Priority Driven Interrupts\n"); |
1051 | /* IMASK=xxx is equivalent to STI xx or irq_flags=xx, | 1051 | /* IMASK=xxx is equivalent to STI xx or bfin_irq_flags=xx, |
1052 | * local_irq_enable() | 1052 | * local_irq_enable() |
1053 | */ | 1053 | */ |
1054 | program_IAR(); | 1054 | program_IAR(); |
@@ -1056,7 +1056,7 @@ int __init init_arch_irq(void) | |||
1056 | search_IAR(); | 1056 | search_IAR(); |
1057 | 1057 | ||
1058 | /* Enable interrupts IVG7-15 */ | 1058 | /* Enable interrupts IVG7-15 */ |
1059 | irq_flags |= IMASK_IVG15 | | 1059 | bfin_irq_flags |= IMASK_IVG15 | |
1060 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | | 1060 | IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | |
1061 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; | 1061 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; |
1062 | 1062 | ||