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authorMichael Hennerich <michael.hennerich@analog.com>2007-07-12 04:39:29 -0400
committerBryan Wu <bryan.wu@analog.com>2007-07-12 04:39:29 -0400
commite3f2300036b5e0f60cb64063a9686361b6be8555 (patch)
treedbb97801ef04e8a65515cfd3fdf29e594dc0bb29 /arch/blackfin/mach-common/ints-priority-sc.c
parent34e0fc89bdc1e6f50032dc43ed23167f5dbad6da (diff)
Blackfin arch: Some memory and code optimizations - Fix SYS_IRQS
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/mach-common/ints-priority-sc.c')
-rw-r--r--arch/blackfin/mach-common/ints-priority-sc.c43
1 files changed, 27 insertions, 16 deletions
diff --git a/arch/blackfin/mach-common/ints-priority-sc.c b/arch/blackfin/mach-common/ints-priority-sc.c
index 09373c94a436..c3bb2fbd6428 100644
--- a/arch/blackfin/mach-common/ints-priority-sc.c
+++ b/arch/blackfin/mach-common/ints-priority-sc.c
@@ -434,6 +434,7 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
434 struct irq_desc *intb_desc) 434 struct irq_desc *intb_desc)
435{ 435{
436 u16 i; 436 u16 i;
437 struct irq_desc *desc;
437 438
438 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += 16) { 439 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += 16) {
439 int irq = IRQ_PF0 + i; 440 int irq = IRQ_PF0 + i;
@@ -443,7 +444,7 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
443 444
444 while (mask) { 445 while (mask) {
445 if (mask & 1) { 446 if (mask & 1) {
446 struct irq_desc *desc = irq_desc + irq; 447 desc = irq_desc + irq;
447 desc->handle_irq(irq, desc); 448 desc->handle_irq(irq, desc);
448 } 449 }
449 irq++; 450 irq++;
@@ -464,7 +465,7 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
464#define PINT_BIT(x) (1 << (PINT_2_BIT(x))) 465#define PINT_BIT(x) (1 << (PINT_2_BIT(x)))
465 466
466static unsigned char irq2pint_lut[NR_PINTS]; 467static unsigned char irq2pint_lut[NR_PINTS];
467static unsigned short pint2irq_lut[NR_PINT_SYS_IRQS * NR_PINT_BITS]; 468static unsigned char pint2irq_lut[NR_PINT_SYS_IRQS * NR_PINT_BITS];
468 469
469struct pin_int_t { 470struct pin_int_t {
470 unsigned int mask_set; 471 unsigned int mask_set;
@@ -523,7 +524,7 @@ void init_pint_lut(void)
523 irq_base += (bit % 8) + ((bit / 8) & 1 ? 8 : 0); 524 irq_base += (bit % 8) + ((bit / 8) & 1 ? 8 : 0);
524 bit_pos = bit + bank * NR_PINT_BITS; 525 bit_pos = bit + bank * NR_PINT_BITS;
525 526
526 pint2irq_lut[bit_pos] = irq_base; 527 pint2irq_lut[bit_pos] = irq_base - SYS_IRQS;
527 irq2pint_lut[irq_base - SYS_IRQS] = bit_pos; 528 irq2pint_lut[irq_base - SYS_IRQS] = bit_pos;
528 529
529 } 530 }
@@ -545,9 +546,11 @@ static void bfin_gpio_ack_irq(unsigned int irq)
545static void bfin_gpio_mask_ack_irq(unsigned int irq) 546static void bfin_gpio_mask_ack_irq(unsigned int irq)
546{ 547{
547 u8 pint_val = irq2pint_lut[irq - SYS_IRQS]; 548 u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
549 u32 pintbit = PINT_BIT(pint_val);
550 u8 bank = PINT_2_BANK(pint_val);
548 551
549 pint[PINT_2_BANK(pint_val)]->request = PINT_BIT(pint_val); 552 pint[bank]->request = pintbit;
550 pint[PINT_2_BANK(pint_val)]->mask_clear = PINT_BIT(pint_val); 553 pint[bank]->mask_clear = pintbit;
551 SSYNC(); 554 SSYNC();
552} 555}
553 556
@@ -562,9 +565,11 @@ static void bfin_gpio_mask_irq(unsigned int irq)
562static void bfin_gpio_unmask_irq(unsigned int irq) 565static void bfin_gpio_unmask_irq(unsigned int irq)
563{ 566{
564 u8 pint_val = irq2pint_lut[irq - SYS_IRQS]; 567 u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
568 u32 pintbit = PINT_BIT(pint_val);
569 u8 bank = PINT_2_BANK(pint_val);
565 570
566 pint[PINT_2_BANK(pint_val)]->request = PINT_BIT(pint_val); 571 pint[bank]->request = pintbit;
567 pint[PINT_2_BANK(pint_val)]->mask_set = PINT_BIT(pint_val); 572 pint[bank]->mask_set = pintbit;
568 SSYNC(); 573 SSYNC();
569} 574}
570 575
@@ -602,6 +607,8 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
602 unsigned int ret; 607 unsigned int ret;
603 u16 gpionr = irq - IRQ_PA0; 608 u16 gpionr = irq - IRQ_PA0;
604 u8 pint_val = irq2pint_lut[irq - SYS_IRQS]; 609 u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
610 u32 pintbit = PINT_BIT(pint_val);
611 u8 bank = PINT_2_BANK(pint_val);
605 612
606 if (pint_val == IRQ_NOT_AVAIL) 613 if (pint_val == IRQ_NOT_AVAIL)
607 return -ENODEV; 614 return -ENODEV;
@@ -630,20 +637,20 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
630 gpio_direction_input(gpionr); 637 gpio_direction_input(gpionr);
631 638
632 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { 639 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
633 pint[PINT_2_BANK(pint_val)]->edge_set = PINT_BIT(pint_val); 640 pint[bank]->edge_set = pintbit;
634 } else { 641 } else {
635 pint[PINT_2_BANK(pint_val)]->edge_clear = PINT_BIT(pint_val); 642 pint[bank]->edge_clear = pintbit;
636 } 643 }
637 644
638 if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW))) 645 if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)))
639 pint[PINT_2_BANK(pint_val)]->invert_set = PINT_BIT(pint_val); /* low or falling edge denoted by one */ 646 pint[bank]->invert_set = pintbit; /* low or falling edge denoted by one */
640 else 647 else
641 pint[PINT_2_BANK(pint_val)]->invert_set = PINT_BIT(pint_val); /* high or rising edge denoted by zero */ 648 pint[bank]->invert_set = pintbit; /* high or rising edge denoted by zero */
642 649
643 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) 650 if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
644 pint[PINT_2_BANK(pint_val)]->invert_set = PINT_BIT(pint_val); 651 pint[bank]->invert_set = pintbit;
645 else 652 else
646 pint[PINT_2_BANK(pint_val)]->invert_set = PINT_BIT(pint_val); 653 pint[bank]->invert_set = pintbit;
647 654
648 SSYNC(); 655 SSYNC();
649 656
@@ -670,6 +677,7 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
670{ 677{
671 u8 bank, pint_val; 678 u8 bank, pint_val;
672 u32 request, irq; 679 u32 request, irq;
680 struct irq_desc *desc;
673 681
674 switch (intb_irq) { 682 switch (intb_irq) {
675 case IRQ_PINT0: 683 case IRQ_PINT0:
@@ -684,6 +692,8 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
684 case IRQ_PINT1: 692 case IRQ_PINT1:
685 bank = 1; 693 bank = 1;
686 break; 694 break;
695 default:
696 return;
687 } 697 }
688 698
689 pint_val = bank * NR_PINT_BITS; 699 pint_val = bank * NR_PINT_BITS;
@@ -692,8 +702,8 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
692 702
693 while (request) { 703 while (request) {
694 if (request & 1) { 704 if (request & 1) {
695 irq = pint2irq_lut[pint_val]; 705 irq = pint2irq_lut[pint_val] + SYS_IRQS;
696 struct irq_desc *desc = irq_desc + irq; 706 desc = irq_desc + irq;
697 desc->handle_irq(irq, desc); 707 desc->handle_irq(irq, desc);
698 } 708 }
699 pint_val++; 709 pint_val++;
@@ -868,7 +878,8 @@ void do_irq(int vec, struct pt_regs *fp)
868 sic_status[0] = bfin_read_SIC_ISR(0) & bfin_read_SIC_IMASK(0); 878 sic_status[0] = bfin_read_SIC_ISR(0) & bfin_read_SIC_IMASK(0);
869 sic_status[1] = bfin_read_SIC_ISR(1) & bfin_read_SIC_IMASK(1); 879 sic_status[1] = bfin_read_SIC_ISR(1) & bfin_read_SIC_IMASK(1);
870 sic_status[2] = bfin_read_SIC_ISR(2) & bfin_read_SIC_IMASK(2); 880 sic_status[2] = bfin_read_SIC_ISR(2) & bfin_read_SIC_IMASK(2);
871 SSYNC(); 881
882
872 for (;; ivg++) { 883 for (;; ivg++) {
873 if (ivg >= ivg_stop) { 884 if (ivg >= ivg_stop) {
874 atomic_inc(&num_spurious); 885 atomic_inc(&num_spurious);