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authorMike Frysinger <michael.frysinger@analog.com>2007-07-24 22:11:42 -0400
committerBryan Wu <bryan.wu@analog.com>2007-07-24 22:11:42 -0400
commite208f83a7aa4ebf6c0a68e814903e8aa33f9439a (patch)
treea45d34fa199c8e5d75878d8a2f15e944eadce852 /arch/blackfin/mach-common/dpmc.S
parent36a1548f99e54520f049a703e1b91bae95e72481 (diff)
Blackfin arch: use HI/LO macros rather than masking the bit ranges ourselves
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/mach-common/dpmc.S')
-rw-r--r--arch/blackfin/mach-common/dpmc.S52
1 files changed, 26 insertions, 26 deletions
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc.S
index 97cdcd6a00d4..04194dca0151 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc.S
@@ -39,8 +39,8 @@ ENTRY(_unmask_wdog_wakeup_evt)
39 P0.H = hi(SICA_IWR1); 39 P0.H = hi(SICA_IWR1);
40 P0.L = lo(SICA_IWR1); 40 P0.L = lo(SICA_IWR1);
41#else 41#else
42 P0.h = (SIC_IWR >> 16); 42 P0.h = HI(SIC_IWR);
43 P0.l = (SIC_IWR & 0xFFFF); 43 P0.l = LO(SIC_IWR);
44#endif 44#endif
45 R7 = [P0]; 45 R7 = [P0];
46#if defined(CONFIG_BF561) 46#if defined(CONFIG_BF561)
@@ -60,11 +60,11 @@ ENTRY(_unmask_wdog_wakeup_evt)
60 */ 60 */
61 R7 = 0x0000(z); 61 R7 = 0x0000(z);
62#if defined(CONFIG_BF561) 62#if defined(CONFIG_BF561)
63 P0.h = (WDOGA_STAT >> 16); 63 P0.h = HI(WDOGA_STAT);
64 P0.l = (WDOGA_STAT & 0xFFFF); 64 P0.l = LO(WDOGA_STAT);
65#else 65#else
66 P0.h = (WDOG_STAT >> 16); 66 P0.h = HI(WDOG_STAT);
67 P0.l = (WDOG_STAT & 0xFFFF); 67 P0.l = LO(WDOG_STAT);
68#endif 68#endif
69 [P0] = R7; 69 [P0] = R7;
70 SSYNC; 70 SSYNC;
@@ -73,21 +73,21 @@ ENTRY(_unmask_wdog_wakeup_evt)
73ENTRY(_program_wdog_timer) 73ENTRY(_program_wdog_timer)
74 [--SP] = ( R7:0, P5:0 ); 74 [--SP] = ( R7:0, P5:0 );
75#if defined(CONFIG_BF561) 75#if defined(CONFIG_BF561)
76 P0.h = (WDOGA_CNT >> 16); 76 P0.h = HI(WDOGA_CNT);
77 P0.l = (WDOGA_CNT & 0xFFFF); 77 P0.l = LO(WDOGA_CNT);
78#else 78#else
79 P0.h = (WDOG_CNT >> 16); 79 P0.h = HI(WDOG_CNT);
80 P0.l = (WDOG_CNT & 0xFFFF); 80 P0.l = LO(WDOG_CNT);
81#endif 81#endif
82 [P0] = R0; 82 [P0] = R0;
83 SSYNC; 83 SSYNC;
84 84
85#if defined(CONFIG_BF561) 85#if defined(CONFIG_BF561)
86 P0.h = (WDOGA_CTL >> 16); 86 P0.h = HI(WDOGA_CTL);
87 P0.l = (WDOGA_CTL & 0xFFFF); 87 P0.l = LO(WDOGA_CTL);
88#else 88#else
89 P0.h = (WDOG_CTL >> 16); 89 P0.h = HI(WDOG_CTL);
90 P0.l = (WDOG_CTL & 0xFFFF); 90 P0.l = LO(WDOG_CTL);
91#endif 91#endif
92 R7 = W[P0](Z); 92 R7 = W[P0](Z);
93 CC = BITTST(R7,1); 93 CC = BITTST(R7,1);
@@ -97,11 +97,11 @@ ENTRY(_program_wdog_timer)
97 97
98.LSKIP_WRITE_TO_STAT: 98.LSKIP_WRITE_TO_STAT:
99#if defined(CONFIG_BF561) 99#if defined(CONFIG_BF561)
100 P0.h = (WDOGA_CTL >> 16); 100 P0.h = HI(WDOGA_CTL);
101 P0.l = (WDOGA_CTL & 0xFFFF); 101 P0.l = LO(WDOGA_CTL);
102#else 102#else
103 P0.h = (WDOG_CTL >> 16); 103 P0.h = HI(WDOG_CTL);
104 P0.l = (WDOG_CTL & 0xFFFF); 104 P0.l = LO(WDOG_CTL);
105#endif 105#endif
106 R7 = W[P0](Z); 106 R7 = W[P0](Z);
107 BITCLR(R7,1); /* Enable GP event */ 107 BITCLR(R7,1); /* Enable GP event */
@@ -122,11 +122,11 @@ ENTRY(_clear_wdog_wakeup_evt)
122 [--SP] = ( R7:0, P5:0 ); 122 [--SP] = ( R7:0, P5:0 );
123 123
124#if defined(CONFIG_BF561) 124#if defined(CONFIG_BF561)
125 P0.h = (WDOGA_CTL >> 16); 125 P0.h = HI(WDOGA_CTL);
126 P0.l = (WDOGA_CTL & 0xFFFF); 126 P0.l = LO(WDOGA_CTL);
127#else 127#else
128 P0.h = (WDOG_CTL >> 16); 128 P0.h = HI(WDOG_CTL);
129 P0.l = (WDOG_CTL & 0xFFFF); 129 P0.l = LO(WDOG_CTL);
130#endif 130#endif
131 R7 = 0x0AD6(Z); 131 R7 = 0x0AD6(Z);
132 W[P0] = R7.L; 132 W[P0] = R7.L;
@@ -149,11 +149,11 @@ ENTRY(_clear_wdog_wakeup_evt)
149ENTRY(_disable_wdog_timer) 149ENTRY(_disable_wdog_timer)
150 [--SP] = ( R7:0, P5:0 ); 150 [--SP] = ( R7:0, P5:0 );
151#if defined(CONFIG_BF561) 151#if defined(CONFIG_BF561)
152 P0.h = (WDOGA_CTL >> 16); 152 P0.h = HI(WDOGA_CTL);
153 P0.l = (WDOGA_CTL & 0xFFFF); 153 P0.l = LO(WDOGA_CTL);
154#else 154#else
155 P0.h = (WDOG_CTL >> 16); 155 P0.h = HI(WDOG_CTL);
156 P0.l = (WDOG_CTL & 0xFFFF); 156 P0.l = LO(WDOG_CTL);
157#endif 157#endif
158 R7 = 0xAD6(Z); 158 R7 = 0xAD6(Z);
159 W[P0] = R7.L; 159 W[P0] = R7.L;