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authorYi Li <yi.li@analog.com>2009-12-28 05:21:49 -0500
committerMike Frysinger <vapier@gentoo.org>2010-03-09 00:30:48 -0500
commit0d152c27e336b5fd777da7dd3e814617e7305afd (patch)
tree2863b1b2f0fe0676a5928b197c8d1d289ab71777 /arch/blackfin/mach-bf561
parent682f5dc4ed7cdef1f55e40ee505c4346dfa6fa91 (diff)
Blackfin: SMP: make core timers per-cpu clock events for HRT
SMP systems require per-cpu local clock event devices in order to enable HRT support. One a BF561, we can use local core timer for this purpose. Originally, there was one global core-timer clock event device set up for core A. To accomplish this feat, we need to split the gptimer0/core timer logic so that each is a standalone clock event. There is no requirement that we only have one clock event source anyways. Once we have this, we just define per-cpu clock event devices for each local core timer. Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf561')
-rw-r--r--arch/blackfin/mach-bf561/include/mach/smp.h2
-rw-r--r--arch/blackfin/mach-bf561/smp.c18
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/smp.h b/arch/blackfin/mach-bf561/include/mach/smp.h
index 390c7f4ae7b3..2c8c514dd386 100644
--- a/arch/blackfin/mach-bf561/include/mach/smp.h
+++ b/arch/blackfin/mach-bf561/include/mach/smp.h
@@ -25,4 +25,6 @@ void platform_send_ipi_cpu(unsigned int cpu);
25 25
26void platform_clear_ipi(unsigned int cpu); 26void platform_clear_ipi(unsigned int cpu);
27 27
28void bfin_local_timer_setup(void);
29
28#endif /* !_MACH_BF561_SMP */ 30#endif /* !_MACH_BF561_SMP */
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c
index ec93f3ef8fa3..90369429ee66 100644
--- a/arch/blackfin/mach-bf561/smp.c
+++ b/arch/blackfin/mach-bf561/smp.c
@@ -11,6 +11,7 @@
11#include <linux/delay.h> 11#include <linux/delay.h>
12#include <asm/smp.h> 12#include <asm/smp.h>
13#include <asm/dma.h> 13#include <asm/dma.h>
14#include <asm/time.h>
14 15
15static DEFINE_SPINLOCK(boot_lock); 16static DEFINE_SPINLOCK(boot_lock);
16 17
@@ -144,3 +145,20 @@ void platform_clear_ipi(unsigned int cpu)
144 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + cpu))); 145 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + cpu)));
145 SSYNC(); 146 SSYNC();
146} 147}
148
149/*
150 * Setup core B's local core timer.
151 * In SMP, core timer is used for clock event device.
152 */
153void __cpuinit bfin_local_timer_setup(void)
154{
155#if defined(CONFIG_TICKSOURCE_CORETMR)
156 bfin_coretmr_init();
157 bfin_coretmr_clockevent_init();
158 get_irq_chip(IRQ_CORETMR)->unmask(IRQ_CORETMR);
159#else
160 /* Power down the core timer, just to play safe. */
161 bfin_write_TCNTL(0);
162#endif
163
164}