diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-19 08:47:57 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-19 08:47:57 -0400 |
commit | 40d743b8c16a8cf6e30c1d941aa6147f9550ea75 (patch) | |
tree | 9fcdf9a06b18a275253048d1ea7c9803cec38845 /arch/blackfin/mach-bf561/secondary.S | |
parent | 7da18afa423f167e7ef3c9728e584d8bf05bd55a (diff) | |
parent | 83e686ea0291ee93b87dcdc00b96443b80de56c9 (diff) |
Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6
Diffstat (limited to 'arch/blackfin/mach-bf561/secondary.S')
-rw-r--r-- | arch/blackfin/mach-bf561/secondary.S | 28 |
1 files changed, 8 insertions, 20 deletions
diff --git a/arch/blackfin/mach-bf561/secondary.S b/arch/blackfin/mach-bf561/secondary.S index 35280f06b7b6..f72a6af20c4f 100644 --- a/arch/blackfin/mach-bf561/secondary.S +++ b/arch/blackfin/mach-bf561/secondary.S | |||
@@ -85,16 +85,10 @@ ENTRY(_coreb_trampoline_start) | |||
85 | R0 = ~ENICPLB; | 85 | R0 = ~ENICPLB; |
86 | R0 = R0 & R1; | 86 | R0 = R0 & R1; |
87 | 87 | ||
88 | /* Anomaly 05000125 */ | 88 | /* Disabling of CPLBs should be proceeded by a CSYNC */ |
89 | #ifdef ANOMALY_05000125 | 89 | CSYNC; |
90 | CLI R2; | ||
91 | SSYNC; | ||
92 | #endif | ||
93 | [p0] = R0; | 90 | [p0] = R0; |
94 | SSYNC; | 91 | SSYNC; |
95 | #ifdef ANOMALY_05000125 | ||
96 | STI R2; | ||
97 | #endif | ||
98 | 92 | ||
99 | /* Turn off the dcache */ | 93 | /* Turn off the dcache */ |
100 | p0.l = LO(DMEM_CONTROL); | 94 | p0.l = LO(DMEM_CONTROL); |
@@ -103,16 +97,10 @@ ENTRY(_coreb_trampoline_start) | |||
103 | R0 = ~ENDCPLB; | 97 | R0 = ~ENDCPLB; |
104 | R0 = R0 & R1; | 98 | R0 = R0 & R1; |
105 | 99 | ||
106 | /* Anomaly 05000125 */ | 100 | /* Disabling of CPLBs should be proceeded by a CSYNC */ |
107 | #ifdef ANOMALY_05000125 | 101 | CSYNC; |
108 | CLI R2; | ||
109 | SSYNC; | ||
110 | #endif | ||
111 | [p0] = R0; | 102 | [p0] = R0; |
112 | SSYNC; | 103 | SSYNC; |
113 | #ifdef ANOMALY_05000125 | ||
114 | STI R2; | ||
115 | #endif | ||
116 | 104 | ||
117 | /* in case of double faults, save a few things */ | 105 | /* in case of double faults, save a few things */ |
118 | p0.l = _init_retx_coreb; | 106 | p0.l = _init_retx_coreb; |
@@ -126,22 +114,22 @@ ENTRY(_coreb_trampoline_start) | |||
126 | * below | 114 | * below |
127 | */ | 115 | */ |
128 | GET_PDA(p0, r0); | 116 | GET_PDA(p0, r0); |
129 | r7 = [p0 + PDA_RETX]; | 117 | r7 = [p0 + PDA_DF_RETX]; |
130 | p1.l = _init_saved_retx_coreb; | 118 | p1.l = _init_saved_retx_coreb; |
131 | p1.h = _init_saved_retx_coreb; | 119 | p1.h = _init_saved_retx_coreb; |
132 | [p1] = r7; | 120 | [p1] = r7; |
133 | 121 | ||
134 | r7 = [p0 + PDA_DCPLB]; | 122 | r7 = [p0 + PDA_DF_DCPLB]; |
135 | p1.l = _init_saved_dcplb_fault_addr_coreb; | 123 | p1.l = _init_saved_dcplb_fault_addr_coreb; |
136 | p1.h = _init_saved_dcplb_fault_addr_coreb; | 124 | p1.h = _init_saved_dcplb_fault_addr_coreb; |
137 | [p1] = r7; | 125 | [p1] = r7; |
138 | 126 | ||
139 | r7 = [p0 + PDA_ICPLB]; | 127 | r7 = [p0 + PDA_DF_ICPLB]; |
140 | p1.l = _init_saved_icplb_fault_addr_coreb; | 128 | p1.l = _init_saved_icplb_fault_addr_coreb; |
141 | p1.h = _init_saved_icplb_fault_addr_coreb; | 129 | p1.h = _init_saved_icplb_fault_addr_coreb; |
142 | [p1] = r7; | 130 | [p1] = r7; |
143 | 131 | ||
144 | r7 = [p0 + PDA_SEQSTAT]; | 132 | r7 = [p0 + PDA_DF_SEQSTAT]; |
145 | p1.l = _init_saved_seqstat_coreb; | 133 | p1.l = _init_saved_seqstat_coreb; |
146 | p1.h = _init_saved_seqstat_coreb; | 134 | p1.h = _init_saved_seqstat_coreb; |
147 | [p1] = r7; | 135 | [p1] = r7; |