diff options
author | Mike Frysinger <vapier@gentoo.org> | 2010-07-29 01:53:33 -0400 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2010-08-06 12:55:56 -0400 |
commit | 39750324053c2aa4314e460b5ce1767f4dfbeff1 (patch) | |
tree | fecee75496cdc5b3ab05dcb8f0c441b6ef8d408f /arch/blackfin/mach-bf548 | |
parent | c385acceb4db55a492cb16b24b6102af90348440 (diff) |
Blackfin: unify rotary encoder bitmasks
Avoid duplication and ugly global namespace pollution.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf548')
-rw-r--r-- | arch/blackfin/mach-bf548/include/mach/defBF54x_base.h | 78 |
1 files changed, 0 insertions, 78 deletions
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h index 4b33b18de0bb..95ff44601fd1 100644 --- a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h +++ b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h | |||
@@ -1958,57 +1958,6 @@ | |||
1958 | #define TRUN6 0x40000000 /* Timer 6 Slave Enable Status */ | 1958 | #define TRUN6 0x40000000 /* Timer 6 Slave Enable Status */ |
1959 | #define TRUN7 0x80000000 /* Timer 7 Slave Enable Status */ | 1959 | #define TRUN7 0x80000000 /* Timer 7 Slave Enable Status */ |
1960 | 1960 | ||
1961 | /* Bit masks for CNT_CONFIG */ | ||
1962 | |||
1963 | #define CNTE 0x1 /* Counter Enable */ | ||
1964 | #define DEBE 0x2 /* Debounce Enable */ | ||
1965 | #define CDGINV 0x10 /* CDG Pin Polarity Invert */ | ||
1966 | #define CUDINV 0x20 /* CUD Pin Polarity Invert */ | ||
1967 | #define CZMINV 0x40 /* CZM Pin Polarity Invert */ | ||
1968 | #define CNTMODE 0x700 /* Counter Operating Mode */ | ||
1969 | #define ZMZC 0x800 /* CZM Zeroes Counter Enable */ | ||
1970 | #define BNDMODE 0x3000 /* Boundary register Mode */ | ||
1971 | #define INPDIS 0x8000 /* CUG and CDG Input Disable */ | ||
1972 | |||
1973 | /* Bit masks for CNT_IMASK */ | ||
1974 | |||
1975 | #define ICIE 0x1 /* Illegal Gray/Binary Code Interrupt Enable */ | ||
1976 | #define UCIE 0x2 /* Up count Interrupt Enable */ | ||
1977 | #define DCIE 0x4 /* Down count Interrupt Enable */ | ||
1978 | #define MINCIE 0x8 /* Min Count Interrupt Enable */ | ||
1979 | #define MAXCIE 0x10 /* Max Count Interrupt Enable */ | ||
1980 | #define COV31IE 0x20 /* Bit 31 Overflow Interrupt Enable */ | ||
1981 | #define COV15IE 0x40 /* Bit 15 Overflow Interrupt Enable */ | ||
1982 | #define CZEROIE 0x80 /* Count to Zero Interrupt Enable */ | ||
1983 | #define CZMIE 0x100 /* CZM Pin Interrupt Enable */ | ||
1984 | #define CZMEIE 0x200 /* CZM Error Interrupt Enable */ | ||
1985 | #define CZMZIE 0x400 /* CZM Zeroes Counter Interrupt Enable */ | ||
1986 | |||
1987 | /* Bit masks for CNT_STATUS */ | ||
1988 | |||
1989 | #define ICII 0x1 /* Illegal Gray/Binary Code Interrupt Identifier */ | ||
1990 | #define UCII 0x2 /* Up count Interrupt Identifier */ | ||
1991 | #define DCII 0x4 /* Down count Interrupt Identifier */ | ||
1992 | #define MINCII 0x8 /* Min Count Interrupt Identifier */ | ||
1993 | #define MAXCII 0x10 /* Max Count Interrupt Identifier */ | ||
1994 | #define COV31II 0x20 /* Bit 31 Overflow Interrupt Identifier */ | ||
1995 | #define COV15II 0x40 /* Bit 15 Overflow Interrupt Identifier */ | ||
1996 | #define CZEROII 0x80 /* Count to Zero Interrupt Identifier */ | ||
1997 | #define CZMII 0x100 /* CZM Pin Interrupt Identifier */ | ||
1998 | #define CZMEII 0x200 /* CZM Error Interrupt Identifier */ | ||
1999 | #define CZMZII 0x400 /* CZM Zeroes Counter Interrupt Identifier */ | ||
2000 | |||
2001 | /* Bit masks for CNT_COMMAND */ | ||
2002 | |||
2003 | #define W1LCNT 0xf /* Load Counter Register */ | ||
2004 | #define W1LMIN 0xf0 /* Load Min Register */ | ||
2005 | #define W1LMAX 0xf00 /* Load Max Register */ | ||
2006 | #define W1ZMONCE 0x1000 /* Enable CZM Clear Counter Once */ | ||
2007 | |||
2008 | /* Bit masks for CNT_DEBOUNCE */ | ||
2009 | |||
2010 | #define DPRESCALE 0xf /* Load Counter Register */ | ||
2011 | |||
2012 | /* Bit masks for SECURE_SYSSWT */ | 1961 | /* Bit masks for SECURE_SYSSWT */ |
2013 | 1962 | ||
2014 | #define EMUDABL 0x1 /* Emulation Disable. */ | 1963 | #define EMUDABL 0x1 /* Emulation Disable. */ |
@@ -2412,33 +2361,6 @@ | |||
2412 | #define BCODE_QUICKBOOT 0x0020 /* always perform quick boot */ | 2361 | #define BCODE_QUICKBOOT 0x0020 /* always perform quick boot */ |
2413 | #define BCODE_NOBOOT 0x0030 /* always perform full boot */ | 2362 | #define BCODE_NOBOOT 0x0030 /* always perform full boot */ |
2414 | 2363 | ||
2415 | /* CNT_COMMAND bit field options */ | ||
2416 | |||
2417 | #define W1LCNT_ZERO 0x0001 /* write 1 to load CNT_COUNTER with zero */ | ||
2418 | #define W1LCNT_MIN 0x0004 /* write 1 to load CNT_COUNTER from CNT_MIN */ | ||
2419 | #define W1LCNT_MAX 0x0008 /* write 1 to load CNT_COUNTER from CNT_MAX */ | ||
2420 | |||
2421 | #define W1LMIN_ZERO 0x0010 /* write 1 to load CNT_MIN with zero */ | ||
2422 | #define W1LMIN_CNT 0x0020 /* write 1 to load CNT_MIN from CNT_COUNTER */ | ||
2423 | #define W1LMIN_MAX 0x0080 /* write 1 to load CNT_MIN from CNT_MAX */ | ||
2424 | |||
2425 | #define W1LMAX_ZERO 0x0100 /* write 1 to load CNT_MAX with zero */ | ||
2426 | #define W1LMAX_CNT 0x0200 /* write 1 to load CNT_MAX from CNT_COUNTER */ | ||
2427 | #define W1LMAX_MIN 0x0400 /* write 1 to load CNT_MAX from CNT_MIN */ | ||
2428 | |||
2429 | /* CNT_CONFIG bit field options */ | ||
2430 | |||
2431 | #define CNTMODE_QUADENC 0x0000 /* quadrature encoder mode */ | ||
2432 | #define CNTMODE_BINENC 0x0100 /* binary encoder mode */ | ||
2433 | #define CNTMODE_UDCNT 0x0200 /* up/down counter mode */ | ||
2434 | #define CNTMODE_DIRCNT 0x0400 /* direction counter mode */ | ||
2435 | #define CNTMODE_DIRTMR 0x0500 /* direction timer mode */ | ||
2436 | |||
2437 | #define BNDMODE_COMP 0x0000 /* boundary compare mode */ | ||
2438 | #define BNDMODE_ZERO 0x1000 /* boundary compare and zero mode */ | ||
2439 | #define BNDMODE_CAPT 0x2000 /* boundary capture mode */ | ||
2440 | #define BNDMODE_AEXT 0x3000 /* boundary auto-extend mode */ | ||
2441 | |||
2442 | /* TMODE in TIMERx_CONFIG bit field options */ | 2364 | /* TMODE in TIMERx_CONFIG bit field options */ |
2443 | 2365 | ||
2444 | #define PWM_OUT 0x0001 | 2366 | #define PWM_OUT 0x0001 |