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authorMike Frysinger <vapier@gentoo.org>2010-10-25 21:11:10 -0400
committerMike Frysinger <vapier@gentoo.org>2011-01-10 07:18:06 -0500
commit4de2bf8786ec8ec9a45b556e1ddf5c80c807a361 (patch)
tree7ac3dbd87b81d207c8417b5e581122ff5dba0fa4 /arch/blackfin/mach-bf548/include/mach
parent9887f41533c860777b2fcf2eccf04f95980ab52a (diff)
Blackfin: push gpio (port) defines into common headers
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf548/include/mach')
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF54x_base.h234
-rw-r--r--arch/blackfin/mach-bf548/include/mach/gpio.h11
2 files changed, 11 insertions, 234 deletions
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
index 7a74a5dc8fd7..fef43f59d0ff 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h
@@ -2231,240 +2231,6 @@
2231#define PIQ30 0x40000000 2231#define PIQ30 0x40000000
2232#define PIQ31 0x80000000 2232#define PIQ31 0x80000000
2233 2233
2234/* PORT A Bit Definitions for the registers
2235PORTA, PORTA_SET, PORTA_CLEAR,
2236PORTA_DIR_SET, PORTA_DIR_CLEAR, PORTA_INEN,
2237PORTA_FER registers
2238*/
2239
2240#define PA0 0x0001
2241#define PA1 0x0002
2242#define PA2 0x0004
2243#define PA3 0x0008
2244#define PA4 0x0010
2245#define PA5 0x0020
2246#define PA6 0x0040
2247#define PA7 0x0080
2248#define PA8 0x0100
2249#define PA9 0x0200
2250#define PA10 0x0400
2251#define PA11 0x0800
2252#define PA12 0x1000
2253#define PA13 0x2000
2254#define PA14 0x4000
2255#define PA15 0x8000
2256
2257/* PORT B Bit Definitions for the registers
2258PORTB, PORTB_SET, PORTB_CLEAR,
2259PORTB_DIR_SET, PORTB_DIR_CLEAR, PORTB_INEN,
2260PORTB_FER registers
2261*/
2262
2263#define PB0 0x0001
2264#define PB1 0x0002
2265#define PB2 0x0004
2266#define PB3 0x0008
2267#define PB4 0x0010
2268#define PB5 0x0020
2269#define PB6 0x0040
2270#define PB7 0x0080
2271#define PB8 0x0100
2272#define PB9 0x0200
2273#define PB10 0x0400
2274#define PB11 0x0800
2275#define PB12 0x1000
2276#define PB13 0x2000
2277#define PB14 0x4000
2278
2279
2280/* PORT C Bit Definitions for the registers
2281PORTC, PORTC_SET, PORTC_CLEAR,
2282PORTC_DIR_SET, PORTC_DIR_CLEAR, PORTC_INEN,
2283PORTC_FER registers
2284*/
2285
2286
2287#define PC0 0x0001
2288#define PC1 0x0002
2289#define PC2 0x0004
2290#define PC3 0x0008
2291#define PC4 0x0010
2292#define PC5 0x0020
2293#define PC6 0x0040
2294#define PC7 0x0080
2295#define PC8 0x0100
2296#define PC9 0x0200
2297#define PC10 0x0400
2298#define PC11 0x0800
2299#define PC12 0x1000
2300#define PC13 0x2000
2301
2302
2303/* PORT D Bit Definitions for the registers
2304PORTD, PORTD_SET, PORTD_CLEAR,
2305PORTD_DIR_SET, PORTD_DIR_CLEAR, PORTD_INEN,
2306PORTD_FER registers
2307*/
2308
2309#define PD0 0x0001
2310#define PD1 0x0002
2311#define PD2 0x0004
2312#define PD3 0x0008
2313#define PD4 0x0010
2314#define PD5 0x0020
2315#define PD6 0x0040
2316#define PD7 0x0080
2317#define PD8 0x0100
2318#define PD9 0x0200
2319#define PD10 0x0400
2320#define PD11 0x0800
2321#define PD12 0x1000
2322#define PD13 0x2000
2323#define PD14 0x4000
2324#define PD15 0x8000
2325
2326/* PORT E Bit Definitions for the registers
2327PORTE, PORTE_SET, PORTE_CLEAR,
2328PORTE_DIR_SET, PORTE_DIR_CLEAR, PORTE_INEN,
2329PORTE_FER registers
2330*/
2331
2332
2333#define PE0 0x0001
2334#define PE1 0x0002
2335#define PE2 0x0004
2336#define PE3 0x0008
2337#define PE4 0x0010
2338#define PE5 0x0020
2339#define PE6 0x0040
2340#define PE7 0x0080
2341#define PE8 0x0100
2342#define PE9 0x0200
2343#define PE10 0x0400
2344#define PE11 0x0800
2345#define PE12 0x1000
2346#define PE13 0x2000
2347#define PE14 0x4000
2348#define PE15 0x8000
2349
2350/* PORT F Bit Definitions for the registers
2351PORTF, PORTF_SET, PORTF_CLEAR,
2352PORTF_DIR_SET, PORTF_DIR_CLEAR, PORTF_INEN,
2353PORTF_FER registers
2354*/
2355
2356
2357#define PF0 0x0001
2358#define PF1 0x0002
2359#define PF2 0x0004
2360#define PF3 0x0008
2361#define PF4 0x0010
2362#define PF5 0x0020
2363#define PF6 0x0040
2364#define PF7 0x0080
2365#define PF8 0x0100
2366#define PF9 0x0200
2367#define PF10 0x0400
2368#define PF11 0x0800
2369#define PF12 0x1000
2370#define PF13 0x2000
2371#define PF14 0x4000
2372#define PF15 0x8000
2373
2374/* PORT G Bit Definitions for the registers
2375PORTG, PORTG_SET, PORTG_CLEAR,
2376PORTG_DIR_SET, PORTG_DIR_CLEAR, PORTG_INEN,
2377PORTG_FER registers
2378*/
2379
2380
2381#define PG0 0x0001
2382#define PG1 0x0002
2383#define PG2 0x0004
2384#define PG3 0x0008
2385#define PG4 0x0010
2386#define PG5 0x0020
2387#define PG6 0x0040
2388#define PG7 0x0080
2389#define PG8 0x0100
2390#define PG9 0x0200
2391#define PG10 0x0400
2392#define PG11 0x0800
2393#define PG12 0x1000
2394#define PG13 0x2000
2395#define PG14 0x4000
2396#define PG15 0x8000
2397
2398/* PORT H Bit Definitions for the registers
2399PORTH, PORTH_SET, PORTH_CLEAR,
2400PORTH_DIR_SET, PORTH_DIR_CLEAR, PORTH_INEN,
2401PORTH_FER registers
2402*/
2403
2404
2405#define PH0 0x0001
2406#define PH1 0x0002
2407#define PH2 0x0004
2408#define PH3 0x0008
2409#define PH4 0x0010
2410#define PH5 0x0020
2411#define PH6 0x0040
2412#define PH7 0x0080
2413#define PH8 0x0100
2414#define PH9 0x0200
2415#define PH10 0x0400
2416#define PH11 0x0800
2417#define PH12 0x1000
2418#define PH13 0x2000
2419
2420
2421/* PORT I Bit Definitions for the registers
2422PORTI, PORTI_SET, PORTI_CLEAR,
2423PORTI_DIR_SET, PORTI_DIR_CLEAR, PORTI_INEN,
2424PORTI_FER registers
2425*/
2426
2427
2428#define PI0 0x0001
2429#define PI1 0x0002
2430#define PI2 0x0004
2431#define PI3 0x0008
2432#define PI4 0x0010
2433#define PI5 0x0020
2434#define PI6 0x0040
2435#define PI7 0x0080
2436#define PI8 0x0100
2437#define PI9 0x0200
2438#define PI10 0x0400
2439#define PI11 0x0800
2440#define PI12 0x1000
2441#define PI13 0x2000
2442#define PI14 0x4000
2443#define PI15 0x8000
2444
2445/* PORT J Bit Definitions for the registers
2446PORTJ, PORTJ_SET, PORTJ_CLEAR,
2447PORTJ_DIR_SET, PORTJ_DIR_CLEAR, PORTJ_INEN,
2448PORTJ_FER registers
2449*/
2450
2451
2452#define PJ0 0x0001
2453#define PJ1 0x0002
2454#define PJ2 0x0004
2455#define PJ3 0x0008
2456#define PJ4 0x0010
2457#define PJ5 0x0020
2458#define PJ6 0x0040
2459#define PJ7 0x0080
2460#define PJ8 0x0100
2461#define PJ9 0x0200
2462#define PJ10 0x0400
2463#define PJ11 0x0800
2464#define PJ12 0x1000
2465#define PJ13 0x2000
2466
2467
2468/* Port Muxing Bit Fields for PORTx_MUX Registers */ 2234/* Port Muxing Bit Fields for PORTx_MUX Registers */
2469 2235
2470#define MUX0 0x00000003 2236#define MUX0 0x00000003
diff --git a/arch/blackfin/mach-bf548/include/mach/gpio.h b/arch/blackfin/mach-bf548/include/mach/gpio.h
index 28037e331964..7db433514e3f 100644
--- a/arch/blackfin/mach-bf548/include/mach/gpio.h
+++ b/arch/blackfin/mach-bf548/include/mach/gpio.h
@@ -200,4 +200,15 @@ struct gpio_port_s {
200 200
201#endif 201#endif
202 202
203#include <mach-common/ports-a.h>
204#include <mach-common/ports-b.h>
205#include <mach-common/ports-c.h>
206#include <mach-common/ports-d.h>
207#include <mach-common/ports-e.h>
208#include <mach-common/ports-f.h>
209#include <mach-common/ports-g.h>
210#include <mach-common/ports-h.h>
211#include <mach-common/ports-i.h>
212#include <mach-common/ports-j.h>
213
203#endif /* _MACH_GPIO_H_ */ 214#endif /* _MACH_GPIO_H_ */