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authorBryan Wu <bryan.wu@analog.com>2007-05-06 17:50:22 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-07 15:12:58 -0400
commit1394f03221790a988afc3e4b3cb79f2e477246a9 (patch)
tree2c1963c9a4f2d84a5e021307fde240c5d567cf70 /arch/blackfin/mach-bf537/boards
parent73243284463a761e04d69d22c7516b2be7de096c (diff)
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/blackfin/mach-bf537/boards')
-rw-r--r--arch/blackfin/mach-bf537/boards/Makefile9
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c364
-rw-r--r--arch/blackfin/mach-bf537/boards/eth_mac.c51
-rw-r--r--arch/blackfin/mach-bf537/boards/generic_board.c445
-rw-r--r--arch/blackfin/mach-bf537/boards/led.S183
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c523
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c615
7 files changed, 2190 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile
new file mode 100644
index 000000000000..23323cacc3aa
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/Makefile
@@ -0,0 +1,9 @@
1#
2# arch/blackfin/mach-bf537/boards/Makefile
3#
4
5obj-y += eth_mac.o
6obj-$(CONFIG_GENERIC_BOARD) += generic_board.o
7obj-$(CONFIG_BFIN537_STAMP) += stamp.o led.o
8obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o
9obj-$(CONFIG_PNAV10) += pnav10.o
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
new file mode 100644
index 000000000000..6a60618a78ec
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -0,0 +1,364 @@
1/*
2 * File: arch/blackfin/mach-bf537/boards/cm_bf537.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created: 2005
7 * Description: Board description file
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#include <linux/usb_isp1362.h>
38#include <asm/irq.h>
39#include <asm/bfin5xx_spi.h>
40
41/*
42 * Name the Board for the /proc/cpuinfo
43 */
44char *bfin_board_name = "Bluetechnix CM BF537";
45
46#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
47/* all SPI peripherals info goes here */
48
49#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
50static struct mtd_partition bfin_spi_flash_partitions[] = {
51 {
52 .name = "bootloader",
53 .size = 0x00020000,
54 .offset = 0,
55 .mask_flags = MTD_CAP_ROM
56 },{
57 .name = "kernel",
58 .size = 0xe0000,
59 .offset = 0x20000
60 },{
61 .name = "file system",
62 .size = 0x700000,
63 .offset = 0x00100000,
64 }
65};
66
67static struct flash_platform_data bfin_spi_flash_data = {
68 .name = "m25p80",
69 .parts = bfin_spi_flash_partitions,
70 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
71 .type = "m25p64",
72};
73
74/* SPI flash chip (m25p64) */
75static struct bfin5xx_spi_chip spi_flash_chip_info = {
76 .enable_dma = 0, /* use dma transfer with this chip*/
77 .bits_per_word = 8,
78};
79#endif
80
81#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
82/* SPI ADC chip */
83static struct bfin5xx_spi_chip spi_adc_chip_info = {
84 .enable_dma = 1, /* use dma transfer with this chip*/
85 .bits_per_word = 16,
86};
87#endif
88
89#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
90static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
91 .enable_dma = 0,
92 .bits_per_word = 16,
93};
94#endif
95
96#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
97static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
98 .enable_dma = 0,
99 .bits_per_word = 16,
100};
101#endif
102
103#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
104static struct bfin5xx_spi_chip spi_mmc_chip_info = {
105 .enable_dma = 1,
106 .bits_per_word = 8,
107};
108#endif
109
110static struct spi_board_info bfin_spi_board_info[] __initdata = {
111#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
112 {
113 /* the modalias must be the same as spi device driver name */
114 .modalias = "m25p80", /* Name of spi_driver for this device */
115 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
116 .bus_num = 1, /* Framework bus number */
117 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
118 .platform_data = &bfin_spi_flash_data,
119 .controller_data = &spi_flash_chip_info,
120 .mode = SPI_MODE_3,
121 },
122#endif
123
124#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
125 {
126 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
127 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
128 .bus_num = 1, /* Framework bus number */
129 .chip_select = 1, /* Framework chip select. */
130 .platform_data = NULL, /* No spi_driver specific config */
131 .controller_data = &spi_adc_chip_info,
132 },
133#endif
134
135#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
136 {
137 .modalias = "ad1836-spi",
138 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
139 .bus_num = 1,
140 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
141 .controller_data = &ad1836_spi_chip_info,
142 },
143#endif
144
145#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
146 {
147 .modalias = "ad9960-spi",
148 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
149 .bus_num = 1,
150 .chip_select = 1,
151 .controller_data = &ad9960_spi_chip_info,
152 },
153#endif
154
155#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
156 {
157 .modalias = "spi_mmc_dummy",
158 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
159 .bus_num = 1,
160 .chip_select = 7,
161 .platform_data = NULL,
162 .controller_data = &spi_mmc_chip_info,
163 .mode = SPI_MODE_3,
164 },
165 {
166 .modalias = "spi_mmc",
167 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
168 .bus_num = 1,
169 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
170 .platform_data = NULL,
171 .controller_data = &spi_mmc_chip_info,
172 .mode = SPI_MODE_3,
173 },
174#endif
175};
176
177/* SPI controller data */
178static struct bfin5xx_spi_master spi_bfin_master_info = {
179 .num_chipselect = 8,
180 .enable_dma = 1, /* master has the ability to do dma transfer */
181};
182
183static struct platform_device spi_bfin_master_device = {
184 .name = "bfin-spi-master",
185 .id = 1, /* Bus number */
186 .dev = {
187 .platform_data = &spi_bfin_master_info, /* Passed to driver */
188 },
189};
190#endif /* spi master and devices */
191
192#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
193static struct platform_device rtc_device = {
194 .name = "rtc-bfin",
195 .id = -1,
196};
197#endif
198
199#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
200static struct resource smc91x_resources[] = {
201 {
202 .start = 0x20200300,
203 .end = 0x20200300 + 16,
204 .flags = IORESOURCE_MEM,
205 },{
206 .start = IRQ_PF14,
207 .end = IRQ_PF14,
208 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
209 },
210};
211
212static struct platform_device smc91x_device = {
213 .name = "smc91x",
214 .id = 0,
215 .num_resources = ARRAY_SIZE(smc91x_resources),
216 .resource = smc91x_resources,
217};
218#endif
219
220#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
221static struct resource isp1362_hcd_resources[] = {
222 {
223 .start = 0x20308000,
224 .end = 0x20308000,
225 .flags = IORESOURCE_MEM,
226 },{
227 .start = 0x20308004,
228 .end = 0x20308004,
229 .flags = IORESOURCE_MEM,
230 },{
231 .start = IRQ_PG15,
232 .end = IRQ_PG15,
233 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
234 },
235};
236
237static struct isp1362_platform_data isp1362_priv = {
238 .sel15Kres = 1,
239 .clknotstop = 0,
240 .oc_enable = 0,
241 .int_act_high = 0,
242 .int_edge_triggered = 0,
243 .remote_wakeup_connected = 0,
244 .no_power_switching = 1,
245 .power_switching_mode = 0,
246};
247
248static struct platform_device isp1362_hcd_device = {
249 .name = "isp1362-hcd",
250 .id = 0,
251 .dev = {
252 .platform_data = &isp1362_priv,
253 },
254 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
255 .resource = isp1362_hcd_resources,
256};
257#endif
258
259#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
260static struct resource net2272_bfin_resources[] = {
261 {
262 .start = 0x20200000,
263 .end = 0x20200000 + 0x100,
264 .flags = IORESOURCE_MEM,
265 },{
266 .start = IRQ_PF7,
267 .end = IRQ_PF7,
268 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
269 },
270};
271
272static struct platform_device net2272_bfin_device = {
273 .name = "net2272",
274 .id = -1,
275 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
276 .resource = net2272_bfin_resources,
277};
278#endif
279
280#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
281static struct resource bfin_uart_resources[] = {
282 {
283 .start = 0xFFC00400,
284 .end = 0xFFC004FF,
285 .flags = IORESOURCE_MEM,
286 },{
287 .start = 0xFFC02000,
288 .end = 0xFFC020FF,
289 .flags = IORESOURCE_MEM,
290 },
291};
292
293static struct platform_device bfin_uart_device = {
294 .name = "bfin-uart",
295 .id = 1,
296 .num_resources = ARRAY_SIZE(bfin_uart_resources),
297 .resource = bfin_uart_resources,
298};
299#endif
300
301#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
302static struct platform_device bfin_sport0_uart_device = {
303 .name = "bfin-sport-uart",
304 .id = 0,
305};
306
307static struct platform_device bfin_sport1_uart_device = {
308 .name = "bfin-sport-uart",
309 .id = 1,
310};
311#endif
312
313#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
314static struct platform_device bfin_mac_device = {
315 .name = "bfin_mac",
316};
317#endif
318
319static struct platform_device *cm_bf537_devices[] __initdata = {
320#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
321 &rtc_device,
322#endif
323
324#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
325 &bfin_uart_device,
326#endif
327
328#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
329 &bfin_sport0_uart_device,
330 &bfin_sport1_uart_device,
331#endif
332
333#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
334 &isp1362_hcd_device,
335#endif
336
337#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
338 &smc91x_device,
339#endif
340
341#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
342 &bfin_mac_device,
343#endif
344
345#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
346 &net2272_bfin_device,
347#endif
348
349#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
350 &spi_bfin_master_device,
351#endif
352};
353
354static int __init cm_bf537_init(void)
355{
356 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
357 platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
358#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
359 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
360#endif
361 return 0;
362}
363
364arch_initcall(cm_bf537_init);
diff --git a/arch/blackfin/mach-bf537/boards/eth_mac.c b/arch/blackfin/mach-bf537/boards/eth_mac.c
new file mode 100644
index 000000000000..e129a08d63de
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/eth_mac.c
@@ -0,0 +1,51 @@
1/*
2 * arch/blackfin/mach-bf537/board/eth_mac.c
3 *
4 * Copyright (C) 2007 Analog Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <linux/module.h>
21#include <asm/blackfin.h>
22
23#if defined(CONFIG_GENERIC_BOARD) \
24 || defined(CONFIG_BFIN537_STAMP)
25
26/*
27 * Currently the MAC address is saved in Flash by U-Boot
28 */
29#define FLASH_MAC 0x203f0000
30
31void get_bf537_ether_addr(char *addr)
32{
33 unsigned int flash_mac = (unsigned int) FLASH_MAC;
34 *(u32 *)(&(addr[0])) = bfin_read32(flash_mac);
35 flash_mac += 4;
36 *(u16 *)(&(addr[4])) = bfin_read16(flash_mac);
37}
38
39#else
40
41/*
42 * Provide MAC address function for other specific board setting
43 */
44void get_bf537_ether_addr(char *addr)
45{
46 printk(KERN_WARNING "%s: No valid Ethernet MAC address found\n",__FILE__);
47}
48
49#endif
50
51EXPORT_SYMBOL(get_bf537_ether_addr);
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
new file mode 100644
index 000000000000..9019c0edbe7c
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/generic_board.c
@@ -0,0 +1,445 @@
1/*
2 * File: arch/blackfin/mach-bf537/boards/generic_board.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#include <linux/usb_isp1362.h>
38#include <asm/irq.h>
39#include <asm/bfin5xx_spi.h>
40#include <linux/usb_sl811.h>
41
42/*
43 * Name the Board for the /proc/cpuinfo
44 */
45char *bfin_board_name = "UNKNOWN BOARD";
46
47/*
48 * Driver needs to know address, irq and flag pin.
49 */
50
51#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
52static struct resource bfin_pcmcia_cf_resources[] = {
53 {
54 .start = 0x20310000, /* IO PORT */
55 .end = 0x20312000,
56 .flags = IORESOURCE_MEM,
57 },{
58 .start = 0x20311000, /* Attribute Memeory */
59 .end = 0x20311FFF,
60 .flags = IORESOURCE_MEM,
61 },{
62 .start = IRQ_PROG_INTA,
63 .end = IRQ_PROG_INTA,
64 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
65 },{
66 .start = IRQ_PF4,
67 .end = IRQ_PF4,
68 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
69 },{
70 .start = 6, /* Card Detect PF6 */
71 .end = 6,
72 .flags = IORESOURCE_IRQ,
73 },
74};
75
76static struct platform_device bfin_pcmcia_cf_device = {
77 .name = "bfin_cf_pcmcia",
78 .id = -1,
79 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
80 .resource = bfin_pcmcia_cf_resources,
81};
82#endif
83
84#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
85static struct platform_device rtc_device = {
86 .name = "rtc-bfin",
87 .id = -1,
88};
89#endif
90
91#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
92static struct resource smc91x_resources[] = {
93 {
94 .name = "smc91x-regs",
95 .start = 0x20300300,
96 .end = 0x20300300 + 16,
97 .flags = IORESOURCE_MEM,
98 },{
99 .start = IRQ_PROG_INTB,
100 .end = IRQ_PROG_INTB,
101 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
102 },{
103 /*
104 * denotes the flag pin and is used directly if
105 * CONFIG_IRQCHIP_DEMUX_GPIO is defined.
106 */
107 .start = IRQ_PF7,
108 .end = IRQ_PF7,
109 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
110 },
111};
112static struct platform_device smc91x_device = {
113 .name = "smc91x",
114 .id = 0,
115 .num_resources = ARRAY_SIZE(smc91x_resources),
116 .resource = smc91x_resources,
117};
118#endif
119
120#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
121static struct resource sl811_hcd_resources[] = {
122 {
123 .start = 0x20340000,
124 .end = 0x20340000,
125 .flags = IORESOURCE_MEM,
126 },{
127 .start = 0x20340004,
128 .end = 0x20340004,
129 .flags = IORESOURCE_MEM,
130 },{
131 .start = IRQ_PROG_INTA,
132 .end = IRQ_PROG_INTA,
133 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
134 },{
135 .start = IRQ_PF0 + CONFIG_USB_SL811_BFIN_GPIO,
136 .end = IRQ_PF0 + CONFIG_USB_SL811_BFIN_GPIO,
137 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
138 },
139};
140
141#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
142void sl811_port_power(struct device *dev, int is_on)
143{
144 unsigned short mask = (1<<CONFIG_USB_SL811_BFIN_GPIO_VBUS);
145
146 bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask);
147 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask);
148
149 if (is_on)
150 bfin_write_FIO_FLAG_S(mask);
151 else
152 bfin_write_FIO_FLAG_C(mask);
153}
154#endif
155
156static struct sl811_platform_data sl811_priv = {
157 .potpg = 10,
158 .power = 250, /* == 500mA */
159#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
160 .port_power = &sl811_port_power,
161#endif
162};
163
164static struct platform_device sl811_hcd_device = {
165 .name = "sl811-hcd",
166 .id = 0,
167 .dev = {
168 .platform_data = &sl811_priv,
169 },
170 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
171 .resource = sl811_hcd_resources,
172};
173
174#endif
175
176#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
177static struct resource isp1362_hcd_resources[] = {
178 {
179 .start = 0x20360000,
180 .end = 0x20360000,
181 .flags = IORESOURCE_MEM,
182 },{
183 .start = 0x20360004,
184 .end = 0x20360004,
185 .flags = IORESOURCE_MEM,
186 },{
187 .start = IRQ_PROG_INTA,
188 .end = IRQ_PROG_INTA,
189 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
190 },{
191 .start = IRQ_PF0 + CONFIG_USB_ISP1362_BFIN_GPIO,
192 .end = IRQ_PF0 + CONFIG_USB_ISP1362_BFIN_GPIO,
193 .flags = IORESOURCE_IRQ,
194 },
195};
196
197static struct isp1362_platform_data isp1362_priv = {
198 .sel15Kres = 1,
199 .clknotstop = 0,
200 .oc_enable = 0,
201 .int_act_high = 0,
202 .int_edge_triggered = 0,
203 .remote_wakeup_connected = 0,
204 .no_power_switching = 1,
205 .power_switching_mode = 0,
206};
207
208static struct platform_device isp1362_hcd_device = {
209 .name = "isp1362-hcd",
210 .id = 0,
211 .dev = {
212 .platform_data = &isp1362_priv,
213 },
214 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
215 .resource = isp1362_hcd_resources,
216};
217#endif
218
219#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
220static struct platform_device bfin_mac_device = {
221 .name = "bfin_mac",
222};
223#endif
224
225#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
226static struct resource net2272_bfin_resources[] = {
227 {
228 .start = 0x20300000,
229 .end = 0x20300000 + 0x100,
230 .flags = IORESOURCE_MEM,
231 },{
232 .start = IRQ_PF7,
233 .end = IRQ_PF7,
234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
235 },
236};
237
238static struct platform_device net2272_bfin_device = {
239 .name = "net2272",
240 .id = -1,
241 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
242 .resource = net2272_bfin_resources,
243};
244#endif
245
246#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
247/* all SPI peripherals info goes here */
248
249#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
250static struct mtd_partition bfin_spi_flash_partitions[] = {
251 {
252 .name = "bootloader",
253 .size = 0x00020000,
254 .offset = 0,
255 .mask_flags = MTD_CAP_ROM
256 },{
257 .name = "kernel",
258 .size = 0xe0000,
259 .offset = 0x20000
260 },{
261 .name = "file system",
262 .size = 0x700000,
263 .offset = 0x00100000,
264 }
265};
266
267static struct flash_platform_data bfin_spi_flash_data = {
268 .name = "m25p80",
269 .parts = bfin_spi_flash_partitions,
270 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
271 .type = "m25p64",
272};
273
274/* SPI flash chip (m25p64) */
275static struct bfin5xx_spi_chip spi_flash_chip_info = {
276 .enable_dma = 0, /* use dma transfer with this chip*/
277 .bits_per_word = 8,
278};
279#endif
280
281#if defined(CONFIG_SPI_ADC_BF533) \
282 || defined(CONFIG_SPI_ADC_BF533_MODULE)
283/* SPI ADC chip */
284static struct bfin5xx_spi_chip spi_adc_chip_info = {
285 .enable_dma = 1, /* use dma transfer with this chip*/
286 .bits_per_word = 16,
287};
288#endif
289
290#if defined(CONFIG_SND_BLACKFIN_AD1836) \
291 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
292static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
293 .enable_dma = 0,
294 .bits_per_word = 16,
295};
296#endif
297
298#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
299static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
300 .enable_dma = 0,
301 .bits_per_word = 16,
302};
303#endif
304
305static struct spi_board_info bfin_spi_board_info[] __initdata = {
306#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
307 {
308 /* the modalias must be the same as spi device driver name */
309 .modalias = "m25p80", /* Name of spi_driver for this device */
310 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
311 .bus_num = 1, /* Framework bus number */
312 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL1*/
313 .platform_data = &bfin_spi_flash_data,
314 .controller_data = &spi_flash_chip_info,
315 .mode = SPI_MODE_3,
316 },
317#endif
318
319#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
320 {
321 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
322 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
323 .bus_num = 1, /* Framework bus number */
324 .chip_select = 1, /* Framework chip select. */
325 .platform_data = NULL, /* No spi_driver specific config */
326 .controller_data = &spi_adc_chip_info,
327 },
328#endif
329
330#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
331 {
332 .modalias = "ad1836-spi",
333 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
334 .bus_num = 1,
335 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
336 .controller_data = &ad1836_spi_chip_info,
337 },
338#endif
339
340#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
341 {
342 .modalias = "ad9960-spi",
343 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
344 .bus_num = 1,
345 .chip_select = 1,
346 .controller_data = &ad9960_spi_chip_info,
347 },
348#endif
349};
350
351/* SPI controller data */
352static struct bfin5xx_spi_master spi_bfin_master_info = {
353 .num_chipselect = 8,
354 .enable_dma = 1, /* master has the ability to do dma transfer */
355};
356
357static struct platform_device spi_bfin_master_device = {
358 .name = "bfin-spi-master",
359 .id = 1, /* Bus number */
360 .dev = {
361 .platform_data = &spi_bfin_master_info, /* Passed to driver */
362 },
363};
364#endif /* spi master and devices */
365
366#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
367static struct platform_device bfin_fb_device = {
368 .name = "bf537-fb",
369};
370#endif
371
372#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
373static struct resource bfin_uart_resources[] = {
374 {
375 .start = 0xFFC00400,
376 .end = 0xFFC004FF,
377 .flags = IORESOURCE_MEM,
378 },{
379 .start = 0xFFC02000,
380 .end = 0xFFC020FF,
381 .flags = IORESOURCE_MEM,
382 },
383};
384
385static struct platform_device bfin_uart_device = {
386 .name = "bfin-uart",
387 .id = 1,
388 .num_resources = ARRAY_SIZE(bfin_uart_resources),
389 .resource = bfin_uart_resources,
390};
391#endif
392
393static struct platform_device *stamp_devices[] __initdata = {
394#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
395 &rtc_device,
396#endif
397
398#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
399 &bfin_pcmcia_cf_device,
400#endif
401
402#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
403 &sl811_hcd_device,
404#endif
405
406#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
407 &isp1362_hcd_device,
408#endif
409
410#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
411 &smc91x_device,
412#endif
413
414#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
415 &bfin_mac_device,
416#endif
417
418#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
419 &net2272_bfin_device,
420#endif
421
422#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
423 &spi_bfin_master_device,
424#endif
425
426#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
427 &bfin_fb_device,
428#endif
429
430#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
431 &bfin_uart_device,
432#endif
433};
434
435static int __init stamp_init(void)
436{
437 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
438 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
439#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
440 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
441#endif
442 return 0;
443}
444
445arch_initcall(stamp_init);
diff --git a/arch/blackfin/mach-bf537/boards/led.S b/arch/blackfin/mach-bf537/boards/led.S
new file mode 100644
index 000000000000..4e9ea4283e5f
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/led.S
@@ -0,0 +1,183 @@
1/****************************************************
2 * LED1 ---- PF6 LED2 ---- PF7 *
3 * LED3 ---- PF8 LED4 ---- PF9 *
4 * LED5 ---- PF10 LED6 ---- PF11 *
5 ****************************************************/
6
7#include <linux/linkage.h>
8#include <asm/blackfin.h>
9
10/* All functions in this file save the registers they uses.
11 So there is no need to save any registers before calling them. */
12
13 .text;
14
15/* Initialize LEDs. */
16
17ENTRY(_led_init)
18 LINK 12;
19 [--SP] = P0;
20 [--SP] = R0;
21 [--SP] = R1;
22 [--SP] = R2;
23 R1 = PF6|PF7|PF8|PF9|PF10|PF11 (Z);
24 R2 = ~R1;
25
26 P0.H = hi(PORTF_FER);
27 P0.L = lo(PORTF_FER);
28 R0 = W[P0](Z);
29 SSYNC;
30 R0 = R0 & R2;
31 W[P0] = R0.L;
32 SSYNC;
33
34 P0.H = hi(PORTFIO_DIR);
35 P0.L = lo(PORTFIO_DIR);
36 R0 = W[P0](Z);
37 SSYNC;
38 R0 = R0 | R1;
39 W[P0] = R0.L;
40 SSYNC;
41
42 P0.H = hi(PORTFIO_INEN);
43 P0.L = lo(PORTFIO_INEN);
44 R0 = W[P0](Z);
45 SSYNC;
46 R0 = R0 & R2;
47 W[P0] = R0.L;
48 SSYNC;
49
50 R2 = [SP++];
51 R1 = [SP++];
52 R0 = [SP++];
53 P0 = [SP++];
54 UNLINK;
55 RTS;
56 .size _led_init, .-_led_init
57
58/* Set one LED on. Leave other LEDs unchanged.
59 It expects the LED number passed through R0. */
60
61ENTRY(_led_on)
62 LINK 12;
63 [--SP] = P0;
64 [--SP] = R1;
65 CALL _led_init;
66 R1 = 1;
67 R0 += 5;
68 R1 <<= R0;
69 P0.H = hi(PORTFIO);
70 P0.L = lo(PORTFIO);
71 R0 = W[P0](Z);
72 SSYNC;
73 R0 = R0 | R1;
74 W[P0] = R0.L;
75 SSYNC;
76 R1 = [SP++];
77 P0 = [SP++];
78 UNLINK;
79 RTS;
80 .size _led_on, .-_led_on
81
82/* Set one LED off. Leave other LEDs unchanged. */
83
84ENTRY(_led_off)
85 LINK 12;
86 [--SP] = P0;
87 [--SP] = R1;
88 CALL _led_init;
89 R1 = 1;
90 R0 += 5;
91 R1 <<= R0;
92 R1 = ~R1;
93 P0.H = hi(PORTFIO);
94 P0.L = lo(PORTFIO);
95 R0 = W[P0](Z);
96 SSYNC;
97 R0 = R0 & R1;
98 W[P0] = R0.L;
99 SSYNC;
100 R1 = [SP++];
101 P0 = [SP++];
102 UNLINK;
103 RTS;
104 .size _led_off, .-_led_off
105
106/* Toggle one LED. Leave other LEDs unchanged. */
107
108ENTRY(_led_toggle)
109 LINK 12;
110 [--SP] = P0;
111 [--SP] = R1;
112 CALL _led_init;
113 R1 = 1;
114 R0 += 5;
115 R1 <<= R0;
116 P0.H = hi(PORTFIO);
117 P0.L = lo(PORTFIO);
118 R0 = W[P0](Z);
119 SSYNC;
120 R0 = R0 ^ R1;
121 W[P0] = R0.L;
122 SSYNC;
123 R1 = [SP++];
124 P0 = [SP++];
125 UNLINK;
126 RTS;
127 .size _led_toggle, .-_led_toggle
128
129/* Display the number using LEDs in binary format. */
130
131ENTRY(_led_disp_num)
132 LINK 12;
133 [--SP] = P0;
134 [--SP] = R1;
135 [--SP] = R2;
136 CALL _led_init;
137 R1 = 0x3f(X);
138 R0 = R0 & R1;
139 R2 = 6(X);
140 R0 <<= R2;
141 R1 <<= R2;
142 P0.H = hi(PORTFIO);
143 P0.L = lo(PORTFIO);
144 R2 = W[P0](Z);
145 SSYNC;
146 R1 = ~R1;
147 R2 = R2 & R1;
148 R2 = R2 | R0;
149 W[P0] = R2.L;
150 SSYNC;
151 R2 = [SP++];
152 R1 = [SP++];
153 P0 = [SP++];
154 UNLINK;
155 RTS;
156 .size _led_disp_num, .-_led_disp_num
157
158/* Toggle the number using LEDs in binary format. */
159
160ENTRY(_led_toggle_num)
161 LINK 12;
162 [--SP] = P0;
163 [--SP] = R1;
164 [--SP] = R2;
165 CALL _led_init;
166 R1 = 0x3f(X);
167 R0 = R0 & R1;
168 R1 = 6(X);
169 R0 <<= R1;
170 P0.H = hi(PORTFIO);
171 P0.L = lo(PORTFIO);
172 R1 = W[P0](Z);
173 SSYNC;
174 R1 = R1 ^ R0;
175 W[P0] = R1.L;
176 SSYNC;
177 R2 = [SP++];
178 R1 = [SP++];
179 P0 = [SP++];
180 UNLINK;
181 RTS;
182 .size _led_toggle_num, .-_led_toggle_num
183
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
new file mode 100644
index 000000000000..40d3a1b70ee7
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -0,0 +1,523 @@
1/*
2 * File: arch/blackfin/mach-bf537/boards/stamp.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb_isp1362.h>
39#endif
40#include <asm/irq.h>
41#include <asm/bfin5xx_spi.h>
42#include <linux/usb_sl811.h>
43
44#include <linux/spi/ad7877.h>
45
46/*
47 * Name the Board for the /proc/cpuinfo
48 */
49char *bfin_board_name = "PNAV-1.0";
50
51/*
52 * Driver needs to know address, irq and flag pin.
53 */
54
55#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
56static struct resource bfin_pcmcia_cf_resources[] = {
57 {
58 .start = 0x20310000, /* IO PORT */
59 .end = 0x20312000,
60 .flags = IORESOURCE_MEM,
61 },{
62 .start = 0x20311000, /* Attribute Memeory */
63 .end = 0x20311FFF,
64 .flags = IORESOURCE_MEM,
65 },{
66 .start = IRQ_PF4,
67 .end = IRQ_PF4,
68 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
69 },{
70 .start = 6, /* Card Detect PF6 */
71 .end = 6,
72 .flags = IORESOURCE_IRQ,
73 },
74};
75
76static struct platform_device bfin_pcmcia_cf_device = {
77 .name = "bfin_cf_pcmcia",
78 .id = -1,
79 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
80 .resource = bfin_pcmcia_cf_resources,
81};
82#endif
83
84#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
85static struct platform_device rtc_device = {
86 .name = "rtc-bfin",
87 .id = -1,
88};
89#endif
90
91#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
92static struct resource smc91x_resources[] = {
93 {
94 .name = "smc91x-regs",
95 .start = 0x20300300,
96 .end = 0x20300300 + 16,
97 .flags = IORESOURCE_MEM,
98 },{
99
100 .start = IRQ_PF7,
101 .end = IRQ_PF7,
102 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
103 },
104};
105static struct platform_device smc91x_device = {
106 .name = "smc91x",
107 .id = 0,
108 .num_resources = ARRAY_SIZE(smc91x_resources),
109 .resource = smc91x_resources,
110};
111#endif
112
113#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
114static struct resource sl811_hcd_resources[] = {
115 {
116 .start = 0x20340000,
117 .end = 0x20340000,
118 .flags = IORESOURCE_MEM,
119 },{
120 .start = 0x20340004,
121 .end = 0x20340004,
122 .flags = IORESOURCE_MEM,
123 },{
124 .start = CONFIG_USB_SL811_BFIN_IRQ,
125 .end = CONFIG_USB_SL811_BFIN_IRQ,
126 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
127 },
128};
129
130#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
131void sl811_port_power(struct device *dev, int is_on)
132{
133 unsigned short mask = (1 << CONFIG_USB_SL811_BFIN_GPIO_VBUS);
134
135 bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask);
136 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask);
137
138 if (is_on)
139 bfin_write_FIO_FLAG_S(mask);
140 else
141 bfin_write_FIO_FLAG_C(mask);
142}
143#endif
144
145static struct sl811_platform_data sl811_priv = {
146 .potpg = 10,
147 .power = 250, /* == 500mA */
148#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
149 .port_power = &sl811_port_power,
150#endif
151};
152
153static struct platform_device sl811_hcd_device = {
154 .name = "sl811-hcd",
155 .id = 0,
156 .dev = {
157 .platform_data = &sl811_priv,
158 },
159 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
160 .resource = sl811_hcd_resources,
161};
162#endif
163
164#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
165static struct resource isp1362_hcd_resources[] = {
166 {
167 .start = 0x20360000,
168 .end = 0x20360000,
169 .flags = IORESOURCE_MEM,
170 },{
171 .start = 0x20360004,
172 .end = 0x20360004,
173 .flags = IORESOURCE_MEM,
174 },{
175 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
176 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
177 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
178 },
179};
180
181static struct isp1362_platform_data isp1362_priv = {
182 .sel15Kres = 1,
183 .clknotstop = 0,
184 .oc_enable = 0,
185 .int_act_high = 0,
186 .int_edge_triggered = 0,
187 .remote_wakeup_connected = 0,
188 .no_power_switching = 1,
189 .power_switching_mode = 0,
190};
191
192static struct platform_device isp1362_hcd_device = {
193 .name = "isp1362-hcd",
194 .id = 0,
195 .dev = {
196 .platform_data = &isp1362_priv,
197 },
198 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
199 .resource = isp1362_hcd_resources,
200};
201#endif
202
203#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
204static struct platform_device bfin_mac_device = {
205 .name = "bfin_mac",
206};
207#endif
208
209#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
210static struct resource net2272_bfin_resources[] = {
211 {
212 .start = 0x20300000,
213 .end = 0x20300000 + 0x100,
214 .flags = IORESOURCE_MEM,
215 },{
216 .start = IRQ_PF7,
217 .end = IRQ_PF7,
218 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
219 },
220};
221
222static struct platform_device net2272_bfin_device = {
223 .name = "net2272",
224 .id = -1,
225 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
226 .resource = net2272_bfin_resources,
227};
228#endif
229
230#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
231/* all SPI peripherals info goes here */
232
233#if defined(CONFIG_MTD_M25P80) \
234 || defined(CONFIG_MTD_M25P80_MODULE)
235static struct mtd_partition bfin_spi_flash_partitions[] = {
236 {
237 .name = "bootloader",
238 .size = 0x00020000,
239 .offset = 0,
240 .mask_flags = MTD_CAP_ROM
241 },{
242 .name = "kernel",
243 .size = 0xe0000,
244 .offset = 0x20000
245 },{
246 .name = "file system",
247 .size = 0x700000,
248 .offset = 0x00100000,
249 }
250};
251
252static struct flash_platform_data bfin_spi_flash_data = {
253 .name = "m25p80",
254 .parts = bfin_spi_flash_partitions,
255 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
256 .type = "m25p64",
257};
258
259/* SPI flash chip (m25p64) */
260static struct bfin5xx_spi_chip spi_flash_chip_info = {
261 .enable_dma = 0, /* use dma transfer with this chip*/
262 .bits_per_word = 8,
263};
264#endif
265
266#if defined(CONFIG_SPI_ADC_BF533) \
267 || defined(CONFIG_SPI_ADC_BF533_MODULE)
268/* SPI ADC chip */
269static struct bfin5xx_spi_chip spi_adc_chip_info = {
270 .enable_dma = 1, /* use dma transfer with this chip*/
271 .bits_per_word = 16,
272};
273#endif
274
275#if defined(CONFIG_SND_BLACKFIN_AD1836) \
276 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
277static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
278 .enable_dma = 0,
279 .bits_per_word = 16,
280};
281#endif
282
283#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
284static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
285 .enable_dma = 0,
286 .bits_per_word = 16,
287};
288#endif
289
290#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
291static struct bfin5xx_spi_chip spi_mmc_chip_info = {
292 .enable_dma = 1,
293 .bits_per_word = 8,
294};
295#endif
296
297#if defined(CONFIG_PBX)
298static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
299 .ctl_reg = 0x4, /* send zero */
300 .enable_dma = 0,
301 .bits_per_word = 8,
302 .cs_change_per_word = 1,
303};
304#endif
305
306
307#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
308static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
309 .cs_change_per_word = 1,
310 .enable_dma = 0,
311 .bits_per_word = 16,
312};
313
314static const struct ad7877_platform_data bfin_ad7877_ts_info = {
315 .model = 7877,
316 .vref_delay_usecs = 50, /* internal, no capacitor */
317 .x_plate_ohms = 419,
318 .y_plate_ohms = 486,
319 .pressure_max = 1000,
320 .pressure_min = 0,
321 .stopacq_polarity = 1,
322 .first_conversion_delay = 3,
323 .acquisition_time = 1,
324 .averaging = 1,
325 .pen_down_acc_interval = 1,
326};
327#endif
328
329static struct spi_board_info bfin_spi_board_info[] __initdata = {
330#if defined(CONFIG_MTD_M25P80) \
331 || defined(CONFIG_MTD_M25P80_MODULE)
332 {
333 /* the modalias must be the same as spi device driver name */
334 .modalias = "m25p80", /* Name of spi_driver for this device */
335 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
336 .bus_num = 1, /* Framework bus number */
337 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
338 .platform_data = &bfin_spi_flash_data,
339 .controller_data = &spi_flash_chip_info,
340 .mode = SPI_MODE_3,
341 },
342#endif
343
344#if defined(CONFIG_SPI_ADC_BF533) \
345 || defined(CONFIG_SPI_ADC_BF533_MODULE)
346 {
347 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
348 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
349 .bus_num = 1, /* Framework bus number */
350 .chip_select = 1, /* Framework chip select. */
351 .platform_data = NULL, /* No spi_driver specific config */
352 .controller_data = &spi_adc_chip_info,
353 },
354#endif
355
356#if defined(CONFIG_SND_BLACKFIN_AD1836) \
357 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
358 {
359 .modalias = "ad1836-spi",
360 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
361 .bus_num = 1,
362 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
363 .controller_data = &ad1836_spi_chip_info,
364 },
365#endif
366#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
367 {
368 .modalias = "ad9960-spi",
369 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
370 .bus_num = 1,
371 .chip_select = 1,
372 .controller_data = &ad9960_spi_chip_info,
373 },
374#endif
375#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
376 {
377 .modalias = "spi_mmc_dummy",
378 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
379 .bus_num = 1,
380 .chip_select = 7,
381 .platform_data = NULL,
382 .controller_data = &spi_mmc_chip_info,
383 .mode = SPI_MODE_3,
384 },
385 {
386 .modalias = "spi_mmc",
387 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
388 .bus_num = 1,
389 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
390 .platform_data = NULL,
391 .controller_data = &spi_mmc_chip_info,
392 .mode = SPI_MODE_3,
393 },
394#endif
395#if defined(CONFIG_PBX)
396 {
397 .modalias = "fxs-spi",
398 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
399 .bus_num = 1,
400 .chip_select = 3,
401 .controller_data= &spi_si3xxx_chip_info,
402 .mode = SPI_MODE_3,
403 },
404 {
405 .modalias = "fxo-spi",
406 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
407 .bus_num = 1,
408 .chip_select = 2,
409 .controller_data= &spi_si3xxx_chip_info,
410 .mode = SPI_MODE_3,
411 },
412#endif
413#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
414{
415 .modalias = "ad7877",
416 .platform_data = &bfin_ad7877_ts_info,
417 .irq = IRQ_PF2,
418 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
419 .bus_num = 1,
420 .chip_select = 5,
421 .controller_data = &spi_ad7877_chip_info,
422},
423#endif
424
425};
426
427/* SPI controller data */
428static struct bfin5xx_spi_master spi_bfin_master_info = {
429 .num_chipselect = 8,
430 .enable_dma = 1, /* master has the ability to do dma transfer */
431};
432
433static struct platform_device spi_bfin_master_device = {
434 .name = "bfin-spi-master",
435 .id = 1, /* Bus number */
436 .dev = {
437 .platform_data = &spi_bfin_master_info, /* Passed to driver */
438 },
439};
440#endif /* spi master and devices */
441
442#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
443static struct platform_device bfin_fb_device = {
444 .name = "bf537-fb",
445};
446#endif
447
448#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
449static struct resource bfin_uart_resources[] = {
450 {
451 .start = 0xFFC00400,
452 .end = 0xFFC004FF,
453 .flags = IORESOURCE_MEM,
454 },{
455 .start = 0xFFC02000,
456 .end = 0xFFC020FF,
457 .flags = IORESOURCE_MEM,
458 },
459};
460
461static struct platform_device bfin_uart_device = {
462 .name = "bfin-uart",
463 .id = 1,
464 .num_resources = ARRAY_SIZE(bfin_uart_resources),
465 .resource = bfin_uart_resources,
466};
467#endif
468
469
470static struct platform_device *stamp_devices[] __initdata = {
471#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
472 &bfin_pcmcia_cf_device,
473#endif
474
475#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
476 &rtc_device,
477#endif
478
479#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
480 &sl811_hcd_device,
481#endif
482
483#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
484 &isp1362_hcd_device,
485#endif
486
487#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
488 &smc91x_device,
489#endif
490
491#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
492 &bfin_mac_device,
493#endif
494
495#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
496 &net2272_bfin_device,
497#endif
498
499#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
500 &spi_bfin_master_device,
501#endif
502
503#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
504 &bfin_fb_device,
505#endif
506
507#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
508 &bfin_uart_device,
509#endif
510};
511
512static int __init stamp_init(void)
513{
514 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
515 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
516#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
517 spi_register_board_info(bfin_spi_board_info,
518 ARRAY_SIZE(bfin_spi_board_info));
519#endif
520 return 0;
521}
522
523arch_initcall(stamp_init);
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
new file mode 100644
index 000000000000..ba2f875a7f7d
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -0,0 +1,615 @@
1/*
2 * File: arch/blackfin/mach-bf537/boards/stamp.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb_isp1362.h>
39#endif
40#include <asm/irq.h>
41#include <linux/irq.h>
42#include <linux/interrupt.h>
43#include <asm/bfin5xx_spi.h>
44#include <linux/usb_sl811.h>
45
46#include <linux/spi/ad7877.h>
47
48/*
49 * Name the Board for the /proc/cpuinfo
50 */
51char *bfin_board_name = "ADDS-BF537-STAMP";
52
53/*
54 * Driver needs to know address, irq and flag pin.
55 */
56
57#define ISP1761_BASE 0x203C0000
58#define ISP1761_IRQ IRQ_PF7
59
60#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
61static struct resource bfin_isp1761_resources[] = {
62 [0] = {
63 .name = "isp1761-regs",
64 .start = ISP1761_BASE + 0x00000000,
65 .end = ISP1761_BASE + 0x000fffff,
66 .flags = IORESOURCE_MEM,
67 },
68 [1] = {
69 .start = ISP1761_IRQ,
70 .end = ISP1761_IRQ,
71 .flags = IORESOURCE_IRQ,
72 },
73};
74
75static struct platform_device bfin_isp1761_device = {
76 .name = "isp1761",
77 .id = 0,
78 .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
79 .resource = bfin_isp1761_resources,
80};
81
82static struct platform_device *bfin_isp1761_devices[] = {
83 &bfin_isp1761_device,
84};
85
86int __init bfin_isp1761_init(void)
87{
88 unsigned int num_devices=ARRAY_SIZE(bfin_isp1761_devices);
89
90 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
91 set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
92
93 return platform_add_devices(bfin_isp1761_devices, num_devices);
94}
95
96void __exit bfin_isp1761_exit(void)
97{
98 platform_device_unregister(&bfin_isp1761_device);
99}
100
101arch_initcall(bfin_isp1761_init);
102#endif
103
104#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
105static struct resource bfin_pcmcia_cf_resources[] = {
106 {
107 .start = 0x20310000, /* IO PORT */
108 .end = 0x20312000,
109 .flags = IORESOURCE_MEM,
110 },{
111 .start = 0x20311000, /* Attribute Memeory */
112 .end = 0x20311FFF,
113 .flags = IORESOURCE_MEM,
114 },{
115 .start = IRQ_PF4,
116 .end = IRQ_PF4,
117 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
118 },{
119 .start = 6, /* Card Detect PF6 */
120 .end = 6,
121 .flags = IORESOURCE_IRQ,
122 },
123};
124
125static struct platform_device bfin_pcmcia_cf_device = {
126 .name = "bfin_cf_pcmcia",
127 .id = -1,
128 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
129 .resource = bfin_pcmcia_cf_resources,
130};
131#endif
132
133#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
134static struct platform_device rtc_device = {
135 .name = "rtc-bfin",
136 .id = -1,
137};
138#endif
139
140#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
141static struct resource smc91x_resources[] = {
142 {
143 .name = "smc91x-regs",
144 .start = 0x20300300,
145 .end = 0x20300300 + 16,
146 .flags = IORESOURCE_MEM,
147 },{
148
149 .start = IRQ_PF7,
150 .end = IRQ_PF7,
151 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
152 },
153};
154static struct platform_device smc91x_device = {
155 .name = "smc91x",
156 .id = 0,
157 .num_resources = ARRAY_SIZE(smc91x_resources),
158 .resource = smc91x_resources,
159};
160#endif
161
162#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
163static struct resource sl811_hcd_resources[] = {
164 {
165 .start = 0x20340000,
166 .end = 0x20340000,
167 .flags = IORESOURCE_MEM,
168 },{
169 .start = 0x20340004,
170 .end = 0x20340004,
171 .flags = IORESOURCE_MEM,
172 },{
173 .start = CONFIG_USB_SL811_BFIN_IRQ,
174 .end = CONFIG_USB_SL811_BFIN_IRQ,
175 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
176 },
177};
178
179#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
180void sl811_port_power(struct device *dev, int is_on)
181{
182 unsigned short mask = (1 << CONFIG_USB_SL811_BFIN_GPIO_VBUS);
183
184 bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask);
185 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask);
186
187 if (is_on)
188 bfin_write_FIO_FLAG_S(mask);
189 else
190 bfin_write_FIO_FLAG_C(mask);
191}
192#endif
193
194static struct sl811_platform_data sl811_priv = {
195 .potpg = 10,
196 .power = 250, /* == 500mA */
197#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
198 .port_power = &sl811_port_power,
199#endif
200};
201
202static struct platform_device sl811_hcd_device = {
203 .name = "sl811-hcd",
204 .id = 0,
205 .dev = {
206 .platform_data = &sl811_priv,
207 },
208 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
209 .resource = sl811_hcd_resources,
210};
211#endif
212
213#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
214static struct resource isp1362_hcd_resources[] = {
215 {
216 .start = 0x20360000,
217 .end = 0x20360000,
218 .flags = IORESOURCE_MEM,
219 },{
220 .start = 0x20360004,
221 .end = 0x20360004,
222 .flags = IORESOURCE_MEM,
223 },{
224 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
225 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
226 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
227 },
228};
229
230static struct isp1362_platform_data isp1362_priv = {
231 .sel15Kres = 1,
232 .clknotstop = 0,
233 .oc_enable = 0,
234 .int_act_high = 0,
235 .int_edge_triggered = 0,
236 .remote_wakeup_connected = 0,
237 .no_power_switching = 1,
238 .power_switching_mode = 0,
239};
240
241static struct platform_device isp1362_hcd_device = {
242 .name = "isp1362-hcd",
243 .id = 0,
244 .dev = {
245 .platform_data = &isp1362_priv,
246 },
247 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
248 .resource = isp1362_hcd_resources,
249};
250#endif
251
252#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
253static struct platform_device bfin_mac_device = {
254 .name = "bfin_mac",
255};
256#endif
257
258#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
259static struct resource net2272_bfin_resources[] = {
260 {
261 .start = 0x20300000,
262 .end = 0x20300000 + 0x100,
263 .flags = IORESOURCE_MEM,
264 },{
265 .start = IRQ_PF7,
266 .end = IRQ_PF7,
267 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
268 },
269};
270
271static struct platform_device net2272_bfin_device = {
272 .name = "net2272",
273 .id = -1,
274 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
275 .resource = net2272_bfin_resources,
276};
277#endif
278
279#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
280/* all SPI peripherals info goes here */
281
282#if defined(CONFIG_MTD_M25P80) \
283 || defined(CONFIG_MTD_M25P80_MODULE)
284static struct mtd_partition bfin_spi_flash_partitions[] = {
285 {
286 .name = "bootloader",
287 .size = 0x00020000,
288 .offset = 0,
289 .mask_flags = MTD_CAP_ROM
290 },{
291 .name = "kernel",
292 .size = 0xe0000,
293 .offset = 0x20000
294 },{
295 .name = "file system",
296 .size = 0x700000,
297 .offset = 0x00100000,
298 }
299};
300
301static struct flash_platform_data bfin_spi_flash_data = {
302 .name = "m25p80",
303 .parts = bfin_spi_flash_partitions,
304 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
305 .type = "m25p64",
306};
307
308/* SPI flash chip (m25p64) */
309static struct bfin5xx_spi_chip spi_flash_chip_info = {
310 .enable_dma = 0, /* use dma transfer with this chip*/
311 .bits_per_word = 8,
312};
313#endif
314
315#if defined(CONFIG_SPI_ADC_BF533) \
316 || defined(CONFIG_SPI_ADC_BF533_MODULE)
317/* SPI ADC chip */
318static struct bfin5xx_spi_chip spi_adc_chip_info = {
319 .enable_dma = 1, /* use dma transfer with this chip*/
320 .bits_per_word = 16,
321};
322#endif
323
324#if defined(CONFIG_SND_BLACKFIN_AD1836) \
325 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
326static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
327 .enable_dma = 0,
328 .bits_per_word = 16,
329};
330#endif
331
332#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
333static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
334 .enable_dma = 0,
335 .bits_per_word = 16,
336};
337#endif
338
339#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
340static struct bfin5xx_spi_chip spi_mmc_chip_info = {
341 .enable_dma = 1,
342 .bits_per_word = 8,
343};
344#endif
345
346#if defined(CONFIG_PBX)
347static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
348 .ctl_reg = 0x4, /* send zero */
349 .enable_dma = 0,
350 .bits_per_word = 8,
351 .cs_change_per_word = 1,
352};
353#endif
354
355#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
356static struct bfin5xx_spi_chip ad5304_chip_info = {
357 .enable_dma = 0,
358 .bits_per_word = 16,
359};
360#endif
361
362#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
363static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
364// .cs_change_per_word = 1,
365 .enable_dma = 0,
366 .bits_per_word = 16,
367};
368
369static const struct ad7877_platform_data bfin_ad7877_ts_info = {
370 .model = 7877,
371 .vref_delay_usecs = 50, /* internal, no capacitor */
372 .x_plate_ohms = 419,
373 .y_plate_ohms = 486,
374 .pressure_max = 1000,
375 .pressure_min = 0,
376 .stopacq_polarity = 1,
377 .first_conversion_delay = 3,
378 .acquisition_time = 1,
379 .averaging = 1,
380 .pen_down_acc_interval = 1,
381};
382#endif
383
384static struct spi_board_info bfin_spi_board_info[] __initdata = {
385#if defined(CONFIG_MTD_M25P80) \
386 || defined(CONFIG_MTD_M25P80_MODULE)
387 {
388 /* the modalias must be the same as spi device driver name */
389 .modalias = "m25p80", /* Name of spi_driver for this device */
390 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
391 .bus_num = 1, /* Framework bus number */
392 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
393 .platform_data = &bfin_spi_flash_data,
394 .controller_data = &spi_flash_chip_info,
395 .mode = SPI_MODE_3,
396 },
397#endif
398
399#if defined(CONFIG_SPI_ADC_BF533) \
400 || defined(CONFIG_SPI_ADC_BF533_MODULE)
401 {
402 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
403 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
404 .bus_num = 1, /* Framework bus number */
405 .chip_select = 1, /* Framework chip select. */
406 .platform_data = NULL, /* No spi_driver specific config */
407 .controller_data = &spi_adc_chip_info,
408 },
409#endif
410
411#if defined(CONFIG_SND_BLACKFIN_AD1836) \
412 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
413 {
414 .modalias = "ad1836-spi",
415 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
416 .bus_num = 1,
417 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
418 .controller_data = &ad1836_spi_chip_info,
419 },
420#endif
421#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
422 {
423 .modalias = "ad9960-spi",
424 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
425 .bus_num = 1,
426 .chip_select = 1,
427 .controller_data = &ad9960_spi_chip_info,
428 },
429#endif
430#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
431 {
432 .modalias = "spi_mmc_dummy",
433 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
434 .bus_num = 1,
435 .chip_select = 0,
436 .platform_data = NULL,
437 .controller_data = &spi_mmc_chip_info,
438 .mode = SPI_MODE_3,
439 },
440 {
441 .modalias = "spi_mmc",
442 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
443 .bus_num = 1,
444 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
445 .platform_data = NULL,
446 .controller_data = &spi_mmc_chip_info,
447 .mode = SPI_MODE_3,
448 },
449#endif
450#if defined(CONFIG_PBX)
451 {
452 .modalias = "fxs-spi",
453 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
454 .bus_num = 1,
455 .chip_select = 3,
456 .controller_data= &spi_si3xxx_chip_info,
457 .mode = SPI_MODE_3,
458 },
459 {
460 .modalias = "fxo-spi",
461 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
462 .bus_num = 1,
463 .chip_select = 2,
464 .controller_data= &spi_si3xxx_chip_info,
465 .mode = SPI_MODE_3,
466 },
467#endif
468#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
469 {
470 .modalias = "ad5304_spi",
471 .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
472 .bus_num = 1,
473 .chip_select = 2,
474 .platform_data = NULL,
475 .controller_data = &ad5304_chip_info,
476 .mode = SPI_MODE_2,
477 },
478#endif
479#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
480 {
481 .modalias = "ad7877",
482 .platform_data = &bfin_ad7877_ts_info,
483 .irq = IRQ_PF6,
484 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
485 .bus_num = 1,
486 .chip_select = 1,
487 .controller_data = &spi_ad7877_chip_info,
488 },
489#endif
490};
491
492/* SPI controller data */
493static struct bfin5xx_spi_master spi_bfin_master_info = {
494 .num_chipselect = 8,
495 .enable_dma = 1, /* master has the ability to do dma transfer */
496};
497
498static struct platform_device spi_bfin_master_device = {
499 .name = "bfin-spi-master",
500 .id = 1, /* Bus number */
501 .dev = {
502 .platform_data = &spi_bfin_master_info, /* Passed to driver */
503 },
504};
505#endif /* spi master and devices */
506
507#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
508static struct platform_device bfin_fb_device = {
509 .name = "bf537-fb",
510};
511#endif
512
513#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
514static struct resource bfin_uart_resources[] = {
515 {
516 .start = 0xFFC00400,
517 .end = 0xFFC004FF,
518 .flags = IORESOURCE_MEM,
519 },{
520 .start = 0xFFC02000,
521 .end = 0xFFC020FF,
522 .flags = IORESOURCE_MEM,
523 },
524};
525
526static struct platform_device bfin_uart_device = {
527 .name = "bfin-uart",
528 .id = 1,
529 .num_resources = ARRAY_SIZE(bfin_uart_resources),
530 .resource = bfin_uart_resources,
531};
532#endif
533
534#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
535static struct platform_device i2c_bfin_twi_device = {
536 .name = "i2c-bfin-twi",
537 .id = 0,
538};
539#endif
540
541#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
542static struct platform_device bfin_sport0_uart_device = {
543 .name = "bfin-sport-uart",
544 .id = 0,
545};
546
547static struct platform_device bfin_sport1_uart_device = {
548 .name = "bfin-sport-uart",
549 .id = 1,
550};
551#endif
552
553static struct platform_device *stamp_devices[] __initdata = {
554#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
555 &bfin_pcmcia_cf_device,
556#endif
557
558#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
559 &rtc_device,
560#endif
561
562#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
563 &sl811_hcd_device,
564#endif
565
566#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
567 &isp1362_hcd_device,
568#endif
569
570#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
571 &smc91x_device,
572#endif
573
574#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
575 &bfin_mac_device,
576#endif
577
578#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
579 &net2272_bfin_device,
580#endif
581
582#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
583 &spi_bfin_master_device,
584#endif
585
586#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
587 &bfin_fb_device,
588#endif
589
590#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
591 &bfin_uart_device,
592#endif
593
594#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
595 &i2c_bfin_twi_device,
596#endif
597
598#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
599 &bfin_sport0_uart_device,
600 &bfin_sport1_uart_device,
601#endif
602};
603
604static int __init stamp_init(void)
605{
606 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
607 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
608#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
609 spi_register_board_info(bfin_spi_board_info,
610 ARRAY_SIZE(bfin_spi_board_info));
611#endif
612 return 0;
613}
614
615arch_initcall(stamp_init);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 03:58:38 -0500