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authorMike Frysinger <vapier@gentoo.org>2009-07-26 20:44:25 -0400
committerMike Frysinger <vapier@gentoo.org>2009-09-16 22:09:55 -0400
commit8d71e075966e29232cd38d8ca6335047a164c1dc (patch)
tree8e958abca578238c383ab99d8b2b170d8648c12a /arch/blackfin/mach-bf533/include
parent61f09b5a09fb3962bbd3990a9a5a8470197955bb (diff)
Blackfin: drop unused MMR defines that only cause bad code to be written
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf533/include')
-rw-r--r--arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h8
-rw-r--r--arch/blackfin/mach-bf533/include/mach/blackfin.h7
2 files changed, 4 insertions, 11 deletions
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
index 4062e24e759b..6965b4088c44 100644
--- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
@@ -131,11 +131,11 @@ struct bfin_serial_res {
131struct bfin_serial_res bfin_serial_resource[] = { 131struct bfin_serial_res bfin_serial_resource[] = {
132 { 132 {
133 0xFFC00400, 133 0xFFC00400,
134 IRQ_UART_RX, 134 IRQ_UART0_RX,
135 IRQ_UART_ERROR, 135 IRQ_UART0_ERROR,
136#ifdef CONFIG_SERIAL_BFIN_DMA 136#ifdef CONFIG_SERIAL_BFIN_DMA
137 CH_UART_TX, 137 CH_UART0_TX,
138 CH_UART_RX, 138 CH_UART0_RX,
139#endif 139#endif
140#ifdef CONFIG_SERIAL_BFIN_CTSRTS 140#ifdef CONFIG_SERIAL_BFIN_CTSRTS
141 CONFIG_UART0_CTS_PIN, 141 CONFIG_UART0_CTS_PIN,
diff --git a/arch/blackfin/mach-bf533/include/mach/blackfin.h b/arch/blackfin/mach-bf533/include/mach/blackfin.h
index 39aa175f19f5..499e897a4f4f 100644
--- a/arch/blackfin/mach-bf533/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf533/include/mach/blackfin.h
@@ -43,13 +43,6 @@
43 43
44#define BFIN_UART_NR_PORTS 1 44#define BFIN_UART_NR_PORTS 1
45 45
46#define CH_UART_RX CH_UART0_RX
47#define CH_UART_TX CH_UART0_TX
48
49#define IRQ_UART_ERROR IRQ_UART0_ERROR
50#define IRQ_UART_RX IRQ_UART0_RX
51#define IRQ_UART_TX IRQ_UART0_TX
52
53#define OFFSET_THR 0x00 /* Transmit Holding register */ 46#define OFFSET_THR 0x00 /* Transmit Holding register */
54#define OFFSET_RBR 0x00 /* Receive Buffer register */ 47#define OFFSET_RBR 0x00 /* Receive Buffer register */
55#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */ 48#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */