aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/mach-bf527
diff options
context:
space:
mode:
authorMike Frysinger <vapier@gentoo.org>2011-05-26 04:03:10 -0400
committerMike Frysinger <vapier@gentoo.org>2011-07-23 01:10:41 -0400
commit2f7d63f909900c555baf36a4c6a11e9bf8e1af18 (patch)
tree1c15e1a2f04300366cdd1d6e056e1a5f18fd55fc /arch/blackfin/mach-bf527
parent9be8631b8a7d11fa6d206fcf0a7a2005ed39f41b (diff)
Blackfin: boards: clean up redundant/dead spi resources
The default for the Blackfin SPI driver is 8 bits and dma disabled, so many of the bfin5xx_spi_chip resources are redundant. So punt those parts. Further, drivers should themselves be declaring 16 bit transfers, so for those that do, and for the ones which no longer do 16 bit transfers, drop the bfin5xx_spi_chip resources. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf527')
-rw-r--r--arch/blackfin/mach-bf527/boards/ad7160eval.c19
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c55
-rw-r--r--arch/blackfin/mach-bf527/boards/ezbrd.c62
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c62
-rw-r--r--arch/blackfin/mach-bf527/boards/tll6527m.c70
5 files changed, 0 insertions, 268 deletions
diff --git a/arch/blackfin/mach-bf527/boards/ad7160eval.c b/arch/blackfin/mach-bf527/boards/ad7160eval.c
index ccab4c689dc3..c04df43f6391 100644
--- a/arch/blackfin/mach-bf527/boards/ad7160eval.c
+++ b/arch/blackfin/mach-bf527/boards/ad7160eval.c
@@ -265,29 +265,12 @@ static struct flash_platform_data bfin_spi_flash_data = {
265/* SPI flash chip (m25p64) */ 265/* SPI flash chip (m25p64) */
266static struct bfin5xx_spi_chip spi_flash_chip_info = { 266static struct bfin5xx_spi_chip spi_flash_chip_info = {
267 .enable_dma = 0, /* use dma transfer with this chip*/ 267 .enable_dma = 0, /* use dma transfer with this chip*/
268 .bits_per_word = 8,
269};
270#endif
271
272#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
273 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
274static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
275 .enable_dma = 0,
276 .bits_per_word = 16,
277}; 268};
278#endif 269#endif
279 270
280#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 271#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
281static struct bfin5xx_spi_chip mmc_spi_chip_info = { 272static struct bfin5xx_spi_chip mmc_spi_chip_info = {
282 .enable_dma = 0, 273 .enable_dma = 0,
283 .bits_per_word = 8,
284};
285#endif
286
287#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
288static struct bfin5xx_spi_chip spidev_chip_info = {
289 .enable_dma = 0,
290 .bits_per_word = 8,
291}; 274};
292#endif 275#endif
293 276
@@ -328,7 +311,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
328 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 311 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
329 .bus_num = 0, 312 .bus_num = 0,
330 .chip_select = 4, 313 .chip_select = 4,
331 .controller_data = &ad1836_spi_chip_info,
332 }, 314 },
333#endif 315#endif
334#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 316#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
@@ -347,7 +329,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
347 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 329 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
348 .bus_num = 0, 330 .bus_num = 0,
349 .chip_select = 1, 331 .chip_select = 1,
350 .controller_data = &spidev_chip_info,
351 }, 332 },
352#endif 333#endif
353}; 334};
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index c9d6dc88f0e6..6400341cc230 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -354,40 +354,16 @@ static struct flash_platform_data bfin_spi_flash_data = {
354/* SPI flash chip (m25p64) */ 354/* SPI flash chip (m25p64) */
355static struct bfin5xx_spi_chip spi_flash_chip_info = { 355static struct bfin5xx_spi_chip spi_flash_chip_info = {
356 .enable_dma = 0, /* use dma transfer with this chip*/ 356 .enable_dma = 0, /* use dma transfer with this chip*/
357 .bits_per_word = 8,
358};
359#endif
360
361#if defined(CONFIG_BFIN_SPI_ADC) \
362 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
363/* SPI ADC chip */
364static struct bfin5xx_spi_chip spi_adc_chip_info = {
365 .enable_dma = 1, /* use dma transfer with this chip*/
366 .bits_per_word = 16,
367};
368#endif
369
370#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
371 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
372static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
373 .enable_dma = 0,
374 .bits_per_word = 16,
375}; 357};
376#endif 358#endif
377 359
378#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 360#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
379static struct bfin5xx_spi_chip mmc_spi_chip_info = { 361static struct bfin5xx_spi_chip mmc_spi_chip_info = {
380 .enable_dma = 0, 362 .enable_dma = 0,
381 .bits_per_word = 8,
382}; 363};
383#endif 364#endif
384 365
385#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 366#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
386static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
387 .enable_dma = 0,
388 .bits_per_word = 16,
389};
390
391static const struct ad7877_platform_data bfin_ad7877_ts_info = { 367static const struct ad7877_platform_data bfin_ad7877_ts_info = {
392 .model = 7877, 368 .model = 7877,
393 .vref_delay_usecs = 50, /* internal, no capacitor */ 369 .vref_delay_usecs = 50, /* internal, no capacitor */
@@ -403,21 +379,6 @@ static const struct ad7877_platform_data bfin_ad7877_ts_info = {
403}; 379};
404#endif 380#endif
405 381
406#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
407 && defined(CONFIG_SND_SOC_WM8731_SPI)
408static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
409 .enable_dma = 0,
410 .bits_per_word = 16,
411};
412#endif
413
414#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
415static struct bfin5xx_spi_chip spidev_chip_info = {
416 .enable_dma = 0,
417 .bits_per_word = 8,
418};
419#endif
420
421static struct spi_board_info bfin_spi_board_info[] __initdata = { 382static struct spi_board_info bfin_spi_board_info[] __initdata = {
422#if defined(CONFIG_MTD_M25P80) \ 383#if defined(CONFIG_MTD_M25P80) \
423 || defined(CONFIG_MTD_M25P80_MODULE) 384 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -433,18 +394,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
433 }, 394 },
434#endif 395#endif
435 396
436#if defined(CONFIG_BFIN_SPI_ADC) \
437 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
438 {
439 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
440 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
441 .bus_num = 0, /* Framework bus number */
442 .chip_select = 1, /* Framework chip select. */
443 .platform_data = NULL, /* No spi_driver specific config */
444 .controller_data = &spi_adc_chip_info,
445 },
446#endif
447
448#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ 397#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
449 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) 398 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
450 { 399 {
@@ -452,7 +401,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
452 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 401 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
453 .bus_num = 0, 402 .bus_num = 0,
454 .chip_select = 4, 403 .chip_select = 4,
455 .controller_data = &ad1836_spi_chip_info,
456 }, 404 },
457#endif 405#endif
458#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 406#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
@@ -473,7 +421,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
473 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 421 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
474 .bus_num = 0, 422 .bus_num = 0,
475 .chip_select = 2, 423 .chip_select = 2,
476 .controller_data = &spi_ad7877_chip_info,
477 }, 424 },
478#endif 425#endif
479#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ 426#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
@@ -483,7 +430,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
483 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 430 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
484 .bus_num = 0, 431 .bus_num = 0,
485 .chip_select = 5, 432 .chip_select = 5,
486 .controller_data = &spi_wm8731_chip_info,
487 .mode = SPI_MODE_0, 433 .mode = SPI_MODE_0,
488 }, 434 },
489#endif 435#endif
@@ -493,7 +439,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
493 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 439 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
494 .bus_num = 0, 440 .bus_num = 0,
495 .chip_select = 1, 441 .chip_select = 1,
496 .controller_data = &spidev_chip_info,
497 }, 442 },
498#endif 443#endif
499}; 444};
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index b7101aa6e3aa..6dbb1b403763 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -253,32 +253,16 @@ static struct flash_platform_data bfin_spi_flash_data = {
253/* SPI flash chip (sst25wf040) */ 253/* SPI flash chip (sst25wf040) */
254static struct bfin5xx_spi_chip spi_flash_chip_info = { 254static struct bfin5xx_spi_chip spi_flash_chip_info = {
255 .enable_dma = 0, /* use dma transfer with this chip*/ 255 .enable_dma = 0, /* use dma transfer with this chip*/
256 .bits_per_word = 8,
257};
258#endif
259
260#if defined(CONFIG_BFIN_SPI_ADC) \
261 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
262/* SPI ADC chip */
263static struct bfin5xx_spi_chip spi_adc_chip_info = {
264 .enable_dma = 1, /* use dma transfer with this chip*/
265 .bits_per_word = 16,
266}; 256};
267#endif 257#endif
268 258
269#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 259#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
270static struct bfin5xx_spi_chip mmc_spi_chip_info = { 260static struct bfin5xx_spi_chip mmc_spi_chip_info = {
271 .enable_dma = 0, 261 .enable_dma = 0,
272 .bits_per_word = 8,
273}; 262};
274#endif 263#endif
275 264
276#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 265#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
277static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
278 .enable_dma = 0,
279 .bits_per_word = 16,
280};
281
282static const struct ad7877_platform_data bfin_ad7877_ts_info = { 266static const struct ad7877_platform_data bfin_ad7877_ts_info = {
283 .model = 7877, 267 .model = 7877,
284 .vref_delay_usecs = 50, /* internal, no capacitor */ 268 .vref_delay_usecs = 50, /* internal, no capacitor */
@@ -311,35 +295,6 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
311}; 295};
312#endif 296#endif
313 297
314#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
315static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
316 .enable_dma = 0,
317 .bits_per_word = 16,
318};
319#endif
320
321#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
322 && defined(CONFIG_SND_SOC_WM8731_SPI)
323static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
324 .enable_dma = 0,
325 .bits_per_word = 16,
326};
327#endif
328
329#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
330static struct bfin5xx_spi_chip spidev_chip_info = {
331 .enable_dma = 0,
332 .bits_per_word = 8,
333};
334#endif
335
336#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
337static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
338 .enable_dma = 0,
339 .bits_per_word = 8,
340};
341#endif
342
343static struct spi_board_info bfin_spi_board_info[] __initdata = { 298static struct spi_board_info bfin_spi_board_info[] __initdata = {
344#if defined(CONFIG_MTD_M25P80) \ 299#if defined(CONFIG_MTD_M25P80) \
345 || defined(CONFIG_MTD_M25P80_MODULE) 300 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -355,18 +310,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
355 }, 310 },
356#endif 311#endif
357 312
358#if defined(CONFIG_BFIN_SPI_ADC) \
359 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
360 {
361 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
362 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
363 .bus_num = 0, /* Framework bus number */
364 .chip_select = 1, /* Framework chip select. */
365 .platform_data = NULL, /* No spi_driver specific config */
366 .controller_data = &spi_adc_chip_info,
367 },
368#endif
369
370#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 313#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
371 { 314 {
372 .modalias = "mmc_spi", 315 .modalias = "mmc_spi",
@@ -385,7 +328,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
385 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 328 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
386 .bus_num = 0, 329 .bus_num = 0,
387 .chip_select = 2, 330 .chip_select = 2,
388 .controller_data = &spi_ad7877_chip_info,
389 }, 331 },
390#endif 332#endif
391#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) 333#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
@@ -396,7 +338,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
396 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 338 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
397 .bus_num = 0, 339 .bus_num = 0,
398 .chip_select = 5, 340 .chip_select = 5,
399 .controller_data = &spi_ad7879_chip_info,
400 .mode = SPI_CPHA | SPI_CPOL, 341 .mode = SPI_CPHA | SPI_CPOL,
401 }, 342 },
402#endif 343#endif
@@ -407,7 +348,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
407 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 348 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
408 .bus_num = 0, 349 .bus_num = 0,
409 .chip_select = 5, 350 .chip_select = 5,
410 .controller_data = &spi_wm8731_chip_info,
411 .mode = SPI_MODE_0, 351 .mode = SPI_MODE_0,
412 }, 352 },
413#endif 353#endif
@@ -417,7 +357,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
417 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 357 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
418 .bus_num = 0, 358 .bus_num = 0,
419 .chip_select = 1, 359 .chip_select = 1,
420 .controller_data = &spidev_chip_info,
421 }, 360 },
422#endif 361#endif
423#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 362#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
@@ -426,7 +365,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
426 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 365 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
427 .bus_num = 0, 366 .bus_num = 0,
428 .chip_select = 1, 367 .chip_select = 1,
429 .controller_data = &lq035q1_spi_chip_info,
430 .mode = SPI_CPHA | SPI_CPOL, 368 .mode = SPI_CPHA | SPI_CPOL,
431 }, 369 },
432#endif 370#endif
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 3f967b1c5792..094853ac3c0d 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -451,40 +451,16 @@ static struct flash_platform_data bfin_spi_flash_data = {
451/* SPI flash chip (m25p64) */ 451/* SPI flash chip (m25p64) */
452static struct bfin5xx_spi_chip spi_flash_chip_info = { 452static struct bfin5xx_spi_chip spi_flash_chip_info = {
453 .enable_dma = 0, /* use dma transfer with this chip*/ 453 .enable_dma = 0, /* use dma transfer with this chip*/
454 .bits_per_word = 8,
455};
456#endif
457
458#if defined(CONFIG_BFIN_SPI_ADC) \
459 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
460/* SPI ADC chip */
461static struct bfin5xx_spi_chip spi_adc_chip_info = {
462 .enable_dma = 1, /* use dma transfer with this chip*/
463 .bits_per_word = 16,
464};
465#endif
466
467#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
468 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
469static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
470 .enable_dma = 0,
471 .bits_per_word = 16,
472}; 454};
473#endif 455#endif
474 456
475#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 457#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
476static struct bfin5xx_spi_chip mmc_spi_chip_info = { 458static struct bfin5xx_spi_chip mmc_spi_chip_info = {
477 .enable_dma = 0, 459 .enable_dma = 0,
478 .bits_per_word = 8,
479}; 460};
480#endif 461#endif
481 462
482#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 463#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
483static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
484 .enable_dma = 0,
485 .bits_per_word = 16,
486};
487
488static const struct ad7877_platform_data bfin_ad7877_ts_info = { 464static const struct ad7877_platform_data bfin_ad7877_ts_info = {
489 .model = 7877, 465 .model = 7877,
490 .vref_delay_usecs = 50, /* internal, no capacitor */ 466 .vref_delay_usecs = 50, /* internal, no capacitor */
@@ -516,20 +492,6 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
516}; 492};
517#endif 493#endif
518 494
519#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
520static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
521 .enable_dma = 0,
522 .bits_per_word = 16,
523};
524#endif
525
526#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
527static struct bfin5xx_spi_chip spidev_chip_info = {
528 .enable_dma = 0,
529 .bits_per_word = 8,
530};
531#endif
532
533#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \ 495#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
534 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) 496 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
535 497
@@ -608,13 +570,6 @@ static struct platform_device bfin_tdm = {
608}; 570};
609#endif 571#endif
610 572
611#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
612static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
613 .enable_dma = 0,
614 .bits_per_word = 8,
615};
616#endif
617
618static struct spi_board_info bfin_spi_board_info[] __initdata = { 573static struct spi_board_info bfin_spi_board_info[] __initdata = {
619#if defined(CONFIG_MTD_M25P80) \ 574#if defined(CONFIG_MTD_M25P80) \
620 || defined(CONFIG_MTD_M25P80_MODULE) 575 || defined(CONFIG_MTD_M25P80_MODULE)
@@ -630,18 +585,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
630 }, 585 },
631#endif 586#endif
632 587
633#if defined(CONFIG_BFIN_SPI_ADC) \
634 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
635 {
636 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
637 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
638 .bus_num = 0, /* Framework bus number */
639 .chip_select = 1, /* Framework chip select. */
640 .platform_data = NULL, /* No spi_driver specific config */
641 .controller_data = &spi_adc_chip_info,
642 },
643#endif
644
645#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \ 588#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
646 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE) 589 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
647 { 590 {
@@ -650,7 +593,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
650 .bus_num = 0, 593 .bus_num = 0,
651 .chip_select = 4, 594 .chip_select = 4,
652 .platform_data = "ad1836", 595 .platform_data = "ad1836",
653 .controller_data = &ad1836_spi_chip_info,
654 .mode = SPI_MODE_3, 596 .mode = SPI_MODE_3,
655 }, 597 },
656#endif 598#endif
@@ -673,7 +615,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
673 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 615 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
674 .bus_num = 0, 616 .bus_num = 0,
675 .chip_select = 2, 617 .chip_select = 2,
676 .controller_data = &spi_ad7877_chip_info,
677 }, 618 },
678#endif 619#endif
679#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) 620#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
@@ -684,7 +625,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
684 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 625 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
685 .bus_num = 0, 626 .bus_num = 0,
686 .chip_select = 3, 627 .chip_select = 3,
687 .controller_data = &spi_ad7879_chip_info,
688 .mode = SPI_CPHA | SPI_CPOL, 628 .mode = SPI_CPHA | SPI_CPOL,
689 }, 629 },
690#endif 630#endif
@@ -694,7 +634,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
694 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 634 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
695 .bus_num = 0, 635 .bus_num = 0,
696 .chip_select = 1, 636 .chip_select = 1,
697 .controller_data = &spidev_chip_info,
698 }, 637 },
699#endif 638#endif
700#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 639#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
@@ -703,7 +642,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
703 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 642 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
704 .bus_num = 0, 643 .bus_num = 0,
705 .chip_select = 7, 644 .chip_select = 7,
706 .controller_data = &lq035q1_spi_chip_info,
707 .mode = SPI_CPHA | SPI_CPOL, 645 .mode = SPI_CPHA | SPI_CPOL,
708 }, 646 },
709#endif 647#endif
diff --git a/arch/blackfin/mach-bf527/boards/tll6527m.c b/arch/blackfin/mach-bf527/boards/tll6527m.c
index 18d303dd5627..ec4bc7429c9f 100644
--- a/arch/blackfin/mach-bf527/boards/tll6527m.c
+++ b/arch/blackfin/mach-bf527/boards/tll6527m.c
@@ -314,29 +314,12 @@ static struct flash_platform_data bfin_spi_flash_data = {
314/* SPI flash chip (m25p64) */ 314/* SPI flash chip (m25p64) */
315static struct bfin5xx_spi_chip spi_flash_chip_info = { 315static struct bfin5xx_spi_chip spi_flash_chip_info = {
316 .enable_dma = 0, /* use dma transfer with this chip*/ 316 .enable_dma = 0, /* use dma transfer with this chip*/
317 .bits_per_word = 8,
318};
319#endif
320
321#if defined(CONFIG_BFIN_SPI_ADC) \
322 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
323/* SPI ADC chip */
324static struct bfin5xx_spi_chip spi_adc_chip_info = {
325 .enable_dma = 0, /* use dma transfer with this chip*/
326/*
327 * tll6527m V1.0 does not support native spi slave selects
328 * hence DMA mode will not be useful since the ADC needs
329 * CS to toggle for each sample and cs_change_per_word
330 * seems to be removed from spi_bfin5xx.c
331 */
332 .bits_per_word = 16,
333}; 317};
334#endif 318#endif
335 319
336#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 320#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
337static struct bfin5xx_spi_chip mmc_spi_chip_info = { 321static struct bfin5xx_spi_chip mmc_spi_chip_info = {
338 .enable_dma = 0, 322 .enable_dma = 0,
339 .bits_per_word = 8,
340}; 323};
341#endif 324#endif
342 325
@@ -359,21 +342,6 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
359}; 342};
360#endif 343#endif
361 344
362#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
363 || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
364static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
365 .enable_dma = 0,
366 .bits_per_word = 16,
367};
368#endif
369
370#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
371static struct bfin5xx_spi_chip spidev_chip_info = {
372 .enable_dma = 0,
373 .bits_per_word = 8,
374};
375#endif
376
377#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) 345#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
378static struct platform_device bfin_i2s = { 346static struct platform_device bfin_i2s = {
379 .name = "bfin-i2s", 347 .name = "bfin-i2s",
@@ -382,24 +350,7 @@ static struct platform_device bfin_i2s = {
382}; 350};
383#endif 351#endif
384 352
385#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
386static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
387 .enable_dma = 0,
388 .bits_per_word = 8,
389};
390#endif
391
392#if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE) 353#if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
393static struct bfin5xx_spi_chip spi_mcp23s08_sys_chip_info = {
394 .enable_dma = 0,
395 .bits_per_word = 8,
396};
397
398static struct bfin5xx_spi_chip spi_mcp23s08_usr_chip_info = {
399 .enable_dma = 0,
400 .bits_per_word = 8,
401};
402
403#include <linux/spi/mcp23s08.h> 354#include <linux/spi/mcp23s08.h>
404static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = { 355static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = {
405 .chip[0].is_present = true, 356 .chip[0].is_present = true,
@@ -429,22 +380,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
429 }, 380 },
430#endif 381#endif
431 382
432#if defined(CONFIG_BFIN_SPI_ADC)
433 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
434 {
435 .modalias = "bfin_spi_adc",
436 /* Name of spi_driver for this device */
437 .max_speed_hz = 10000000,
438 /* max spi clock (SCK) speed in HZ */
439 .bus_num = 0, /* Framework bus number */
440 .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
441 /* Framework chip select. */
442 .platform_data = NULL, /* No spi_driver specific config */
443 .controller_data = &spi_adc_chip_info,
444 .mode = SPI_MODE_0,
445 },
446#endif
447
448#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 383#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
449 { 384 {
450 .modalias = "mmc_spi", 385 .modalias = "mmc_spi",
@@ -470,7 +405,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
470 /* max spi clock (SCK) speed in HZ */ 405 /* max spi clock (SCK) speed in HZ */
471 .bus_num = 0, 406 .bus_num = 0,
472 .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS, 407 .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS,
473 .controller_data = &spi_ad7879_chip_info,
474 .mode = SPI_CPHA | SPI_CPOL, 408 .mode = SPI_CPHA | SPI_CPOL,
475 }, 409 },
476#endif 410#endif
@@ -482,7 +416,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
482 .bus_num = 0, 416 .bus_num = 0,
483 .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS, 417 .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS,
484 .mode = SPI_CPHA | SPI_CPOL, 418 .mode = SPI_CPHA | SPI_CPOL,
485 .controller_data = &spidev_chip_info,
486 }, 419 },
487#endif 420#endif
488#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 421#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
@@ -491,7 +424,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
491 .max_speed_hz = 20000000, 424 .max_speed_hz = 20000000,
492 .bus_num = 0, 425 .bus_num = 0,
493 .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS, 426 .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS,
494 .controller_data = &lq035q1_spi_chip_info,
495 .mode = SPI_CPHA | SPI_CPOL, 427 .mode = SPI_CPHA | SPI_CPOL,
496 }, 428 },
497#endif 429#endif
@@ -502,7 +434,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
502 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 434 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
503 .bus_num = 0, 435 .bus_num = 0,
504 .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS, 436 .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS,
505 .controller_data = &spi_mcp23s08_sys_chip_info,
506 .mode = SPI_CPHA | SPI_CPOL, 437 .mode = SPI_CPHA | SPI_CPOL,
507 }, 438 },
508 { 439 {
@@ -511,7 +442,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
511 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 442 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
512 .bus_num = 0, 443 .bus_num = 0,
513 .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS, 444 .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS,
514 .controller_data = &spi_mcp23s08_usr_chip_info,
515 .mode = SPI_CPHA | SPI_CPOL, 445 .mode = SPI_CPHA | SPI_CPOL,
516 }, 446 },
517#endif 447#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 03:20:36 -0500