Blackfin: add support for the on-chip MAC status interrupts

This patch provides infrastructure for MAC Wake-On-Lan and PHYINT use in
phylib.  New Interrupts added:

IRQ_MAC_PHYINT   /* PHY_INT Interrupt */
IRQ_MAC_MMCINT   /* MMC Counter Interrupt */
IRQ_MAC_RXFSINT  /* RX Frame-Status Interrupt */
IRQ_MAC_TXFSINT  /* TX Frame-Status Interrupt */
IRQ_MAC_WAKEDET  /* Wake-Up Interrupt */
IRQ_MAC_RXDMAERR /* RX DMA Direction Error Interrupt */
IRQ_MAC_TXDMAERR /* TX DMA Direction Error Interrupt */
IRQ_MAC_STMDONE  /* Station Mgt. Transfer Done Interrupt */

On BF537/6 the implementation is not straight forward since there are now
two chained chained_handlers.  A cleaner approach would have been to add
latter IRQs to the demux of IRQ_GENERIC_ERROR.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

1 files changed, 10 insertions, 1 deletions

diff --git a/arch/blackfin/mach-bf518/include/mach/irq.h b/arch/blackfin/mach-bf518/include/mach/irq.h
index 52edc8483911..435e76e31aaa 100644
--- a/arch/blackfin/mach-bf518/include/mach/irq.h
+++ b/arch/blackfin/mach-bf518/include/mach/irq.h
@@ -151,7 +151,16 @@
 
 #define GPIO_IRQ_BASE   IRQ_PF0
 
-#define NR_MACH_IRQS    (IRQ_PH15 + 1)
+#define IRQ_MAC_PHYINT          119 /* PHY_INT Interrupt */
+#define IRQ_MAC_MMCINT          120 /* MMC Counter Interrupt */
+#define IRQ_MAC_RXFSINT         121 /* RX Frame-Status Interrupt */
+#define IRQ_MAC_TXFSINT         122 /* TX Frame-Status Interrupt */
+#define IRQ_MAC_WAKEDET         123 /* Wake-Up Interrupt */
+#define IRQ_MAC_RXDMAERR        124 /* RX DMA Direction Error Interrupt */
+#define IRQ_MAC_TXDMAERR        125 /* TX DMA Direction Error Interrupt */
+#define IRQ_MAC_STMDONE         126 /* Station Mgt. Transfer Done Interrupt */
+
+#define NR_MACH_IRQS    (IRQ_MAC_STMDONE + 1)
 #define NR_IRQS         (NR_MACH_IRQS + NR_SPARE_IRQS)
 
 #define IVG7            7