blackfin: add bf60x to current framework

This patch added bf60x to current blackfin kernel framework.

Signed-off-by: Bob Liu <lliubbo@gmail.com>

1 files changed, 141 insertions, 18 deletions

diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 2ad747e909fb..c113cfa459a7 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -25,6 +25,7 @@
 #include <asm/cacheflush.h>
 #include <asm/blackfin.h>
 #include <asm/cplbinit.h>
+#include <asm/clocks.h>
 #include <asm/div64.h>
 #include <asm/cpu.h>
 #include <asm/fixed_code.h>
@@ -550,7 +551,6 @@ static __init void memory_setup(void)
 {
 #ifdef CONFIG_MTD_UCLINUX
         unsigned long mtd_phys = 0;
-        unsigned long n;
 #endif
         unsigned long max_mem;
 
@@ -594,9 +594,9 @@ static __init void memory_setup(void)
         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
 
 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
-        n = ext2_image_size((void *)(mtd_phys + 0x400));
-        if (n)
-                mtd_size = PAGE_ALIGN(n * 1024);
+        if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
+                mtd_size =
+                    PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
 # endif
 
 # if defined(CONFIG_CRAMFS)
@@ -612,7 +612,8 @@ static __init void memory_setup(void)
 
                 /* ROM_FS is XIP, so if we found it, we need to limit memory */
                 if (memory_end > max_mem) {
-                        pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n", max_mem >> 20);
+                        pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n",
+                                (max_mem - CONFIG_PHY_RAM_BASE_ADDRESS) >> 20);
                         memory_end = max_mem;
                 }
         }
@@ -642,7 +643,8 @@ static __init void memory_setup(void)
          * doesn't exist, or we don't need to - then dont.
          */
         if (memory_end > max_mem) {
-                pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n", max_mem >> 20);
+                pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n",
+                                (max_mem - CONFIG_PHY_RAM_BASE_ADDRESS) >> 20);
                 memory_end = max_mem;
         }
 
@@ -661,8 +663,8 @@ static __init void memory_setup(void)
         init_mm.end_data = (unsigned long)_edata;
         init_mm.brk = (unsigned long)0;
 
-        printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
-        printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
+        printk(KERN_INFO "Board Memory: %ldMB\n", (physical_mem_end - CONFIG_PHY_RAM_BASE_ADDRESS) >> 20);
+        printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", (_ramend - CONFIG_PHY_RAM_BASE_ADDRESS) >> 20);
 
         printk(KERN_INFO "Memory map:\n"
                "  fixedcode = 0x%p-0x%p\n"
@@ -705,7 +707,7 @@ void __init find_min_max_pfn(void)
         int i;
 
         max_pfn = 0;
-        min_low_pfn = memory_end;
+        min_low_pfn = PFN_DOWN(memory_end);
 
         for (i = 0; i < bfin_memmap.nr_map; i++) {
                 unsigned long start, end;
@@ -748,8 +750,7 @@ static __init void setup_bootmem_allocator(void)
         /* pfn of the first usable page frame after kernel image*/
         if (min_low_pfn < memory_start >> PAGE_SHIFT)
                 min_low_pfn = memory_start >> PAGE_SHIFT;
-
-        start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
+        start_pfn = CONFIG_PHY_RAM_BASE_ADDRESS >> PAGE_SHIFT;
         end_pfn = memory_end >> PAGE_SHIFT;
 
         /*
@@ -794,8 +795,8 @@ static __init void setup_bootmem_allocator(void)
         }
 
         /* reserve memory before memory_start, including bootmap */
-        reserve_bootmem(PAGE_OFFSET,
-                memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
+        reserve_bootmem(CONFIG_PHY_RAM_BASE_ADDRESS,
+                memory_start + bootmap_size + PAGE_SIZE - 1 - CONFIG_PHY_RAM_BASE_ADDRESS,
                 BOOTMEM_DEFAULT);
 }
 
@@ -844,13 +845,40 @@ static inline int __init get_mem_size(void)
                 break;
         }
         switch (ddrctl & 0x30000) {
-                case DEVWD_4:  ret *= 2;
-                case DEVWD_8:  ret *= 2;
-                case DEVWD_16: break;
+        case DEVWD_4:
+                ret *= 2;
+        case DEVWD_8:
+                ret *= 2;
+        case DEVWD_16:
+                break;
         }
         if ((ddrctl & 0xc000) == 0x4000)
                 ret *= 2;
         return ret;
+#elif defined(CONFIG_BF60x)
+        u32 ddrctl = bfin_read_DDR0_CFG();
+        int ret;
+        switch (ddrctl & 0xf00) {
+        case DEVSZ_64:
+                ret = 64 / 8;
+                break;
+        case DEVSZ_128:
+                ret = 128 / 8;
+                break;
+        case DEVSZ_256:
+                ret = 256 / 8;
+                break;
+        case DEVSZ_512:
+                ret = 512 / 8;
+                break;
+        case DEVSZ_1G:
+                ret = 1024 / 8;
+                break;
+        case DEVSZ_2G:
+                ret = 2048 / 8;
+                break;
+        }
+        return ret;
 #endif
         BUG();
 }
@@ -864,12 +892,14 @@ void __init setup_arch(char **cmdline_p)
 {
         u32 mmr;
         unsigned long sclk, cclk;
+        struct clk *clk;
 
         native_machine_early_platform_add_devices();
 
         enable_shadow_console();
 
         /* Check to make sure we are running on the right processor */
+        mmr =  bfin_cpuid();
         if (unlikely(CPUID != bfin_cpuid()))
                 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
                         CPU, bfin_cpuid(), bfin_revid());
@@ -890,6 +920,10 @@ void __init setup_arch(char **cmdline_p)
 
         memset(&bfin_memmap, 0, sizeof(bfin_memmap));
 
+#ifdef CONFIG_BF60x
+        /* Should init clock device before parse command early */
+        clk_init();
+#endif
         /* If the user does not specify things on the command line, use
          * what the bootloader set things up as
          */
@@ -904,6 +938,7 @@ void __init setup_arch(char **cmdline_p)
 
         memory_setup();
 
+#ifndef CONFIG_BF60x
         /* Initialize Async memory banks */
         bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
         bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
@@ -913,6 +948,7 @@ void __init setup_arch(char **cmdline_p)
         bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
         bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
 #endif
+#endif
 #ifdef CONFIG_BFIN_HYSTERESIS_CONTROL
         bfin_write_PORTF_HYSTERESIS(HYST_PORTF_0_15);
         bfin_write_PORTG_HYSTERESIS(HYST_PORTG_0_15);
@@ -921,8 +957,24 @@ void __init setup_arch(char **cmdline_p)
                                         ~HYST_NONEGPIO_MASK) | HYST_NONEGPIO);
 #endif
 
+#ifdef CONFIG_BF60x
+        clk = clk_get(NULL, "CCLK");
+        if (!IS_ERR(clk)) {
+                cclk = clk_get_rate(clk);
+                clk_put(clk);
+        } else
+                cclk = 0;
+
+        clk = clk_get(NULL, "SCLK0");
+        if (!IS_ERR(clk)) {
+                sclk = clk_get_rate(clk);
+                clk_put(clk);
+        } else
+                sclk = 0;
+#else
         cclk = get_cclk();
         sclk = get_sclk();
+#endif
 
         if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk)
                 panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK");
@@ -938,7 +990,7 @@ void __init setup_arch(char **cmdline_p)
         printk(KERN_INFO "Hardware Trace %s and %sabled\n",
                 (mmr & 0x1) ? "active" : "off",
                 (mmr & 0x2) ? "en" : "dis");
-
+#ifndef CONFIG_BF60x
         mmr = bfin_read_SYSCR();
         printk(KERN_INFO "Boot Mode: %i\n", mmr & 0xF);
 
@@ -980,7 +1032,7 @@ void __init setup_arch(char **cmdline_p)
                 printk(KERN_INFO "Recovering from Watchdog event\n");
         else if (_bfin_swrst & RESET_SOFTWARE)
                 printk(KERN_NOTICE "Reset caused by Software reset\n");
-
+#endif
         printk(KERN_INFO "Blackfin support (C) 2004-2010 Analog Devices, Inc.\n");
         if (bfin_compiled_revid() == 0xffff)
                 printk(KERN_INFO "Compiled for ADSP-%s Rev any, running on 0.%d\n", CPU, bfin_revid());
@@ -1060,10 +1112,12 @@ subsys_initcall(topology_init);
 
 /* Get the input clock frequency */
 static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
+#ifndef CONFIG_BF60x
 static u_long get_clkin_hz(void)
 {
         return cached_clkin_hz;
 }
+#endif
 static int __init early_init_clkin_hz(char *buf)
 {
         cached_clkin_hz = simple_strtoul(buf, NULL, 0);
@@ -1075,6 +1129,7 @@ static int __init early_init_clkin_hz(char *buf)
 }
 early_param("clkin_hz=", early_init_clkin_hz);
 
+#ifndef CONFIG_BF60x
 /* Get the voltage input multiplier */
 static u_long get_vco(void)
 {
@@ -1097,10 +1152,23 @@ static u_long get_vco(void)
         cached_vco *= msel;
         return cached_vco;
 }
+#endif
 
 /* Get the Core clock */
 u_long get_cclk(void)
 {
+#ifdef CONFIG_BF60x
+        struct clk *cclk;
+        u_long cclk_rate;
+
+        cclk = clk_get(NULL, "CCLK");
+        if (IS_ERR(cclk))
+                return 0;
+
+        cclk_rate = clk_get_rate(cclk);
+        clk_put(cclk);
+        return cclk_rate;
+#else
         static u_long cached_cclk_pll_div, cached_cclk;
         u_long csel, ssel;
 
@@ -1120,12 +1188,66 @@ u_long get_cclk(void)
         else
                 cached_cclk = get_vco() >> csel;
         return cached_cclk;
+#endif
 }
 EXPORT_SYMBOL(get_cclk);
 
+#ifdef CONFIG_BF60x
+/* Get the bf60x clock of SCLK0 domain */
+u_long get_sclk0(void)
+{
+        struct clk *sclk0;
+        u_long sclk0_rate;
+
+        sclk0 = clk_get(NULL, "SCLK0");
+        if (IS_ERR(sclk0))
+                return 0;
+
+        sclk0_rate = clk_get_rate(sclk0);
+        clk_put(sclk0);
+        return sclk0_rate;
+}
+EXPORT_SYMBOL(get_sclk0);
+
+/* Get the bf60x clock of SCLK1 domain */
+u_long get_sclk1(void)
+{
+        struct clk *sclk1;
+        u_long sclk1_rate;
+
+        sclk1 = clk_get(NULL, "SCLK1");
+        if (IS_ERR(sclk1))
+                return 0;
+
+        sclk1_rate = clk_get_rate(sclk1);
+        clk_put(sclk1);
+        return sclk1_rate;
+}
+EXPORT_SYMBOL(get_sclk1);
+
+/* Get the bf60x DRAM clock */
+u_long get_dclk(void)
+{
+        struct clk *dclk;
+        u_long dclk_rate;
+
+        dclk = clk_get(NULL, "DCLK");
+        if (IS_ERR(dclk))
+                return 0;
+
+        dclk_rate = clk_get_rate(dclk);
+        clk_put(dclk);
+        return dclk_rate;
+}
+EXPORT_SYMBOL(get_dclk);
+#endif
+
 /* Get the System clock */
 u_long get_sclk(void)
 {
+#ifdef CONFIG_BF60x
+        return get_sclk0();
+#else
         static u_long cached_sclk;
         u_long ssel;
 
@@ -1146,6 +1268,7 @@ u_long get_sclk(void)
 
         cached_sclk = get_vco() / ssel;
         return cached_sclk;
+#endif
 }
 EXPORT_SYMBOL(get_sclk);