diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2009-02-23 17:05:56 -0500 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2009-02-23 17:05:56 -0500 |
| commit | dc731ca60954310be0993e8992d450c7089fd13d (patch) | |
| tree | 6a997916f963d9e6dfa76fc5564296f57c3f909e /arch/blackfin/kernel/cplb-mpu/cplbinit.c | |
| parent | ec5b3d32437571b8a742069a4cfd04edb6b6eda5 (diff) | |
| parent | 20f4d6c3a2a23c5d7d9cc7f42fbb943ca7a03d1f (diff) | |
Merge branch 'x86/urgent' into x86/mce2
Diffstat (limited to 'arch/blackfin/kernel/cplb-mpu/cplbinit.c')
| -rw-r--r-- | arch/blackfin/kernel/cplb-mpu/cplbinit.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c index bdb958486e76..3e329a6ce041 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c | |||
| @@ -63,10 +63,8 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) | |||
| 63 | dcplb_tbl[cpu][i_d].addr = 0; | 63 | dcplb_tbl[cpu][i_d].addr = 0; |
| 64 | dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; | 64 | dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; |
| 65 | 65 | ||
| 66 | #if 0 | ||
| 67 | icplb_tbl[cpu][i_i].addr = 0; | 66 | icplb_tbl[cpu][i_i].addr = 0; |
| 68 | icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB; | 67 | icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_1KB; |
| 69 | #endif | ||
| 70 | 68 | ||
| 71 | /* Cover kernel memory with 4M pages. */ | 69 | /* Cover kernel memory with 4M pages. */ |
| 72 | addr = 0; | 70 | addr = 0; |