diff options
author | Michael Hennerich <michael.hennerich@analog.com> | 2008-10-28 23:06:03 -0400 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2008-10-28 23:06:03 -0400 |
commit | abeb21efb10cd9e980f611c9bb408f172ed44465 (patch) | |
tree | 7721676da95a6f967e50a777a35917775a469da9 /arch/blackfin/kernel/bfin_dma_5xx.c | |
parent | 2cf851137b55cd0c49fd9e005cd01ac4761c005e (diff) |
Blackfin arch: remove most BUG_ON channel checks
keep BUG_ON in DMA request, free and set_dma_callback.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/kernel/bfin_dma_5xx.c')
-rw-r--r-- | arch/blackfin/kernel/bfin_dma_5xx.c | 70 |
1 files changed, 0 insertions, 70 deletions
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c index 35d51ac3a060..a778bc80dc52 100644 --- a/arch/blackfin/kernel/bfin_dma_5xx.c +++ b/arch/blackfin/kernel/bfin_dma_5xx.c | |||
@@ -162,7 +162,6 @@ EXPORT_SYMBOL(set_dma_callback); | |||
162 | 162 | ||
163 | void free_dma(unsigned int channel) | 163 | void free_dma(unsigned int channel) |
164 | { | 164 | { |
165 | |||
166 | pr_debug("freedma() : BEGIN \n"); | 165 | pr_debug("freedma() : BEGIN \n"); |
167 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | 166 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE |
168 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | 167 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); |
@@ -186,9 +185,6 @@ EXPORT_SYMBOL(free_dma); | |||
186 | void dma_enable_irq(unsigned int channel) | 185 | void dma_enable_irq(unsigned int channel) |
187 | { | 186 | { |
188 | pr_debug("dma_enable_irq() : BEGIN \n"); | 187 | pr_debug("dma_enable_irq() : BEGIN \n"); |
189 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
190 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
191 | |||
192 | enable_irq(dma_ch[channel].irq); | 188 | enable_irq(dma_ch[channel].irq); |
193 | } | 189 | } |
194 | EXPORT_SYMBOL(dma_enable_irq); | 190 | EXPORT_SYMBOL(dma_enable_irq); |
@@ -196,9 +192,6 @@ EXPORT_SYMBOL(dma_enable_irq); | |||
196 | void dma_disable_irq(unsigned int channel) | 192 | void dma_disable_irq(unsigned int channel) |
197 | { | 193 | { |
198 | pr_debug("dma_disable_irq() : BEGIN \n"); | 194 | pr_debug("dma_disable_irq() : BEGIN \n"); |
199 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
200 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
201 | |||
202 | disable_irq(dma_ch[channel].irq); | 195 | disable_irq(dma_ch[channel].irq); |
203 | } | 196 | } |
204 | EXPORT_SYMBOL(dma_disable_irq); | 197 | EXPORT_SYMBOL(dma_disable_irq); |
@@ -219,10 +212,6 @@ EXPORT_SYMBOL(dma_channel_active); | |||
219 | void disable_dma(unsigned int channel) | 212 | void disable_dma(unsigned int channel) |
220 | { | 213 | { |
221 | pr_debug("stop_dma() : BEGIN \n"); | 214 | pr_debug("stop_dma() : BEGIN \n"); |
222 | |||
223 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
224 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
225 | |||
226 | dma_ch[channel].regs->cfg &= ~DMAEN; /* Clean the enable bit */ | 215 | dma_ch[channel].regs->cfg &= ~DMAEN; /* Clean the enable bit */ |
227 | SSYNC(); | 216 | SSYNC(); |
228 | dma_ch[channel].chan_status = DMA_CHANNEL_REQUESTED; | 217 | dma_ch[channel].chan_status = DMA_CHANNEL_REQUESTED; |
@@ -235,10 +224,6 @@ EXPORT_SYMBOL(disable_dma); | |||
235 | void enable_dma(unsigned int channel) | 224 | void enable_dma(unsigned int channel) |
236 | { | 225 | { |
237 | pr_debug("enable_dma() : BEGIN \n"); | 226 | pr_debug("enable_dma() : BEGIN \n"); |
238 | |||
239 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
240 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
241 | |||
242 | dma_ch[channel].chan_status = DMA_CHANNEL_ENABLED; | 227 | dma_ch[channel].chan_status = DMA_CHANNEL_ENABLED; |
243 | dma_ch[channel].regs->curr_x_count = 0; | 228 | dma_ch[channel].regs->curr_x_count = 0; |
244 | dma_ch[channel].regs->curr_y_count = 0; | 229 | dma_ch[channel].regs->curr_y_count = 0; |
@@ -258,10 +243,6 @@ EXPORT_SYMBOL(enable_dma); | |||
258 | void set_dma_start_addr(unsigned int channel, unsigned long addr) | 243 | void set_dma_start_addr(unsigned int channel, unsigned long addr) |
259 | { | 244 | { |
260 | pr_debug("set_dma_start_addr() : BEGIN \n"); | 245 | pr_debug("set_dma_start_addr() : BEGIN \n"); |
261 | |||
262 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
263 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
264 | |||
265 | dma_ch[channel].regs->start_addr = addr; | 246 | dma_ch[channel].regs->start_addr = addr; |
266 | pr_debug("set_dma_start_addr() : END\n"); | 247 | pr_debug("set_dma_start_addr() : END\n"); |
267 | } | 248 | } |
@@ -270,10 +251,6 @@ EXPORT_SYMBOL(set_dma_start_addr); | |||
270 | void set_dma_next_desc_addr(unsigned int channel, unsigned long addr) | 251 | void set_dma_next_desc_addr(unsigned int channel, unsigned long addr) |
271 | { | 252 | { |
272 | pr_debug("set_dma_next_desc_addr() : BEGIN \n"); | 253 | pr_debug("set_dma_next_desc_addr() : BEGIN \n"); |
273 | |||
274 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
275 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
276 | |||
277 | dma_ch[channel].regs->next_desc_ptr = addr; | 254 | dma_ch[channel].regs->next_desc_ptr = addr; |
278 | pr_debug("set_dma_next_desc_addr() : END\n"); | 255 | pr_debug("set_dma_next_desc_addr() : END\n"); |
279 | } | 256 | } |
@@ -282,10 +259,6 @@ EXPORT_SYMBOL(set_dma_next_desc_addr); | |||
282 | void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr) | 259 | void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr) |
283 | { | 260 | { |
284 | pr_debug("set_dma_curr_desc_addr() : BEGIN \n"); | 261 | pr_debug("set_dma_curr_desc_addr() : BEGIN \n"); |
285 | |||
286 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
287 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
288 | |||
289 | dma_ch[channel].regs->curr_desc_ptr = addr; | 262 | dma_ch[channel].regs->curr_desc_ptr = addr; |
290 | pr_debug("set_dma_curr_desc_addr() : END\n"); | 263 | pr_debug("set_dma_curr_desc_addr() : END\n"); |
291 | } | 264 | } |
@@ -293,47 +266,31 @@ EXPORT_SYMBOL(set_dma_curr_desc_addr); | |||
293 | 266 | ||
294 | void set_dma_x_count(unsigned int channel, unsigned short x_count) | 267 | void set_dma_x_count(unsigned int channel, unsigned short x_count) |
295 | { | 268 | { |
296 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
297 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
298 | |||
299 | dma_ch[channel].regs->x_count = x_count; | 269 | dma_ch[channel].regs->x_count = x_count; |
300 | } | 270 | } |
301 | EXPORT_SYMBOL(set_dma_x_count); | 271 | EXPORT_SYMBOL(set_dma_x_count); |
302 | 272 | ||
303 | void set_dma_y_count(unsigned int channel, unsigned short y_count) | 273 | void set_dma_y_count(unsigned int channel, unsigned short y_count) |
304 | { | 274 | { |
305 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
306 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
307 | |||
308 | dma_ch[channel].regs->y_count = y_count; | 275 | dma_ch[channel].regs->y_count = y_count; |
309 | } | 276 | } |
310 | EXPORT_SYMBOL(set_dma_y_count); | 277 | EXPORT_SYMBOL(set_dma_y_count); |
311 | 278 | ||
312 | void set_dma_x_modify(unsigned int channel, short x_modify) | 279 | void set_dma_x_modify(unsigned int channel, short x_modify) |
313 | { | 280 | { |
314 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
315 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
316 | |||
317 | dma_ch[channel].regs->x_modify = x_modify; | 281 | dma_ch[channel].regs->x_modify = x_modify; |
318 | } | 282 | } |
319 | EXPORT_SYMBOL(set_dma_x_modify); | 283 | EXPORT_SYMBOL(set_dma_x_modify); |
320 | 284 | ||
321 | void set_dma_y_modify(unsigned int channel, short y_modify) | 285 | void set_dma_y_modify(unsigned int channel, short y_modify) |
322 | { | 286 | { |
323 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
324 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
325 | |||
326 | dma_ch[channel].regs->y_modify = y_modify; | 287 | dma_ch[channel].regs->y_modify = y_modify; |
327 | } | 288 | } |
328 | EXPORT_SYMBOL(set_dma_y_modify); | 289 | EXPORT_SYMBOL(set_dma_y_modify); |
329 | 290 | ||
330 | void set_dma_config(unsigned int channel, unsigned short config) | 291 | void set_dma_config(unsigned int channel, unsigned short config) |
331 | { | 292 | { |
332 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
333 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
334 | |||
335 | dma_ch[channel].regs->cfg = config; | 293 | dma_ch[channel].regs->cfg = config; |
336 | |||
337 | } | 294 | } |
338 | EXPORT_SYMBOL(set_dma_config); | 295 | EXPORT_SYMBOL(set_dma_config); |
339 | 296 | ||
@@ -352,20 +309,13 @@ EXPORT_SYMBOL(set_bfin_dma_config); | |||
352 | 309 | ||
353 | void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg) | 310 | void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg) |
354 | { | 311 | { |
355 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
356 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
357 | |||
358 | dma_ch[channel].regs->cfg |= ((nr_sg & 0x0F) << 8); | 312 | dma_ch[channel].regs->cfg |= ((nr_sg & 0x0F) << 8); |
359 | |||
360 | dma_ch[channel].regs->next_desc_ptr = (unsigned int)sg; | 313 | dma_ch[channel].regs->next_desc_ptr = (unsigned int)sg; |
361 | } | 314 | } |
362 | EXPORT_SYMBOL(set_dma_sg); | 315 | EXPORT_SYMBOL(set_dma_sg); |
363 | 316 | ||
364 | void set_dma_curr_addr(unsigned int channel, unsigned long addr) | 317 | void set_dma_curr_addr(unsigned int channel, unsigned long addr) |
365 | { | 318 | { |
366 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
367 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
368 | |||
369 | dma_ch[channel].regs->curr_addr_ptr = addr; | 319 | dma_ch[channel].regs->curr_addr_ptr = addr; |
370 | } | 320 | } |
371 | EXPORT_SYMBOL(set_dma_curr_addr); | 321 | EXPORT_SYMBOL(set_dma_curr_addr); |
@@ -375,9 +325,6 @@ EXPORT_SYMBOL(set_dma_curr_addr); | |||
375 | *-----------------------------------------------------------------------------*/ | 325 | *-----------------------------------------------------------------------------*/ |
376 | unsigned short get_dma_curr_irqstat(unsigned int channel) | 326 | unsigned short get_dma_curr_irqstat(unsigned int channel) |
377 | { | 327 | { |
378 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
379 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
380 | |||
381 | return dma_ch[channel].regs->irq_status; | 328 | return dma_ch[channel].regs->irq_status; |
382 | } | 329 | } |
383 | EXPORT_SYMBOL(get_dma_curr_irqstat); | 330 | EXPORT_SYMBOL(get_dma_curr_irqstat); |
@@ -387,8 +334,6 @@ EXPORT_SYMBOL(get_dma_curr_irqstat); | |||
387 | *-----------------------------------------------------------------------------*/ | 334 | *-----------------------------------------------------------------------------*/ |
388 | void clear_dma_irqstat(unsigned int channel) | 335 | void clear_dma_irqstat(unsigned int channel) |
389 | { | 336 | { |
390 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
391 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
392 | dma_ch[channel].regs->irq_status |= 3; | 337 | dma_ch[channel].regs->irq_status |= 3; |
393 | } | 338 | } |
394 | EXPORT_SYMBOL(clear_dma_irqstat); | 339 | EXPORT_SYMBOL(clear_dma_irqstat); |
@@ -398,9 +343,6 @@ EXPORT_SYMBOL(clear_dma_irqstat); | |||
398 | *-----------------------------------------------------------------------------*/ | 343 | *-----------------------------------------------------------------------------*/ |
399 | unsigned short get_dma_curr_xcount(unsigned int channel) | 344 | unsigned short get_dma_curr_xcount(unsigned int channel) |
400 | { | 345 | { |
401 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
402 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
403 | |||
404 | return dma_ch[channel].regs->curr_x_count; | 346 | return dma_ch[channel].regs->curr_x_count; |
405 | } | 347 | } |
406 | EXPORT_SYMBOL(get_dma_curr_xcount); | 348 | EXPORT_SYMBOL(get_dma_curr_xcount); |
@@ -410,36 +352,24 @@ EXPORT_SYMBOL(get_dma_curr_xcount); | |||
410 | *-----------------------------------------------------------------------------*/ | 352 | *-----------------------------------------------------------------------------*/ |
411 | unsigned short get_dma_curr_ycount(unsigned int channel) | 353 | unsigned short get_dma_curr_ycount(unsigned int channel) |
412 | { | 354 | { |
413 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
414 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
415 | |||
416 | return dma_ch[channel].regs->curr_y_count; | 355 | return dma_ch[channel].regs->curr_y_count; |
417 | } | 356 | } |
418 | EXPORT_SYMBOL(get_dma_curr_ycount); | 357 | EXPORT_SYMBOL(get_dma_curr_ycount); |
419 | 358 | ||
420 | unsigned long get_dma_next_desc_ptr(unsigned int channel) | 359 | unsigned long get_dma_next_desc_ptr(unsigned int channel) |
421 | { | 360 | { |
422 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
423 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
424 | |||
425 | return dma_ch[channel].regs->next_desc_ptr; | 361 | return dma_ch[channel].regs->next_desc_ptr; |
426 | } | 362 | } |
427 | EXPORT_SYMBOL(get_dma_next_desc_ptr); | 363 | EXPORT_SYMBOL(get_dma_next_desc_ptr); |
428 | 364 | ||
429 | unsigned long get_dma_curr_desc_ptr(unsigned int channel) | 365 | unsigned long get_dma_curr_desc_ptr(unsigned int channel) |
430 | { | 366 | { |
431 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
432 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
433 | |||
434 | return dma_ch[channel].regs->curr_desc_ptr; | 367 | return dma_ch[channel].regs->curr_desc_ptr; |
435 | } | 368 | } |
436 | EXPORT_SYMBOL(get_dma_curr_desc_ptr); | 369 | EXPORT_SYMBOL(get_dma_curr_desc_ptr); |
437 | 370 | ||
438 | unsigned long get_dma_curr_addr(unsigned int channel) | 371 | unsigned long get_dma_curr_addr(unsigned int channel) |
439 | { | 372 | { |
440 | BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE | ||
441 | && channel < MAX_BLACKFIN_DMA_CHANNEL)); | ||
442 | |||
443 | return dma_ch[channel].regs->curr_addr_ptr; | 373 | return dma_ch[channel].regs->curr_addr_ptr; |
444 | } | 374 | } |
445 | EXPORT_SYMBOL(get_dma_curr_addr); | 375 | EXPORT_SYMBOL(get_dma_curr_addr); |