diff options
author | Sonic Zhang <sonic.zhang@analog.com> | 2012-05-15 03:54:26 -0400 |
---|---|---|
committer | Bob Liu <lliubbo@gmail.com> | 2012-05-21 02:55:01 -0400 |
commit | 1e92bf6d80b5a0a137455c96bf6cdd9c1a5b531e (patch) | |
tree | 9f41d644a41bc90f559f39c60f3d43795a5588bf /arch/blackfin/include/asm | |
parent | cf93feb3a0dee97c7896016a352a3226139fbcf4 (diff) |
blackfin: twi: Move TWI MMR access macro to twi head file
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Diffstat (limited to 'arch/blackfin/include/asm')
-rw-r--r-- | arch/blackfin/include/asm/bfin_twi.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/bfin_twi.h b/arch/blackfin/include/asm/bfin_twi.h index 74d10237f706..72092108df1c 100644 --- a/arch/blackfin/include/asm/bfin_twi.h +++ b/arch/blackfin/include/asm/bfin_twi.h | |||
@@ -42,6 +42,50 @@ struct bfin_twi_regs { | |||
42 | 42 | ||
43 | #undef __BFP | 43 | #undef __BFP |
44 | 44 | ||
45 | struct bfin_twi_iface { | ||
46 | int irq; | ||
47 | spinlock_t lock; | ||
48 | char read_write; | ||
49 | u8 command; | ||
50 | u8 *transPtr; | ||
51 | int readNum; | ||
52 | int writeNum; | ||
53 | int cur_mode; | ||
54 | int manual_stop; | ||
55 | int result; | ||
56 | struct i2c_adapter adap; | ||
57 | struct completion complete; | ||
58 | struct i2c_msg *pmsg; | ||
59 | int msg_num; | ||
60 | int cur_msg; | ||
61 | u16 saved_clkdiv; | ||
62 | u16 saved_control; | ||
63 | struct bfin_twi_regs *regs_base; | ||
64 | }; | ||
65 | |||
66 | #define DEFINE_TWI_REG(reg_name, reg) \ | ||
67 | static inline u16 read_##reg_name(struct bfin_twi_iface *iface) \ | ||
68 | { return iface->regs_base->reg; } \ | ||
69 | static inline void write_##reg_name(struct bfin_twi_iface *iface, u16 v) \ | ||
70 | { iface->regs_base->reg = v; } | ||
71 | |||
72 | DEFINE_TWI_REG(CLKDIV, clkdiv) | ||
73 | DEFINE_TWI_REG(CONTROL, control) | ||
74 | DEFINE_TWI_REG(SLAVE_CTL, slave_ctl) | ||
75 | DEFINE_TWI_REG(SLAVE_STAT, slave_stat) | ||
76 | DEFINE_TWI_REG(SLAVE_ADDR, slave_addr) | ||
77 | DEFINE_TWI_REG(MASTER_CTL, master_ctl) | ||
78 | DEFINE_TWI_REG(MASTER_STAT, master_stat) | ||
79 | DEFINE_TWI_REG(MASTER_ADDR, master_addr) | ||
80 | DEFINE_TWI_REG(INT_STAT, int_stat) | ||
81 | DEFINE_TWI_REG(INT_MASK, int_mask) | ||
82 | DEFINE_TWI_REG(FIFO_CTL, fifo_ctl) | ||
83 | DEFINE_TWI_REG(FIFO_STAT, fifo_stat) | ||
84 | DEFINE_TWI_REG(XMT_DATA8, xmt_data8) | ||
85 | DEFINE_TWI_REG(XMT_DATA16, xmt_data16) | ||
86 | DEFINE_TWI_REG(RCV_DATA8, rcv_data8) | ||
87 | DEFINE_TWI_REG(RCV_DATA16, rcv_data16) | ||
88 | |||
45 | /* ******************** TWO-WIRE INTERFACE (TWI) MASKS ***********************/ | 89 | /* ******************** TWO-WIRE INTERFACE (TWI) MASKS ***********************/ |
46 | /* TWI_CLKDIV Macros (Use: *pTWI_CLKDIV = CLKLOW(x)|CLKHI(y); ) */ | 90 | /* TWI_CLKDIV Macros (Use: *pTWI_CLKDIV = CLKLOW(x)|CLKHI(y); ) */ |
47 | #define CLKLOW(x) ((x) & 0xFF) /* Periods Clock Is Held Low */ | 91 | #define CLKLOW(x) ((x) & 0xFF) /* Periods Clock Is Held Low */ |