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author | Thomas Gleixner <tglx@linutronix.de> | 2011-02-06 11:29:03 -0500 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-24 15:35:55 -0400 |
commit | f2f9c6508dc15fdcf5902047d47a86f4f6466459 (patch) | |
tree | 9fab0acf6543cc24d4fb693c47cb0f4fa58c03d4 /arch/avr32 | |
parent | 3972f6917d05b4350c9b5ab2aaa623cd52fa4bc9 (diff) |
avr32: At32ap: Convert pop irq_chip to new functions
Also replace the open coded handler call with the proper wrapper.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
LKML-Reference: <20110206163009.190112353@linutronix.de>
Diffstat (limited to 'arch/avr32')
-rw-r--r-- | arch/avr32/mach-at32ap/pio.c | 23 |
1 files changed, 10 insertions, 13 deletions
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c index 09a274c9d0b7..9b121d6b0997 100644 --- a/arch/avr32/mach-at32ap/pio.c +++ b/arch/avr32/mach-at32ap/pio.c | |||
@@ -249,23 +249,23 @@ static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
249 | 249 | ||
250 | /* GPIO IRQ support */ | 250 | /* GPIO IRQ support */ |
251 | 251 | ||
252 | static void gpio_irq_mask(unsigned irq) | 252 | static void gpio_irq_mask(struct irq_data *d) |
253 | { | 253 | { |
254 | unsigned gpio = irq_to_gpio(irq); | 254 | unsigned gpio = irq_to_gpio(d->irq); |
255 | struct pio_device *pio = &pio_dev[gpio >> 5]; | 255 | struct pio_device *pio = &pio_dev[gpio >> 5]; |
256 | 256 | ||
257 | pio_writel(pio, IDR, 1 << (gpio & 0x1f)); | 257 | pio_writel(pio, IDR, 1 << (gpio & 0x1f)); |
258 | } | 258 | } |
259 | 259 | ||
260 | static void gpio_irq_unmask(unsigned irq) | 260 | static void gpio_irq_unmask(struct irq_data *d)) |
261 | { | 261 | { |
262 | unsigned gpio = irq_to_gpio(irq); | 262 | unsigned gpio = irq_to_gpio(d->irq); |
263 | struct pio_device *pio = &pio_dev[gpio >> 5]; | 263 | struct pio_device *pio = &pio_dev[gpio >> 5]; |
264 | 264 | ||
265 | pio_writel(pio, IER, 1 << (gpio & 0x1f)); | 265 | pio_writel(pio, IER, 1 << (gpio & 0x1f)); |
266 | } | 266 | } |
267 | 267 | ||
268 | static int gpio_irq_type(unsigned irq, unsigned type) | 268 | static int gpio_irq_type(struct irq_data *d, unsigned type) |
269 | { | 269 | { |
270 | if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE) | 270 | if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE) |
271 | return -EINVAL; | 271 | return -EINVAL; |
@@ -275,20 +275,19 @@ static int gpio_irq_type(unsigned irq, unsigned type) | |||
275 | 275 | ||
276 | static struct irq_chip gpio_irqchip = { | 276 | static struct irq_chip gpio_irqchip = { |
277 | .name = "gpio", | 277 | .name = "gpio", |
278 | .mask = gpio_irq_mask, | 278 | .irq_mask = gpio_irq_mask, |
279 | .unmask = gpio_irq_unmask, | 279 | .irq_unmask = gpio_irq_unmask, |
280 | .set_type = gpio_irq_type, | 280 | .irq_set_type = gpio_irq_type, |
281 | }; | 281 | }; |
282 | 282 | ||
283 | static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | 283 | static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) |
284 | { | 284 | { |
285 | struct pio_device *pio = get_irq_chip_data(irq); | 285 | struct pio_device *pio = get_irq_desc_chip_data(desc); |
286 | unsigned gpio_irq; | 286 | unsigned gpio_irq; |
287 | 287 | ||
288 | gpio_irq = (unsigned) get_irq_data(irq); | 288 | gpio_irq = (unsigned) get_irq_data(irq); |
289 | for (;;) { | 289 | for (;;) { |
290 | u32 isr; | 290 | u32 isr; |
291 | struct irq_desc *d; | ||
292 | 291 | ||
293 | /* ack pending GPIO interrupts */ | 292 | /* ack pending GPIO interrupts */ |
294 | isr = pio_readl(pio, ISR) & pio_readl(pio, IMR); | 293 | isr = pio_readl(pio, ISR) & pio_readl(pio, IMR); |
@@ -301,9 +300,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
301 | isr &= ~(1 << i); | 300 | isr &= ~(1 << i); |
302 | 301 | ||
303 | i += gpio_irq; | 302 | i += gpio_irq; |
304 | d = &irq_desc[i]; | 303 | generic_handle_irq(i); |
305 | |||
306 | d->handle_irq(i, d); | ||
307 | } while (isr); | 304 | } while (isr); |
308 | } | 305 | } |
309 | } | 306 | } |