dmaengine: dw: define DW_DMA_MAX_NR_MASTERS

Instead of using magic number in the code the patch provides
DW_DMA_MAX_NR_MASTERS constant.

While here, restrict the reading of data width array by amount of the actual
number of AHB masters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index cc92cdb9994c..1d8b147282cf 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -607,7 +607,7 @@ static struct dw_dma_platform_data dw_dmac0_data = {
         .nr_channels    = 3,
         .block_size     = 4095U,
         .nr_masters     = 2,
-        .data_width     = { 2, 2, 0, 0 },
+        .data_width     = { 2, 2 },
 };
 
 static struct resource dw_dmac0_resource[] = {