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authorAlex Raimondi <raimondi@miromico.ch>2008-11-04 17:37:10 -0500
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2009-01-05 06:16:13 -0500
commitadde42b5834ed367ef7455d465bd9610190ad2a0 (patch)
tree77300eed45fbe2f67f458bbd3b1ab022b7f82894 /arch/avr32/boards/favr-32
parent45f926912fb960c7c09c12906143b9dbaddf58cb (diff)
avr32: Allow reserving multiple pins at once
at32_reserve_pin now takes an u32 bitmask rather than a single pin. This allows to reserve multiple pins at once. Remove (undocumented) SDCS (pin PE26) from reservation in board setup code. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32/boards/favr-32')
-rw-r--r--arch/avr32/boards/favr-32/setup.c18
1 files changed, 1 insertions, 17 deletions
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c
index ff8235a30ecd..006a04e8bef2 100644
--- a/arch/avr32/boards/favr-32/setup.c
+++ b/arch/avr32/boards/favr-32/setup.c
@@ -307,23 +307,7 @@ static int __init favr32_init(void)
307 * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific 307 * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
308 * pins so that nobody messes with them. 308 * pins so that nobody messes with them.
309 */ 309 */
310 at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ 310 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
311 at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
312 at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
313 at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
314 at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
315 at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
316 at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
317 at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
318 at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
319 at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
320 at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
321 at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
322 at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
323 at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
324 at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
325 at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
326 at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
327 311
328 at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */ 312 at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */
329 313