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authorLinus Torvalds <torvalds@linux-foundation.org>2014-01-30 21:08:27 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-01-30 21:08:27 -0500
commitf8a504c404c6c4abbed4ae34fe1027ba3c24d035 (patch)
tree2566aeb4295dd9a1b06961c23b8441c344f8378c /arch/arm
parentcdfc83075fb76369a31e6c187d0cebcab9f8b9c8 (diff)
parent929267cb3525daf72f730f4d4c4e1e9e2b135e61 (diff)
Merge tag 'late-dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late changes from Kevin Hilman: "These are changes that arrived a little late but were considered self-contained enough to still go in for v3.14. They are all device tree updtes this time around, and mainly for Broadcom SoCs" * tag 'late-dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: moxart: move fixed rate clock child node to board level dts clk: bcm281xx: define kona clock binding ARM: dts: add usb udc support to bcm281xx ARM: dts: Specify clocks for timer on bcm11351 Documentation: dt: kona-timer: Add clocks property ARM: dts: Specify clocks for SDHCIs on bcm11351 Documentation: dt: kona-sdhci: Add clocks property ARM: dts: Specify clocks for UARTs on bcm11351 ARM: dts: bcm281xx: Add i2c busses ARM: dts: Declare clocks as fixed on bcm11351 ARM: dts: bcm28155-ap: Enable all the i2c busses
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/bcm11351-brt.dts6
-rw-r--r--arch/arm/boot/dts/bcm11351.dtsi170
-rw-r--r--arch/arm/boot/dts/bcm28155-ap.dts28
-rw-r--r--arch/arm/boot/dts/moxart-uc7112lx.dts8
-rw-r--r--arch/arm/boot/dts/moxart.dtsi6
5 files changed, 207 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/bcm11351-brt.dts b/arch/arm/boot/dts/bcm11351-brt.dts
index 23cd16d736bf..396b70459cdc 100644
--- a/arch/arm/boot/dts/bcm11351-brt.dts
+++ b/arch/arm/boot/dts/bcm11351-brt.dts
@@ -44,5 +44,11 @@
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 usbotg: usb@3f120000 {
48 status = "okay";
49 };
47 50
51 usbphy: usb-phy@3f130000 {
52 status = "okay";
53 };
48}; 54};
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
index dd8e878741c0..e491b82f8d67 100644
--- a/arch/arm/boot/dts/bcm11351.dtsi
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -43,7 +43,7 @@
43 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 43 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
44 status = "disabled"; 44 status = "disabled";
45 reg = <0x3e000000 0x1000>; 45 reg = <0x3e000000 0x1000>;
46 clock-frequency = <13000000>; 46 clocks = <&uartb_clk>;
47 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 47 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
48 reg-shift = <2>; 48 reg-shift = <2>;
49 reg-io-width = <4>; 49 reg-io-width = <4>;
@@ -53,7 +53,7 @@
53 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 53 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
54 status = "disabled"; 54 status = "disabled";
55 reg = <0x3e001000 0x1000>; 55 reg = <0x3e001000 0x1000>;
56 clock-frequency = <13000000>; 56 clocks = <&uartb2_clk>;
57 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 57 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
58 reg-shift = <2>; 58 reg-shift = <2>;
59 reg-io-width = <4>; 59 reg-io-width = <4>;
@@ -63,7 +63,7 @@
63 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 63 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
64 status = "disabled"; 64 status = "disabled";
65 reg = <0x3e002000 0x1000>; 65 reg = <0x3e002000 0x1000>;
66 clock-frequency = <13000000>; 66 clocks = <&uartb3_clk>;
67 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 67 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
68 reg-shift = <2>; 68 reg-shift = <2>;
69 reg-io-width = <4>; 69 reg-io-width = <4>;
@@ -73,7 +73,7 @@
73 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 73 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
74 status = "disabled"; 74 status = "disabled";
75 reg = <0x3e003000 0x1000>; 75 reg = <0x3e003000 0x1000>;
76 clock-frequency = <13000000>; 76 clocks = <&uartb4_clk>;
77 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 77 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
78 reg-shift = <2>; 78 reg-shift = <2>;
79 reg-io-width = <4>; 79 reg-io-width = <4>;
@@ -95,7 +95,7 @@
95 compatible = "brcm,kona-timer"; 95 compatible = "brcm,kona-timer";
96 reg = <0x35006000 0x1000>; 96 reg = <0x35006000 0x1000>;
97 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 97 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
98 clock-frequency = <32768>; 98 clocks = <&hub_timer_clk>;
99 }; 99 };
100 100
101 gpio: gpio@35003000 { 101 gpio: gpio@35003000 {
@@ -118,6 +118,7 @@
118 compatible = "brcm,kona-sdhci"; 118 compatible = "brcm,kona-sdhci";
119 reg = <0x3f180000 0x10000>; 119 reg = <0x3f180000 0x10000>;
120 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 120 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
121 clocks = <&sdio1_clk>;
121 status = "disabled"; 122 status = "disabled";
122 }; 123 };
123 124
@@ -125,6 +126,7 @@
125 compatible = "brcm,kona-sdhci"; 126 compatible = "brcm,kona-sdhci";
126 reg = <0x3f190000 0x10000>; 127 reg = <0x3f190000 0x10000>;
127 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 128 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
129 clocks = <&sdio2_clk>;
128 status = "disabled"; 130 status = "disabled";
129 }; 131 };
130 132
@@ -132,6 +134,7 @@
132 compatible = "brcm,kona-sdhci"; 134 compatible = "brcm,kona-sdhci";
133 reg = <0x3f1a0000 0x10000>; 135 reg = <0x3f1a0000 0x10000>;
134 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 136 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
137 clocks = <&sdio3_clk>;
135 status = "disabled"; 138 status = "disabled";
136 }; 139 };
137 140
@@ -139,6 +142,7 @@
139 compatible = "brcm,kona-sdhci"; 142 compatible = "brcm,kona-sdhci";
140 reg = <0x3f1b0000 0x10000>; 143 reg = <0x3f1b0000 0x10000>;
141 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 144 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
145 clocks = <&sdio4_clk>;
142 status = "disabled"; 146 status = "disabled";
143 }; 147 };
144 148
@@ -146,4 +150,160 @@
146 compatible = "brcm,capri-pinctrl"; 150 compatible = "brcm,capri-pinctrl";
147 reg = <0x35004800 0x430>; 151 reg = <0x35004800 0x430>;
148 }; 152 };
153
154 i2c@3e016000 {
155 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
156 reg = <0x3e016000 0x80>;
157 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
158 #address-cells = <1>;
159 #size-cells = <0>;
160 clocks = <&bsc1_clk>;
161 status = "disabled";
162 };
163
164 i2c@3e017000 {
165 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
166 reg = <0x3e017000 0x80>;
167 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
168 #address-cells = <1>;
169 #size-cells = <0>;
170 clocks = <&bsc2_clk>;
171 status = "disabled";
172 };
173
174 i2c@3e018000 {
175 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
176 reg = <0x3e018000 0x80>;
177 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
178 #address-cells = <1>;
179 #size-cells = <0>;
180 clocks = <&bsc3_clk>;
181 status = "disabled";
182 };
183
184 i2c@3500d000 {
185 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
186 reg = <0x3500d000 0x80>;
187 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
188 #address-cells = <1>;
189 #size-cells = <0>;
190 clocks = <&pmu_bsc_clk>;
191 status = "disabled";
192 };
193
194 clocks {
195 bsc1_clk: bsc1 {
196 compatible = "fixed-clock";
197 clock-frequency = <13000000>;
198 #clock-cells = <0>;
199 };
200
201 bsc2_clk: bsc2 {
202 compatible = "fixed-clock";
203 clock-frequency = <13000000>;
204 #clock-cells = <0>;
205 };
206
207 bsc3_clk: bsc3 {
208 compatible = "fixed-clock";
209 clock-frequency = <13000000>;
210 #clock-cells = <0>;
211 };
212
213 pmu_bsc_clk: pmu_bsc {
214 compatible = "fixed-clock";
215 clock-frequency = <13000000>;
216 #clock-cells = <0>;
217 };
218
219 hub_timer_clk: hub_timer {
220 compatible = "fixed-clock";
221 clock-frequency = <32768>;
222 #clock-cells = <0>;
223 };
224
225 pwm_clk: pwm {
226 compatible = "fixed-clock";
227 clock-frequency = <26000000>;
228 #clock-cells = <0>;
229 };
230
231 sdio1_clk: sdio1 {
232 compatible = "fixed-clock";
233 clock-frequency = <48000000>;
234 #clock-cells = <0>;
235 };
236
237 sdio2_clk: sdio2 {
238 compatible = "fixed-clock";
239 clock-frequency = <48000000>;
240 #clock-cells = <0>;
241 };
242
243 sdio3_clk: sdio3 {
244 compatible = "fixed-clock";
245 clock-frequency = <48000000>;
246 #clock-cells = <0>;
247 };
248
249 sdio4_clk: sdio4 {
250 compatible = "fixed-clock";
251 clock-frequency = <48000000>;
252 #clock-cells = <0>;
253 };
254
255 tmon_1m_clk: tmon_1m {
256 compatible = "fixed-clock";
257 clock-frequency = <1000000>;
258 #clock-cells = <0>;
259 };
260
261 uartb_clk: uartb {
262 compatible = "fixed-clock";
263 clock-frequency = <13000000>;
264 #clock-cells = <0>;
265 };
266
267 uartb2_clk: uartb2 {
268 compatible = "fixed-clock";
269 clock-frequency = <13000000>;
270 #clock-cells = <0>;
271 };
272
273 uartb3_clk: uartb3 {
274 compatible = "fixed-clock";
275 clock-frequency = <13000000>;
276 #clock-cells = <0>;
277 };
278
279 uartb4_clk: uartb4 {
280 compatible = "fixed-clock";
281 clock-frequency = <13000000>;
282 #clock-cells = <0>;
283 };
284
285 usb_otg_ahb_clk: usb_otg_ahb {
286 compatible = "fixed-clock";
287 clock-frequency = <52000000>;
288 #clock-cells = <0>;
289 };
290 };
291
292 usbotg: usb@3f120000 {
293 compatible = "snps,dwc2";
294 reg = <0x3f120000 0x10000>;
295 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
296 clocks = <&usb_otg_ahb_clk>;
297 clock-names = "otg";
298 phys = <&usbphy>;
299 phy-names = "usb2-phy";
300 status = "disabled";
301 };
302
303 usbphy: usb-phy@3f130000 {
304 compatible = "brcm,kona-usb2-phy";
305 reg = <0x3f130000 0x28>;
306 #phy-cells = <0>;
307 status = "disabled";
308 };
149}; 309};
diff --git a/arch/arm/boot/dts/bcm28155-ap.dts b/arch/arm/boot/dts/bcm28155-ap.dts
index 08e47c285227..c7fa9fbb999c 100644
--- a/arch/arm/boot/dts/bcm28155-ap.dts
+++ b/arch/arm/boot/dts/bcm28155-ap.dts
@@ -27,6 +27,26 @@
27 status = "okay"; 27 status = "okay";
28 }; 28 };
29 29
30 i2c@3e016000 {
31 status="okay";
32 clock-frequency = <400000>;
33 };
34
35 i2c@3e017000 {
36 status="okay";
37 clock-frequency = <400000>;
38 };
39
40 i2c@3e018000 {
41 status="okay";
42 clock-frequency = <400000>;
43 };
44
45 i2c@3500d000 {
46 status="okay";
47 clock-frequency = <400000>;
48 };
49
30 sdio1: sdio@3f180000 { 50 sdio1: sdio@3f180000 {
31 max-frequency = <48000000>; 51 max-frequency = <48000000>;
32 status = "okay"; 52 status = "okay";
@@ -43,4 +63,12 @@
43 cd-gpios = <&gpio 14 0>; 63 cd-gpios = <&gpio 14 0>;
44 status = "okay"; 64 status = "okay";
45 }; 65 };
66
67 usbotg: usb@3f120000 {
68 status = "okay";
69 };
70
71 usbphy: usb-phy@3f130000 {
72 status = "okay";
73 };
46}; 74};
diff --git a/arch/arm/boot/dts/moxart-uc7112lx.dts b/arch/arm/boot/dts/moxart-uc7112lx.dts
index 90749d55de0d..10d088df0c35 100644
--- a/arch/arm/boot/dts/moxart-uc7112lx.dts
+++ b/arch/arm/boot/dts/moxart-uc7112lx.dts
@@ -17,6 +17,14 @@
17 reg = <0x0 0x2000000>; 17 reg = <0x0 0x2000000>;
18 }; 18 };
19 19
20 clocks {
21 ref12: ref12M {
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <12000000>;
25 };
26 };
27
20 flash@80000000,0 { 28 flash@80000000,0 {
21 compatible = "numonyx,js28f128", "cfi-flash"; 29 compatible = "numonyx,js28f128", "cfi-flash";
22 reg = <0x80000000 0x1000000>; 30 reg = <0x80000000 0x1000000>;
diff --git a/arch/arm/boot/dts/moxart.dtsi b/arch/arm/boot/dts/moxart.dtsi
index da1d8effef97..1fd27ed65a01 100644
--- a/arch/arm/boot/dts/moxart.dtsi
+++ b/arch/arm/boot/dts/moxart.dtsi
@@ -26,12 +26,6 @@
26 clocks { 26 clocks {
27 #address-cells = <1>; 27 #address-cells = <1>;
28 #size-cells = <0>; 28 #size-cells = <0>;
29
30 ref12: ref12M {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
33 clock-frequency = <12000000>;
34 };
35 }; 29 };
36 30
37 soc { 31 soc {