diff options
author | Kevin Hilman <khilman@linaro.org> | 2013-10-11 18:01:14 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@linaro.org> | 2013-10-11 18:01:36 -0400 |
commit | f797bd4a02056dceb3c0fc9813d991eb4ee62a19 (patch) | |
tree | cd6b17d308f2711fd2493f877905054a54fb4285 /arch/arm | |
parent | 695e6044775daac00bac95901b597540fbf3108e (diff) | |
parent | 4385a83d19be799c21af43fbb1ac90364d7a2384 (diff) |
Merge tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc
From Santosh Shilimkar:
SOC updates for Keystone II devices:
- Clock tree support
- Clock management support using PM core
- Keystone config update for EMDA with ack from Vinod
- Enable SPI and I2C drivers
* tag 'keystone-soc-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: (510 commits)
ARM: keystone: Enable I2C and SPI bus support
ARM: keystone: Select TI_EDMA to be able to enable SPI driver
dma: Allow TI_EDMA selectable for ARCH_KEYSTONE
ARM: dts: keystone: Add the SPI nodes
ARM: dts: keystone: Add i2c device nodes
ARM: keystone: add PM domain support for clock management
ARM: keystone: Enable clock drivers
ARM: dts: keystone: Add clock phandle to UART nodes
ARM: dts: keystone: Add clock tree data to devicetree
+Linux 3.12-rc4
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm')
32 files changed, 1137 insertions, 55 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 76b025e3a74a..5ef81367a8e8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -2217,8 +2217,7 @@ config NEON | |||
2217 | 2217 | ||
2218 | config KERNEL_MODE_NEON | 2218 | config KERNEL_MODE_NEON |
2219 | bool "Support for NEON in kernel mode" | 2219 | bool "Support for NEON in kernel mode" |
2220 | default n | 2220 | depends on NEON && AEABI |
2221 | depends on NEON | ||
2222 | help | 2221 | help |
2223 | Say Y to include support for NEON in kernel mode. | 2222 | Say Y to include support for NEON in kernel mode. |
2224 | 2223 | ||
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e95af3f5433b..802720e3e8fd 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -41,6 +41,8 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb | |||
41 | dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb | 41 | dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb |
42 | dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb | 42 | dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb |
43 | 43 | ||
44 | dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb | ||
45 | |||
44 | dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb | 46 | dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb |
45 | dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \ | 47 | dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \ |
46 | bcm28155-ap.dtb | 48 | bcm28155-ap.dtb |
diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts index 05e4485a8225..8ac2ac1f69cc 100644 --- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts +++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts | |||
@@ -27,6 +27,25 @@ | |||
27 | }; | 27 | }; |
28 | 28 | ||
29 | soc { | 29 | soc { |
30 | ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 | ||
31 | MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; | ||
32 | |||
33 | pcie-controller { | ||
34 | status = "okay"; | ||
35 | |||
36 | /* Connected to Marvell SATA controller */ | ||
37 | pcie@1,0 { | ||
38 | /* Port 0, Lane 0 */ | ||
39 | status = "okay"; | ||
40 | }; | ||
41 | |||
42 | /* Connected to FL1009 USB 3.0 controller */ | ||
43 | pcie@2,0 { | ||
44 | /* Port 1, Lane 0 */ | ||
45 | status = "okay"; | ||
46 | }; | ||
47 | }; | ||
48 | |||
30 | internal-regs { | 49 | internal-regs { |
31 | serial@12000 { | 50 | serial@12000 { |
32 | clock-frequency = <200000000>; | 51 | clock-frequency = <200000000>; |
@@ -57,6 +76,11 @@ | |||
57 | marvell,pins = "mpp56"; | 76 | marvell,pins = "mpp56"; |
58 | marvell,function = "gpio"; | 77 | marvell,function = "gpio"; |
59 | }; | 78 | }; |
79 | |||
80 | poweroff: poweroff { | ||
81 | marvell,pins = "mpp8"; | ||
82 | marvell,function = "gpio"; | ||
83 | }; | ||
60 | }; | 84 | }; |
61 | 85 | ||
62 | mdio { | 86 | mdio { |
@@ -89,22 +113,6 @@ | |||
89 | pwm_polarity = <0>; | 113 | pwm_polarity = <0>; |
90 | }; | 114 | }; |
91 | }; | 115 | }; |
92 | |||
93 | pcie-controller { | ||
94 | status = "okay"; | ||
95 | |||
96 | /* Connected to Marvell SATA controller */ | ||
97 | pcie@1,0 { | ||
98 | /* Port 0, Lane 0 */ | ||
99 | status = "okay"; | ||
100 | }; | ||
101 | |||
102 | /* Connected to FL1009 USB 3.0 controller */ | ||
103 | pcie@2,0 { | ||
104 | /* Port 1, Lane 0 */ | ||
105 | status = "okay"; | ||
106 | }; | ||
107 | }; | ||
108 | }; | 116 | }; |
109 | }; | 117 | }; |
110 | 118 | ||
@@ -160,7 +168,7 @@ | |||
160 | button@1 { | 168 | button@1 { |
161 | label = "Power Button"; | 169 | label = "Power Button"; |
162 | linux,code = <116>; /* KEY_POWER */ | 170 | linux,code = <116>; /* KEY_POWER */ |
163 | gpios = <&gpio1 30 1>; | 171 | gpios = <&gpio1 30 0>; |
164 | }; | 172 | }; |
165 | 173 | ||
166 | button@2 { | 174 | button@2 { |
@@ -176,4 +184,11 @@ | |||
176 | }; | 184 | }; |
177 | }; | 185 | }; |
178 | 186 | ||
187 | gpio_poweroff { | ||
188 | compatible = "gpio-poweroff"; | ||
189 | pinctrl-0 = <&poweroff>; | ||
190 | pinctrl-names = "default"; | ||
191 | gpios = <&gpio0 8 1>; | ||
192 | }; | ||
193 | |||
179 | }; | 194 | }; |
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index def125c0eeaa..3058522f5aad 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi | |||
@@ -70,6 +70,8 @@ | |||
70 | 70 | ||
71 | timer@20300 { | 71 | timer@20300 { |
72 | compatible = "marvell,armada-xp-timer"; | 72 | compatible = "marvell,armada-xp-timer"; |
73 | clocks = <&coreclk 2>, <&refclk>; | ||
74 | clock-names = "nbclk", "fixed"; | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | coreclk: mvebu-sar@18230 { | 77 | coreclk: mvebu-sar@18230 { |
@@ -169,4 +171,13 @@ | |||
169 | }; | 171 | }; |
170 | }; | 172 | }; |
171 | }; | 173 | }; |
174 | |||
175 | clocks { | ||
176 | /* 25 MHz reference crystal */ | ||
177 | refclk: oscillator { | ||
178 | compatible = "fixed-clock"; | ||
179 | #clock-cells = <0>; | ||
180 | clock-frequency = <25000000>; | ||
181 | }; | ||
182 | }; | ||
172 | }; | 183 | }; |
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index cf78ac0b04b1..e74dc15efa9d 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
@@ -190,12 +190,12 @@ | |||
190 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ | 190 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */ |
191 | }; | 191 | }; |
192 | 192 | ||
193 | pinctrl_uart2_rts: uart2_rts-0 { | 193 | pinctrl_usart2_rts: usart2_rts-0 { |
194 | atmel,pins = | 194 | atmel,pins = |
195 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ | 195 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ |
196 | }; | 196 | }; |
197 | 197 | ||
198 | pinctrl_uart2_cts: uart2_cts-0 { | 198 | pinctrl_usart2_cts: usart2_cts-0 { |
199 | atmel,pins = | 199 | atmel,pins = |
200 | <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ | 200 | <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ |
201 | }; | 201 | }; |
@@ -556,6 +556,7 @@ | |||
556 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; | 556 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; |
557 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>; | 557 | dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>; |
558 | dma-names = "rxtx"; | 558 | dma-names = "rxtx"; |
559 | pinctrl-names = "default"; | ||
559 | #address-cells = <1>; | 560 | #address-cells = <1>; |
560 | #size-cells = <0>; | 561 | #size-cells = <0>; |
561 | status = "disabled"; | 562 | status = "disabled"; |
@@ -567,6 +568,7 @@ | |||
567 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; | 568 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; |
568 | dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>; | 569 | dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>; |
569 | dma-names = "rxtx"; | 570 | dma-names = "rxtx"; |
571 | pinctrl-names = "default"; | ||
570 | #address-cells = <1>; | 572 | #address-cells = <1>; |
571 | #size-cells = <0>; | 573 | #size-cells = <0>; |
572 | status = "disabled"; | 574 | status = "disabled"; |
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi index 8678e0c11119..6db4f81d4795 100644 --- a/arch/arm/boot/dts/atlas6.dtsi +++ b/arch/arm/boot/dts/atlas6.dtsi | |||
@@ -181,6 +181,8 @@ | |||
181 | interrupts = <17>; | 181 | interrupts = <17>; |
182 | fifosize = <128>; | 182 | fifosize = <128>; |
183 | clocks = <&clks 13>; | 183 | clocks = <&clks 13>; |
184 | sirf,uart-dma-rx-channel = <21>; | ||
185 | sirf,uart-dma-tx-channel = <2>; | ||
184 | }; | 186 | }; |
185 | 187 | ||
186 | uart1: uart@b0060000 { | 188 | uart1: uart@b0060000 { |
@@ -199,6 +201,8 @@ | |||
199 | interrupts = <19>; | 201 | interrupts = <19>; |
200 | fifosize = <128>; | 202 | fifosize = <128>; |
201 | clocks = <&clks 15>; | 203 | clocks = <&clks 15>; |
204 | sirf,uart-dma-rx-channel = <6>; | ||
205 | sirf,uart-dma-tx-channel = <7>; | ||
202 | }; | 206 | }; |
203 | 207 | ||
204 | usp0: usp@b0080000 { | 208 | usp0: usp@b0080000 { |
@@ -206,7 +210,10 @@ | |||
206 | compatible = "sirf,prima2-usp"; | 210 | compatible = "sirf,prima2-usp"; |
207 | reg = <0xb0080000 0x10000>; | 211 | reg = <0xb0080000 0x10000>; |
208 | interrupts = <20>; | 212 | interrupts = <20>; |
213 | fifosize = <128>; | ||
209 | clocks = <&clks 28>; | 214 | clocks = <&clks 28>; |
215 | sirf,usp-dma-rx-channel = <17>; | ||
216 | sirf,usp-dma-tx-channel = <18>; | ||
210 | }; | 217 | }; |
211 | 218 | ||
212 | usp1: usp@b0090000 { | 219 | usp1: usp@b0090000 { |
@@ -214,7 +221,10 @@ | |||
214 | compatible = "sirf,prima2-usp"; | 221 | compatible = "sirf,prima2-usp"; |
215 | reg = <0xb0090000 0x10000>; | 222 | reg = <0xb0090000 0x10000>; |
216 | interrupts = <21>; | 223 | interrupts = <21>; |
224 | fifosize = <128>; | ||
217 | clocks = <&clks 29>; | 225 | clocks = <&clks 29>; |
226 | sirf,usp-dma-rx-channel = <14>; | ||
227 | sirf,usp-dma-tx-channel = <15>; | ||
218 | }; | 228 | }; |
219 | 229 | ||
220 | dmac0: dma-controller@b00b0000 { | 230 | dmac0: dma-controller@b00b0000 { |
@@ -237,6 +247,8 @@ | |||
237 | compatible = "sirf,prima2-vip"; | 247 | compatible = "sirf,prima2-vip"; |
238 | reg = <0xb00C0000 0x10000>; | 248 | reg = <0xb00C0000 0x10000>; |
239 | clocks = <&clks 31>; | 249 | clocks = <&clks 31>; |
250 | interrupts = <14>; | ||
251 | sirf,vip-dma-rx-channel = <16>; | ||
240 | }; | 252 | }; |
241 | 253 | ||
242 | spi0: spi@b00d0000 { | 254 | spi0: spi@b00d0000 { |
diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi new file mode 100644 index 000000000000..d6713b113258 --- /dev/null +++ b/arch/arm/boot/dts/keystone-clocks.dtsi | |||
@@ -0,0 +1,821 @@ | |||
1 | /* | ||
2 | * Device Tree Source for Keystone 2 clock tree | ||
3 | * | ||
4 | * Copyright (C) 2013 Texas Instruments, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | clocks { | ||
12 | #address-cells = <1>; | ||
13 | #size-cells = <1>; | ||
14 | ranges; | ||
15 | |||
16 | refclkmain: refclkmain { | ||
17 | #clock-cells = <0>; | ||
18 | compatible = "fixed-clock"; | ||
19 | clock-frequency = <122880000>; | ||
20 | clock-output-names = "refclk-main"; | ||
21 | }; | ||
22 | |||
23 | mainpllclk: mainpllclk@2310110 { | ||
24 | #clock-cells = <0>; | ||
25 | compatible = "ti,keystone,main-pll-clock"; | ||
26 | clocks = <&refclkmain>; | ||
27 | reg = <0x02620350 4>, <0x02310110 4>; | ||
28 | reg-names = "control", "multiplier"; | ||
29 | fixed-postdiv = <2>; | ||
30 | }; | ||
31 | |||
32 | papllclk: papllclk@2620358 { | ||
33 | #clock-cells = <0>; | ||
34 | compatible = "ti,keystone,pll-clock"; | ||
35 | clocks = <&refclkmain>; | ||
36 | clock-output-names = "pa-pll-clk"; | ||
37 | reg = <0x02620358 4>; | ||
38 | reg-names = "control"; | ||
39 | fixed-postdiv = <6>; | ||
40 | }; | ||
41 | |||
42 | ddr3allclk: ddr3apllclk@2620360 { | ||
43 | #clock-cells = <0>; | ||
44 | compatible = "ti,keystone,pll-clock"; | ||
45 | clocks = <&refclkmain>; | ||
46 | clock-output-names = "ddr-3a-pll-clk"; | ||
47 | reg = <0x02620360 4>; | ||
48 | reg-names = "control"; | ||
49 | fixed-postdiv = <6>; | ||
50 | }; | ||
51 | |||
52 | ddr3bllclk: ddr3bpllclk@2620368 { | ||
53 | #clock-cells = <0>; | ||
54 | compatible = "ti,keystone,pll-clock"; | ||
55 | clocks = <&refclkmain>; | ||
56 | clock-output-names = "ddr-3b-pll-clk"; | ||
57 | reg = <0x02620368 4>; | ||
58 | reg-names = "control"; | ||
59 | fixed-postdiv = <6>; | ||
60 | }; | ||
61 | |||
62 | armpllclk: armpllclk@2620370 { | ||
63 | #clock-cells = <0>; | ||
64 | compatible = "ti,keystone,pll-clock"; | ||
65 | clocks = <&refclkmain>; | ||
66 | clock-output-names = "arm-pll-clk"; | ||
67 | reg = <0x02620370 4>; | ||
68 | reg-names = "control"; | ||
69 | fixed-postdiv = <6>; | ||
70 | }; | ||
71 | |||
72 | mainmuxclk: mainmuxclk@2310108 { | ||
73 | #clock-cells = <0>; | ||
74 | compatible = "ti,keystone,pll-mux-clock"; | ||
75 | clocks = <&mainpllclk>, <&refclkmain>; | ||
76 | reg = <0x02310108 4>; | ||
77 | bit-shift = <23>; | ||
78 | bit-mask = <1>; | ||
79 | clock-output-names = "mainmuxclk"; | ||
80 | }; | ||
81 | |||
82 | chipclk1: chipclk1 { | ||
83 | #clock-cells = <0>; | ||
84 | compatible = "fixed-factor-clock"; | ||
85 | clocks = <&mainmuxclk>; | ||
86 | clock-div = <1>; | ||
87 | clock-mult = <1>; | ||
88 | clock-output-names = "chipclk1"; | ||
89 | }; | ||
90 | |||
91 | chipclk1rstiso: chipclk1rstiso { | ||
92 | #clock-cells = <0>; | ||
93 | compatible = "fixed-factor-clock"; | ||
94 | clocks = <&mainmuxclk>; | ||
95 | clock-div = <1>; | ||
96 | clock-mult = <1>; | ||
97 | clock-output-names = "chipclk1rstiso"; | ||
98 | }; | ||
99 | |||
100 | gemtraceclk: gemtraceclk@2310120 { | ||
101 | #clock-cells = <0>; | ||
102 | compatible = "ti,keystone,pll-divider-clock"; | ||
103 | clocks = <&mainmuxclk>; | ||
104 | reg = <0x02310120 4>; | ||
105 | bit-shift = <0>; | ||
106 | bit-mask = <8>; | ||
107 | clock-output-names = "gemtraceclk"; | ||
108 | }; | ||
109 | |||
110 | chipstmxptclk: chipstmxptclk { | ||
111 | #clock-cells = <0>; | ||
112 | compatible = "ti,keystone,pll-divider-clock"; | ||
113 | clocks = <&mainmuxclk>; | ||
114 | reg = <0x02310164 4>; | ||
115 | bit-shift = <0>; | ||
116 | bit-mask = <8>; | ||
117 | clock-output-names = "chipstmxptclk"; | ||
118 | }; | ||
119 | |||
120 | chipclk12: chipclk12 { | ||
121 | #clock-cells = <0>; | ||
122 | compatible = "fixed-factor-clock"; | ||
123 | clocks = <&chipclk1>; | ||
124 | clock-div = <2>; | ||
125 | clock-mult = <1>; | ||
126 | clock-output-names = "chipclk12"; | ||
127 | }; | ||
128 | |||
129 | chipclk13: chipclk13 { | ||
130 | #clock-cells = <0>; | ||
131 | compatible = "fixed-factor-clock"; | ||
132 | clocks = <&chipclk1>; | ||
133 | clock-div = <3>; | ||
134 | clock-mult = <1>; | ||
135 | clock-output-names = "chipclk13"; | ||
136 | }; | ||
137 | |||
138 | chipclk14: chipclk14 { | ||
139 | #clock-cells = <0>; | ||
140 | compatible = "fixed-factor-clock"; | ||
141 | clocks = <&chipclk1>; | ||
142 | clock-div = <4>; | ||
143 | clock-mult = <1>; | ||
144 | clock-output-names = "chipclk14"; | ||
145 | }; | ||
146 | |||
147 | chipclk16: chipclk16 { | ||
148 | #clock-cells = <0>; | ||
149 | compatible = "fixed-factor-clock"; | ||
150 | clocks = <&chipclk1>; | ||
151 | clock-div = <6>; | ||
152 | clock-mult = <1>; | ||
153 | clock-output-names = "chipclk16"; | ||
154 | }; | ||
155 | |||
156 | chipclk112: chipclk112 { | ||
157 | #clock-cells = <0>; | ||
158 | compatible = "fixed-factor-clock"; | ||
159 | clocks = <&chipclk1>; | ||
160 | clock-div = <12>; | ||
161 | clock-mult = <1>; | ||
162 | clock-output-names = "chipclk112"; | ||
163 | }; | ||
164 | |||
165 | chipclk124: chipclk124 { | ||
166 | #clock-cells = <0>; | ||
167 | compatible = "fixed-factor-clock"; | ||
168 | clocks = <&chipclk1>; | ||
169 | clock-div = <24>; | ||
170 | clock-mult = <1>; | ||
171 | clock-output-names = "chipclk114"; | ||
172 | }; | ||
173 | |||
174 | chipclk1rstiso13: chipclk1rstiso13 { | ||
175 | #clock-cells = <0>; | ||
176 | compatible = "fixed-factor-clock"; | ||
177 | clocks = <&chipclk1rstiso>; | ||
178 | clock-div = <3>; | ||
179 | clock-mult = <1>; | ||
180 | clock-output-names = "chipclk1rstiso13"; | ||
181 | }; | ||
182 | |||
183 | chipclk1rstiso14: chipclk1rstiso14 { | ||
184 | #clock-cells = <0>; | ||
185 | compatible = "fixed-factor-clock"; | ||
186 | clocks = <&chipclk1rstiso>; | ||
187 | clock-div = <4>; | ||
188 | clock-mult = <1>; | ||
189 | clock-output-names = "chipclk1rstiso14"; | ||
190 | }; | ||
191 | |||
192 | chipclk1rstiso16: chipclk1rstiso16 { | ||
193 | #clock-cells = <0>; | ||
194 | compatible = "fixed-factor-clock"; | ||
195 | clocks = <&chipclk1rstiso>; | ||
196 | clock-div = <6>; | ||
197 | clock-mult = <1>; | ||
198 | clock-output-names = "chipclk1rstiso16"; | ||
199 | }; | ||
200 | |||
201 | chipclk1rstiso112: chipclk1rstiso112 { | ||
202 | #clock-cells = <0>; | ||
203 | compatible = "fixed-factor-clock"; | ||
204 | clocks = <&chipclk1rstiso>; | ||
205 | clock-div = <12>; | ||
206 | clock-mult = <1>; | ||
207 | clock-output-names = "chipclk1rstiso112"; | ||
208 | }; | ||
209 | |||
210 | clkmodrst0: clkmodrst0 { | ||
211 | #clock-cells = <0>; | ||
212 | compatible = "ti,keystone,psc-clock"; | ||
213 | clocks = <&chipclk16>; | ||
214 | clock-output-names = "modrst0"; | ||
215 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
216 | reg-names = "control", "domain"; | ||
217 | domain-id = <0>; | ||
218 | }; | ||
219 | |||
220 | |||
221 | clkusb: clkusb { | ||
222 | #clock-cells = <0>; | ||
223 | compatible = "ti,keystone,psc-clock"; | ||
224 | clocks = <&chipclk16>; | ||
225 | clock-output-names = "usb"; | ||
226 | reg = <0x02350008 0xb00>, <0x02350000 0x400>; | ||
227 | reg-names = "control", "domain"; | ||
228 | domain-id = <0>; | ||
229 | }; | ||
230 | |||
231 | clkaemifspi: clkaemifspi { | ||
232 | #clock-cells = <0>; | ||
233 | compatible = "ti,keystone,psc-clock"; | ||
234 | clocks = <&chipclk16>; | ||
235 | clock-output-names = "aemif-spi"; | ||
236 | reg = <0x0235000c 0xb00>, <0x02350000 0x400>; | ||
237 | reg-names = "control", "domain"; | ||
238 | domain-id = <0>; | ||
239 | }; | ||
240 | |||
241 | |||
242 | clkdebugsstrc: clkdebugsstrc { | ||
243 | #clock-cells = <0>; | ||
244 | compatible = "ti,keystone,psc-clock"; | ||
245 | clocks = <&chipclk13>; | ||
246 | clock-output-names = "debugss-trc"; | ||
247 | reg = <0x02350014 0xb00>, <0x02350000 0x400>; | ||
248 | reg-names = "control", "domain"; | ||
249 | domain-id = <0>; | ||
250 | }; | ||
251 | |||
252 | clktetbtrc: clktetbtrc { | ||
253 | #clock-cells = <0>; | ||
254 | compatible = "ti,keystone,psc-clock"; | ||
255 | clocks = <&chipclk13>; | ||
256 | clock-output-names = "tetb-trc"; | ||
257 | reg = <0x02350018 0xb00>, <0x02350004 0x400>; | ||
258 | reg-names = "control", "domain"; | ||
259 | domain-id = <1>; | ||
260 | }; | ||
261 | |||
262 | clkpa: clkpa { | ||
263 | #clock-cells = <0>; | ||
264 | compatible = "ti,keystone,psc-clock"; | ||
265 | clocks = <&chipclk16>; | ||
266 | clock-output-names = "pa"; | ||
267 | reg = <0x0235001c 0xb00>, <0x02350008 0x400>; | ||
268 | reg-names = "control", "domain"; | ||
269 | domain-id = <2>; | ||
270 | }; | ||
271 | |||
272 | clkcpgmac: clkcpgmac { | ||
273 | #clock-cells = <0>; | ||
274 | compatible = "ti,keystone,psc-clock"; | ||
275 | clocks = <&clkpa>; | ||
276 | clock-output-names = "cpgmac"; | ||
277 | reg = <0x02350020 0xb00>, <0x02350008 0x400>; | ||
278 | reg-names = "control", "domain"; | ||
279 | domain-id = <2>; | ||
280 | }; | ||
281 | |||
282 | clksa: clksa { | ||
283 | #clock-cells = <0>; | ||
284 | compatible = "ti,keystone,psc-clock"; | ||
285 | clocks = <&clkpa>; | ||
286 | clock-output-names = "sa"; | ||
287 | reg = <0x02350024 0xb00>, <0x02350008 0x400>; | ||
288 | reg-names = "control", "domain"; | ||
289 | domain-id = <2>; | ||
290 | }; | ||
291 | |||
292 | clkpcie: clkpcie { | ||
293 | #clock-cells = <0>; | ||
294 | compatible = "ti,keystone,psc-clock"; | ||
295 | clocks = <&chipclk12>; | ||
296 | clock-output-names = "pcie"; | ||
297 | reg = <0x02350028 0xb00>, <0x0235000c 0x400>; | ||
298 | reg-names = "control", "domain"; | ||
299 | domain-id = <3>; | ||
300 | }; | ||
301 | |||
302 | clksrio: clksrio { | ||
303 | #clock-cells = <0>; | ||
304 | compatible = "ti,keystone,psc-clock"; | ||
305 | clocks = <&chipclk1rstiso13>; | ||
306 | clock-output-names = "srio"; | ||
307 | reg = <0x0235002c 0xb00>, <0x02350010 0x400>; | ||
308 | reg-names = "control", "domain"; | ||
309 | domain-id = <4>; | ||
310 | }; | ||
311 | |||
312 | clkhyperlink0: clkhyperlink0 { | ||
313 | #clock-cells = <0>; | ||
314 | compatible = "ti,keystone,psc-clock"; | ||
315 | clocks = <&chipclk12>; | ||
316 | clock-output-names = "hyperlink-0"; | ||
317 | reg = <0x02350030 0xb00>, <0x02350014 0x400>; | ||
318 | reg-names = "control", "domain"; | ||
319 | domain-id = <5>; | ||
320 | }; | ||
321 | |||
322 | clksr: clksr { | ||
323 | #clock-cells = <0>; | ||
324 | compatible = "ti,keystone,psc-clock"; | ||
325 | clocks = <&chipclk1rstiso112>; | ||
326 | clock-output-names = "sr"; | ||
327 | reg = <0x02350034 0xb00>, <0x02350018 0x400>; | ||
328 | reg-names = "control", "domain"; | ||
329 | domain-id = <6>; | ||
330 | }; | ||
331 | |||
332 | clkmsmcsram: clkmsmcsram { | ||
333 | #clock-cells = <0>; | ||
334 | compatible = "ti,keystone,psc-clock"; | ||
335 | clocks = <&chipclk1>; | ||
336 | clock-output-names = "msmcsram"; | ||
337 | reg = <0x02350038 0xb00>, <0x0235001c 0x400>; | ||
338 | reg-names = "control", "domain"; | ||
339 | domain-id = <7>; | ||
340 | }; | ||
341 | |||
342 | clkgem0: clkgem0 { | ||
343 | #clock-cells = <0>; | ||
344 | compatible = "ti,keystone,psc-clock"; | ||
345 | clocks = <&chipclk1>; | ||
346 | clock-output-names = "gem0"; | ||
347 | reg = <0x0235003c 0xb00>, <0x02350020 0x400>; | ||
348 | reg-names = "control", "domain"; | ||
349 | domain-id = <8>; | ||
350 | }; | ||
351 | |||
352 | clkgem1: clkgem1 { | ||
353 | #clock-cells = <0>; | ||
354 | compatible = "ti,keystone,psc-clock"; | ||
355 | clocks = <&chipclk1>; | ||
356 | clock-output-names = "gem1"; | ||
357 | reg = <0x02350040 0xb00>, <0x02350024 0x400>; | ||
358 | reg-names = "control", "domain"; | ||
359 | domain-id = <9>; | ||
360 | }; | ||
361 | |||
362 | clkgem2: clkgem2 { | ||
363 | #clock-cells = <0>; | ||
364 | compatible = "ti,keystone,psc-clock"; | ||
365 | clocks = <&chipclk1>; | ||
366 | clock-output-names = "gem2"; | ||
367 | reg = <0x02350044 0xb00>, <0x02350028 0x400>; | ||
368 | reg-names = "control", "domain"; | ||
369 | domain-id = <10>; | ||
370 | }; | ||
371 | |||
372 | clkgem3: clkgem3 { | ||
373 | #clock-cells = <0>; | ||
374 | compatible = "ti,keystone,psc-clock"; | ||
375 | clocks = <&chipclk1>; | ||
376 | clock-output-names = "gem3"; | ||
377 | reg = <0x02350048 0xb00>, <0x0235002c 0x400>; | ||
378 | reg-names = "control", "domain"; | ||
379 | domain-id = <11>; | ||
380 | }; | ||
381 | |||
382 | clkgem4: clkgem4 { | ||
383 | #clock-cells = <0>; | ||
384 | compatible = "ti,keystone,psc-clock"; | ||
385 | clocks = <&chipclk1>; | ||
386 | clock-output-names = "gem4"; | ||
387 | reg = <0x0235004c 0xb00>, <0x02350030 0x400>; | ||
388 | reg-names = "control", "domain"; | ||
389 | domain-id = <12>; | ||
390 | }; | ||
391 | |||
392 | clkgem5: clkgem5 { | ||
393 | #clock-cells = <0>; | ||
394 | compatible = "ti,keystone,psc-clock"; | ||
395 | clocks = <&chipclk1>; | ||
396 | clock-output-names = "gem5"; | ||
397 | reg = <0x02350050 0xb00>, <0x02350034 0x400>; | ||
398 | reg-names = "control", "domain"; | ||
399 | domain-id = <13>; | ||
400 | }; | ||
401 | |||
402 | clkgem6: clkgem6 { | ||
403 | #clock-cells = <0>; | ||
404 | compatible = "ti,keystone,psc-clock"; | ||
405 | clocks = <&chipclk1>; | ||
406 | clock-output-names = "gem6"; | ||
407 | reg = <0x02350054 0xb00>, <0x02350038 0x400>; | ||
408 | reg-names = "control", "domain"; | ||
409 | domain-id = <14>; | ||
410 | }; | ||
411 | |||
412 | clkgem7: clkgem7 { | ||
413 | #clock-cells = <0>; | ||
414 | compatible = "ti,keystone,psc-clock"; | ||
415 | clocks = <&chipclk1>; | ||
416 | clock-output-names = "gem7"; | ||
417 | reg = <0x02350058 0xb00>, <0x0235003c 0x400>; | ||
418 | reg-names = "control", "domain"; | ||
419 | domain-id = <15>; | ||
420 | }; | ||
421 | |||
422 | clkddr30: clkddr30 { | ||
423 | #clock-cells = <0>; | ||
424 | compatible = "ti,keystone,psc-clock"; | ||
425 | clocks = <&chipclk12>; | ||
426 | clock-output-names = "ddr3-0"; | ||
427 | reg = <0x0235005c 0xb00>, <0x02350040 0x400>; | ||
428 | reg-names = "control", "domain"; | ||
429 | domain-id = <16>; | ||
430 | }; | ||
431 | |||
432 | clkddr31: clkddr31 { | ||
433 | #clock-cells = <0>; | ||
434 | compatible = "ti,keystone,psc-clock"; | ||
435 | clocks = <&chipclk13>; | ||
436 | clock-output-names = "ddr3-1"; | ||
437 | reg = <0x02350060 0xb00>, <0x02350040 0x400>; | ||
438 | reg-names = "control", "domain"; | ||
439 | domain-id = <16>; | ||
440 | }; | ||
441 | |||
442 | clktac: clktac { | ||
443 | #clock-cells = <0>; | ||
444 | compatible = "ti,keystone,psc-clock"; | ||
445 | clocks = <&chipclk13>; | ||
446 | clock-output-names = "tac"; | ||
447 | reg = <0x02350064 0xb00>, <0x02350044 0x400>; | ||
448 | reg-names = "control", "domain"; | ||
449 | domain-id = <17>; | ||
450 | }; | ||
451 | |||
452 | clkrac01: clktac01 { | ||
453 | #clock-cells = <0>; | ||
454 | compatible = "ti,keystone,psc-clock"; | ||
455 | clocks = <&chipclk13>; | ||
456 | clock-output-names = "rac-01"; | ||
457 | reg = <0x02350068 0xb00>, <0x02350044 0x400>; | ||
458 | reg-names = "control", "domain"; | ||
459 | domain-id = <17>; | ||
460 | }; | ||
461 | |||
462 | clkrac23: clktac23 { | ||
463 | #clock-cells = <0>; | ||
464 | compatible = "ti,keystone,psc-clock"; | ||
465 | clocks = <&chipclk13>; | ||
466 | clock-output-names = "rac-23"; | ||
467 | reg = <0x0235006c 0xb00>, <0x02350048 0x400>; | ||
468 | reg-names = "control", "domain"; | ||
469 | domain-id = <18>; | ||
470 | }; | ||
471 | |||
472 | clkfftc0: clkfftc0 { | ||
473 | #clock-cells = <0>; | ||
474 | compatible = "ti,keystone,psc-clock"; | ||
475 | clocks = <&chipclk13>; | ||
476 | clock-output-names = "fftc-0"; | ||
477 | reg = <0x02350070 0xb00>, <0x0235004c 0x400>; | ||
478 | reg-names = "control", "domain"; | ||
479 | domain-id = <19>; | ||
480 | }; | ||
481 | |||
482 | clkfftc1: clkfftc1 { | ||
483 | #clock-cells = <0>; | ||
484 | compatible = "ti,keystone,psc-clock"; | ||
485 | clocks = <&chipclk13>; | ||
486 | clock-output-names = "fftc-1"; | ||
487 | reg = <0x02350074 0xb00>, <0x023504c0 0x400>; | ||
488 | reg-names = "control", "domain"; | ||
489 | domain-id = <19>; | ||
490 | }; | ||
491 | |||
492 | clkfftc2: clkfftc2 { | ||
493 | #clock-cells = <0>; | ||
494 | compatible = "ti,keystone,psc-clock"; | ||
495 | clocks = <&chipclk13>; | ||
496 | clock-output-names = "fftc-2"; | ||
497 | reg = <0x02350078 0xb00>, <0x02350050 0x400>; | ||
498 | reg-names = "control", "domain"; | ||
499 | domain-id = <20>; | ||
500 | }; | ||
501 | |||
502 | clkfftc3: clkfftc3 { | ||
503 | #clock-cells = <0>; | ||
504 | compatible = "ti,keystone,psc-clock"; | ||
505 | clocks = <&chipclk13>; | ||
506 | clock-output-names = "fftc-3"; | ||
507 | reg = <0x0235007c 0xb00>, <0x02350050 0x400>; | ||
508 | reg-names = "control", "domain"; | ||
509 | domain-id = <20>; | ||
510 | }; | ||
511 | |||
512 | clkfftc4: clkfftc4 { | ||
513 | #clock-cells = <0>; | ||
514 | compatible = "ti,keystone,psc-clock"; | ||
515 | clocks = <&chipclk13>; | ||
516 | clock-output-names = "fftc-4"; | ||
517 | reg = <0x02350080 0xb00>, <0x02350050 0x400>; | ||
518 | reg-names = "control", "domain"; | ||
519 | domain-id = <20>; | ||
520 | }; | ||
521 | |||
522 | clkfftc5: clkfftc5 { | ||
523 | #clock-cells = <0>; | ||
524 | compatible = "ti,keystone,psc-clock"; | ||
525 | clocks = <&chipclk13>; | ||
526 | clock-output-names = "fftc-5"; | ||
527 | reg = <0x02350084 0xb00>, <0x02350050 0x400>; | ||
528 | reg-names = "control", "domain"; | ||
529 | domain-id = <20>; | ||
530 | }; | ||
531 | |||
532 | clkaif: clkaif { | ||
533 | #clock-cells = <0>; | ||
534 | compatible = "ti,keystone,psc-clock"; | ||
535 | clocks = <&chipclk13>; | ||
536 | clock-output-names = "aif"; | ||
537 | reg = <0x02350088 0xb00>, <0x02350054 0x400>; | ||
538 | reg-names = "control", "domain"; | ||
539 | domain-id = <21>; | ||
540 | }; | ||
541 | |||
542 | clktcp3d0: clktcp3d0 { | ||
543 | #clock-cells = <0>; | ||
544 | compatible = "ti,keystone,psc-clock"; | ||
545 | clocks = <&chipclk13>; | ||
546 | clock-output-names = "tcp3d-0"; | ||
547 | reg = <0x0235008c 0xb00>, <0x02350058 0x400>; | ||
548 | reg-names = "control", "domain"; | ||
549 | domain-id = <22>; | ||
550 | }; | ||
551 | |||
552 | clktcp3d1: clktcp3d1 { | ||
553 | #clock-cells = <0>; | ||
554 | compatible = "ti,keystone,psc-clock"; | ||
555 | clocks = <&chipclk13>; | ||
556 | clock-output-names = "tcp3d-1"; | ||
557 | reg = <0x02350090 0xb00>, <0x02350058 0x400>; | ||
558 | reg-names = "control", "domain"; | ||
559 | domain-id = <22>; | ||
560 | }; | ||
561 | |||
562 | clktcp3d2: clktcp3d2 { | ||
563 | #clock-cells = <0>; | ||
564 | compatible = "ti,keystone,psc-clock"; | ||
565 | clocks = <&chipclk13>; | ||
566 | clock-output-names = "tcp3d-2"; | ||
567 | reg = <0x02350094 0xb00>, <0x0235005c 0x400>; | ||
568 | reg-names = "control", "domain"; | ||
569 | domain-id = <23>; | ||
570 | }; | ||
571 | |||
572 | clktcp3d3: clktcp3d3 { | ||
573 | #clock-cells = <0>; | ||
574 | compatible = "ti,keystone,psc-clock"; | ||
575 | clocks = <&chipclk13>; | ||
576 | clock-output-names = "tcp3d-3"; | ||
577 | reg = <0x02350098 0xb00>, <0x0235005c 0x400>; | ||
578 | reg-names = "control", "domain"; | ||
579 | domain-id = <23>; | ||
580 | }; | ||
581 | |||
582 | clkvcp0: clkvcp0 { | ||
583 | #clock-cells = <0>; | ||
584 | compatible = "ti,keystone,psc-clock"; | ||
585 | clocks = <&chipclk13>; | ||
586 | clock-output-names = "vcp-0"; | ||
587 | reg = <0x0235009c 0xb00>, <0x02350060 0x400>; | ||
588 | reg-names = "control", "domain"; | ||
589 | domain-id = <24>; | ||
590 | }; | ||
591 | |||
592 | clkvcp1: clkvcp1 { | ||
593 | #clock-cells = <0>; | ||
594 | compatible = "ti,keystone,psc-clock"; | ||
595 | clocks = <&chipclk13>; | ||
596 | clock-output-names = "vcp-1"; | ||
597 | reg = <0x023500a0 0xb00>, <0x02350060 0x400>; | ||
598 | reg-names = "control", "domain"; | ||
599 | domain-id = <24>; | ||
600 | }; | ||
601 | |||
602 | clkvcp2: clkvcp2 { | ||
603 | #clock-cells = <0>; | ||
604 | compatible = "ti,keystone,psc-clock"; | ||
605 | clocks = <&chipclk13>; | ||
606 | clock-output-names = "vcp-2"; | ||
607 | reg = <0x023500a4 0xb00>, <0x02350060 0x400>; | ||
608 | reg-names = "control", "domain"; | ||
609 | domain-id = <24>; | ||
610 | }; | ||
611 | |||
612 | clkvcp3: clkvcp3 { | ||
613 | #clock-cells = <0>; | ||
614 | compatible = "ti,keystone,psc-clock"; | ||
615 | clocks = <&chipclk13>; | ||
616 | clock-output-names = "vcp-3"; | ||
617 | reg = <0x0235000a8 0xb00>, <0x02350060 0x400>; | ||
618 | reg-names = "control", "domain"; | ||
619 | domain-id = <24>; | ||
620 | }; | ||
621 | |||
622 | clkvcp4: clkvcp4 { | ||
623 | #clock-cells = <0>; | ||
624 | compatible = "ti,keystone,psc-clock"; | ||
625 | clocks = <&chipclk13>; | ||
626 | clock-output-names = "vcp-4"; | ||
627 | reg = <0x023500ac 0xb00>, <0x02350064 0x400>; | ||
628 | reg-names = "control", "domain"; | ||
629 | domain-id = <25>; | ||
630 | }; | ||
631 | |||
632 | clkvcp5: clkvcp5 { | ||
633 | #clock-cells = <0>; | ||
634 | compatible = "ti,keystone,psc-clock"; | ||
635 | clocks = <&chipclk13>; | ||
636 | clock-output-names = "vcp-5"; | ||
637 | reg = <0x023500b0 0xb00>, <0x02350064 0x400>; | ||
638 | reg-names = "control", "domain"; | ||
639 | domain-id = <25>; | ||
640 | }; | ||
641 | |||
642 | clkvcp6: clkvcp6 { | ||
643 | #clock-cells = <0>; | ||
644 | compatible = "ti,keystone,psc-clock"; | ||
645 | clocks = <&chipclk13>; | ||
646 | clock-output-names = "vcp-6"; | ||
647 | reg = <0x023500b4 0xb00>, <0x02350064 0x400>; | ||
648 | reg-names = "control", "domain"; | ||
649 | domain-id = <25>; | ||
650 | }; | ||
651 | |||
652 | clkvcp7: clkvcp7 { | ||
653 | #clock-cells = <0>; | ||
654 | compatible = "ti,keystone,psc-clock"; | ||
655 | clocks = <&chipclk13>; | ||
656 | clock-output-names = "vcp-7"; | ||
657 | reg = <0x023500b8 0xb00>, <0x02350064 0x400>; | ||
658 | reg-names = "control", "domain"; | ||
659 | domain-id = <25>; | ||
660 | }; | ||
661 | |||
662 | clkbcp: clkbcp { | ||
663 | #clock-cells = <0>; | ||
664 | compatible = "ti,keystone,psc-clock"; | ||
665 | clocks = <&chipclk13>; | ||
666 | clock-output-names = "bcp"; | ||
667 | reg = <0x023500bc 0xb00>, <0x02350068 0x400>; | ||
668 | reg-names = "control", "domain"; | ||
669 | domain-id = <26>; | ||
670 | }; | ||
671 | |||
672 | clkdxb: clkdxb { | ||
673 | #clock-cells = <0>; | ||
674 | compatible = "ti,keystone,psc-clock"; | ||
675 | clocks = <&chipclk13>; | ||
676 | clock-output-names = "dxb"; | ||
677 | reg = <0x023500c0 0xb00>, <0x0235006c 0x400>; | ||
678 | reg-names = "control", "domain"; | ||
679 | domain-id = <27>; | ||
680 | }; | ||
681 | |||
682 | clkhyperlink1: clkhyperlink1 { | ||
683 | #clock-cells = <0>; | ||
684 | compatible = "ti,keystone,psc-clock"; | ||
685 | clocks = <&chipclk12>; | ||
686 | clock-output-names = "hyperlink-1"; | ||
687 | reg = <0x023500c4 0xb00>, <0x02350070 0x400>; | ||
688 | reg-names = "control", "domain"; | ||
689 | domain-id = <28>; | ||
690 | }; | ||
691 | |||
692 | clkxge: clkxge { | ||
693 | #clock-cells = <0>; | ||
694 | compatible = "ti,keystone,psc-clock"; | ||
695 | clocks = <&chipclk13>; | ||
696 | clock-output-names = "xge"; | ||
697 | reg = <0x023500c8 0xb00>, <0x02350074 0x400>; | ||
698 | reg-names = "control", "domain"; | ||
699 | domain-id = <29>; | ||
700 | }; | ||
701 | |||
702 | clkwdtimer0: clkwdtimer0 { | ||
703 | #clock-cells = <0>; | ||
704 | compatible = "ti,keystone,psc-clock"; | ||
705 | clocks = <&clkmodrst0>; | ||
706 | clock-output-names = "timer0"; | ||
707 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
708 | reg-names = "control", "domain"; | ||
709 | domain-id = <0>; | ||
710 | }; | ||
711 | |||
712 | clkwdtimer1: clkwdtimer1 { | ||
713 | #clock-cells = <0>; | ||
714 | compatible = "ti,keystone,psc-clock"; | ||
715 | clocks = <&clkmodrst0>; | ||
716 | clock-output-names = "timer1"; | ||
717 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
718 | reg-names = "control", "domain"; | ||
719 | domain-id = <0>; | ||
720 | }; | ||
721 | |||
722 | clkwdtimer2: clkwdtimer2 { | ||
723 | #clock-cells = <0>; | ||
724 | compatible = "ti,keystone,psc-clock"; | ||
725 | clocks = <&clkmodrst0>; | ||
726 | clock-output-names = "timer2"; | ||
727 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
728 | reg-names = "control", "domain"; | ||
729 | domain-id = <0>; | ||
730 | }; | ||
731 | |||
732 | clkwdtimer3: clkwdtimer3 { | ||
733 | #clock-cells = <0>; | ||
734 | compatible = "ti,keystone,psc-clock"; | ||
735 | clocks = <&clkmodrst0>; | ||
736 | clock-output-names = "timer3"; | ||
737 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
738 | reg-names = "control", "domain"; | ||
739 | domain-id = <0>; | ||
740 | }; | ||
741 | |||
742 | clkuart0: clkuart0 { | ||
743 | #clock-cells = <0>; | ||
744 | compatible = "ti,keystone,psc-clock"; | ||
745 | clocks = <&clkmodrst0>; | ||
746 | clock-output-names = "uart0"; | ||
747 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
748 | reg-names = "control", "domain"; | ||
749 | domain-id = <0>; | ||
750 | }; | ||
751 | |||
752 | clkuart1: clkuart1 { | ||
753 | #clock-cells = <0>; | ||
754 | compatible = "ti,keystone,psc-clock"; | ||
755 | clocks = <&clkmodrst0>; | ||
756 | clock-output-names = "uart1"; | ||
757 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
758 | reg-names = "control", "domain"; | ||
759 | domain-id = <0>; | ||
760 | }; | ||
761 | |||
762 | clkaemif: clkaemif { | ||
763 | #clock-cells = <0>; | ||
764 | compatible = "ti,keystone,psc-clock"; | ||
765 | clocks = <&clkaemifspi>; | ||
766 | clock-output-names = "aemif"; | ||
767 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
768 | reg-names = "control", "domain"; | ||
769 | domain-id = <0>; | ||
770 | }; | ||
771 | |||
772 | clkusim: clkusim { | ||
773 | #clock-cells = <0>; | ||
774 | compatible = "ti,keystone,psc-clock"; | ||
775 | clocks = <&clkmodrst0>; | ||
776 | clock-output-names = "usim"; | ||
777 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
778 | reg-names = "control", "domain"; | ||
779 | domain-id = <0>; | ||
780 | }; | ||
781 | |||
782 | clki2c: clki2c { | ||
783 | #clock-cells = <0>; | ||
784 | compatible = "ti,keystone,psc-clock"; | ||
785 | clocks = <&clkmodrst0>; | ||
786 | clock-output-names = "i2c"; | ||
787 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
788 | reg-names = "control", "domain"; | ||
789 | domain-id = <0>; | ||
790 | }; | ||
791 | |||
792 | clkspi: clkspi { | ||
793 | #clock-cells = <0>; | ||
794 | compatible = "ti,keystone,psc-clock"; | ||
795 | clocks = <&clkaemifspi>; | ||
796 | clock-output-names = "spi"; | ||
797 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
798 | reg-names = "control", "domain"; | ||
799 | domain-id = <0>; | ||
800 | }; | ||
801 | |||
802 | clkgpio: clkgpio { | ||
803 | #clock-cells = <0>; | ||
804 | compatible = "ti,keystone,psc-clock"; | ||
805 | clocks = <&clkmodrst0>; | ||
806 | clock-output-names = "gpio"; | ||
807 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
808 | reg-names = "control", "domain"; | ||
809 | domain-id = <0>; | ||
810 | }; | ||
811 | |||
812 | clkkeymgr: clkkeymgr { | ||
813 | #clock-cells = <0>; | ||
814 | compatible = "ti,keystone,psc-clock"; | ||
815 | clocks = <&clkmodrst0>; | ||
816 | clock-output-names = "keymgr"; | ||
817 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; | ||
818 | reg-names = "control", "domain"; | ||
819 | domain-id = <0>; | ||
820 | }; | ||
821 | }; | ||
diff --git a/arch/arm/boot/dts/keystone.dts b/arch/arm/boot/dts/keystone.dts index a68e34bbecb2..100bdf52b847 100644 --- a/arch/arm/boot/dts/keystone.dts +++ b/arch/arm/boot/dts/keystone.dts | |||
@@ -100,13 +100,15 @@ | |||
100 | reg = <0x023100e8 4>; /* pll reset control reg */ | 100 | reg = <0x023100e8 4>; /* pll reset control reg */ |
101 | }; | 101 | }; |
102 | 102 | ||
103 | /include/ "keystone-clocks.dtsi" | ||
104 | |||
103 | uart0: serial@02530c00 { | 105 | uart0: serial@02530c00 { |
104 | compatible = "ns16550a"; | 106 | compatible = "ns16550a"; |
105 | current-speed = <115200>; | 107 | current-speed = <115200>; |
106 | reg-shift = <2>; | 108 | reg-shift = <2>; |
107 | reg-io-width = <4>; | 109 | reg-io-width = <4>; |
108 | reg = <0x02530c00 0x100>; | 110 | reg = <0x02530c00 0x100>; |
109 | clock-frequency = <133120000>; | 111 | clocks = <&clkuart0>; |
110 | interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; | 112 | interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; |
111 | }; | 113 | }; |
112 | 114 | ||
@@ -116,9 +118,66 @@ | |||
116 | reg-shift = <2>; | 118 | reg-shift = <2>; |
117 | reg-io-width = <4>; | 119 | reg-io-width = <4>; |
118 | reg = <0x02531000 0x100>; | 120 | reg = <0x02531000 0x100>; |
119 | clock-frequency = <133120000>; | 121 | clocks = <&clkuart1>; |
120 | interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>; | 122 | interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>; |
121 | }; | 123 | }; |
122 | 124 | ||
125 | i2c0: i2c@2530000 { | ||
126 | compatible = "ti,davinci-i2c"; | ||
127 | reg = <0x02530000 0x400>; | ||
128 | clock-frequency = <100000>; | ||
129 | clocks = <&clki2c>; | ||
130 | interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>; | ||
131 | #address-cells = <1>; | ||
132 | #size-cells = <0>; | ||
133 | |||
134 | dtt@50 { | ||
135 | compatible = "at,24c1024"; | ||
136 | reg = <0x50>; | ||
137 | }; | ||
138 | }; | ||
139 | |||
140 | i2c1: i2c@2530400 { | ||
141 | compatible = "ti,davinci-i2c"; | ||
142 | reg = <0x02530400 0x400>; | ||
143 | clock-frequency = <100000>; | ||
144 | clocks = <&clki2c>; | ||
145 | interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>; | ||
146 | }; | ||
147 | |||
148 | i2c2: i2c@2530800 { | ||
149 | compatible = "ti,davinci-i2c"; | ||
150 | reg = <0x02530800 0x400>; | ||
151 | clock-frequency = <100000>; | ||
152 | clocks = <&clki2c>; | ||
153 | interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; | ||
154 | }; | ||
155 | |||
156 | spi0: spi@21000400 { | ||
157 | compatible = "ti,dm6441-spi"; | ||
158 | reg = <0x21000400 0x200>; | ||
159 | num-cs = <4>; | ||
160 | ti,davinci-spi-intr-line = <0>; | ||
161 | interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>; | ||
162 | clocks = <&clkspi>; | ||
163 | }; | ||
164 | |||
165 | spi1: spi@21000600 { | ||
166 | compatible = "ti,dm6441-spi"; | ||
167 | reg = <0x21000600 0x200>; | ||
168 | num-cs = <4>; | ||
169 | ti,davinci-spi-intr-line = <0>; | ||
170 | interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>; | ||
171 | clocks = <&clkspi>; | ||
172 | }; | ||
173 | |||
174 | spi2: spi@21000800 { | ||
175 | compatible = "ti,dm6441-spi"; | ||
176 | reg = <0x21000800 0x200>; | ||
177 | num-cs = <4>; | ||
178 | ti,davinci-spi-intr-line = <0>; | ||
179 | interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>; | ||
180 | clocks = <&clkspi>; | ||
181 | }; | ||
123 | }; | 182 | }; |
124 | }; | 183 | }; |
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index cf7aeaf89e9c..1335b2e1bed4 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi | |||
@@ -13,6 +13,7 @@ | |||
13 | cpu@0 { | 13 | cpu@0 { |
14 | device_type = "cpu"; | 14 | device_type = "cpu"; |
15 | compatible = "marvell,feroceon"; | 15 | compatible = "marvell,feroceon"; |
16 | reg = <0>; | ||
16 | clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; | 17 | clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; |
17 | clock-names = "cpu_clk", "ddrclk", "powersave"; | 18 | clock-names = "cpu_clk", "ddrclk", "powersave"; |
18 | }; | 19 | }; |
@@ -167,7 +168,7 @@ | |||
167 | xor@60900 { | 168 | xor@60900 { |
168 | compatible = "marvell,orion-xor"; | 169 | compatible = "marvell,orion-xor"; |
169 | reg = <0x60900 0x100 | 170 | reg = <0x60900 0x100 |
170 | 0xd0B00 0x100>; | 171 | 0x60B00 0x100>; |
171 | status = "okay"; | 172 | status = "okay"; |
172 | clocks = <&gate_clk 16>; | 173 | clocks = <&gate_clk 16>; |
173 | 174 | ||
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi index bbeb623fc2c6..27ed9f5144bc 100644 --- a/arch/arm/boot/dts/prima2.dtsi +++ b/arch/arm/boot/dts/prima2.dtsi | |||
@@ -171,7 +171,8 @@ | |||
171 | compatible = "simple-bus"; | 171 | compatible = "simple-bus"; |
172 | #address-cells = <1>; | 172 | #address-cells = <1>; |
173 | #size-cells = <1>; | 173 | #size-cells = <1>; |
174 | ranges = <0xb0000000 0xb0000000 0x180000>; | 174 | ranges = <0xb0000000 0xb0000000 0x180000>, |
175 | <0x56000000 0x56000000 0x1b00000>; | ||
175 | 176 | ||
176 | timer@b0020000 { | 177 | timer@b0020000 { |
177 | compatible = "sirf,prima2-tick"; | 178 | compatible = "sirf,prima2-tick"; |
@@ -196,25 +197,32 @@ | |||
196 | uart0: uart@b0050000 { | 197 | uart0: uart@b0050000 { |
197 | cell-index = <0>; | 198 | cell-index = <0>; |
198 | compatible = "sirf,prima2-uart"; | 199 | compatible = "sirf,prima2-uart"; |
199 | reg = <0xb0050000 0x10000>; | 200 | reg = <0xb0050000 0x1000>; |
200 | interrupts = <17>; | 201 | interrupts = <17>; |
202 | fifosize = <128>; | ||
201 | clocks = <&clks 13>; | 203 | clocks = <&clks 13>; |
204 | sirf,uart-dma-rx-channel = <21>; | ||
205 | sirf,uart-dma-tx-channel = <2>; | ||
202 | }; | 206 | }; |
203 | 207 | ||
204 | uart1: uart@b0060000 { | 208 | uart1: uart@b0060000 { |
205 | cell-index = <1>; | 209 | cell-index = <1>; |
206 | compatible = "sirf,prima2-uart"; | 210 | compatible = "sirf,prima2-uart"; |
207 | reg = <0xb0060000 0x10000>; | 211 | reg = <0xb0060000 0x1000>; |
208 | interrupts = <18>; | 212 | interrupts = <18>; |
213 | fifosize = <32>; | ||
209 | clocks = <&clks 14>; | 214 | clocks = <&clks 14>; |
210 | }; | 215 | }; |
211 | 216 | ||
212 | uart2: uart@b0070000 { | 217 | uart2: uart@b0070000 { |
213 | cell-index = <2>; | 218 | cell-index = <2>; |
214 | compatible = "sirf,prima2-uart"; | 219 | compatible = "sirf,prima2-uart"; |
215 | reg = <0xb0070000 0x10000>; | 220 | reg = <0xb0070000 0x1000>; |
216 | interrupts = <19>; | 221 | interrupts = <19>; |
222 | fifosize = <128>; | ||
217 | clocks = <&clks 15>; | 223 | clocks = <&clks 15>; |
224 | sirf,uart-dma-rx-channel = <6>; | ||
225 | sirf,uart-dma-tx-channel = <7>; | ||
218 | }; | 226 | }; |
219 | 227 | ||
220 | usp0: usp@b0080000 { | 228 | usp0: usp@b0080000 { |
@@ -222,7 +230,10 @@ | |||
222 | compatible = "sirf,prima2-usp"; | 230 | compatible = "sirf,prima2-usp"; |
223 | reg = <0xb0080000 0x10000>; | 231 | reg = <0xb0080000 0x10000>; |
224 | interrupts = <20>; | 232 | interrupts = <20>; |
233 | fifosize = <128>; | ||
225 | clocks = <&clks 28>; | 234 | clocks = <&clks 28>; |
235 | sirf,usp-dma-rx-channel = <17>; | ||
236 | sirf,usp-dma-tx-channel = <18>; | ||
226 | }; | 237 | }; |
227 | 238 | ||
228 | usp1: usp@b0090000 { | 239 | usp1: usp@b0090000 { |
@@ -230,7 +241,10 @@ | |||
230 | compatible = "sirf,prima2-usp"; | 241 | compatible = "sirf,prima2-usp"; |
231 | reg = <0xb0090000 0x10000>; | 242 | reg = <0xb0090000 0x10000>; |
232 | interrupts = <21>; | 243 | interrupts = <21>; |
244 | fifosize = <128>; | ||
233 | clocks = <&clks 29>; | 245 | clocks = <&clks 29>; |
246 | sirf,usp-dma-rx-channel = <14>; | ||
247 | sirf,usp-dma-tx-channel = <15>; | ||
234 | }; | 248 | }; |
235 | 249 | ||
236 | usp2: usp@b00a0000 { | 250 | usp2: usp@b00a0000 { |
@@ -238,7 +252,10 @@ | |||
238 | compatible = "sirf,prima2-usp"; | 252 | compatible = "sirf,prima2-usp"; |
239 | reg = <0xb00a0000 0x10000>; | 253 | reg = <0xb00a0000 0x10000>; |
240 | interrupts = <22>; | 254 | interrupts = <22>; |
255 | fifosize = <128>; | ||
241 | clocks = <&clks 30>; | 256 | clocks = <&clks 30>; |
257 | sirf,usp-dma-rx-channel = <10>; | ||
258 | sirf,usp-dma-tx-channel = <11>; | ||
242 | }; | 259 | }; |
243 | 260 | ||
244 | dmac0: dma-controller@b00b0000 { | 261 | dmac0: dma-controller@b00b0000 { |
@@ -261,6 +278,8 @@ | |||
261 | compatible = "sirf,prima2-vip"; | 278 | compatible = "sirf,prima2-vip"; |
262 | reg = <0xb00C0000 0x10000>; | 279 | reg = <0xb00C0000 0x10000>; |
263 | clocks = <&clks 31>; | 280 | clocks = <&clks 31>; |
281 | interrupts = <14>; | ||
282 | sirf,vip-dma-rx-channel = <16>; | ||
264 | }; | 283 | }; |
265 | 284 | ||
266 | spi0: spi@b00d0000 { | 285 | spi0: spi@b00d0000 { |
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c index 117f955a2a06..8e1a0245907f 100644 --- a/arch/arm/common/edma.c +++ b/arch/arm/common/edma.c | |||
@@ -269,6 +269,11 @@ static const struct edmacc_param dummy_paramset = { | |||
269 | .ccnt = 1, | 269 | .ccnt = 1, |
270 | }; | 270 | }; |
271 | 271 | ||
272 | static const struct of_device_id edma_of_ids[] = { | ||
273 | { .compatible = "ti,edma3", }, | ||
274 | {} | ||
275 | }; | ||
276 | |||
272 | /*****************************************************************************/ | 277 | /*****************************************************************************/ |
273 | 278 | ||
274 | static void map_dmach_queue(unsigned ctlr, unsigned ch_no, | 279 | static void map_dmach_queue(unsigned ctlr, unsigned ch_no, |
@@ -560,14 +565,38 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id, | |||
560 | static int prepare_unused_channel_list(struct device *dev, void *data) | 565 | static int prepare_unused_channel_list(struct device *dev, void *data) |
561 | { | 566 | { |
562 | struct platform_device *pdev = to_platform_device(dev); | 567 | struct platform_device *pdev = to_platform_device(dev); |
563 | int i, ctlr; | 568 | int i, count, ctlr; |
569 | struct of_phandle_args dma_spec; | ||
564 | 570 | ||
571 | if (dev->of_node) { | ||
572 | count = of_property_count_strings(dev->of_node, "dma-names"); | ||
573 | if (count < 0) | ||
574 | return 0; | ||
575 | for (i = 0; i < count; i++) { | ||
576 | if (of_parse_phandle_with_args(dev->of_node, "dmas", | ||
577 | "#dma-cells", i, | ||
578 | &dma_spec)) | ||
579 | continue; | ||
580 | |||
581 | if (!of_match_node(edma_of_ids, dma_spec.np)) { | ||
582 | of_node_put(dma_spec.np); | ||
583 | continue; | ||
584 | } | ||
585 | |||
586 | clear_bit(EDMA_CHAN_SLOT(dma_spec.args[0]), | ||
587 | edma_cc[0]->edma_unused); | ||
588 | of_node_put(dma_spec.np); | ||
589 | } | ||
590 | return 0; | ||
591 | } | ||
592 | |||
593 | /* For non-OF case */ | ||
565 | for (i = 0; i < pdev->num_resources; i++) { | 594 | for (i = 0; i < pdev->num_resources; i++) { |
566 | if ((pdev->resource[i].flags & IORESOURCE_DMA) && | 595 | if ((pdev->resource[i].flags & IORESOURCE_DMA) && |
567 | (int)pdev->resource[i].start >= 0) { | 596 | (int)pdev->resource[i].start >= 0) { |
568 | ctlr = EDMA_CTLR(pdev->resource[i].start); | 597 | ctlr = EDMA_CTLR(pdev->resource[i].start); |
569 | clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start), | 598 | clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start), |
570 | edma_cc[ctlr]->edma_unused); | 599 | edma_cc[ctlr]->edma_unused); |
571 | } | 600 | } |
572 | } | 601 | } |
573 | 602 | ||
@@ -1762,11 +1791,6 @@ static int edma_probe(struct platform_device *pdev) | |||
1762 | return 0; | 1791 | return 0; |
1763 | } | 1792 | } |
1764 | 1793 | ||
1765 | static const struct of_device_id edma_of_ids[] = { | ||
1766 | { .compatible = "ti,edma3", }, | ||
1767 | {} | ||
1768 | }; | ||
1769 | |||
1770 | static struct platform_driver edma_driver = { | 1794 | static struct platform_driver edma_driver = { |
1771 | .driver = { | 1795 | .driver = { |
1772 | .name = "edma", | 1796 | .name = "edma", |
diff --git a/arch/arm/configs/keystone_defconfig b/arch/arm/configs/keystone_defconfig index 1f36b823905f..9943e5da74f1 100644 --- a/arch/arm/configs/keystone_defconfig +++ b/arch/arm/configs/keystone_defconfig | |||
@@ -123,7 +123,9 @@ CONFIG_SERIAL_OF_PLATFORM=y | |||
123 | CONFIG_I2C=y | 123 | CONFIG_I2C=y |
124 | # CONFIG_I2C_COMPAT is not set | 124 | # CONFIG_I2C_COMPAT is not set |
125 | CONFIG_I2C_CHARDEV=y | 125 | CONFIG_I2C_CHARDEV=y |
126 | CONFIG_I2C_DAVINCI=y | ||
126 | CONFIG_SPI=y | 127 | CONFIG_SPI=y |
128 | CONFIG_SPI_DAVINCI=y | ||
127 | CONFIG_SPI_SPIDEV=y | 129 | CONFIG_SPI_SPIDEV=y |
128 | # CONFIG_HWMON is not set | 130 | # CONFIG_HWMON is not set |
129 | CONFIG_WATCHDOG=y | 131 | CONFIG_WATCHDOG=y |
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index f3935b46df29..119fc378fc52 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig | |||
@@ -135,6 +135,7 @@ CONFIG_MMC=y | |||
135 | CONFIG_MMC_ARMMMCI=y | 135 | CONFIG_MMC_ARMMMCI=y |
136 | CONFIG_MMC_SDHCI=y | 136 | CONFIG_MMC_SDHCI=y |
137 | CONFIG_MMC_SDHCI_PLTFM=y | 137 | CONFIG_MMC_SDHCI_PLTFM=y |
138 | CONFIG_MMC_SDHCI_ESDHC_IMX=y | ||
138 | CONFIG_MMC_SDHCI_TEGRA=y | 139 | CONFIG_MMC_SDHCI_TEGRA=y |
139 | CONFIG_MMC_SDHCI_SPEAR=y | 140 | CONFIG_MMC_SDHCI_SPEAR=y |
140 | CONFIG_MMC_OMAP=y | 141 | CONFIG_MMC_OMAP=y |
diff --git a/arch/arm/crypto/aes-armv4.S b/arch/arm/crypto/aes-armv4.S index 19d6cd6f29f9..3a14ea8fe97e 100644 --- a/arch/arm/crypto/aes-armv4.S +++ b/arch/arm/crypto/aes-armv4.S | |||
@@ -148,7 +148,7 @@ AES_Te: | |||
148 | @ const AES_KEY *key) { | 148 | @ const AES_KEY *key) { |
149 | .align 5 | 149 | .align 5 |
150 | ENTRY(AES_encrypt) | 150 | ENTRY(AES_encrypt) |
151 | sub r3,pc,#8 @ AES_encrypt | 151 | adr r3,AES_encrypt |
152 | stmdb sp!,{r1,r4-r12,lr} | 152 | stmdb sp!,{r1,r4-r12,lr} |
153 | mov r12,r0 @ inp | 153 | mov r12,r0 @ inp |
154 | mov r11,r2 | 154 | mov r11,r2 |
@@ -381,7 +381,7 @@ _armv4_AES_encrypt: | |||
381 | .align 5 | 381 | .align 5 |
382 | ENTRY(private_AES_set_encrypt_key) | 382 | ENTRY(private_AES_set_encrypt_key) |
383 | _armv4_AES_set_encrypt_key: | 383 | _armv4_AES_set_encrypt_key: |
384 | sub r3,pc,#8 @ AES_set_encrypt_key | 384 | adr r3,_armv4_AES_set_encrypt_key |
385 | teq r0,#0 | 385 | teq r0,#0 |
386 | moveq r0,#-1 | 386 | moveq r0,#-1 |
387 | beq .Labrt | 387 | beq .Labrt |
@@ -843,7 +843,7 @@ AES_Td: | |||
843 | @ const AES_KEY *key) { | 843 | @ const AES_KEY *key) { |
844 | .align 5 | 844 | .align 5 |
845 | ENTRY(AES_decrypt) | 845 | ENTRY(AES_decrypt) |
846 | sub r3,pc,#8 @ AES_decrypt | 846 | adr r3,AES_decrypt |
847 | stmdb sp!,{r1,r4-r12,lr} | 847 | stmdb sp!,{r1,r4-r12,lr} |
848 | mov r12,r0 @ inp | 848 | mov r12,r0 @ inp |
849 | mov r11,r2 | 849 | mov r11,r2 |
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h index 7e1f76027f66..72abdc541f38 100644 --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h | |||
@@ -19,6 +19,13 @@ | |||
19 | #include <asm/unified.h> | 19 | #include <asm/unified.h> |
20 | #include <asm/compiler.h> | 20 | #include <asm/compiler.h> |
21 | 21 | ||
22 | #if __LINUX_ARM_ARCH__ < 6 | ||
23 | #include <asm-generic/uaccess-unaligned.h> | ||
24 | #else | ||
25 | #define __get_user_unaligned __get_user | ||
26 | #define __put_user_unaligned __put_user | ||
27 | #endif | ||
28 | |||
22 | #define VERIFY_READ 0 | 29 | #define VERIFY_READ 0 |
23 | #define VERIFY_WRITE 1 | 30 | #define VERIFY_WRITE 1 |
24 | 31 | ||
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 74ad15d1a065..bc6bd9683ba4 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -442,10 +442,10 @@ local_restart: | |||
442 | ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine | 442 | ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine |
443 | 443 | ||
444 | add r1, sp, #S_OFF | 444 | add r1, sp, #S_OFF |
445 | cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE) | 445 | 2: cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE) |
446 | eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back | 446 | eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back |
447 | bcs arm_syscall | 447 | bcs arm_syscall |
448 | 2: mov why, #0 @ no longer a real syscall | 448 | mov why, #0 @ no longer a real syscall |
449 | b sys_ni_syscall @ not private func | 449 | b sys_ni_syscall @ not private func |
450 | 450 | ||
451 | #if defined(CONFIG_OABI_COMPAT) || !defined(CONFIG_AEABI) | 451 | #if defined(CONFIG_OABI_COMPAT) || !defined(CONFIG_AEABI) |
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index de23a9beed13..39f89fbd5111 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S | |||
@@ -329,10 +329,10 @@ | |||
329 | #ifdef CONFIG_CONTEXT_TRACKING | 329 | #ifdef CONFIG_CONTEXT_TRACKING |
330 | .if \save | 330 | .if \save |
331 | stmdb sp!, {r0-r3, ip, lr} | 331 | stmdb sp!, {r0-r3, ip, lr} |
332 | bl user_exit | 332 | bl context_tracking_user_exit |
333 | ldmia sp!, {r0-r3, ip, lr} | 333 | ldmia sp!, {r0-r3, ip, lr} |
334 | .else | 334 | .else |
335 | bl user_exit | 335 | bl context_tracking_user_exit |
336 | .endif | 336 | .endif |
337 | #endif | 337 | #endif |
338 | .endm | 338 | .endm |
@@ -341,10 +341,10 @@ | |||
341 | #ifdef CONFIG_CONTEXT_TRACKING | 341 | #ifdef CONFIG_CONTEXT_TRACKING |
342 | .if \save | 342 | .if \save |
343 | stmdb sp!, {r0-r3, ip, lr} | 343 | stmdb sp!, {r0-r3, ip, lr} |
344 | bl user_enter | 344 | bl context_tracking_user_enter |
345 | ldmia sp!, {r0-r3, ip, lr} | 345 | ldmia sp!, {r0-r3, ip, lr} |
346 | .else | 346 | .else |
347 | bl user_enter | 347 | bl context_tracking_user_enter |
348 | .endif | 348 | .endif |
349 | #endif | 349 | #endif |
350 | .endm | 350 | .endm |
diff --git a/arch/arm/kvm/reset.c b/arch/arm/kvm/reset.c index 71e08baee209..c02ba4af599f 100644 --- a/arch/arm/kvm/reset.c +++ b/arch/arm/kvm/reset.c | |||
@@ -58,14 +58,14 @@ static const struct kvm_irq_level a15_vtimer_irq = { | |||
58 | */ | 58 | */ |
59 | int kvm_reset_vcpu(struct kvm_vcpu *vcpu) | 59 | int kvm_reset_vcpu(struct kvm_vcpu *vcpu) |
60 | { | 60 | { |
61 | struct kvm_regs *cpu_reset; | 61 | struct kvm_regs *reset_regs; |
62 | const struct kvm_irq_level *cpu_vtimer_irq; | 62 | const struct kvm_irq_level *cpu_vtimer_irq; |
63 | 63 | ||
64 | switch (vcpu->arch.target) { | 64 | switch (vcpu->arch.target) { |
65 | case KVM_ARM_TARGET_CORTEX_A15: | 65 | case KVM_ARM_TARGET_CORTEX_A15: |
66 | if (vcpu->vcpu_id > a15_max_cpu_idx) | 66 | if (vcpu->vcpu_id > a15_max_cpu_idx) |
67 | return -EINVAL; | 67 | return -EINVAL; |
68 | cpu_reset = &a15_regs_reset; | 68 | reset_regs = &a15_regs_reset; |
69 | vcpu->arch.midr = read_cpuid_id(); | 69 | vcpu->arch.midr = read_cpuid_id(); |
70 | cpu_vtimer_irq = &a15_vtimer_irq; | 70 | cpu_vtimer_irq = &a15_vtimer_irq; |
71 | break; | 71 | break; |
@@ -74,7 +74,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) | |||
74 | } | 74 | } |
75 | 75 | ||
76 | /* Reset core registers */ | 76 | /* Reset core registers */ |
77 | memcpy(&vcpu->arch.regs, cpu_reset, sizeof(vcpu->arch.regs)); | 77 | memcpy(&vcpu->arch.regs, reset_regs, sizeof(vcpu->arch.regs)); |
78 | 78 | ||
79 | /* Reset CP15 registers */ | 79 | /* Reset CP15 registers */ |
80 | kvm_reset_coprocs(vcpu); | 80 | kvm_reset_coprocs(vcpu); |
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index 180b3024bec3..f607deb40f4d 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c | |||
@@ -93,7 +93,7 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) | |||
93 | 93 | ||
94 | static struct irqaction at91rm9200_timer_irq = { | 94 | static struct irqaction at91rm9200_timer_irq = { |
95 | .name = "at91_tick", | 95 | .name = "at91_tick", |
96 | .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 96 | .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL, |
97 | .handler = at91rm9200_timer_interrupt, | 97 | .handler = at91rm9200_timer_interrupt, |
98 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, | 98 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, |
99 | }; | 99 | }; |
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index 3a4bc2e1a65e..bb392320a0dd 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c | |||
@@ -171,7 +171,7 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id) | |||
171 | 171 | ||
172 | static struct irqaction at91sam926x_pit_irq = { | 172 | static struct irqaction at91sam926x_pit_irq = { |
173 | .name = "at91_tick", | 173 | .name = "at91_tick", |
174 | .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 174 | .flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL, |
175 | .handler = at91sam926x_pit_interrupt, | 175 | .handler = at91sam926x_pit_interrupt, |
176 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, | 176 | .irq = NR_IRQS_LEGACY + AT91_ID_SYS, |
177 | }; | 177 | }; |
diff --git a/arch/arm/mach-at91/at91sam9g45_reset.S b/arch/arm/mach-at91/at91sam9g45_reset.S index 721a1a34dd1d..c40c1e2ef80f 100644 --- a/arch/arm/mach-at91/at91sam9g45_reset.S +++ b/arch/arm/mach-at91/at91sam9g45_reset.S | |||
@@ -16,11 +16,17 @@ | |||
16 | #include "at91_rstc.h" | 16 | #include "at91_rstc.h" |
17 | .arm | 17 | .arm |
18 | 18 | ||
19 | /* | ||
20 | * at91_ramc_base is an array void* | ||
21 | * init at NULL if only one DDR controler is present in or DT | ||
22 | */ | ||
19 | .globl at91sam9g45_restart | 23 | .globl at91sam9g45_restart |
20 | 24 | ||
21 | at91sam9g45_restart: | 25 | at91sam9g45_restart: |
22 | ldr r5, =at91_ramc_base @ preload constants | 26 | ldr r5, =at91_ramc_base @ preload constants |
23 | ldr r0, [r5] | 27 | ldr r0, [r5] |
28 | ldr r5, [r5, #4] @ ddr1 | ||
29 | cmp r5, #0 | ||
24 | ldr r4, =at91_rstc_base | 30 | ldr r4, =at91_rstc_base |
25 | ldr r1, [r4] | 31 | ldr r1, [r4] |
26 | 32 | ||
@@ -30,6 +36,8 @@ at91sam9g45_restart: | |||
30 | 36 | ||
31 | .balign 32 @ align to cache line | 37 | .balign 32 @ align to cache line |
32 | 38 | ||
39 | strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access | ||
40 | strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1 | ||
33 | str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access | 41 | str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access |
34 | str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0 | 42 | str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0 |
35 | str r4, [r1, #AT91_RSTC_CR] @ reset processor | 43 | str r4, [r1, #AT91_RSTC_CR] @ reset processor |
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c index 2919eba41ff4..c0e637adf65d 100644 --- a/arch/arm/mach-at91/at91x40_time.c +++ b/arch/arm/mach-at91/at91x40_time.c | |||
@@ -57,7 +57,7 @@ static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id) | |||
57 | 57 | ||
58 | static struct irqaction at91x40_timer_irq = { | 58 | static struct irqaction at91x40_timer_irq = { |
59 | .name = "at91_tick", | 59 | .name = "at91_tick", |
60 | .flags = IRQF_DISABLED | IRQF_TIMER, | 60 | .flags = IRQF_TIMER, |
61 | .handler = at91x40_timer_interrupt | 61 | .handler = at91x40_timer_interrupt |
62 | }; | 62 | }; |
63 | 63 | ||
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 92b7f770615a..4078ba93776b 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -176,7 +176,7 @@ static struct at24_platform_data eeprom_info = { | |||
176 | .context = (void *)0x7f00, | 176 | .context = (void *)0x7f00, |
177 | }; | 177 | }; |
178 | 178 | ||
179 | static struct snd_platform_data dm365_evm_snd_data = { | 179 | static struct snd_platform_data dm365_evm_snd_data __maybe_unused = { |
180 | .asp_chan_q = EVENTQ_3, | 180 | .asp_chan_q = EVENTQ_3, |
181 | }; | 181 | }; |
182 | 182 | ||
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h index 52b8571b2e70..ce402cd21fa0 100644 --- a/arch/arm/mach-davinci/include/mach/serial.h +++ b/arch/arm/mach-davinci/include/mach/serial.h | |||
@@ -15,8 +15,6 @@ | |||
15 | 15 | ||
16 | #include <mach/hardware.h> | 16 | #include <mach/hardware.h> |
17 | 17 | ||
18 | #include <linux/platform_device.h> | ||
19 | |||
20 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) | 18 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) |
21 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) | 19 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) |
22 | #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) | 20 | #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) |
@@ -39,6 +37,8 @@ | |||
39 | #define UART_DM646X_SCR_TX_WATERMARK 0x08 | 37 | #define UART_DM646X_SCR_TX_WATERMARK 0x08 |
40 | 38 | ||
41 | #ifndef __ASSEMBLY__ | 39 | #ifndef __ASSEMBLY__ |
40 | #include <linux/platform_device.h> | ||
41 | |||
42 | extern int davinci_serial_init(struct platform_device *); | 42 | extern int davinci_serial_init(struct platform_device *); |
43 | #endif | 43 | #endif |
44 | 44 | ||
diff --git a/arch/arm/mach-integrator/pci_v3.h b/arch/arm/mach-integrator/pci_v3.h index 755fd29fed4a..06a9e2e7d007 100644 --- a/arch/arm/mach-integrator/pci_v3.h +++ b/arch/arm/mach-integrator/pci_v3.h | |||
@@ -1,2 +1,9 @@ | |||
1 | /* Simple oneliner include to the PCIv3 early init */ | 1 | /* Simple oneliner include to the PCIv3 early init */ |
2 | #ifdef CONFIG_PCI | ||
2 | extern int pci_v3_early_init(void); | 3 | extern int pci_v3_early_init(void); |
4 | #else | ||
5 | static inline int pci_v3_early_init(void) | ||
6 | { | ||
7 | return 0; | ||
8 | } | ||
9 | #endif | ||
diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig index 366d1a3b418d..f20c53e75ed9 100644 --- a/arch/arm/mach-keystone/Kconfig +++ b/arch/arm/mach-keystone/Kconfig | |||
@@ -9,6 +9,8 @@ config ARCH_KEYSTONE | |||
9 | select GENERIC_CLOCKEVENTS | 9 | select GENERIC_CLOCKEVENTS |
10 | select ARCH_WANT_OPTIONAL_GPIOLIB | 10 | select ARCH_WANT_OPTIONAL_GPIOLIB |
11 | select ARM_ERRATA_798181 if SMP | 11 | select ARM_ERRATA_798181 if SMP |
12 | select COMMON_CLK_KEYSTONE | ||
13 | select TI_EDMA | ||
12 | help | 14 | help |
13 | Support for boards based on the Texas Instruments Keystone family of | 15 | Support for boards based on the Texas Instruments Keystone family of |
14 | SoCs. | 16 | SoCs. |
diff --git a/arch/arm/mach-keystone/Makefile b/arch/arm/mach-keystone/Makefile index ddc52b05dc84..25d92396fbfa 100644 --- a/arch/arm/mach-keystone/Makefile +++ b/arch/arm/mach-keystone/Makefile | |||
@@ -4,3 +4,6 @@ plus_sec := $(call as-instr,.arch_extension sec,+sec) | |||
4 | AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec) | 4 | AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec) |
5 | 5 | ||
6 | obj-$(CONFIG_SMP) += platsmp.o | 6 | obj-$(CONFIG_SMP) += platsmp.o |
7 | |||
8 | # PM domain driver for Keystone SOCs | ||
9 | obj-$(CONFIG_ARCH_KEYSTONE) += pm_domain.o | ||
diff --git a/arch/arm/mach-keystone/pm_domain.c b/arch/arm/mach-keystone/pm_domain.c new file mode 100644 index 000000000000..beac3fb1d205 --- /dev/null +++ b/arch/arm/mach-keystone/pm_domain.c | |||
@@ -0,0 +1,70 @@ | |||
1 | /* | ||
2 | * PM domain driver for Keystone2 devices | ||
3 | * | ||
4 | * Copyright 2013 Texas Instruments, Inc. | ||
5 | * Santosh Shilimkar <santosh.shillimkar@ti.com> | ||
6 | * | ||
7 | * Based on Kevins work on DAVINCI SOCs | ||
8 | * Kevin Hilman <khilman@linaro.org> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms and conditions of the GNU General Public License, | ||
12 | * version 2, as published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/init.h> | ||
16 | #include <linux/pm_runtime.h> | ||
17 | #include <linux/pm_clock.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/clk-provider.h> | ||
20 | |||
21 | #ifdef CONFIG_PM_RUNTIME | ||
22 | static int keystone_pm_runtime_suspend(struct device *dev) | ||
23 | { | ||
24 | int ret; | ||
25 | |||
26 | dev_dbg(dev, "%s\n", __func__); | ||
27 | |||
28 | ret = pm_generic_runtime_suspend(dev); | ||
29 | if (ret) | ||
30 | return ret; | ||
31 | |||
32 | ret = pm_clk_suspend(dev); | ||
33 | if (ret) { | ||
34 | pm_generic_runtime_resume(dev); | ||
35 | return ret; | ||
36 | } | ||
37 | |||
38 | return 0; | ||
39 | } | ||
40 | |||
41 | static int keystone_pm_runtime_resume(struct device *dev) | ||
42 | { | ||
43 | dev_dbg(dev, "%s\n", __func__); | ||
44 | |||
45 | pm_clk_resume(dev); | ||
46 | |||
47 | return pm_generic_runtime_resume(dev); | ||
48 | } | ||
49 | #endif | ||
50 | |||
51 | static struct dev_pm_domain keystone_pm_domain = { | ||
52 | .ops = { | ||
53 | SET_RUNTIME_PM_OPS(keystone_pm_runtime_suspend, | ||
54 | keystone_pm_runtime_resume, NULL) | ||
55 | USE_PLATFORM_PM_SLEEP_OPS | ||
56 | }, | ||
57 | }; | ||
58 | |||
59 | static struct pm_clk_notifier_block platform_domain_notifier = { | ||
60 | .pm_domain = &keystone_pm_domain, | ||
61 | }; | ||
62 | |||
63 | int __init keystone_pm_runtime_init(void) | ||
64 | { | ||
65 | of_clk_init(NULL); | ||
66 | pm_clk_add_notifier(&platform_bus_type, &platform_domain_notifier); | ||
67 | |||
68 | return 0; | ||
69 | } | ||
70 | subsys_initcall(keystone_pm_runtime_init); | ||
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c index 4c24303ec481..58adf2fd9cfc 100644 --- a/arch/arm/mach-mvebu/coherency.c +++ b/arch/arm/mach-mvebu/coherency.c | |||
@@ -140,6 +140,7 @@ int __init coherency_init(void) | |||
140 | coherency_base = of_iomap(np, 0); | 140 | coherency_base = of_iomap(np, 0); |
141 | coherency_cpu_base = of_iomap(np, 1); | 141 | coherency_cpu_base = of_iomap(np, 1); |
142 | set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); | 142 | set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); |
143 | of_node_put(np); | ||
143 | } | 144 | } |
144 | 145 | ||
145 | return 0; | 146 | return 0; |
@@ -147,9 +148,14 @@ int __init coherency_init(void) | |||
147 | 148 | ||
148 | static int __init coherency_late_init(void) | 149 | static int __init coherency_late_init(void) |
149 | { | 150 | { |
150 | if (of_find_matching_node(NULL, of_coherency_table)) | 151 | struct device_node *np; |
152 | |||
153 | np = of_find_matching_node(NULL, of_coherency_table); | ||
154 | if (np) { | ||
151 | bus_register_notifier(&platform_bus_type, | 155 | bus_register_notifier(&platform_bus_type, |
152 | &mvebu_hwcc_platform_nb); | 156 | &mvebu_hwcc_platform_nb); |
157 | of_node_put(np); | ||
158 | } | ||
153 | return 0; | 159 | return 0; |
154 | } | 160 | } |
155 | 161 | ||
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index 3cc4bef6401c..27fc4f049474 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c | |||
@@ -67,6 +67,7 @@ int __init armada_370_xp_pmsu_init(void) | |||
67 | pr_info("Initializing Power Management Service Unit\n"); | 67 | pr_info("Initializing Power Management Service Unit\n"); |
68 | pmsu_mp_base = of_iomap(np, 0); | 68 | pmsu_mp_base = of_iomap(np, 0); |
69 | pmsu_reset_base = of_iomap(np, 1); | 69 | pmsu_reset_base = of_iomap(np, 1); |
70 | of_node_put(np); | ||
70 | } | 71 | } |
71 | 72 | ||
72 | return 0; | 73 | return 0; |
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c index f875124ff4f9..5175083cdb34 100644 --- a/arch/arm/mach-mvebu/system-controller.c +++ b/arch/arm/mach-mvebu/system-controller.c | |||
@@ -98,6 +98,7 @@ static int __init mvebu_system_controller_init(void) | |||
98 | BUG_ON(!match); | 98 | BUG_ON(!match); |
99 | system_controller_base = of_iomap(np, 0); | 99 | system_controller_base = of_iomap(np, 0); |
100 | mvebu_sc = (struct mvebu_system_controller *)match->data; | 100 | mvebu_sc = (struct mvebu_system_controller *)match->data; |
101 | of_node_put(np); | ||
101 | } | 102 | } |
102 | 103 | ||
103 | return 0; | 104 | return 0; |
diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress/tc2_pm.c index 7aeb5d60e484..e6eb48192912 100644 --- a/arch/arm/mach-vexpress/tc2_pm.c +++ b/arch/arm/mach-vexpress/tc2_pm.c | |||
@@ -131,6 +131,16 @@ static void tc2_pm_down(u64 residency) | |||
131 | } else | 131 | } else |
132 | BUG(); | 132 | BUG(); |
133 | 133 | ||
134 | /* | ||
135 | * If the CPU is committed to power down, make sure | ||
136 | * the power controller will be in charge of waking it | ||
137 | * up upon IRQ, ie IRQ lines are cut from GIC CPU IF | ||
138 | * to the CPU by disabling the GIC CPU IF to prevent wfi | ||
139 | * from completing execution behind power controller back | ||
140 | */ | ||
141 | if (!skip_wfi) | ||
142 | gic_cpu_if_down(); | ||
143 | |||
134 | if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) { | 144 | if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) { |
135 | arch_spin_unlock(&tc2_pm_lock); | 145 | arch_spin_unlock(&tc2_pm_lock); |
136 | 146 | ||
@@ -231,7 +241,6 @@ static void tc2_pm_suspend(u64 residency) | |||
231 | cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); | 241 | cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); |
232 | cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); | 242 | cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); |
233 | ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point)); | 243 | ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point)); |
234 | gic_cpu_if_down(); | ||
235 | tc2_pm_down(residency); | 244 | tc2_pm_down(residency); |
236 | } | 245 | } |
237 | 246 | ||