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authorRussell King <rmk+kernel@arm.linux.org.uk>2009-11-26 07:31:15 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-12-14 09:53:22 -0500
commitf74f7e57ae9fa12b2951ae62ce3557799b318399 (patch)
treefa8e3aef5f3719c66365054f2b5dcaa88d19d43d /arch/arm
parent2c9b9c8490b60428fa2d1c64042f7c7caed93940 (diff)
ARM: use flush_kernel_dcache_area() for dmabounce
After copying data from the bounce buffer to the real buffer, use flush_kernel_dcache_page() to ensure that data is written back in manner coherent with future userspace mappings. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/common/dmabounce.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 5a375e5fef21..bc90364a96c7 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -308,15 +308,11 @@ static inline void unmap_single(struct device *dev, dma_addr_t dma_addr,
308 memcpy(ptr, buf->safe, size); 308 memcpy(ptr, buf->safe, size);
309 309
310 /* 310 /*
311 * DMA buffers must have the same cache properties 311 * Since we may have written to a page cache page,
312 * as if they were really used for DMA - which means 312 * we need to ensure that the data will be coherent
313 * data must be written back to RAM. Note that 313 * with user mappings.
314 * we don't use dmac_flush_range() here for the
315 * bidirectional case because we know the cache
316 * lines will be coherent with the data written.
317 */ 314 */
318 dmac_clean_range(ptr, ptr + size); 315 __cpuc_flush_kernel_dcache_area(ptr, size);
319 outer_clean_range(__pa(ptr), __pa(ptr) + size);
320 } 316 }
321 free_safe_buffer(dev->archdata.dmabounce, buf); 317 free_safe_buffer(dev->archdata.dmabounce, buf);
322 } 318 }