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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-12-06 04:59:47 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-12-24 07:09:19 -0500
commitf72ed4beb198eb25c8532e76addc0034ae2aa8c7 (patch)
tree0c905be5d39c580e8d8301edd8a71638d3eb0330 /arch/arm
parent0bb075cea8b527a1f33d965f6c891cea9261e9bf (diff)
ARM: shmobile: r8a7791: Don't set plat_sci_port scbrr_algo_id field
The field will be removed from the sh-sci driver. Don't set it and let the driver handle baud rate calculation internally. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7791.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
index f15b53786713..e28404e43860 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -84,11 +84,10 @@ void __init r8a7791_pinmux_init(void)
84 r8a7791_register_gpio(7); 84 r8a7791_register_gpio(7);
85} 85}
86 86
87#define __R8A7791_SCIF(scif_type, algo, index, baseaddr, irq) \ 87#define __R8A7791_SCIF(scif_type, index, baseaddr, irq) \
88static struct plat_sci_port scif##index##_platform_data = { \ 88static struct plat_sci_port scif##index##_platform_data = { \
89 .type = scif_type, \ 89 .type = scif_type, \
90 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ 90 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
91 .scbrr_algo_id = algo, \
92 .scscr = SCSCR_RE | SCSCR_TE, \ 91 .scscr = SCSCR_RE | SCSCR_TE, \
93}; \ 92}; \
94 \ 93 \
@@ -98,13 +97,13 @@ static struct resource scif##index##_resources[] = { \
98} 97}
99 98
100#define R8A7791_SCIF(index, baseaddr, irq) \ 99#define R8A7791_SCIF(index, baseaddr, irq) \
101 __R8A7791_SCIF(PORT_SCIF, SCBRR_ALGO_2, index, baseaddr, irq) 100 __R8A7791_SCIF(PORT_SCIF, index, baseaddr, irq)
102 101
103#define R8A7791_SCIFA(index, baseaddr, irq) \ 102#define R8A7791_SCIFA(index, baseaddr, irq) \
104 __R8A7791_SCIF(PORT_SCIFA, SCBRR_ALGO_4, index, baseaddr, irq) 103 __R8A7791_SCIF(PORT_SCIFA, index, baseaddr, irq)
105 104
106#define R8A7791_SCIFB(index, baseaddr, irq) \ 105#define R8A7791_SCIFB(index, baseaddr, irq) \
107 __R8A7791_SCIF(PORT_SCIFB, SCBRR_ALGO_4, index, baseaddr, irq) 106 __R8A7791_SCIF(PORT_SCIFB, index, baseaddr, irq)
108 107
109R8A7791_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */ 108R8A7791_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
110R8A7791_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */ 109R8A7791_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */