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authorOlof Johansson <olof@lixom.net>2014-07-19 18:00:14 -0400
committerOlof Johansson <olof@lixom.net>2014-07-19 18:01:08 -0400
commitf57c0e049aa189e9683e2f013594a63bcc4f083f (patch)
treed00c834871818cd00c8bc764da6c94026d7d1cd0 /arch/arm
parentc6b659c0050429c36e3e805529d68d8680956e1a (diff)
parentfce9e5bb25264153f9f002eada41757118d25ba9 (diff)
Merge tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup for v3.17" from Kukjin Kim: Most of them are for exynos SoCs, remove useless codes and update for PMU consolidation. - remove unnecessary header file in mach-exynos/pmu.c - remove unused code in mach-exynos/common.h - remove mach-exynos/regs-pmu.h dependency from PD - remove file path from comment section in mach-exynos - move SYSREG definitions into mach-exynos/regs-sys.h - add mapping PMU base address via DT for PMU cleanup - use staic in mach-exynos/common.h - update Samsung UART config options for low-level debug * tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Add support for mapping PMU base address via DT ARM: EXYNOS: Remove "linux/bug.h" from pmu.c ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain ARM: EXYNOS: Remove file path from comment section ARM: EXYNOS: Move SYSREG definition into sys-reg specific file ARM: EXYNOS: Make exynos machine_ops as static ARM: EXYNOS: Remove unused code in common.h ARM: debug: Update Samsung UART config options + Linux 3.16-rc5 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig.debug20
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts4
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts4
-rw-r--r--arch/arm/boot/dts/am335x-igep0033.dtsi6
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi2
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts1
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi10
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi5
-rw-r--r--arch/arm/kernel/kprobes-test-arm.c30
-rw-r--r--arch/arm/kernel/kprobes-test.c10
-rw-r--r--arch/arm/kernel/probes-arm.c6
-rw-r--r--arch/arm/mach-exynos/common.h13
-rw-r--r--arch/arm/mach-exynos/exynos.c52
-rw-r--r--arch/arm/mach-exynos/firmware.c9
-rw-r--r--arch/arm/mach-exynos/headsmp.S1
-rw-r--r--arch/arm/mach-exynos/hotplug.c3
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h3
-rw-r--r--arch/arm/mach-exynos/include/mach/memory.h3
-rw-r--r--arch/arm/mach-exynos/platsmp.c3
-rw-r--r--arch/arm/mach-exynos/pm.c1
-rw-r--r--arch/arm/mach-exynos/pm_domains.c68
-rw-r--r--arch/arm/mach-exynos/pmu.c1
-rw-r--r--arch/arm/mach-exynos/regs-pmu.h4
-rw-r--r--arch/arm/mach-exynos/regs-sys.h22
-rw-r--r--arch/arm/mach-imx/clk-gate2.c31
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c2
-rw-r--r--arch/arm/mach-omap2/cm-regbits-34xx.h3
-rw-r--r--arch/arm/mach-omap2/common.h3
-rw-r--r--arch/arm/mach-omap2/devices.c28
-rw-r--r--arch/arm/mach-omap2/dsp.c10
-rw-r--r--arch/arm/mach-omap2/gpmc.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c18
-rw-r--r--arch/arm/mach-omap2/prm-regbits-34xx.h6
-rw-r--r--arch/arm/mm/cache-l2x0.c2
35 files changed, 263 insertions, 125 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index a9176b9b00fc..b24b5dc720e4 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -617,53 +617,41 @@ choice
617 depends on PLAT_SAMSUNG 617 depends on PLAT_SAMSUNG
618 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 618 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
619 select DEBUG_S3C24XX_UART if ARCH_S3C24XX 619 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
620 bool "Use S3C UART 0 for low-level debug" 620 bool "Use Samsung S3C UART 0 for low-level debug"
621 help 621 help
622 Say Y here if you want the debug print routines to direct 622 Say Y here if you want the debug print routines to direct
623 their output to UART 0. The port must have been initialised 623 their output to UART 0. The port must have been initialised
624 by the boot-loader before use. 624 by the boot-loader before use.
625 625
626 The uncompressor code port configuration is now handled
627 by CONFIG_S3C_LOWLEVEL_UART_PORT.
628
629 config DEBUG_S3C_UART1 626 config DEBUG_S3C_UART1
630 depends on PLAT_SAMSUNG 627 depends on PLAT_SAMSUNG
631 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 628 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
632 select DEBUG_S3C24XX_UART if ARCH_S3C24XX 629 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
633 bool "Use S3C UART 1 for low-level debug" 630 bool "Use Samsung S3C UART 1 for low-level debug"
634 help 631 help
635 Say Y here if you want the debug print routines to direct 632 Say Y here if you want the debug print routines to direct
636 their output to UART 1. The port must have been initialised 633 their output to UART 1. The port must have been initialised
637 by the boot-loader before use. 634 by the boot-loader before use.
638 635
639 The uncompressor code port configuration is now handled
640 by CONFIG_S3C_LOWLEVEL_UART_PORT.
641
642 config DEBUG_S3C_UART2 636 config DEBUG_S3C_UART2
643 depends on PLAT_SAMSUNG 637 depends on PLAT_SAMSUNG
644 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 638 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
645 select DEBUG_S3C24XX_UART if ARCH_S3C24XX 639 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
646 bool "Use S3C UART 2 for low-level debug" 640 bool "Use Samsung S3C UART 2 for low-level debug"
647 help 641 help
648 Say Y here if you want the debug print routines to direct 642 Say Y here if you want the debug print routines to direct
649 their output to UART 2. The port must have been initialised 643 their output to UART 2. The port must have been initialised
650 by the boot-loader before use. 644 by the boot-loader before use.
651 645
652 The uncompressor code port configuration is now handled
653 by CONFIG_S3C_LOWLEVEL_UART_PORT.
654
655 config DEBUG_S3C_UART3 646 config DEBUG_S3C_UART3
656 depends on PLAT_SAMSUNG && ARCH_EXYNOS 647 depends on PLAT_SAMSUNG && ARCH_EXYNOS
657 select DEBUG_EXYNOS_UART 648 select DEBUG_EXYNOS_UART
658 bool "Use S3C UART 3 for low-level debug" 649 bool "Use Samsung S3C UART 3 for low-level debug"
659 help 650 help
660 Say Y here if you want the debug print routines to direct 651 Say Y here if you want the debug print routines to direct
661 their output to UART 3. The port must have been initialised 652 their output to UART 3. The port must have been initialised
662 by the boot-loader before use. 653 by the boot-loader before use.
663 654
664 The uncompressor code port configuration is now handled
665 by CONFIG_S3C_LOWLEVEL_UART_PORT.
666
667 config DEBUG_S3C2410_UART0 655 config DEBUG_S3C2410_UART0
668 depends on ARCH_S3C24XX 656 depends on ARCH_S3C24XX
669 select DEBUG_S3C2410_UART 657 select DEBUG_S3C2410_UART
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index ecb267767cf5..e2156a583de7 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -529,8 +529,8 @@
529 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 529 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
530 0 0 1 2 530 0 0 1 2
531 >; 531 >;
532 tx-num-evt = <1>; 532 tx-num-evt = <32>;
533 rx-num-evt = <1>; 533 rx-num-evt = <32>;
534}; 534};
535 535
536&tps { 536&tps {
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index ab9a34ce524c..80a3b215e7d6 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -560,8 +560,8 @@
560 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 560 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
561 0 0 1 2 561 0 0 1 2
562 >; 562 >;
563 tx-num-evt = <1>; 563 tx-num-evt = <32>;
564 rx-num-evt = <1>; 564 rx-num-evt = <32>;
565}; 565};
566 566
567&tscadc { 567&tscadc {
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 8a0a72dc7dd7..a1a0cc5eb35c 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -105,10 +105,16 @@
105 105
106&cpsw_emac0 { 106&cpsw_emac0 {
107 phy_id = <&davinci_mdio>, <0>; 107 phy_id = <&davinci_mdio>, <0>;
108 phy-mode = "rmii";
108}; 109};
109 110
110&cpsw_emac1 { 111&cpsw_emac1 {
111 phy_id = <&davinci_mdio>, <1>; 112 phy_id = <&davinci_mdio>, <1>;
113 phy-mode = "rmii";
114};
115
116&phy_sel {
117 rmii-clock-ext;
112}; 118};
113 119
114&elm { 120&elm {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index d6133f497207..2ebc42140ea6 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -1045,6 +1045,8 @@
1045 reg = <0x00500000 0x80000 1045 reg = <0x00500000 0x80000
1046 0xf803c000 0x400>; 1046 0xf803c000 0x400>;
1047 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; 1047 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1048 clocks = <&usb>, <&udphs_clk>;
1049 clock-names = "hclk", "pclk";
1048 status = "disabled"; 1050 status = "disabled";
1049 1051
1050 ep0 { 1052 ep0 {
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 4adc28039c30..83089540e324 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -240,6 +240,7 @@
240 regulator-name = "ldo3"; 240 regulator-name = "ldo3";
241 regulator-min-microvolt = <1800000>; 241 regulator-min-microvolt = <1800000>;
242 regulator-max-microvolt = <1800000>; 242 regulator-max-microvolt = <1800000>;
243 regulator-always-on;
243 regulator-boot-on; 244 regulator-boot-on;
244 }; 245 };
245 246
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index c90c76de84d6..dc7a292fe939 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -673,10 +673,12 @@
673 673
674 l3_iclk_div: l3_iclk_div { 674 l3_iclk_div: l3_iclk_div {
675 #clock-cells = <0>; 675 #clock-cells = <0>;
676 compatible = "fixed-factor-clock"; 676 compatible = "ti,divider-clock";
677 ti,max-div = <2>;
678 ti,bit-shift = <4>;
679 reg = <0x0100>;
677 clocks = <&dpll_core_h12x2_ck>; 680 clocks = <&dpll_core_h12x2_ck>;
678 clock-mult = <1>; 681 ti,index-power-of-two;
679 clock-div = <1>;
680 }; 682 };
681 683
682 l4_root_clk_div: l4_root_clk_div { 684 l4_root_clk_div: l4_root_clk_div {
@@ -684,7 +686,7 @@
684 compatible = "fixed-factor-clock"; 686 compatible = "fixed-factor-clock";
685 clocks = <&l3_iclk_div>; 687 clocks = <&l3_iclk_div>;
686 clock-mult = <1>; 688 clock-mult = <1>;
687 clock-div = <1>; 689 clock-div = <2>;
688 }; 690 };
689 691
690 video1_clk2_div: video1_clk2_div { 692 video1_clk2_div: video1_clk2_div {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index fbaf426d2daa..17b22e9cc2aa 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -554,7 +554,7 @@
554 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; 554 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
555 clocks = <&clock CLK_PWM>; 555 clocks = <&clock CLK_PWM>;
556 clock-names = "timers"; 556 clock-names = "timers";
557 #pwm-cells = <2>; 557 #pwm-cells = <3>;
558 status = "disabled"; 558 status = "disabled";
559 }; 559 };
560 560
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index e38532271ef9..15957227ffda 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -167,7 +167,7 @@
167 compatible = "samsung,exynos5420-audss-clock"; 167 compatible = "samsung,exynos5420-audss-clock";
168 reg = <0x03810000 0x0C>; 168 reg = <0x03810000 0x0C>;
169 #clock-cells = <1>; 169 #clock-cells = <1>;
170 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, 170 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
171 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>; 171 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
172 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; 172 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
173 }; 173 };
@@ -260,6 +260,9 @@
260 mfc_pd: power-domain@10044060 { 260 mfc_pd: power-domain@10044060 {
261 compatible = "samsung,exynos4210-pd"; 261 compatible = "samsung,exynos4210-pd";
262 reg = <0x10044060 0x20>; 262 reg = <0x10044060 0x20>;
263 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>,
264 <&clock CLK_MOUT_USER_ACLK333>;
265 clock-names = "oscclk", "pclk0", "clk0";
263 }; 266 };
264 267
265 disp_pd: power-domain@100440C0 { 268 disp_pd: power-domain@100440C0 {
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index 9db4b659d03e..cb1424240ff6 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -74,8 +74,6 @@ void kprobe_arm_test_cases(void)
74 TEST_RRR( op "lt" s " r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\ 74 TEST_RRR( op "lt" s " r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\
75 TEST_RR( op "gt" s " r12, r13" ", r",14,val, ", ror r",14,7,"")\ 75 TEST_RR( op "gt" s " r12, r13" ", r",14,val, ", ror r",14,7,"")\
76 TEST_RR( op "le" s " r14, r",0, val, ", r13" ", lsl r",14,8,"")\ 76 TEST_RR( op "le" s " r14, r",0, val, ", r13" ", lsl r",14,8,"")\
77 TEST_RR( op s " r12, pc" ", r",14,val, ", ror r",14,7,"")\
78 TEST_RR( op s " r14, r",0, val, ", pc" ", lsl r",14,8,"")\
79 TEST_R( op "eq" s " r0, r",11,VAL1,", #0xf5") \ 77 TEST_R( op "eq" s " r0, r",11,VAL1,", #0xf5") \
80 TEST_R( op "ne" s " r11, r",0, VAL1,", #0xf5000000") \ 78 TEST_R( op "ne" s " r11, r",0, VAL1,", #0xf5000000") \
81 TEST_R( op s " r7, r",8, VAL2,", #0x000af000") \ 79 TEST_R( op s " r7, r",8, VAL2,", #0x000af000") \
@@ -103,8 +101,6 @@ void kprobe_arm_test_cases(void)
103 TEST_RRR( op "ge r",11,VAL1,", r",14,N(val),", asr r",7, 6,"") \ 101 TEST_RRR( op "ge r",11,VAL1,", r",14,N(val),", asr r",7, 6,"") \
104 TEST_RR( op "le r13" ", r",14,val, ", ror r",14,7,"") \ 102 TEST_RR( op "le r13" ", r",14,val, ", ror r",14,7,"") \
105 TEST_RR( op "gt r",0, val, ", r13" ", lsl r",14,8,"") \ 103 TEST_RR( op "gt r",0, val, ", r13" ", lsl r",14,8,"") \
106 TEST_RR( op " pc" ", r",14,val, ", ror r",14,7,"") \
107 TEST_RR( op " r",0, val, ", pc" ", lsl r",14,8,"") \
108 TEST_R( op "eq r",11,VAL1,", #0xf5") \ 104 TEST_R( op "eq r",11,VAL1,", #0xf5") \
109 TEST_R( op "ne r",0, VAL1,", #0xf5000000") \ 105 TEST_R( op "ne r",0, VAL1,", #0xf5000000") \
110 TEST_R( op " r",8, VAL2,", #0x000af000") 106 TEST_R( op " r",8, VAL2,", #0x000af000")
@@ -125,7 +121,6 @@ void kprobe_arm_test_cases(void)
125 TEST_RR( op "ge" s " r11, r",11,N(val),", asr r",7, 6,"") \ 121 TEST_RR( op "ge" s " r11, r",11,N(val),", asr r",7, 6,"") \
126 TEST_RR( op "lt" s " r12, r",11,val, ", ror r",14,7,"") \ 122 TEST_RR( op "lt" s " r12, r",11,val, ", ror r",14,7,"") \
127 TEST_R( op "gt" s " r14, r13" ", lsl r",14,8,"") \ 123 TEST_R( op "gt" s " r14, r13" ", lsl r",14,8,"") \
128 TEST_R( op "le" s " r14, pc" ", lsl r",14,8,"") \
129 TEST( op "eq" s " r0, #0xf5") \ 124 TEST( op "eq" s " r0, #0xf5") \
130 TEST( op "ne" s " r11, #0xf5000000") \ 125 TEST( op "ne" s " r11, #0xf5000000") \
131 TEST( op s " r7, #0x000af000") \ 126 TEST( op s " r7, #0x000af000") \
@@ -159,12 +154,19 @@ void kprobe_arm_test_cases(void)
159 TEST_SUPPORTED("cmp pc, #0x1000"); 154 TEST_SUPPORTED("cmp pc, #0x1000");
160 TEST_SUPPORTED("cmp sp, #0x1000"); 155 TEST_SUPPORTED("cmp sp, #0x1000");
161 156
162 /* Data-processing with PC as shift*/ 157 /* Data-processing with PC and a shift count in a register */
163 TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) " @ cmp r12, r14, asl pc") 158 TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) " @ cmp r12, r14, asl pc")
164 TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) " @ mov r12, r14, asl pc") 159 TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) " @ mov r12, r14, asl pc")
165 TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) " @ add r10, r12, r14, asl pc") 160 TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) " @ add r10, r12, r14, asl pc")
166 161 TEST_UNSUPPORTED(__inst_arm(0xe151021f) " @ cmp r1, pc, lsl r2")
167 /* Data-processing with PC as shift*/ 162 TEST_UNSUPPORTED(__inst_arm(0xe17f0211) " @ cmn pc, r1, lsl r2")
163 TEST_UNSUPPORTED(__inst_arm(0xe1a0121f) " @ mov r1, pc, lsl r2")
164 TEST_UNSUPPORTED(__inst_arm(0xe1a0f211) " @ mov pc, r1, lsl r2")
165 TEST_UNSUPPORTED(__inst_arm(0xe042131f) " @ sub r1, r2, pc, lsl r3")
166 TEST_UNSUPPORTED(__inst_arm(0xe1cf1312) " @ bic r1, pc, r2, lsl r3")
167 TEST_UNSUPPORTED(__inst_arm(0xe081f312) " @ add pc, r1, r2, lsl r3")
168
169 /* Data-processing with PC as a target and status registers updated */
168 TEST_UNSUPPORTED("movs pc, r1") 170 TEST_UNSUPPORTED("movs pc, r1")
169 TEST_UNSUPPORTED("movs pc, r1, lsl r2") 171 TEST_UNSUPPORTED("movs pc, r1, lsl r2")
170 TEST_UNSUPPORTED("movs pc, #0x10000") 172 TEST_UNSUPPORTED("movs pc, #0x10000")
@@ -187,14 +189,14 @@ void kprobe_arm_test_cases(void)
187 TEST_BF_R ("add pc, pc, r",14,2f-1f-8,"") 189 TEST_BF_R ("add pc, pc, r",14,2f-1f-8,"")
188 TEST_BF_R ("add pc, r",14,2f-1f-8,", pc") 190 TEST_BF_R ("add pc, r",14,2f-1f-8,", pc")
189 TEST_BF_R ("mov pc, r",0,2f,"") 191 TEST_BF_R ("mov pc, r",0,2f,"")
190 TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"") 192 TEST_BF_R ("add pc, pc, r",14,(2f-1f-8)*2,", asr #1")
191 TEST_BB( "sub pc, pc, #1b-2b+8") 193 TEST_BB( "sub pc, pc, #1b-2b+8")
192#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7) 194#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
193 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */ 195 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
194#endif 196#endif
195 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"") 197 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"")
196 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc") 198 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc")
197 TEST_RR( "add pc, pc, r",10,-2,", asl r",11,1,"") 199 TEST_R( "add pc, pc, r",10,-2,", asl #1")
198#ifdef CONFIG_THUMB2_KERNEL 200#ifdef CONFIG_THUMB2_KERNEL
199 TEST_ARM_TO_THUMB_INTERWORK_R("add pc, pc, r",0,3f-1f-8+1,"") 201 TEST_ARM_TO_THUMB_INTERWORK_R("add pc, pc, r",0,3f-1f-8+1,"")
200 TEST_ARM_TO_THUMB_INTERWORK_R("sub pc, r",0,3f+8+1,", #8") 202 TEST_ARM_TO_THUMB_INTERWORK_R("sub pc, r",0,3f+8+1,", #8")
@@ -216,6 +218,7 @@ void kprobe_arm_test_cases(void)
216 TEST_BB_R("bx r",7,2f,"") 218 TEST_BB_R("bx r",7,2f,"")
217 TEST_BF_R("bxeq r",14,2f,"") 219 TEST_BF_R("bxeq r",14,2f,"")
218 220
221#if __LINUX_ARM_ARCH__ >= 5
219 TEST_R("clz r0, r",0, 0x0,"") 222 TEST_R("clz r0, r",0, 0x0,"")
220 TEST_R("clzeq r7, r",14,0x1,"") 223 TEST_R("clzeq r7, r",14,0x1,"")
221 TEST_R("clz lr, r",7, 0xffffffff,"") 224 TEST_R("clz lr, r",7, 0xffffffff,"")
@@ -337,6 +340,7 @@ void kprobe_arm_test_cases(void)
337 TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2") 340 TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2")
338 TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2") 341 TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2")
339 TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc") 342 TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc")
343#endif
340 344
341 TEST_GROUP("Multiply and multiply-accumulate") 345 TEST_GROUP("Multiply and multiply-accumulate")
342 346
@@ -559,6 +563,7 @@ void kprobe_arm_test_cases(void)
559 TEST_UNSUPPORTED("ldrsht r1, [r2], #48") 563 TEST_UNSUPPORTED("ldrsht r1, [r2], #48")
560#endif 564#endif
561 565
566#if __LINUX_ARM_ARCH__ >= 5
562 TEST_RPR( "strd r",0, VAL1,", [r",1, 48,", -r",2,24,"]") 567 TEST_RPR( "strd r",0, VAL1,", [r",1, 48,", -r",2,24,"]")
563 TEST_RPR( "strccd r",8, VAL2,", [r",13,0, ", r",12,48,"]") 568 TEST_RPR( "strccd r",8, VAL2,", [r",13,0, ", r",12,48,"]")
564 TEST_RPR( "strd r",4, VAL1,", [r",2, 24,", r",3, 48,"]!") 569 TEST_RPR( "strd r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
@@ -595,6 +600,7 @@ void kprobe_arm_test_cases(void)
595 TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) " @ ldrd r12, [pc, #48]!") 600 TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) " @ ldrd r12, [pc, #48]!")
596 TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) " @ ldrd pc, [r9], #48") 601 TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) " @ ldrd pc, [r9], #48")
597 TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) " @ ldrd lr, [r9], #48") 602 TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) " @ ldrd lr, [r9], #48")
603#endif
598 604
599 TEST_GROUP("Miscellaneous") 605 TEST_GROUP("Miscellaneous")
600 606
@@ -1227,7 +1233,9 @@ void kprobe_arm_test_cases(void)
1227 TEST_COPROCESSOR( "mrc"two" 0, 0, r0, cr0, cr0, 0") 1233 TEST_COPROCESSOR( "mrc"two" 0, 0, r0, cr0, cr0, 0")
1228 1234
1229 COPROCESSOR_INSTRUCTIONS_ST_LD("",e) 1235 COPROCESSOR_INSTRUCTIONS_ST_LD("",e)
1236#if __LINUX_ARM_ARCH__ >= 5
1230 COPROCESSOR_INSTRUCTIONS_MC_MR("",e) 1237 COPROCESSOR_INSTRUCTIONS_MC_MR("",e)
1238#endif
1231 TEST_UNSUPPORTED("svc 0") 1239 TEST_UNSUPPORTED("svc 0")
1232 TEST_UNSUPPORTED("svc 0xffffff") 1240 TEST_UNSUPPORTED("svc 0xffffff")
1233 1241
@@ -1287,7 +1295,9 @@ void kprobe_arm_test_cases(void)
1287 TEST( "blx __dummy_thumb_subroutine_odd") 1295 TEST( "blx __dummy_thumb_subroutine_odd")
1288#endif /* __LINUX_ARM_ARCH__ >= 6 */ 1296#endif /* __LINUX_ARM_ARCH__ >= 6 */
1289 1297
1298#if __LINUX_ARM_ARCH__ >= 5
1290 COPROCESSOR_INSTRUCTIONS_ST_LD("2",f) 1299 COPROCESSOR_INSTRUCTIONS_ST_LD("2",f)
1300#endif
1291#if __LINUX_ARM_ARCH__ >= 6 1301#if __LINUX_ARM_ARCH__ >= 6
1292 COPROCESSOR_INSTRUCTIONS_MC_MR("2",f) 1302 COPROCESSOR_INSTRUCTIONS_MC_MR("2",f)
1293#endif 1303#endif
diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c
index 379639998d5a..08d731294bcd 100644
--- a/arch/arm/kernel/kprobes-test.c
+++ b/arch/arm/kernel/kprobes-test.c
@@ -225,6 +225,7 @@ static int pre_handler_called;
225static int post_handler_called; 225static int post_handler_called;
226static int jprobe_func_called; 226static int jprobe_func_called;
227static int kretprobe_handler_called; 227static int kretprobe_handler_called;
228static int tests_failed;
228 229
229#define FUNC_ARG1 0x12345678 230#define FUNC_ARG1 0x12345678
230#define FUNC_ARG2 0xabcdef 231#define FUNC_ARG2 0xabcdef
@@ -461,6 +462,13 @@ static int run_api_tests(long (*func)(long, long))
461 462
462 pr_info(" jprobe\n"); 463 pr_info(" jprobe\n");
463 ret = test_jprobe(func); 464 ret = test_jprobe(func);
465#if defined(CONFIG_THUMB2_KERNEL) && !defined(MODULE)
466 if (ret == -EINVAL) {
467 pr_err("FAIL: Known longtime bug with jprobe on Thumb kernels\n");
468 tests_failed = ret;
469 ret = 0;
470 }
471#endif
464 if (ret < 0) 472 if (ret < 0)
465 return ret; 473 return ret;
466 474
@@ -1672,6 +1680,8 @@ static int __init run_all_tests(void)
1672 1680
1673out: 1681out:
1674 if (ret == 0) 1682 if (ret == 0)
1683 ret = tests_failed;
1684 if (ret == 0)
1675 pr_info("Finished kprobe tests OK\n"); 1685 pr_info("Finished kprobe tests OK\n");
1676 else 1686 else
1677 pr_err("kprobe tests failed\n"); 1687 pr_err("kprobe tests failed\n");
diff --git a/arch/arm/kernel/probes-arm.c b/arch/arm/kernel/probes-arm.c
index 51a13a027989..8eaef81d8344 100644
--- a/arch/arm/kernel/probes-arm.c
+++ b/arch/arm/kernel/probes-arm.c
@@ -341,12 +341,12 @@ static const union decode_item arm_cccc_000x_table[] = {
341 /* CMP (reg-shift reg) cccc 0001 0101 xxxx xxxx xxxx 0xx1 xxxx */ 341 /* CMP (reg-shift reg) cccc 0001 0101 xxxx xxxx xxxx 0xx1 xxxx */
342 /* CMN (reg-shift reg) cccc 0001 0111 xxxx xxxx xxxx 0xx1 xxxx */ 342 /* CMN (reg-shift reg) cccc 0001 0111 xxxx xxxx xxxx 0xx1 xxxx */
343 DECODE_EMULATEX (0x0f900090, 0x01100010, PROBES_DATA_PROCESSING_REG, 343 DECODE_EMULATEX (0x0f900090, 0x01100010, PROBES_DATA_PROCESSING_REG,
344 REGS(ANY, 0, NOPC, 0, ANY)), 344 REGS(NOPC, 0, NOPC, 0, NOPC)),
345 345
346 /* MOV (reg-shift reg) cccc 0001 101x xxxx xxxx xxxx 0xx1 xxxx */ 346 /* MOV (reg-shift reg) cccc 0001 101x xxxx xxxx xxxx 0xx1 xxxx */
347 /* MVN (reg-shift reg) cccc 0001 111x xxxx xxxx xxxx 0xx1 xxxx */ 347 /* MVN (reg-shift reg) cccc 0001 111x xxxx xxxx xxxx 0xx1 xxxx */
348 DECODE_EMULATEX (0x0fa00090, 0x01a00010, PROBES_DATA_PROCESSING_REG, 348 DECODE_EMULATEX (0x0fa00090, 0x01a00010, PROBES_DATA_PROCESSING_REG,
349 REGS(0, ANY, NOPC, 0, ANY)), 349 REGS(0, NOPC, NOPC, 0, NOPC)),
350 350
351 /* AND (reg-shift reg) cccc 0000 000x xxxx xxxx xxxx 0xx1 xxxx */ 351 /* AND (reg-shift reg) cccc 0000 000x xxxx xxxx xxxx 0xx1 xxxx */
352 /* EOR (reg-shift reg) cccc 0000 001x xxxx xxxx xxxx 0xx1 xxxx */ 352 /* EOR (reg-shift reg) cccc 0000 001x xxxx xxxx xxxx 0xx1 xxxx */
@@ -359,7 +359,7 @@ static const union decode_item arm_cccc_000x_table[] = {
359 /* ORR (reg-shift reg) cccc 0001 100x xxxx xxxx xxxx 0xx1 xxxx */ 359 /* ORR (reg-shift reg) cccc 0001 100x xxxx xxxx xxxx 0xx1 xxxx */
360 /* BIC (reg-shift reg) cccc 0001 110x xxxx xxxx xxxx 0xx1 xxxx */ 360 /* BIC (reg-shift reg) cccc 0001 110x xxxx xxxx xxxx 0xx1 xxxx */
361 DECODE_EMULATEX (0x0e000090, 0x00000010, PROBES_DATA_PROCESSING_REG, 361 DECODE_EMULATEX (0x0e000090, 0x00000010, PROBES_DATA_PROCESSING_REG,
362 REGS(ANY, ANY, NOPC, 0, ANY)), 362 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
363 363
364 DECODE_END 364 DECODE_END
365}; 365};
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 1ee91763fa7c..f8daa9cc5617 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -111,25 +111,14 @@ IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
111#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \ 111#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \
112 soc_is_exynos5420() || soc_is_exynos5800()) 112 soc_is_exynos5420() || soc_is_exynos5800())
113 113
114void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
115
116struct map_desc;
117extern void __iomem *sysram_ns_base_addr; 114extern void __iomem *sysram_ns_base_addr;
118extern void __iomem *sysram_base_addr; 115extern void __iomem *sysram_base_addr;
119void exynos_init_io(void); 116extern void __iomem *pmu_base_addr;
120void exynos_restart(enum reboot_mode mode, const char *cmd);
121void exynos_sysram_init(void); 117void exynos_sysram_init(void);
122void exynos_cpuidle_init(void);
123void exynos_cpufreq_init(void);
124void exynos_init_late(void);
125 118
126void exynos_firmware_init(void); 119void exynos_firmware_init(void);
127 120
128#ifdef CONFIG_PINCTRL_EXYNOS
129extern u32 exynos_get_eint_wake_mask(void); 121extern u32 exynos_get_eint_wake_mask(void);
130#else
131static inline u32 exynos_get_eint_wake_mask(void) { return 0xffffffff; }
132#endif
133 122
134#ifdef CONFIG_PM_SLEEP 123#ifdef CONFIG_PM_SLEEP
135extern void __init exynos_pm_init(void); 124extern void __init exynos_pm_init(void);
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index f38cf7c110cc..80cbbc74d2c8 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -19,6 +19,7 @@
19#include <linux/of_platform.h> 19#include <linux/of_platform.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/pm_domain.h> 21#include <linux/pm_domain.h>
22#include <linux/irqchip.h>
22 23
23#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
24#include <asm/hardware/cache-l2x0.h> 25#include <asm/hardware/cache-l2x0.h>
@@ -29,6 +30,9 @@
29#include "common.h" 30#include "common.h"
30#include "mfc.h" 31#include "mfc.h"
31#include "regs-pmu.h" 32#include "regs-pmu.h"
33#include "regs-sys.h"
34
35void __iomem *pmu_base_addr;
32 36
33static struct map_desc exynos4_iodesc[] __initdata = { 37static struct map_desc exynos4_iodesc[] __initdata = {
34 { 38 {
@@ -143,7 +147,7 @@ static struct map_desc exynos5_iodesc[] __initdata = {
143 }, 147 },
144}; 148};
145 149
146void exynos_restart(enum reboot_mode mode, const char *cmd) 150static void exynos_restart(enum reboot_mode mode, const char *cmd)
147{ 151{
148 struct device_node *np; 152 struct device_node *np;
149 u32 val = 0x1; 153 u32 val = 0x1;
@@ -173,10 +177,8 @@ static struct platform_device exynos_cpuidle = {
173 177
174void __init exynos_cpuidle_init(void) 178void __init exynos_cpuidle_init(void)
175{ 179{
176 if (soc_is_exynos5440()) 180 if (soc_is_exynos4210() || soc_is_exynos5250())
177 return; 181 platform_device_register(&exynos_cpuidle);
178
179 platform_device_register(&exynos_cpuidle);
180} 182}
181 183
182void __init exynos_cpufreq_init(void) 184void __init exynos_cpufreq_init(void)
@@ -206,7 +208,7 @@ void __init exynos_sysram_init(void)
206 } 208 }
207} 209}
208 210
209void __init exynos_init_late(void) 211static void __init exynos_init_late(void)
210{ 212{
211 if (of_machine_is_compatible("samsung,exynos5440")) 213 if (of_machine_is_compatible("samsung,exynos5440"))
212 /* to be supported later */ 214 /* to be supported later */
@@ -253,7 +255,7 @@ static void __init exynos_map_io(void)
253 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); 255 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
254} 256}
255 257
256void __init exynos_init_io(void) 258static void __init exynos_init_io(void)
257{ 259{
258 debug_ll_io_init(); 260 debug_ll_io_init();
259 261
@@ -265,6 +267,39 @@ void __init exynos_init_io(void)
265 exynos_map_io(); 267 exynos_map_io();
266} 268}
267 269
270static const struct of_device_id exynos_dt_pmu_match[] = {
271 { .compatible = "samsung,exynos3250-pmu" },
272 { .compatible = "samsung,exynos4210-pmu" },
273 { .compatible = "samsung,exynos4212-pmu" },
274 { .compatible = "samsung,exynos4412-pmu" },
275 { .compatible = "samsung,exynos5250-pmu" },
276 { .compatible = "samsung,exynos5420-pmu" },
277 { /*sentinel*/ },
278};
279
280static void exynos_map_pmu(void)
281{
282 struct device_node *np;
283
284 np = of_find_matching_node(NULL, exynos_dt_pmu_match);
285 if (np)
286 pmu_base_addr = of_iomap(np, 0);
287
288 if (!pmu_base_addr)
289 panic("failed to find exynos pmu register\n");
290}
291
292static void __init exynos_init_irq(void)
293{
294 irqchip_init();
295 /*
296 * Since platsmp.c needs pmu base address by the time
297 * DT is not unflatten so we can't use DT APIs before
298 * init_irq
299 */
300 exynos_map_pmu();
301}
302
268static void __init exynos_dt_machine_init(void) 303static void __init exynos_dt_machine_init(void)
269{ 304{
270 struct device_node *i2c_np; 305 struct device_node *i2c_np;
@@ -297,7 +332,7 @@ static void __init exynos_dt_machine_init(void)
297 * This is called from smp_prepare_cpus if we've built for SMP, but 332 * This is called from smp_prepare_cpus if we've built for SMP, but
298 * we still need to set it up for PM and firmware ops if not. 333 * we still need to set it up for PM and firmware ops if not.
299 */ 334 */
300 if (!IS_ENABLED(SMP)) 335 if (!IS_ENABLED(CONFIG_SMP))
301 exynos_sysram_init(); 336 exynos_sysram_init();
302 337
303 exynos_cpuidle_init(); 338 exynos_cpuidle_init();
@@ -345,6 +380,7 @@ DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
345 .smp = smp_ops(exynos_smp_ops), 380 .smp = smp_ops(exynos_smp_ops),
346 .map_io = exynos_init_io, 381 .map_io = exynos_init_io,
347 .init_early = exynos_firmware_init, 382 .init_early = exynos_firmware_init,
383 .init_irq = exynos_init_irq,
348 .init_machine = exynos_dt_machine_init, 384 .init_machine = exynos_dt_machine_init,
349 .init_late = exynos_init_late, 385 .init_late = exynos_init_late,
350 .dt_compat = exynos_dt_compat, 386 .dt_compat = exynos_dt_compat,
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index eb91d2350f8c..e8797bb78871 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -57,8 +57,13 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
57 57
58 boot_reg = sysram_ns_base_addr + 0x1c; 58 boot_reg = sysram_ns_base_addr + 0x1c;
59 59
60 if (!soc_is_exynos4212() && !soc_is_exynos3250()) 60 /*
61 boot_reg += 4*cpu; 61 * Almost all Exynos-series of SoCs that run in secure mode don't need
62 * additional offset for every CPU, with Exynos4412 being the only
63 * exception.
64 */
65 if (soc_is_exynos4412())
66 boot_reg += 4 * cpu;
62 67
63 __raw_writel(boot_addr, boot_reg); 68 __raw_writel(boot_addr, boot_reg);
64 return 0; 69 return 0;
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S
index cdd9d91e9933..b54f9701e421 100644
--- a/arch/arm/mach-exynos/headsmp.S
+++ b/arch/arm/mach-exynos/headsmp.S
@@ -1,5 +1,4 @@
1/* 1/*
2 * linux/arch/arm/mach-exynos4/headsmp.S
3 * 2 *
4 * Cloned from linux/arch/arm/mach-realview/headsmp.S 3 * Cloned from linux/arch/arm/mach-realview/headsmp.S
5 * 4 *
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 8a134d019cb3..572f6b1a08f1 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -1,5 +1,4 @@
1/* linux arch/arm/mach-exynos4/hotplug.c 1/*
2 *
3 * Cloned from linux/arch/arm/mach-realview/hotplug.c 2 * Cloned from linux/arch/arm/mach-realview/hotplug.c
4 * 3 *
5 * Copyright (C) 2002 ARM Ltd. 4 * Copyright (C) 2002 ARM Ltd.
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 548269a60634..963002fb15c3 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-exynos/include/mach/map.h 1/*
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 3 * http://www.samsung.com/
5 * 4 *
diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h
index 2a4cdb7cb326..e19df1f18c0d 100644
--- a/arch/arm/mach-exynos/include/mach/memory.h
+++ b/arch/arm/mach-exynos/include/mach/memory.h
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-exynos4/include/mach/memory.h 1/*
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 1c8d31e39520..39ad38f561f8 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-exynos4/platsmp.c 1 /*
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 202ca73e49c4..f127c0cefbb8 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -35,6 +35,7 @@
35 35
36#include "common.h" 36#include "common.h"
37#include "regs-pmu.h" 37#include "regs-pmu.h"
38#include "regs-sys.h"
38 39
39/** 40/**
40 * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping 41 * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index fe6570ebbdde..fd76e1b5a471 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -17,12 +17,14 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/pm_domain.h> 19#include <linux/pm_domain.h>
20#include <linux/clk.h>
20#include <linux/delay.h> 21#include <linux/delay.h>
21#include <linux/of_address.h> 22#include <linux/of_address.h>
22#include <linux/of_platform.h> 23#include <linux/of_platform.h>
23#include <linux/sched.h> 24#include <linux/sched.h>
24 25
25#include "regs-pmu.h" 26#define INT_LOCAL_PWR_EN 0x7
27#define MAX_CLK_PER_DOMAIN 4
26 28
27/* 29/*
28 * Exynos specific wrapper around the generic power domain 30 * Exynos specific wrapper around the generic power domain
@@ -32,6 +34,9 @@ struct exynos_pm_domain {
32 char const *name; 34 char const *name;
33 bool is_off; 35 bool is_off;
34 struct generic_pm_domain pd; 36 struct generic_pm_domain pd;
37 struct clk *oscclk;
38 struct clk *clk[MAX_CLK_PER_DOMAIN];
39 struct clk *pclk[MAX_CLK_PER_DOMAIN];
35}; 40};
36 41
37static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) 42static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
@@ -44,13 +49,26 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
44 pd = container_of(domain, struct exynos_pm_domain, pd); 49 pd = container_of(domain, struct exynos_pm_domain, pd);
45 base = pd->base; 50 base = pd->base;
46 51
47 pwr = power_on ? S5P_INT_LOCAL_PWR_EN : 0; 52 /* Set oscclk before powering off a domain*/
53 if (!power_on) {
54 int i;
55
56 for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
57 if (IS_ERR(pd->clk[i]))
58 break;
59 if (clk_set_parent(pd->clk[i], pd->oscclk))
60 pr_err("%s: error setting oscclk as parent to clock %d\n",
61 pd->name, i);
62 }
63 }
64
65 pwr = power_on ? INT_LOCAL_PWR_EN : 0;
48 __raw_writel(pwr, base); 66 __raw_writel(pwr, base);
49 67
50 /* Wait max 1ms */ 68 /* Wait max 1ms */
51 timeout = 10; 69 timeout = 10;
52 70
53 while ((__raw_readl(base + 0x4) & S5P_INT_LOCAL_PWR_EN) != pwr) { 71 while ((__raw_readl(base + 0x4) & INT_LOCAL_PWR_EN) != pwr) {
54 if (!timeout) { 72 if (!timeout) {
55 op = (power_on) ? "enable" : "disable"; 73 op = (power_on) ? "enable" : "disable";
56 pr_err("Power domain %s %s failed\n", domain->name, op); 74 pr_err("Power domain %s %s failed\n", domain->name, op);
@@ -60,6 +78,20 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
60 cpu_relax(); 78 cpu_relax();
61 usleep_range(80, 100); 79 usleep_range(80, 100);
62 } 80 }
81
82 /* Restore clocks after powering on a domain*/
83 if (power_on) {
84 int i;
85
86 for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
87 if (IS_ERR(pd->clk[i]))
88 break;
89 if (clk_set_parent(pd->clk[i], pd->pclk[i]))
90 pr_err("%s: error setting parent to clock%d\n",
91 pd->name, i);
92 }
93 }
94
63 return 0; 95 return 0;
64} 96}
65 97
@@ -152,9 +184,11 @@ static __init int exynos4_pm_init_power_domain(void)
152 184
153 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { 185 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
154 struct exynos_pm_domain *pd; 186 struct exynos_pm_domain *pd;
155 int on; 187 int on, i;
188 struct device *dev;
156 189
157 pdev = of_find_device_by_node(np); 190 pdev = of_find_device_by_node(np);
191 dev = &pdev->dev;
158 192
159 pd = kzalloc(sizeof(*pd), GFP_KERNEL); 193 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
160 if (!pd) { 194 if (!pd) {
@@ -170,9 +204,33 @@ static __init int exynos4_pm_init_power_domain(void)
170 pd->pd.power_on = exynos_pd_power_on; 204 pd->pd.power_on = exynos_pd_power_on;
171 pd->pd.of_node = np; 205 pd->pd.of_node = np;
172 206
207 pd->oscclk = clk_get(dev, "oscclk");
208 if (IS_ERR(pd->oscclk))
209 goto no_clk;
210
211 for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
212 char clk_name[8];
213
214 snprintf(clk_name, sizeof(clk_name), "clk%d", i);
215 pd->clk[i] = clk_get(dev, clk_name);
216 if (IS_ERR(pd->clk[i]))
217 break;
218 snprintf(clk_name, sizeof(clk_name), "pclk%d", i);
219 pd->pclk[i] = clk_get(dev, clk_name);
220 if (IS_ERR(pd->pclk[i])) {
221 clk_put(pd->clk[i]);
222 pd->clk[i] = ERR_PTR(-EINVAL);
223 break;
224 }
225 }
226
227 if (IS_ERR(pd->clk[0]))
228 clk_put(pd->oscclk);
229
230no_clk:
173 platform_set_drvdata(pdev, pd); 231 platform_set_drvdata(pdev, pd);
174 232
175 on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN; 233 on = __raw_readl(pd->base + 0x4) & INT_LOCAL_PWR_EN;
176 234
177 pm_genpd_init(&pd->pd, NULL, !on); 235 pm_genpd_init(&pd->pd, NULL, !on);
178 } 236 }
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index fb0deda3b3a4..dcfcb44c3c55 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -11,7 +11,6 @@
11 11
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/bug.h>
15 14
16#include "common.h" 15#include "common.h"
17#include "regs-pmu.h" 16#include "regs-pmu.h"
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 1d13b08708f0..1993e6bd5388 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -15,7 +15,6 @@
15#include <mach/map.h> 15#include <mach/map.h>
16 16
17#define S5P_PMUREG(x) (S5P_VA_PMU + (x)) 17#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
18#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
19 18
20#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200) 19#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
21 20
@@ -127,7 +126,6 @@
127#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8) 126#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8)
128 127
129#define S5P_CORE_LOCAL_PWR_EN 0x3 128#define S5P_CORE_LOCAL_PWR_EN 0x3
130#define S5P_INT_LOCAL_PWR_EN 0x7
131 129
132/* Only for EXYNOS4210 */ 130/* Only for EXYNOS4210 */
133#define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154) 131#define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154)
@@ -188,8 +186,6 @@
188 186
189/* For EXYNOS5 */ 187/* For EXYNOS5 */
190 188
191#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
192
193#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408) 189#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
194#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C) 190#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
195 191
diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
new file mode 100644
index 000000000000..84332b0dd7a6
--- /dev/null
+++ b/arch/arm/mach-exynos/regs-sys.h
@@ -0,0 +1,22 @@
1/*
2 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - system register definition
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#ifndef __ASM_ARCH_REGS_SYS_H
13#define __ASM_ARCH_REGS_SYS_H __FILE__
14
15#include <mach/map.h>
16
17#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
18
19/* For EXYNOS5 */
20#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
21
22#endif /* __ASM_ARCH_REGS_SYS_H */
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 4ba587da89d2..84acdfd1d715 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -67,8 +67,12 @@ static void clk_gate2_disable(struct clk_hw *hw)
67 67
68 spin_lock_irqsave(gate->lock, flags); 68 spin_lock_irqsave(gate->lock, flags);
69 69
70 if (gate->share_count && --(*gate->share_count) > 0) 70 if (gate->share_count) {
71 goto out; 71 if (WARN_ON(*gate->share_count == 0))
72 goto out;
73 else if (--(*gate->share_count) > 0)
74 goto out;
75 }
72 76
73 reg = readl(gate->reg); 77 reg = readl(gate->reg);
74 reg &= ~(3 << gate->bit_idx); 78 reg &= ~(3 << gate->bit_idx);
@@ -78,19 +82,26 @@ out:
78 spin_unlock_irqrestore(gate->lock, flags); 82 spin_unlock_irqrestore(gate->lock, flags);
79} 83}
80 84
81static int clk_gate2_is_enabled(struct clk_hw *hw) 85static int clk_gate2_reg_is_enabled(void __iomem *reg, u8 bit_idx)
82{ 86{
83 u32 reg; 87 u32 val = readl(reg);
84 struct clk_gate2 *gate = to_clk_gate2(hw);
85 88
86 reg = readl(gate->reg); 89 if (((val >> bit_idx) & 1) == 1)
87
88 if (((reg >> gate->bit_idx) & 1) == 1)
89 return 1; 90 return 1;
90 91
91 return 0; 92 return 0;
92} 93}
93 94
95static int clk_gate2_is_enabled(struct clk_hw *hw)
96{
97 struct clk_gate2 *gate = to_clk_gate2(hw);
98
99 if (gate->share_count)
100 return !!(*gate->share_count);
101 else
102 return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);
103}
104
94static struct clk_ops clk_gate2_ops = { 105static struct clk_ops clk_gate2_ops = {
95 .enable = clk_gate2_enable, 106 .enable = clk_gate2_enable,
96 .disable = clk_gate2_disable, 107 .disable = clk_gate2_disable,
@@ -116,6 +127,10 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
116 gate->bit_idx = bit_idx; 127 gate->bit_idx = bit_idx;
117 gate->flags = clk_gate2_flags; 128 gate->flags = clk_gate2_flags;
118 gate->lock = lock; 129 gate->lock = lock;
130
131 /* Initialize share_count per hardware state */
132 if (share_count)
133 *share_count = clk_gate2_reg_is_enabled(reg, bit_idx) ? 1 : 0;
119 gate->share_count = share_count; 134 gate->share_count = share_count;
120 135
121 init.name = name; 136 init.name = name;
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 332af927f4d3..67fd26a18441 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -76,7 +76,7 @@
76 * (assuming that it is counting N upwards), or -2 if the enclosing loop 76 * (assuming that it is counting N upwards), or -2 if the enclosing loop
77 * should skip to the next iteration (again assuming N is increasing). 77 * should skip to the next iteration (again assuming N is increasing).
78 */ 78 */
79static int _dpll_test_fint(struct clk_hw_omap *clk, u8 n) 79static int _dpll_test_fint(struct clk_hw_omap *clk, unsigned int n)
80{ 80{
81 struct dpll_data *dd; 81 struct dpll_data *dd;
82 long fint, fint_min, fint_max; 82 long fint, fint_min, fint_max;
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 04dab2fcf862..ee6c784cd6b7 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -26,11 +26,14 @@
26#define OMAP3430_EN_WDT3_SHIFT 12 26#define OMAP3430_EN_WDT3_SHIFT 12
27#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK (1 << 0) 27#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK (1 << 0)
28#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0 28#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0
29#define OMAP3430_IVA2_DPLL_FREQSEL_SHIFT 4
29#define OMAP3430_IVA2_DPLL_FREQSEL_MASK (0xf << 4) 30#define OMAP3430_IVA2_DPLL_FREQSEL_MASK (0xf << 4)
30#define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT 3 31#define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT 3
32#define OMAP3430_EN_IVA2_DPLL_SHIFT 0
31#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0) 33#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0)
32#define OMAP3430_ST_IVA2_SHIFT 0 34#define OMAP3430_ST_IVA2_SHIFT 0
33#define OMAP3430_ST_IVA2_CLK_MASK (1 << 0) 35#define OMAP3430_ST_IVA2_CLK_MASK (1 << 0)
36#define OMAP3430_AUTO_IVA2_DPLL_SHIFT 0
34#define OMAP3430_AUTO_IVA2_DPLL_MASK (0x7 << 0) 37#define OMAP3430_AUTO_IVA2_DPLL_MASK (0x7 << 0)
35#define OMAP3430_IVA2_CLK_SRC_SHIFT 19 38#define OMAP3430_IVA2_CLK_SRC_SHIFT 19
36#define OMAP3430_IVA2_CLK_SRC_WIDTH 3 39#define OMAP3430_IVA2_CLK_SRC_WIDTH 3
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index b2d252bf4a53..dc571f1d3b8a 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -162,7 +162,8 @@ static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
162} 162}
163#endif 163#endif
164 164
165#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 165#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
166 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
166void omap44xx_restart(enum reboot_mode mode, const char *cmd); 167void omap44xx_restart(enum reboot_mode mode, const char *cmd);
167#else 168#else
168static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd) 169static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 592ba0a0ecf3..b6f8f348296e 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -297,33 +297,6 @@ static void omap_init_audio(void)
297static inline void omap_init_audio(void) {} 297static inline void omap_init_audio(void) {}
298#endif 298#endif
299 299
300#if defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI) || \
301 defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI_MODULE)
302
303static struct platform_device omap_hdmi_audio = {
304 .name = "omap-hdmi-audio",
305 .id = -1,
306};
307
308static void __init omap_init_hdmi_audio(void)
309{
310 struct omap_hwmod *oh;
311 struct platform_device *pdev;
312
313 oh = omap_hwmod_lookup("dss_hdmi");
314 if (!oh)
315 return;
316
317 pdev = omap_device_build("omap-hdmi-audio-dai", -1, oh, NULL, 0);
318 WARN(IS_ERR(pdev),
319 "Can't build omap_device for omap-hdmi-audio-dai.\n");
320
321 platform_device_register(&omap_hdmi_audio);
322}
323#else
324static inline void omap_init_hdmi_audio(void) {}
325#endif
326
327#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 300#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
328 301
329#include <linux/platform_data/spi-omap2-mcspi.h> 302#include <linux/platform_data/spi-omap2-mcspi.h>
@@ -459,7 +432,6 @@ static int __init omap2_init_devices(void)
459 */ 432 */
460 omap_init_audio(); 433 omap_init_audio();
461 omap_init_camera(); 434 omap_init_camera();
462 omap_init_hdmi_audio();
463 omap_init_mbox(); 435 omap_init_mbox();
464 /* If dtb is there, the devices will be created dynamically */ 436 /* If dtb is there, the devices will be created dynamically */
465 if (!of_have_populated_dt()) { 437 if (!of_have_populated_dt()) {
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index b8208b4b1bd9..f7492df1cbba 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -29,6 +29,7 @@
29#ifdef CONFIG_TIDSPBRIDGE_DVFS 29#ifdef CONFIG_TIDSPBRIDGE_DVFS
30#include "omap-pm.h" 30#include "omap-pm.h"
31#endif 31#endif
32#include "soc.h"
32 33
33#include <linux/platform_data/dsp-omap.h> 34#include <linux/platform_data/dsp-omap.h>
34 35
@@ -59,6 +60,9 @@ void __init omap_dsp_reserve_sdram_memblock(void)
59 phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE; 60 phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
60 phys_addr_t paddr; 61 phys_addr_t paddr;
61 62
63 if (!cpu_is_omap34xx())
64 return;
65
62 if (!size) 66 if (!size)
63 return; 67 return;
64 68
@@ -83,6 +87,9 @@ static int __init omap_dsp_init(void)
83 int err = -ENOMEM; 87 int err = -ENOMEM;
84 struct omap_dsp_platform_data *pdata = &omap_dsp_pdata; 88 struct omap_dsp_platform_data *pdata = &omap_dsp_pdata;
85 89
90 if (!cpu_is_omap34xx())
91 return 0;
92
86 pdata->phys_mempool_base = omap_dsp_get_mempool_base(); 93 pdata->phys_mempool_base = omap_dsp_get_mempool_base();
87 94
88 if (pdata->phys_mempool_base) { 95 if (pdata->phys_mempool_base) {
@@ -115,6 +122,9 @@ module_init(omap_dsp_init);
115 122
116static void __exit omap_dsp_exit(void) 123static void __exit omap_dsp_exit(void)
117{ 124{
125 if (!cpu_is_omap34xx())
126 return;
127
118 platform_device_unregister(omap_dsp_pdev); 128 platform_device_unregister(omap_dsp_pdev);
119} 129}
120module_exit(omap_dsp_exit); 130module_exit(omap_dsp_exit);
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 2c0c2816900f..8bc13380f0a0 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1615,7 +1615,7 @@ static int gpmc_probe_dt(struct platform_device *pdev)
1615 return ret; 1615 return ret;
1616 } 1616 }
1617 1617
1618 for_each_child_of_node(pdev->dev.of_node, child) { 1618 for_each_available_child_of_node(pdev->dev.of_node, child) {
1619 1619
1620 if (!child->name) 1620 if (!child->name)
1621 continue; 1621 continue;
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398cec05..284324f2b98a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1268,9 +1268,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = {
1268}; 1268};
1269 1269
1270/* sata */ 1270/* sata */
1271static struct omap_hwmod_opt_clk sata_opt_clks[] = {
1272 { .role = "ref_clk", .clk = "sata_ref_clk" },
1273};
1274 1271
1275static struct omap_hwmod dra7xx_sata_hwmod = { 1272static struct omap_hwmod dra7xx_sata_hwmod = {
1276 .name = "sata", 1273 .name = "sata",
@@ -1278,6 +1275,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
1278 .clkdm_name = "l3init_clkdm", 1275 .clkdm_name = "l3init_clkdm",
1279 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, 1276 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
1280 .main_clk = "func_48m_fclk", 1277 .main_clk = "func_48m_fclk",
1278 .mpu_rt_idx = 1,
1281 .prcm = { 1279 .prcm = {
1282 .omap4 = { 1280 .omap4 = {
1283 .clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET, 1281 .clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1285,8 +1283,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
1285 .modulemode = MODULEMODE_SWCTRL, 1283 .modulemode = MODULEMODE_SWCTRL,
1286 }, 1284 },
1287 }, 1285 },
1288 .opt_clks = sata_opt_clks,
1289 .opt_clks_cnt = ARRAY_SIZE(sata_opt_clks),
1290}; 1286};
1291 1287
1292/* 1288/*
@@ -1731,8 +1727,20 @@ static struct omap_hwmod dra7xx_uart6_hwmod = {
1731 * 1727 *
1732 */ 1728 */
1733 1729
1730static struct omap_hwmod_class_sysconfig dra7xx_usb_otg_ss_sysc = {
1731 .rev_offs = 0x0000,
1732 .sysc_offs = 0x0010,
1733 .sysc_flags = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
1734 SYSC_HAS_SIDLEMODE),
1735 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1736 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
1737 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
1738 .sysc_fields = &omap_hwmod_sysc_type2,
1739};
1740
1734static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = { 1741static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = {
1735 .name = "usb_otg_ss", 1742 .name = "usb_otg_ss",
1743 .sysc = &dra7xx_usb_otg_ss_sysc,
1736}; 1744};
1737 1745
1738/* usb_otg_ss1 */ 1746/* usb_otg_ss1 */
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 106132db532b..cbefbd7cfdb5 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -35,6 +35,8 @@
35#define OMAP3430_LOGICSTATEST_MASK (1 << 2) 35#define OMAP3430_LOGICSTATEST_MASK (1 << 2)
36#define OMAP3430_LASTLOGICSTATEENTERED_MASK (1 << 2) 36#define OMAP3430_LASTLOGICSTATEENTERED_MASK (1 << 2)
37#define OMAP3430_LASTPOWERSTATEENTERED_MASK (0x3 << 0) 37#define OMAP3430_LASTPOWERSTATEENTERED_MASK (0x3 << 0)
38#define OMAP3430_GRPSEL_MCBSP5_MASK (1 << 10)
39#define OMAP3430_GRPSEL_MCBSP1_MASK (1 << 9)
38#define OMAP3630_GRPSEL_UART4_MASK (1 << 18) 40#define OMAP3630_GRPSEL_UART4_MASK (1 << 18)
39#define OMAP3430_GRPSEL_GPIO6_MASK (1 << 17) 41#define OMAP3430_GRPSEL_GPIO6_MASK (1 << 17)
40#define OMAP3430_GRPSEL_GPIO5_MASK (1 << 16) 42#define OMAP3430_GRPSEL_GPIO5_MASK (1 << 16)
@@ -42,6 +44,10 @@
42#define OMAP3430_GRPSEL_GPIO3_MASK (1 << 14) 44#define OMAP3430_GRPSEL_GPIO3_MASK (1 << 14)
43#define OMAP3430_GRPSEL_GPIO2_MASK (1 << 13) 45#define OMAP3430_GRPSEL_GPIO2_MASK (1 << 13)
44#define OMAP3430_GRPSEL_UART3_MASK (1 << 11) 46#define OMAP3430_GRPSEL_UART3_MASK (1 << 11)
47#define OMAP3430_GRPSEL_GPT8_MASK (1 << 9)
48#define OMAP3430_GRPSEL_GPT7_MASK (1 << 8)
49#define OMAP3430_GRPSEL_GPT6_MASK (1 << 7)
50#define OMAP3430_GRPSEL_GPT5_MASK (1 << 6)
45#define OMAP3430_GRPSEL_MCBSP4_MASK (1 << 2) 51#define OMAP3430_GRPSEL_MCBSP4_MASK (1 << 2)
46#define OMAP3430_GRPSEL_MCBSP3_MASK (1 << 1) 52#define OMAP3430_GRPSEL_MCBSP3_MASK (1 << 1)
47#define OMAP3430_GRPSEL_MCBSP2_MASK (1 << 0) 53#define OMAP3430_GRPSEL_MCBSP2_MASK (1 << 0)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 076172b69422..7c3fb41a462e 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -664,7 +664,7 @@ static int l2c310_cpu_enable_flz(struct notifier_block *nb, unsigned long act, v
664 664
665static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock) 665static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)
666{ 666{
667 unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_PART_MASK; 667 unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_RTL_MASK;
668 bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9; 668 bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9;
669 669
670 if (rev >= L310_CACHE_ID_RTL_R2P0) { 670 if (rev >= L310_CACHE_ID_RTL_R2P0) {
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-17 21:14:06 -0400